OMAP: Rename OMAP_MPUIO_BASE to OMAP1_MPUIO_BASE
Rename OMAP_MPUIO_BASE to OMAP1_MPUIO_BASE Signed-off-by: Tony Lindgren <tony@atomide.com>
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941132606c
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6175556fdc
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@ -99,7 +99,7 @@
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#define OMAP850_GPIO_INT_MASK 0x10
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#define OMAP850_GPIO_INT_STATUS 0x14
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#define OMAP1_MPUIO_VBASE OMAP1_IO_ADDRESS(OMAP_MPUIO_BASE)
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#define OMAP1_MPUIO_VBASE OMAP1_IO_ADDRESS(OMAP1_MPUIO_BASE)
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/*
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* omap24xx specific GPIO registers
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@ -224,7 +224,7 @@ static struct gpio_bank gpio_bank_730[7] = {
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#ifdef CONFIG_ARCH_OMAP850
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static struct gpio_bank gpio_bank_850[7] = {
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{ OMAP_MPUIO_BASE, INT_850_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO },
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{ OMAP1_MPUIO_BASE, INT_850_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO },
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{ OMAP850_GPIO1_BASE, INT_850_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_850 },
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{ OMAP850_GPIO2_BASE, INT_850_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_850 },
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{ OMAP850_GPIO3_BASE, INT_850_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_850 },
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@ -29,7 +29,7 @@
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#include <linux/io.h>
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#include <mach/irqs.h>
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#define OMAP_MPUIO_BASE 0xfffb5000
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#define OMAP1_MPUIO_BASE 0xfffb5000
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#if (defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850))
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@ -116,7 +116,7 @@ static irqreturn_t omap_kp_interrupt(int irq, void *dev_id)
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}
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} else
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/* disable keyboard interrupt and schedule for handling */
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omap_writew(1, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
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omap_writew(1, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
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tasklet_schedule(&kp_tasklet);
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@ -143,20 +143,20 @@ static void omap_kp_scan_keypad(struct omap_kp *omap_kp, unsigned char *state)
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} else {
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/* disable keyboard interrupt and schedule for handling */
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omap_writew(1, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
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omap_writew(1, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
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/* read the keypad status */
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omap_writew(0xff, OMAP_MPUIO_BASE + OMAP_MPUIO_KBC);
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omap_writew(0xff, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBC);
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for (col = 0; col < omap_kp->cols; col++) {
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omap_writew(~(1 << col) & 0xff,
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OMAP_MPUIO_BASE + OMAP_MPUIO_KBC);
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OMAP1_MPUIO_BASE + OMAP_MPUIO_KBC);
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udelay(omap_kp->delay);
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state[col] = ~omap_readw(OMAP_MPUIO_BASE +
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state[col] = ~omap_readw(OMAP1_MPUIO_BASE +
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OMAP_MPUIO_KBR_LATCH) & 0xff;
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}
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omap_writew(0x00, OMAP_MPUIO_BASE + OMAP_MPUIO_KBC);
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omap_writew(0x00, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBC);
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udelay(2);
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}
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}
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@ -234,7 +234,7 @@ static void omap_kp_tasklet(unsigned long data)
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for (i = 0; i < omap_kp_data->rows; i++)
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enable_irq(gpio_to_irq(row_gpios[i]));
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} else {
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omap_writew(0, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
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omap_writew(0, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
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kp_cur_group = -1;
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}
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}
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@ -317,7 +317,7 @@ static int __devinit omap_kp_probe(struct platform_device *pdev)
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/* Disable the interrupt for the MPUIO keyboard */
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if (!cpu_is_omap24xx())
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omap_writew(1, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
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omap_writew(1, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
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keymap = pdata->keymap;
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@ -391,7 +391,7 @@ static int __devinit omap_kp_probe(struct platform_device *pdev)
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}
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if (pdata->dbounce)
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omap_writew(0xff, OMAP_MPUIO_BASE + OMAP_MPUIO_GPIO_DEBOUNCING);
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omap_writew(0xff, OMAP1_MPUIO_BASE + OMAP_MPUIO_GPIO_DEBOUNCING);
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/* scan current status and enable interrupt */
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omap_kp_scan_keypad(omap_kp, keypad_state);
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@ -402,7 +402,7 @@ static int __devinit omap_kp_probe(struct platform_device *pdev)
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"omap-keypad", omap_kp) < 0)
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goto err4;
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}
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omap_writew(0, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
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omap_writew(0, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
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} else {
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for (irq_idx = 0; irq_idx < omap_kp->rows; irq_idx++) {
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if (request_irq(gpio_to_irq(row_gpios[irq_idx]),
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@ -449,7 +449,7 @@ static int __devexit omap_kp_remove(struct platform_device *pdev)
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free_irq(gpio_to_irq(row_gpios[i]), 0);
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}
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} else {
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omap_writew(1, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
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omap_writew(1, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
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free_irq(omap_kp->irq, 0);
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}
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@ -63,7 +63,7 @@ static void ams_delta_write_byte(struct mtd_info *mtd, u_char byte)
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{
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struct nand_chip *this = mtd->priv;
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omap_writew(0, (OMAP_MPUIO_BASE + OMAP_MPUIO_IO_CNTL));
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omap_writew(0, (OMAP1_MPUIO_BASE + OMAP_MPUIO_IO_CNTL));
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omap_writew(byte, this->IO_ADDR_W);
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ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NWE, 0);
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ndelay(40);
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@ -78,7 +78,7 @@ static u_char ams_delta_read_byte(struct mtd_info *mtd)
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ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE, 0);
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ndelay(40);
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omap_writew(~0, (OMAP_MPUIO_BASE + OMAP_MPUIO_IO_CNTL));
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omap_writew(~0, (OMAP1_MPUIO_BASE + OMAP_MPUIO_IO_CNTL));
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res = omap_readw(this->IO_ADDR_R);
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ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE,
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AMS_DELTA_LATCH2_NAND_NRE);
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@ -178,8 +178,8 @@ static int __init ams_delta_init(void)
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ams_delta_mtd->priv = this;
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/* Set address of NAND IO lines */
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this->IO_ADDR_R = (OMAP_MPUIO_BASE + OMAP_MPUIO_INPUT_LATCH);
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this->IO_ADDR_W = (OMAP_MPUIO_BASE + OMAP_MPUIO_OUTPUT);
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this->IO_ADDR_R = (OMAP1_MPUIO_BASE + OMAP_MPUIO_INPUT_LATCH);
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this->IO_ADDR_W = (OMAP1_MPUIO_BASE + OMAP_MPUIO_OUTPUT);
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this->read_byte = ams_delta_read_byte;
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this->write_buf = ams_delta_write_buf;
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this->read_buf = ams_delta_read_buf;
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