RISC-V updates for v5.3-rc3
Three minor RISC-V-related changes for v5.3-rc3: - Add build ID to VDSO builds to avoid a double-free in perf when libelf isn't used - Align the RV64 defconfig to the output of "make savedefconfig" so subsequent defconfig patches don't get out of hand - Drop a superfluous DT property from the FU540 SoC DT data (since it must be already set in board data that includes it) -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEElRDoIDdEz9/svf2Kx4+xDQu9KksFAl1Fk/wACgkQx4+xDQu9 KkuE7w/+KUTC3UVH0kmgLHWTDpBpIM9fCEHBf6yFeNcodKt4a6cOasQcKxH2W1Ly RdgEvIjB25vA9hjOqs9c1CI62WWN4oZ/HoRgKrhqR9v20nMTXEBMN/3Avv/01Q8t W3vOvKViwSmft1MpgY4bnD8ECGFU8C4P/uwQj3YTj9qNhcxCf8uOM+PEpaYYckin YogUjQWYbyQCAnt+FECvPr6fq0TGLSVedF4oe+3AX/P4XBDmyWJ0xnSqZsUaa1/x g34dCVAbKTnHKlN1diq1QeGySv4w9EmLx2IXARFhVemiIr+BpES8pDmrmSylnOH8 SdJHttpvDvGSIQEPS3ja2gufQNs0INeQoRmAe1IUWkw1UgYjH9AQ0GsK6xONCUGQ YB6Sc/9NPZa8xAkRBgNiv0W2v1QTxUAwInT7/tYf9r4YFXEZl8YMp/73Y4w4W8fV 4oym0JCUUuS5hTb2fUYA7dssprMdx620hl6X973spzbFEcciQKX2IDn9rrpu6buU 5nHz2tA76eFbIaJ52P4DPTDncOvRGHj0BpfnzsUa72Vucf1tkg9bkD7ZT1TRglCP 86c2FNE15+NMKG6i6x98voRJJ+gSBSPalTebyX3sU8SZvRkHogahuIB+JPooD/8m rnuTK26M8uGigoTEtN9sqhcx/95HdM4EyyfE2KyTJryeTU9GqCA= =CIhE -----END PGP SIGNATURE----- Merge tag 'riscv/for-v5.3-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V fixes from Paul Walmsley: "Three minor RISC-V-related changes for v5.3-rc3: - Add build ID to VDSO builds to avoid a double-free in perf when libelf isn't used - Align the RV64 defconfig to the output of "make savedefconfig" so subsequent defconfig patches don't get out of hand - Drop a superfluous DT property from the FU540 SoC DT data (since it must be already set in board data that includes it)" * tag 'riscv/for-v5.3-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: defconfig: align RV64 defconfig to the output of "make savedefconfig" riscv: dts: fu540-c000: drop "timebase-frequency" riscv: Fix perf record without libelf support
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commit
616725492e
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@ -21,7 +21,6 @@
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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timebase-frequency = <1000000>;
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cpu0: cpu@0 {
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compatible = "sifive,e51", "sifive,rocket0", "riscv";
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device_type = "cpu";
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@ -34,6 +34,7 @@ CONFIG_PCIEPORTBUS=y
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CONFIG_PCI_HOST_GENERIC=y
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CONFIG_PCIE_XILINX=y
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CONFIG_DEVTMPFS=y
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CONFIG_DEVTMPFS_MOUNT=y
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CONFIG_BLK_DEV_LOOP=y
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CONFIG_VIRTIO_BLK=y
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CONFIG_BLK_DEV_SD=y
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@ -53,6 +54,8 @@ CONFIG_SERIAL_8250_CONSOLE=y
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CONFIG_SERIAL_OF_PLATFORM=y
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CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
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CONFIG_HVC_RISCV_SBI=y
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CONFIG_SPI=y
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CONFIG_SPI_SIFIVE=y
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# CONFIG_PTP_1588_CLOCK is not set
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CONFIG_DRM=y
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CONFIG_DRM_RADEON=y
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@ -66,8 +69,9 @@ CONFIG_USB_OHCI_HCD=y
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CONFIG_USB_OHCI_HCD_PLATFORM=y
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CONFIG_USB_STORAGE=y
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CONFIG_USB_UAS=y
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CONFIG_MMC=y
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CONFIG_MMC_SPI=y
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CONFIG_VIRTIO_MMIO=y
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CONFIG_SPI_SIFIVE=y
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CONFIG_EXT4_FS=y
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CONFIG_EXT4_FS_POSIX_ACL=y
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CONFIG_AUTOFS4_FS=y
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@ -83,8 +87,4 @@ CONFIG_ROOT_NFS=y
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CONFIG_CRYPTO_USER_API_HASH=y
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CONFIG_CRYPTO_DEV_VIRTIO=y
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CONFIG_PRINTK_TIME=y
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CONFIG_SPI=y
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CONFIG_MMC_SPI=y
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CONFIG_MMC=y
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CONFIG_DEVTMPFS_MOUNT=y
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# CONFIG_RCU_TRACE is not set
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@ -37,7 +37,7 @@ $(obj)/vdso.so.dbg: $(src)/vdso.lds $(obj-vdso) FORCE
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# these symbols in the kernel code rather than hand-coded addresses.
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SYSCFLAGS_vdso.so.dbg = -shared -s -Wl,-soname=linux-vdso.so.1 \
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-Wl,--hash-style=both
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-Wl,--build-id -Wl,--hash-style=both
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$(obj)/vdso-dummy.o: $(src)/vdso.lds $(obj)/rt_sigreturn.o FORCE
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$(call if_changed,vdsold)
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