ARM: tegra: Device tree changes for v4.18-rc1
Contains a fix for the high-speed UART on Toradex Apalis TK1 boards as well as IOMMU enablement for various devices on Tegra30 and Tegra30. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlr+36YTHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zoVkqEACd/XRFCO2OLfH+31Ekh8jrEiZHe1B3 nWG3SVq2seeECRAGl10ZxYaTcrIlw/Xu9+VhS+6+G+jcAWX0j4OAkUNtmfaAhK3+ gfq/L9bIdsDGiBW11kYw+XvjAWk3AKOo/53b+bGS/ORkhni/BlXkM9cmXJOuPkCV 06/L3iUTJp2PbcHgRmszzuQCxSXBP6hv1X3ydtHb69ziZhfi1boDhdFeBBPCZpFa KdSwL4XDrdz6gKus8+Ps5QreKSXdjzEJp/PZGb0UOu304OLB3RnWfBl64DHx72p5 h4wkQD930+ySAV0Mlg7P9CwalwSNDzKX5X9QfoSgJHh9rNA8wi6qDJI0jnRQ6kjH EbKbgP4tjTuhTeR8DRQXRQNrvBFtWRS4koQQjqeadBtoWv1L2oLd6Sd8jLAO2CY6 aMtACLdysbIRYuOUrRKAXhLPADKupFn2sEUGF8/iHKhlFZJ0fFKv9W7eYZFG6r1O 78yvI+ciDVRYRUmq87m7x+OBkgM9chGCKbDNG8p+d92z9DtgvfaG5OM3913S6S7B 2h8l2juuiuVGRF5WRn/Y4uhFzlkxCBY0w04lpAuMqyIgonQQAbTl5sA/fFvduo70 Gf7wCobNiswny7vmIbDdWPV3n1hhaoTltDHdf5lBCgH7PypAV6aFPa5P1UNmN/Fl zMWRfEkr+xEyDQ== =I1bn -----END PGP SIGNATURE----- Merge tag 'tegra-for-4.18-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt ARM: tegra: Device tree changes for v4.18-rc1 Contains a fix for the high-speed UART on Toradex Apalis TK1 boards as well as IOMMU enablement for various devices on Tegra30 and Tegra30. * tag 'tegra-for-4.18-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: dts: tegra114: Add IOMMU nodes to Host1x and its clients ARM: dts: tegra30: Add IOMMU nodes to Host1x and its clients ARM: tegra: apalis-tk1: Fix high speed UART compatible Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
6115d74083
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@ -19,6 +19,7 @@
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clocks = <&tegra_car TEGRA114_CLK_HOST1X>;
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resets = <&tegra_car 28>;
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reset-names = "host1x";
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iommus = <&mc TEGRA_SWGROUP_HC>;
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#address-cells = <1>;
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#size-cells = <1>;
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@ -32,6 +33,8 @@
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clocks = <&tegra_car TEGRA114_CLK_GR2D>;
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resets = <&tegra_car 21>;
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reset-names = "2d";
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iommus = <&mc TEGRA_SWGROUP_G2>;
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};
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gr3d@54180000 {
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@ -40,6 +43,8 @@
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clocks = <&tegra_car TEGRA114_CLK_GR3D>;
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resets = <&tegra_car 24>;
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reset-names = "3d";
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iommus = <&mc TEGRA_SWGROUP_NV>;
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};
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dc@54200000 {
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@ -1536,15 +1536,15 @@
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};
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serial@70006040 {
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compatible = "nvidia,tegra124-hsuart";
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compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
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};
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serial@70006200 {
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compatible = "nvidia,tegra124-hsuart";
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compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
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};
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serial@70006300 {
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compatible = "nvidia,tegra124-hsuart";
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compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
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};
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hdmi_ddc: i2c@7000c700 {
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@ -1565,15 +1565,15 @@
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};
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serial@70006040 {
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compatible = "nvidia,tegra124-hsuart";
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compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
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};
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serial@70006200 {
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compatible = "nvidia,tegra124-hsuart";
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compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
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};
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serial@70006300 {
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compatible = "nvidia,tegra124-hsuart";
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compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
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};
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hdmi_ddc: i2c@7000c400 {
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@ -112,6 +112,7 @@
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clocks = <&tegra_car TEGRA30_CLK_HOST1X>;
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resets = <&tegra_car 28>;
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reset-names = "host1x";
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iommus = <&mc TEGRA_SWGROUP_HC>;
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#address-cells = <1>;
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#size-cells = <1>;
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@ -125,6 +126,8 @@
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clocks = <&tegra_car TEGRA30_CLK_MPE>;
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resets = <&tegra_car 60>;
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reset-names = "mpe";
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iommus = <&mc TEGRA_SWGROUP_MPE>;
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};
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vi@54080000 {
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@ -134,6 +137,8 @@
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clocks = <&tegra_car TEGRA30_CLK_VI>;
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resets = <&tegra_car 20>;
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reset-names = "vi";
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iommus = <&mc TEGRA_SWGROUP_VI>;
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};
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epp@540c0000 {
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@ -143,6 +148,8 @@
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clocks = <&tegra_car TEGRA30_CLK_EPP>;
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resets = <&tegra_car 19>;
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reset-names = "epp";
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iommus = <&mc TEGRA_SWGROUP_EPP>;
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};
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isp@54100000 {
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@ -152,6 +159,8 @@
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clocks = <&tegra_car TEGRA30_CLK_ISP>;
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resets = <&tegra_car 23>;
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reset-names = "isp";
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iommus = <&mc TEGRA_SWGROUP_ISP>;
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};
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gr2d@54140000 {
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@ -161,6 +170,8 @@
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clocks = <&tegra_car TEGRA30_CLK_GR2D>;
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resets = <&tegra_car 21>;
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reset-names = "2d";
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iommus = <&mc TEGRA_SWGROUP_G2>;
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};
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gr3d@54180000 {
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@ -172,6 +183,9 @@
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resets = <&tegra_car 24>,
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<&tegra_car 98>;
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reset-names = "3d", "3d2";
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iommus = <&mc TEGRA_SWGROUP_NV>,
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<&mc TEGRA_SWGROUP_NV2>;
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};
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dc@54200000 {
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