Blackfin arch: update BF54x anomaly list
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Roy Huang <roy.huang@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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@ -27,6 +27,8 @@
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#define ANOMALY_05000265 (1)
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#define ANOMALY_05000265 (1)
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/* Certain Data Cache Writethrough Modes Fail for Vddint <= 0.9V */
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/* Certain Data Cache Writethrough Modes Fail for Vddint <= 0.9V */
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#define ANOMALY_05000272 (1)
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#define ANOMALY_05000272 (1)
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/* False Hardware Error Exception when ISR context is not restored */
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#define ANOMALY_05000281 (1)
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/* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */
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/* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */
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#define ANOMALY_05000310 (1)
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#define ANOMALY_05000310 (1)
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/* Errors When SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */
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/* Errors When SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */
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@ -59,6 +61,7 @@
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#define ANOMALY_05000183 (0)
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#define ANOMALY_05000183 (0)
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#define ANOMALY_05000198 (0)
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#define ANOMALY_05000198 (0)
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#define ANOMALY_05000244 (0)
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#define ANOMALY_05000244 (0)
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#define ANOMALY_05000261 (0)
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#define ANOMALY_05000263 (0)
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#define ANOMALY_05000263 (0)
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#define ANOMALY_05000266 (0)
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#define ANOMALY_05000266 (0)
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#define ANOMALY_05000273 (0)
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#define ANOMALY_05000273 (0)
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