Blackfin arch: update BF54x anomaly list

Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Roy Huang <roy.huang@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
This commit is contained in:
Mike Frysinger 2007-07-25 11:56:01 +08:00 committed by Bryan Wu
parent 1aafd90912
commit 60e9356d77
1 changed files with 3 additions and 0 deletions

View File

@ -27,6 +27,8 @@
#define ANOMALY_05000265 (1) #define ANOMALY_05000265 (1)
/* Certain Data Cache Writethrough Modes Fail for Vddint <= 0.9V */ /* Certain Data Cache Writethrough Modes Fail for Vddint <= 0.9V */
#define ANOMALY_05000272 (1) #define ANOMALY_05000272 (1)
/* False Hardware Error Exception when ISR context is not restored */
#define ANOMALY_05000281 (1)
/* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */ /* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */
#define ANOMALY_05000310 (1) #define ANOMALY_05000310 (1)
/* Errors When SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */ /* Errors When SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */
@ -59,6 +61,7 @@
#define ANOMALY_05000183 (0) #define ANOMALY_05000183 (0)
#define ANOMALY_05000198 (0) #define ANOMALY_05000198 (0)
#define ANOMALY_05000244 (0) #define ANOMALY_05000244 (0)
#define ANOMALY_05000261 (0)
#define ANOMALY_05000263 (0) #define ANOMALY_05000263 (0)
#define ANOMALY_05000266 (0) #define ANOMALY_05000266 (0)
#define ANOMALY_05000273 (0) #define ANOMALY_05000273 (0)