x86: implement x86_32 stack protector
Impact: stack protector for x86_32 Implement stack protector for x86_32. GDT entry 28 is used for it. It's set to point to stack_canary-20 and have the length of 24 bytes. CONFIG_CC_STACKPROTECTOR turns off CONFIG_X86_32_LAZY_GS and sets %gs to the stack canary segment on entry. As %gs is otherwise unused by the kernel, the canary can be anywhere. It's defined as a percpu variable. x86_32 exception handlers take register frame on stack directly as struct pt_regs. With -fstack-protector turned on, gcc copies the whole structure after the stack canary and (of course) doesn't copy back on return thus losing all changed. For now, -fno-stack-protector is added to all files which contain those functions. We definitely need something better. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
parent
ccbeed3a05
commit
60a5317ff0
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@ -209,7 +209,7 @@ config X86_TRAMPOLINE
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config X86_32_LAZY_GS
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def_bool y
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depends on X86_32
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depends on X86_32 && !CC_STACKPROTECTOR
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config KTIME_SCALAR
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def_bool X86_32
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@ -1356,7 +1356,6 @@ config CC_STACKPROTECTOR_ALL
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config CC_STACKPROTECTOR
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bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
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depends on X86_64
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select CC_STACKPROTECTOR_ALL
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help
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This option turns on the -fstack-protector GCC feature. This
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@ -396,7 +396,11 @@ DECLARE_PER_CPU(union irq_stack_union, irq_stack_union);
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DECLARE_INIT_PER_CPU(irq_stack_union);
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DECLARE_PER_CPU(char *, irq_stack_ptr);
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#else /* X86_64 */
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#ifdef CONFIG_CC_STACKPROTECTOR
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DECLARE_PER_CPU(unsigned long, stack_canary);
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#endif
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#endif /* X86_64 */
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extern void print_cpu_info(struct cpuinfo_x86 *);
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extern unsigned int xstate_size;
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@ -61,7 +61,7 @@
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*
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* 26 - ESPFIX small SS
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* 27 - per-cpu [ offset to per-cpu data area ]
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* 28 - unused
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* 28 - stack_canary-20 [ for stack protector ]
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* 29 - unused
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* 30 - unused
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* 31 - TSS for double fault handler
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@ -95,6 +95,13 @@
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#define __KERNEL_PERCPU 0
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#endif
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#define GDT_ENTRY_STACK_CANARY (GDT_ENTRY_KERNEL_BASE + 16)
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#ifdef CONFIG_CC_STACKPROTECTOR
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#define __KERNEL_STACK_CANARY (GDT_ENTRY_STACK_CANARY * 8)
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#else
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#define __KERNEL_STACK_CANARY 0
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#endif
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#define GDT_ENTRY_DOUBLEFAULT_TSS 31
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/*
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@ -1,3 +1,35 @@
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/*
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* GCC stack protector support.
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*
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* Stack protector works by putting predefined pattern at the start of
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* the stack frame and verifying that it hasn't been overwritten when
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* returning from the function. The pattern is called stack canary
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* and unfortunately gcc requires it to be at a fixed offset from %gs.
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* On x86_64, the offset is 40 bytes and on x86_32 20 bytes. x86_64
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* and x86_32 use segment registers differently and thus handles this
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* requirement differently.
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*
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* On x86_64, %gs is shared by percpu area and stack canary. All
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* percpu symbols are zero based and %gs points to the base of percpu
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* area. The first occupant of the percpu area is always
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* irq_stack_union which contains stack_canary at offset 40. Userland
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* %gs is always saved and restored on kernel entry and exit using
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* swapgs, so stack protector doesn't add any complexity there.
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*
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* On x86_32, it's slightly more complicated. As in x86_64, %gs is
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* used for userland TLS. Unfortunately, some processors are much
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* slower at loading segment registers with different value when
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* entering and leaving the kernel, so the kernel uses %fs for percpu
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* area and manages %gs lazily so that %gs is switched only when
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* necessary, usually during task switch.
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*
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* As gcc requires the stack canary at %gs:20, %gs can't be managed
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* lazily if stack protector is enabled, so the kernel saves and
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* restores userland %gs on kernel entry and exit. This behavior is
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* controlled by CONFIG_X86_32_LAZY_GS and accessors are defined in
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* system.h to hide the details.
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*/
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#ifndef _ASM_STACKPROTECTOR_H
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#define _ASM_STACKPROTECTOR_H 1
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@ -6,8 +38,18 @@
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#include <asm/tsc.h>
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#include <asm/processor.h>
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#include <asm/percpu.h>
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#include <asm/system.h>
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#include <asm/desc.h>
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#include <linux/random.h>
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/*
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* 24 byte read-only segment initializer for stack canary. Linker
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* can't handle the address bit shifting. Address will be set in
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* head_32 for boot CPU and setup_per_cpu_areas() for others.
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*/
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#define GDT_STACK_CANARY_INIT \
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[GDT_ENTRY_STACK_CANARY] = { { { 0x00000018, 0x00409000 } } },
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/*
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* Initialize the stackprotector canary value.
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*
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@ -19,12 +61,9 @@ static __always_inline void boot_init_stack_canary(void)
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u64 canary;
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u64 tsc;
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/*
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* Build time only check to make sure the stack_canary is at
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* offset 40 in the pda; this is a gcc ABI requirement
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*/
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#ifdef CONFIG_X86_64
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BUILD_BUG_ON(offsetof(union irq_stack_union, stack_canary) != 40);
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#endif
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/*
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* We both use the random pool and the current TSC as a source
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* of randomness. The TSC only matters for very early init,
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@ -36,7 +75,49 @@ static __always_inline void boot_init_stack_canary(void)
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canary += tsc + (tsc << 32UL);
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current->stack_canary = canary;
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#ifdef CONFIG_X86_64
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percpu_write(irq_stack_union.stack_canary, canary);
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#else
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percpu_write(stack_canary, canary);
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#endif
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}
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static inline void setup_stack_canary_segment(int cpu)
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{
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#ifdef CONFIG_X86_32
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unsigned long canary = (unsigned long)&per_cpu(stack_canary, cpu);
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struct desc_struct *gdt_table = get_cpu_gdt_table(cpu);
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struct desc_struct desc;
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desc = gdt_table[GDT_ENTRY_STACK_CANARY];
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desc.base0 = canary & 0xffff;
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desc.base1 = (canary >> 16) & 0xff;
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desc.base2 = (canary >> 24) & 0xff;
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write_gdt_entry(gdt_table, GDT_ENTRY_STACK_CANARY, &desc, DESCTYPE_S);
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#endif
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}
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static inline void load_stack_canary_segment(void)
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{
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#ifdef CONFIG_X86_32
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asm("mov %0, %%gs" : : "r" (__KERNEL_STACK_CANARY) : "memory");
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#endif
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}
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#else /* CC_STACKPROTECTOR */
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#define GDT_STACK_CANARY_INIT
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/* dummy boot_init_stack_canary() is defined in linux/stackprotector.h */
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static inline void setup_stack_canary_segment(int cpu)
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{ }
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static inline void load_stack_canary_segment(void)
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{
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#ifdef CONFIG_X86_32
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asm volatile ("mov %0, %%gs" : : "r" (0));
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#endif
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}
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#endif /* CC_STACKPROTECTOR */
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@ -23,6 +23,22 @@ struct task_struct *__switch_to(struct task_struct *prev,
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#ifdef CONFIG_X86_32
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#ifdef CONFIG_CC_STACKPROTECTOR
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#define __switch_canary \
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"movl "__percpu_arg([current_task])",%%ebx\n\t" \
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"movl %P[task_canary](%%ebx),%%ebx\n\t" \
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"movl %%ebx,"__percpu_arg([stack_canary])"\n\t"
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#define __switch_canary_oparam \
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, [stack_canary] "=m" (per_cpu_var(stack_canary))
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#define __switch_canary_iparam \
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, [current_task] "m" (per_cpu_var(current_task)) \
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, [task_canary] "i" (offsetof(struct task_struct, stack_canary))
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#else /* CC_STACKPROTECTOR */
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#define __switch_canary
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#define __switch_canary_oparam
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#define __switch_canary_iparam
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#endif /* CC_STACKPROTECTOR */
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/*
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* Saving eflags is important. It switches not only IOPL between tasks,
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* it also protects other tasks from NT leaking through sysenter etc.
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"pushl %[next_ip]\n\t" /* restore EIP */ \
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"jmp __switch_to\n" /* regparm call */ \
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"1:\t" \
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__switch_canary \
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"popl %%ebp\n\t" /* restore EBP */ \
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"popfl\n" /* restore flags */ \
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\
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"=b" (ebx), "=c" (ecx), "=d" (edx), \
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"=S" (esi), "=D" (edi) \
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\
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__switch_canary_oparam \
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\
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/* input parameters: */ \
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: [next_sp] "m" (next->thread.sp), \
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[next_ip] "m" (next->thread.ip), \
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[prev] "a" (prev), \
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[next] "d" (next) \
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\
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__switch_canary_iparam \
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\
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: /* reloaded segment registers */ \
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"memory"); \
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} while (0)
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@ -24,6 +24,24 @@ CFLAGS_vsyscall_64.o := $(PROFILING) -g0 $(nostackp)
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CFLAGS_hpet.o := $(nostackp)
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CFLAGS_tsc.o := $(nostackp)
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CFLAGS_paravirt.o := $(nostackp)
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#
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# On x86_32, register frame is passed verbatim on stack as struct
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# pt_regs. gcc considers the parameter to belong to the callee and
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# with -fstack-protector it copies pt_regs to the callee's stack frame
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# to put the structure after the stack canary causing changes made by
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# the exception handlers to be lost. Turn off stack protector for all
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# files containing functions which take struct pt_regs from register
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# frame.
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#
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# The proper way to fix this is to teach gcc that the argument belongs
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# to the caller for these functions, oh well...
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#
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ifdef CONFIG_X86_32
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CFLAGS_process_32.o := $(nostackp)
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CFLAGS_vm86_32.o := $(nostackp)
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CFLAGS_signal.o := $(nostackp)
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CFLAGS_traps.o := $(nostackp)
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endif
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obj-y := process_$(BITS).o signal.o entry_$(BITS).o
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obj-y += traps.o irq.o irq_$(BITS).o dumpstack_$(BITS).o
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@ -39,6 +39,7 @@
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#include <asm/sections.h>
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#include <asm/setup.h>
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#include <asm/hypervisor.h>
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#include <asm/stackprotector.h>
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#include "cpu.h"
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[GDT_ENTRY_ESPFIX_SS] = { { { 0x00000000, 0x00c09200 } } },
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[GDT_ENTRY_PERCPU] = { { { 0x0000ffff, 0x00cf9200 } } },
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GDT_STACK_CANARY_INIT
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#endif
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} };
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EXPORT_PER_CPU_SYMBOL_GPL(gdt_page);
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loadsegment(gs, 0);
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wrmsrl(MSR_GS_BASE, (unsigned long)per_cpu(irq_stack_union.gs_base, cpu));
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#endif
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load_stack_canary_segment();
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}
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/* Current gdt points %fs at the "master" per-cpu area: after this,
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*/
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DEFINE_PER_CPU(struct orig_ist, orig_ist);
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#else
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#else /* x86_64 */
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/* Make sure %fs is initialized properly in idle threads */
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#ifdef CONFIG_CC_STACKPROTECTOR
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DEFINE_PER_CPU(unsigned long, stack_canary);
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#endif
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/* Make sure %fs and %gs are initialized properly in idle threads */
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struct pt_regs * __cpuinit idle_regs(struct pt_regs *regs)
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{
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memset(regs, 0, sizeof(struct pt_regs));
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regs->fs = __KERNEL_PERCPU;
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regs->gs = __KERNEL_STACK_CANARY;
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return regs;
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}
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#endif
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#endif /* x86_64 */
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/*
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* cpu_init() initializes state that is per-CPU. Some data is already
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__set_tss_desc(cpu, GDT_ENTRY_DOUBLEFAULT_TSS, &doublefault_tss);
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#endif
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/* Clear %gs. */
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asm volatile ("mov %0, %%gs" : : "r" (0));
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/* Clear all 6 debug registers: */
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set_debugreg(0, 0);
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set_debugreg(0, 1);
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/*CFI_REL_OFFSET gs, PT_GS*/
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.endm
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.macro SET_KERNEL_GS reg
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xorl \reg, \reg
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movl $(__KERNEL_STACK_CANARY), \reg
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movl \reg, %gs
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.endm
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@ -19,6 +19,7 @@
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#include <asm/asm-offsets.h>
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#include <asm/setup.h>
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#include <asm/processor-flags.h>
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#include <asm/percpu.h>
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/* Physical address */
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#define pa(X) ((X) - __PAGE_OFFSET)
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movl $(__KERNEL_PERCPU), %eax
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movl %eax,%fs # set this cpu's percpu
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xorl %eax,%eax # Clear GS and LDT
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#ifdef CONFIG_CC_STACKPROTECTOR
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/*
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* The linker can't handle this by relocation. Manually set
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* base address in stack canary segment descriptor.
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*/
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cmpb $0,ready
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jne 1f
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movl $per_cpu__gdt_page,%eax
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movl $per_cpu__stack_canary,%ecx
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movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax)
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shrl $16, %ecx
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movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax)
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movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax)
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1:
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#endif
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movl $(__KERNEL_STACK_CANARY),%eax
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movl %eax,%gs
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xorl %eax,%eax # Clear LDT
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lldt %ax
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cld # gcc2 wants the direction flag cleared at all times
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@ -212,6 +212,7 @@ int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
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regs.ds = __USER_DS;
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regs.es = __USER_DS;
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regs.fs = __KERNEL_PERCPU;
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regs.gs = __KERNEL_STACK_CANARY;
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regs.orig_ax = -1;
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regs.ip = (unsigned long) kernel_thread_helper;
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regs.cs = __KERNEL_CS | get_kernel_rpl();
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@ -16,6 +16,7 @@
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#include <asm/proto.h>
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#include <asm/cpumask.h>
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#include <asm/cpu.h>
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#include <asm/stackprotector.h>
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#ifdef CONFIG_DEBUG_PER_CPU_MAPS
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# define DBG(x...) printk(KERN_DEBUG x)
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per_cpu(this_cpu_off, cpu) = per_cpu_offset(cpu);
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per_cpu(cpu_number, cpu) = cpu;
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setup_percpu_segment(cpu);
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setup_stack_canary_segment(cpu);
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/*
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* Copy data used in early init routines from the
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* initial arrays to the per cpu data areas. These
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@ -0,0 +1,8 @@
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#!/bin/sh
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echo "int foo(void) { char X[200]; return 3; }" | $1 -S -xc -c -O0 -fstack-protector - -o - 2> /dev/null | grep -q "%gs"
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if [ "$?" -eq "0" ] ; then
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echo y
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else
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echo n
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fi
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