drm/radeon/kms: add info query for max pipes
The maximum number of pipes is needed by the user space compute driver to calculate the number of wavefronts per thread group. Signed-off-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -56,9 +56,10 @@
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* 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
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* 2.13.0 - virtual memory support, streamout
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* 2.14.0 - add evergreen tiling informations
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* 2.15.0 - add max_pipes query
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*/
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#define KMS_DRIVER_MAJOR 2
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#define KMS_DRIVER_MINOR 14
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#define KMS_DRIVER_MINOR 15
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#define KMS_DRIVER_PATCHLEVEL 0
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int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
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int radeon_driver_unload_kms(struct drm_device *dev);
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@ -264,6 +264,19 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
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return -EINVAL;
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value = RADEON_IB_VM_MAX_SIZE;
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break;
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case RADEON_INFO_MAX_PIPES:
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if (rdev->family >= CHIP_CAYMAN)
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value = rdev->config.cayman.max_pipes_per_simd;
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else if (rdev->family >= CHIP_CEDAR)
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value = rdev->config.evergreen.max_pipes;
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else if (rdev->family >= CHIP_RV770)
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value = rdev->config.rv770.max_pipes;
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else if (rdev->family >= CHIP_R600)
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value = rdev->config.r600.max_pipes;
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else {
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return -EINVAL;
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}
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break;
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default:
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DRM_DEBUG_KMS("Invalid request %d\n", info->request);
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return -EINVAL;
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@ -962,6 +962,8 @@ struct drm_radeon_cs {
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#define RADEON_INFO_VA_START 0x0e
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/* maximum size of ib using the virtual memory cs */
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#define RADEON_INFO_IB_VM_MAX_SIZE 0x0f
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/* max pipes - needed for compute shaders */
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#define RADEON_INFO_MAX_PIPES 0x10
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struct drm_radeon_info {
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uint32_t request;
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