pinctrl: pinctrl-aspeed-g6: add FWQSPI function-group
Add FWSPIDQ2 (AE12) and FWSPIDQ3 (AF12) function-group to support AST2600 FW SPI quad mode. These pins can be used with dedicated FW SPI pins - FWSPICS0# (AB14), FWSPICK (AF13), FWSPIMOSI (AC14) and FWSPIMISO (AB13). Signed-off-by: Johnny Huang <johnny_huang@aspeedtech.com> Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20220329173932.2588289-5-quic_jaehyoo@quicinc.com Signed-off-by: Joel Stanley <joel@jms.id.au>
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@ -1236,12 +1236,17 @@ FUNC_GROUP_DECL(SALT8, AA12);
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FUNC_GROUP_DECL(WDTRST4, AA12);
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#define AE12 196
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SIG_EXPR_LIST_DECL_SESG(AE12, FWSPIQ2, FWQSPI, SIG_DESC_SET(SCU438, 4));
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SIG_EXPR_LIST_DECL_SESG(AE12, GPIOY4, GPIOY4);
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PIN_DECL_(AE12, SIG_EXPR_LIST_PTR(AE12, GPIOY4));
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PIN_DECL_(AE12, SIG_EXPR_LIST_PTR(AE12, FWSPIQ2),
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SIG_EXPR_LIST_PTR(AE12, GPIOY4));
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#define AF12 197
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SIG_EXPR_LIST_DECL_SESG(AF12, FWSPIQ3, FWQSPI, SIG_DESC_SET(SCU438, 5));
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SIG_EXPR_LIST_DECL_SESG(AF12, GPIOY5, GPIOY5);
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PIN_DECL_(AF12, SIG_EXPR_LIST_PTR(AF12, GPIOY5));
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PIN_DECL_(AF12, SIG_EXPR_LIST_PTR(AF12, FWSPIQ3),
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SIG_EXPR_LIST_PTR(AF12, GPIOY5));
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FUNC_GROUP_DECL(FWQSPI, AE12, AF12);
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#define AC12 198
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SSSF_PIN_DECL(AC12, GPIOY6, FWSPIABR, SIG_DESC_SET(SCU438, 6));
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@ -1911,6 +1916,7 @@ static const struct aspeed_pin_group aspeed_g6_groups[] = {
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ASPEED_PINCTRL_GROUP(FSI2),
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ASPEED_PINCTRL_GROUP(FWSPIABR),
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ASPEED_PINCTRL_GROUP(FWSPID),
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ASPEED_PINCTRL_GROUP(FWQSPI),
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ASPEED_PINCTRL_GROUP(FWSPIWP),
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ASPEED_PINCTRL_GROUP(GPIT0),
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ASPEED_PINCTRL_GROUP(GPIT1),
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@ -2152,6 +2158,7 @@ static const struct aspeed_pin_function aspeed_g6_functions[] = {
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ASPEED_PINCTRL_FUNC(FSI2),
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ASPEED_PINCTRL_FUNC(FWSPIABR),
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ASPEED_PINCTRL_FUNC(FWSPID),
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ASPEED_PINCTRL_FUNC(FWQSPI),
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ASPEED_PINCTRL_FUNC(FWSPIWP),
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ASPEED_PINCTRL_FUNC(GPIT0),
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ASPEED_PINCTRL_FUNC(GPIT1),
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