[POWERPC] Merge common virtex header files
The header files for the ml403 and ml300 are virtually identical, merge them into a single file. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Grant Likely
Paul Mackerras
parent
2b10caf380
commit
5ff084f21d
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@ -1,22 +1,18 @@
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/*
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* arch/ppc/platforms/4xx/virtex.h
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* Basic Virtex platform defines, included by <asm/ibm4xx.h>
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*
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* Include file that defines the Xilinx Virtex-II Pro processor
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* 2005-2007 (c) Secret Lab Technologies Ltd.
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* 2002-2004 (c) MontaVista Software, Inc.
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*
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* Author: MontaVista Software, Inc.
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* source@mvista.com
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*
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* 2002-2004 (c) MontaVista Software, Inc. This file is licensed under the
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* terms of the GNU General Public License version 2. This program is licensed
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* "as is" without any warranty of any kind, whether express or implied.
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#ifdef __KERNEL__
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#ifndef __ASM_VIRTEX_H__
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#define __ASM_VIRTEX_H__
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/* serial defines */
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#include <asm/ibm405.h>
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/* Ugly, ugly, ugly! BASE_BAUD defined here to keep 8250.c happy. */
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@ -29,7 +25,29 @@
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enum ppc_sys_devices {
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VIRTEX_UART, NUM_PPC_SYS_DEVS,
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};
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#endif
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typedef struct board_info {
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unsigned int bi_memsize; /* DRAM installed, in bytes */
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unsigned char bi_enetaddr[6]; /* Local Ethernet MAC address */
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unsigned int bi_intfreq; /* Processor speed, in Hz */
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unsigned int bi_busfreq; /* PLB Bus speed, in Hz */
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unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
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} bd_t;
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/* Some 4xx parts use a different timebase frequency from the internal clock.
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* the Virtex 405 does not, so just use a macro to make tbfreq match intfreq
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*/
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#define bi_tbfreq bi_intfreq
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extern const char* virtex_machine_name;
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#define PPC4xx_MACHINE_NAME (virtex_machine_name)
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#endif /* !__ASSEMBLY__ */
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/* We don't need anything mapped. Size of zero will accomplish that. */
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#define PPC4xx_ONB_IO_PADDR 0u
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#define PPC4xx_ONB_IO_VADDR 0u
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#define PPC4xx_ONB_IO_SIZE 0u
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#endif /* __ASM_VIRTEX_H__ */
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#endif /* __KERNEL__ */
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@ -68,6 +68,7 @@ struct ppc_sys_spec ppc_sys_specs[] = {
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},
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},
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};
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const char* virtex_machine_name = "ML300 Reference Design";
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#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR)
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@ -1,45 +0,0 @@
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/*
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* Include file that defines the Xilinx ML300 evaluation board
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*
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* Author: MontaVista Software, Inc.
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* source@mvista.com
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*
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* 2002-2004 (c) MontaVista Software, Inc. This file is licensed under the
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* terms of the GNU General Public License version 2. This program is licensed
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* "as is" without any warranty of any kind, whether express or implied.
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*/
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#ifdef __KERNEL__
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#ifndef __ASM_XILINX_ML300_H__
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#define __ASM_XILINX_ML300_H__
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/* ML300 has a Xilinx Virtex-II Pro processor */
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#include <platforms/4xx/virtex.h>
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#ifndef __ASSEMBLY__
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#include <linux/types.h>
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typedef struct board_info {
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unsigned int bi_memsize; /* DRAM installed, in bytes */
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unsigned char bi_enetaddr[6]; /* Local Ethernet MAC address */
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unsigned int bi_intfreq; /* Processor speed, in Hz */
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unsigned int bi_busfreq; /* PLB Bus speed, in Hz */
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unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
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} bd_t;
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/* Some 4xx parts use a different timebase frequency from the internal clock.
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*/
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#define bi_tbfreq bi_intfreq
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#endif /* !__ASSEMBLY__ */
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/* We don't need anything mapped. Size of zero will accomplish that. */
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#define PPC4xx_ONB_IO_PADDR 0u
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#define PPC4xx_ONB_IO_VADDR 0u
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#define PPC4xx_ONB_IO_SIZE 0u
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#define PPC4xx_MACHINE_NAME "Xilinx ML300 Reference System"
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#endif /* __ASM_XILINX_ML300_H__ */
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#endif /* __KERNEL__ */
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@ -72,6 +72,7 @@ struct ppc_sys_spec ppc_sys_specs[] = {
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},
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},
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};
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const char* virtex_machine_name = "ML403 Reference Design";
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#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR)
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@ -1,49 +0,0 @@
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/*
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* arch/ppc/platforms/4xx/xilinx_ml403.h
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*
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* Include file that defines the Xilinx ML403 reference design
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*
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* Author: Grant Likely <grant.likely@secretlab.ca>
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*
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* 2005 (c) Secret Lab Technologies Ltd.
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* 2002-2004 (c) MontaVista Software, Inc.
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#ifdef __KERNEL__
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#ifndef __ASM_XILINX_ML403_H__
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#define __ASM_XILINX_ML403_H__
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/* ML403 has a Xilinx Virtex-4 FPGA with a PPC405 hard core */
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#include <platforms/4xx/virtex.h>
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#ifndef __ASSEMBLY__
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#include <linux/types.h>
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typedef struct board_info {
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unsigned int bi_memsize; /* DRAM installed, in bytes */
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unsigned char bi_enetaddr[6]; /* Local Ethernet MAC address */
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unsigned int bi_intfreq; /* Processor speed, in Hz */
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unsigned int bi_busfreq; /* PLB Bus speed, in Hz */
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unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
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} bd_t;
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/* Some 4xx parts use a different timebase frequency from the internal clock.
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*/
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#define bi_tbfreq bi_intfreq
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#endif /* !__ASSEMBLY__ */
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/* We don't need anything mapped. Size of zero will accomplish that. */
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#define PPC4xx_ONB_IO_PADDR 0u
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#define PPC4xx_ONB_IO_VADDR 0u
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#define PPC4xx_ONB_IO_SIZE 0u
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#define PPC4xx_MACHINE_NAME "Xilinx ML403 Reference Design"
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#endif /* __ASM_XILINX_ML403_H__ */
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#endif /* __KERNEL__ */
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@ -47,12 +47,8 @@
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#include <platforms/4xx/walnut.h>
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#endif
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#if defined(CONFIG_XILINX_ML300)
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#include <platforms/4xx/xilinx_ml300.h>
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#endif
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#if defined(CONFIG_XILINX_ML403)
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#include <platforms/4xx/xilinx_ml403.h>
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#if defined(CONFIG_XILINX_VIRTEX)
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#include <platforms/4xx/virtex.h>
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#endif
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#ifndef __ASSEMBLY__
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