ARCv2: [axs103] Support ARC SDP FPGA platform for HS38x cores
Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
This commit is contained in:
Vineet Gupta
parent
e0183f5230
commit
5fa2daaa8d
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Synopsys DesignWare ARC Software Development Platforms Device Tree Bindings
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---------------------------------------------------------------------------
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SDP Main Board with an AXC003 FPGA Card which can contain various flavours of
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HS38x cores.
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Required root node properties:
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- compatible = "snps,axs103", "snps,arc-sdp";
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@ -0,0 +1,102 @@
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/*
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* Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/*
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* Device tree for AXC003 CPU card: HS38x UP configuration
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*/
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/ {
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compatible = "snps,arc";
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clock-frequency = <75000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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cpu_card {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x00000000 0xf0000000 0x10000000>;
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cpu_intc: archs-intc@cpu {
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compatible = "snps,archs-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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/*
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* this GPIO block ORs all interrupts on CPU card (creg,..)
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* to uplink only 1 IRQ to ARC core intc
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*/
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dw-apb-gpio@0x2000 {
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compatible = "snps,dw-apb-gpio";
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reg = < 0x2000 0x80 >;
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#address-cells = <1>;
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#size-cells = <0>;
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ictl_intc: gpio-controller@0 {
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compatible = "snps,dw-apb-gpio-port";
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gpio-controller;
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#gpio-cells = <2>;
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snps,nr-gpios = <30>;
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reg = <0>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&cpu_intc>;
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interrupts = <25>;
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};
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};
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debug_uart: dw-apb-uart@0x5000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x5000 0x100>;
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clock-frequency = <33333000>;
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interrupt-parent = <&ictl_intc>;
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interrupts = <2 4>;
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baud = <115200>;
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reg-shift = <2>;
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reg-io-width = <4>;
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};
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arcpct0: pct {
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compatible = "snps,archs-pct";
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#interrupt-cells = <1>;
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interrupt-parent = <&cpu_intc>;
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interrupts = <20>;
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};
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};
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/*
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* This INTC is actually connected to DW APB GPIO
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* which acts as a wire between MB INTC and CPU INTC.
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* GPIO INTC is configured in platform init code
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* and here we mimic direct connection from MB INTC to
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* CPU INTC, thus we set "interrupts = <7>" instead of
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* "interrupts = <12>"
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*
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* This intc actually resides on MB, but we move it here to
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* avoid duplicating the MB dtsi file given that IRQ from
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* this intc to cpu intc are different for axs101 and axs103
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*/
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mb_intc: dw-apb-ictl@0xe0012000 {
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#interrupt-cells = <1>;
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compatible = "snps,dw-apb-ictl";
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reg = < 0xe0012000 0x200 >;
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interrupt-controller;
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interrupt-parent = <&cpu_intc>;
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interrupts = < 24 >;
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};
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memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x00000000 0x80000000 0x40000000>;
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device_type = "memory";
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reg = <0x00000000 0x20000000>; /* 512MiB */
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};
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};
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@ -0,0 +1,126 @@
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/*
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* Copyright (C) 2014, 2015 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/*
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* Device tree for AXC003 CPU card: HS38x2 (Dual Core) with IDU intc
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*/
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/ {
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compatible = "snps,arc";
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clock-frequency = <75000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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cpu_card {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x00000000 0xf0000000 0x10000000>;
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cpu_intc: archs-intc@cpu {
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compatible = "snps,archs-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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idu_intc: idu-interrupt-controller {
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compatible = "snps,archs-idu-intc";
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interrupt-controller;
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interrupt-parent = <&cpu_intc>;
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/*
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* <hwirq distribution>
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* distribution: 0=RR; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3
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*/
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#interrupt-cells = <2>;
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/*
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* upstream irqs to core intc - downstream these are
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* "COMMON" irq 0,1..
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*/
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interrupts = <24 25>;
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};
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/*
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* this GPIO block ORs all interrupts on CPU card (creg,..)
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* to uplink only 1 IRQ to ARC core intc
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*/
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dw-apb-gpio@0x2000 {
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compatible = "snps,dw-apb-gpio";
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reg = < 0x2000 0x80 >;
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#address-cells = <1>;
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#size-cells = <0>;
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ictl_intc: gpio-controller@0 {
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compatible = "snps,dw-apb-gpio-port";
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gpio-controller;
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#gpio-cells = <2>;
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snps,nr-gpios = <30>;
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reg = <0>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&idu_intc>;
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/*
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* cmn irq 1 -> cpu irq 25
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* Distribute to cpu0 only
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*/
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interrupts = <1 1>;
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};
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};
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debug_uart: dw-apb-uart@0x5000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x5000 0x100>;
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clock-frequency = <33333000>;
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interrupt-parent = <&ictl_intc>;
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interrupts = <2 4>;
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baud = <115200>;
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reg-shift = <2>;
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reg-io-width = <4>;
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};
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arcpct0: pct {
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compatible = "snps,archs-pct";
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#interrupt-cells = <1>;
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interrupt-parent = <&cpu_intc>;
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interrupts = <20>;
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};
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};
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/*
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* This INTC is actually connected to DW APB GPIO
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* which acts as a wire between MB INTC and CPU INTC.
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* GPIO INTC is configured in platform init code
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* and here we mimic direct connection from MB INTC to
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* CPU INTC, thus we set "interrupts = <0 1>" instead of
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* "interrupts = <12>"
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*
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* This intc actually resides on MB, but we move it here to
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* avoid duplicating the MB dtsi file given that IRQ from
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* this intc to cpu intc are different for axs101 and axs103
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*/
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mb_intc: dw-apb-ictl@0xe0012000 {
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#interrupt-cells = <1>;
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compatible = "snps,dw-apb-ictl";
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reg = < 0xe0012000 0x200 >;
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interrupt-controller;
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interrupt-parent = <&idu_intc>;
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interrupts = <0 1>; /* cmn irq 0 -> cpu irq 24
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distribute to cpu0 only */
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};
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memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x00000000 0x80000000 0x40000000>;
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device_type = "memory";
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reg = <0x00000000 0x20000000>; /* 512MiB */
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};
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};
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@ -0,0 +1,24 @@
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/*
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* Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/*
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* Device Tree for AXS103 SDP with AXS10X Main Board and
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* AXC003 FPGA Card (with UP bitfile)
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*/
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/dts-v1/;
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/include/ "axc003.dtsi"
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/include/ "axs10x_mb.dtsi"
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/ {
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compatible = "snps,axs103", "snps,arc-sdp";
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chosen {
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bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=ttyS3,115200n8 debug print-fatal-signals=1";
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};
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};
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/*
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* Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/*
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* Device Tree for AXS103 SDP with AXS10X Main Board and
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* AXC003 FPGA Card (with SMP bitfile)
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*/
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/dts-v1/;
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/include/ "axc003_idu.dtsi"
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/include/ "axs10x_mb.dtsi"
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/ {
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compatible = "snps,axs103", "snps,arc-sdp";
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chosen {
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bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=ttyS3,115200n8 debug print-fatal-signals=1";
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};
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};
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@ -0,0 +1,117 @@
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CONFIG_CROSS_COMPILE="arc-linux-uclibc-"
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CONFIG_DEFAULT_HOSTNAME="ARCLinux"
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# CONFIG_SWAP is not set
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CONFIG_SYSVIPC=y
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CONFIG_POSIX_MQUEUE=y
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# CONFIG_CROSS_MEMORY_ATTACH is not set
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CONFIG_NO_HZ_IDLE=y
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CONFIG_HIGH_RES_TIMERS=y
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CONFIG_IKCONFIG=y
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CONFIG_IKCONFIG_PROC=y
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CONFIG_NAMESPACES=y
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# CONFIG_UTS_NS is not set
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# CONFIG_PID_NS is not set
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CONFIG_BLK_DEV_INITRD=y
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CONFIG_INITRAMFS_SOURCE="../../arc_initramfs_hs/"
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CONFIG_EMBEDDED=y
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CONFIG_PERF_EVENTS=y
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# CONFIG_VM_EVENT_COUNTERS is not set
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# CONFIG_SLUB_DEBUG is not set
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# CONFIG_COMPAT_BRK is not set
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CONFIG_MODULES=y
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CONFIG_PARTITION_ADVANCED=y
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CONFIG_ARC_PLAT_AXS10X=y
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CONFIG_AXS103=y
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CONFIG_ISA_ARCV2=y
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CONFIG_ARC_BUILTIN_DTB_NAME="axs103"
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CONFIG_PREEMPT=y
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# CONFIG_COMPACTION is not set
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CONFIG_NET=y
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CONFIG_PACKET=y
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CONFIG_UNIX=y
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CONFIG_NET_KEY=y
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CONFIG_INET=y
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CONFIG_IP_PNP=y
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CONFIG_IP_PNP_DHCP=y
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CONFIG_IP_PNP_BOOTP=y
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CONFIG_IP_PNP_RARP=y
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# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
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# CONFIG_INET_XFRM_MODE_TUNNEL is not set
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# CONFIG_INET_XFRM_MODE_BEET is not set
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# CONFIG_IPV6 is not set
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# CONFIG_STANDALONE is not set
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# CONFIG_PREVENT_FIRMWARE_BUILD is not set
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# CONFIG_FIRMWARE_IN_KERNEL is not set
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CONFIG_MTD=y
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CONFIG_MTD_CMDLINE_PARTS=y
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CONFIG_MTD_BLOCK=y
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CONFIG_MTD_NAND=y
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CONFIG_MTD_NAND_AXS=y
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CONFIG_SCSI=y
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CONFIG_BLK_DEV_SD=y
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CONFIG_NETDEVICES=y
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# CONFIG_NET_VENDOR_ARC is not set
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# CONFIG_NET_VENDOR_BROADCOM is not set
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# CONFIG_NET_VENDOR_INTEL is not set
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# CONFIG_NET_VENDOR_MARVELL is not set
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# CONFIG_NET_VENDOR_MICREL is not set
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# CONFIG_NET_VENDOR_NATSEMI is not set
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# CONFIG_NET_VENDOR_SEEQ is not set
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CONFIG_STMMAC_ETH=y
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# CONFIG_NET_VENDOR_VIA is not set
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# CONFIG_NET_VENDOR_WIZNET is not set
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CONFIG_NATIONAL_PHY=y
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# CONFIG_USB_NET_DRIVERS is not set
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CONFIG_INPUT_EVDEV=y
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CONFIG_MOUSE_PS2_TOUCHKIT=y
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CONFIG_MOUSE_SERIAL=y
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CONFIG_MOUSE_SYNAPTICS_USB=y
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# CONFIG_LEGACY_PTYS is not set
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# CONFIG_DEVKMEM is not set
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CONFIG_SERIAL_8250=y
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CONFIG_SERIAL_8250_CONSOLE=y
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CONFIG_SERIAL_8250_DW=y
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CONFIG_SERIAL_OF_PLATFORM=y
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# CONFIG_HW_RANDOM is not set
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CONFIG_I2C=y
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CONFIG_I2C_CHARDEV=y
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CONFIG_I2C_DESIGNWARE_PLATFORM=y
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# CONFIG_HWMON is not set
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CONFIG_FB=y
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# CONFIG_VGA_CONSOLE is not set
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CONFIG_FRAMEBUFFER_CONSOLE=y
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CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
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CONFIG_LOGO=y
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# CONFIG_LOGO_LINUX_MONO is not set
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# CONFIG_LOGO_LINUX_VGA16 is not set
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# CONFIG_LOGO_LINUX_CLUT224 is not set
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CONFIG_USB=y
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||||||
|
CONFIG_USB_EHCI_HCD=y
|
||||||
|
CONFIG_USB_EHCI_HCD_PLATFORM=y
|
||||||
|
CONFIG_USB_OHCI_HCD=y
|
||||||
|
CONFIG_USB_OHCI_HCD_PLATFORM=y
|
||||||
|
CONFIG_USB_STORAGE=y
|
||||||
|
CONFIG_MMC=y
|
||||||
|
CONFIG_MMC_SDHCI=y
|
||||||
|
CONFIG_MMC_SDHCI_PLTFM=y
|
||||||
|
CONFIG_MMC_DW=y
|
||||||
|
CONFIG_MMC_DW_IDMAC=y
|
||||||
|
# CONFIG_IOMMU_SUPPORT is not set
|
||||||
|
CONFIG_EXT3_FS=y
|
||||||
|
CONFIG_EXT4_FS=y
|
||||||
|
CONFIG_MSDOS_FS=y
|
||||||
|
CONFIG_VFAT_FS=y
|
||||||
|
CONFIG_NTFS_FS=y
|
||||||
|
CONFIG_TMPFS=y
|
||||||
|
CONFIG_JFFS2_FS=y
|
||||||
|
CONFIG_NFS_FS=y
|
||||||
|
CONFIG_NLS_CODEPAGE_437=y
|
||||||
|
CONFIG_NLS_ISO8859_1=y
|
||||||
|
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||||
|
# CONFIG_ENABLE_MUST_CHECK is not set
|
||||||
|
CONFIG_STRIP_ASM_SYMS=y
|
||||||
|
CONFIG_LOCKUP_DETECTOR=y
|
||||||
|
CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=10
|
||||||
|
# CONFIG_SCHED_DEBUG is not set
|
||||||
|
# CONFIG_DEBUG_PREEMPT is not set
|
||||||
|
# CONFIG_FTRACE is not set
|
||||||
|
|
@ -0,0 +1,118 @@
|
||||||
|
CONFIG_CROSS_COMPILE="arc-linux-uclibc-"
|
||||||
|
CONFIG_DEFAULT_HOSTNAME="ARCLinux"
|
||||||
|
# CONFIG_SWAP is not set
|
||||||
|
CONFIG_SYSVIPC=y
|
||||||
|
CONFIG_POSIX_MQUEUE=y
|
||||||
|
# CONFIG_CROSS_MEMORY_ATTACH is not set
|
||||||
|
CONFIG_NO_HZ_IDLE=y
|
||||||
|
CONFIG_HIGH_RES_TIMERS=y
|
||||||
|
CONFIG_IKCONFIG=y
|
||||||
|
CONFIG_IKCONFIG_PROC=y
|
||||||
|
CONFIG_NAMESPACES=y
|
||||||
|
# CONFIG_UTS_NS is not set
|
||||||
|
# CONFIG_PID_NS is not set
|
||||||
|
CONFIG_BLK_DEV_INITRD=y
|
||||||
|
CONFIG_INITRAMFS_SOURCE="../../arc_initramfs_hs/"
|
||||||
|
CONFIG_EMBEDDED=y
|
||||||
|
CONFIG_PERF_EVENTS=y
|
||||||
|
# CONFIG_VM_EVENT_COUNTERS is not set
|
||||||
|
# CONFIG_COMPAT_BRK is not set
|
||||||
|
CONFIG_SLAB=y
|
||||||
|
CONFIG_MODULES=y
|
||||||
|
CONFIG_PARTITION_ADVANCED=y
|
||||||
|
CONFIG_ARC_PLAT_AXS10X=y
|
||||||
|
CONFIG_AXS103=y
|
||||||
|
CONFIG_ISA_ARCV2=y
|
||||||
|
CONFIG_SMP=y
|
||||||
|
CONFIG_ARC_BUILTIN_DTB_NAME="axs103_idu"
|
||||||
|
CONFIG_PREEMPT=y
|
||||||
|
# CONFIG_COMPACTION is not set
|
||||||
|
CONFIG_NET=y
|
||||||
|
CONFIG_PACKET=y
|
||||||
|
CONFIG_UNIX=y
|
||||||
|
CONFIG_NET_KEY=y
|
||||||
|
CONFIG_INET=y
|
||||||
|
CONFIG_IP_PNP=y
|
||||||
|
CONFIG_IP_PNP_DHCP=y
|
||||||
|
CONFIG_IP_PNP_BOOTP=y
|
||||||
|
CONFIG_IP_PNP_RARP=y
|
||||||
|
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
|
||||||
|
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
|
||||||
|
# CONFIG_INET_XFRM_MODE_BEET is not set
|
||||||
|
# CONFIG_IPV6 is not set
|
||||||
|
# CONFIG_STANDALONE is not set
|
||||||
|
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||||
|
# CONFIG_FIRMWARE_IN_KERNEL is not set
|
||||||
|
CONFIG_MTD=y
|
||||||
|
CONFIG_MTD_CMDLINE_PARTS=y
|
||||||
|
CONFIG_MTD_BLOCK=y
|
||||||
|
CONFIG_MTD_NAND=y
|
||||||
|
CONFIG_MTD_NAND_AXS=y
|
||||||
|
CONFIG_SCSI=y
|
||||||
|
CONFIG_BLK_DEV_SD=y
|
||||||
|
CONFIG_NETDEVICES=y
|
||||||
|
# CONFIG_NET_VENDOR_ARC is not set
|
||||||
|
# CONFIG_NET_VENDOR_BROADCOM is not set
|
||||||
|
# CONFIG_NET_VENDOR_INTEL is not set
|
||||||
|
# CONFIG_NET_VENDOR_MARVELL is not set
|
||||||
|
# CONFIG_NET_VENDOR_MICREL is not set
|
||||||
|
# CONFIG_NET_VENDOR_NATSEMI is not set
|
||||||
|
# CONFIG_NET_VENDOR_SEEQ is not set
|
||||||
|
CONFIG_STMMAC_ETH=y
|
||||||
|
# CONFIG_NET_VENDOR_VIA is not set
|
||||||
|
# CONFIG_NET_VENDOR_WIZNET is not set
|
||||||
|
CONFIG_NATIONAL_PHY=y
|
||||||
|
# CONFIG_USB_NET_DRIVERS is not set
|
||||||
|
CONFIG_INPUT_EVDEV=y
|
||||||
|
CONFIG_MOUSE_PS2_TOUCHKIT=y
|
||||||
|
CONFIG_MOUSE_SERIAL=y
|
||||||
|
CONFIG_MOUSE_SYNAPTICS_USB=y
|
||||||
|
# CONFIG_LEGACY_PTYS is not set
|
||||||
|
# CONFIG_DEVKMEM is not set
|
||||||
|
CONFIG_SERIAL_8250=y
|
||||||
|
CONFIG_SERIAL_8250_CONSOLE=y
|
||||||
|
CONFIG_SERIAL_8250_DW=y
|
||||||
|
CONFIG_SERIAL_OF_PLATFORM=y
|
||||||
|
# CONFIG_HW_RANDOM is not set
|
||||||
|
CONFIG_I2C=y
|
||||||
|
CONFIG_I2C_CHARDEV=y
|
||||||
|
CONFIG_I2C_DESIGNWARE_PLATFORM=y
|
||||||
|
# CONFIG_HWMON is not set
|
||||||
|
CONFIG_FB=y
|
||||||
|
# CONFIG_VGA_CONSOLE is not set
|
||||||
|
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||||
|
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
|
||||||
|
CONFIG_LOGO=y
|
||||||
|
# CONFIG_LOGO_LINUX_MONO is not set
|
||||||
|
# CONFIG_LOGO_LINUX_VGA16 is not set
|
||||||
|
# CONFIG_LOGO_LINUX_CLUT224 is not set
|
||||||
|
CONFIG_USB=y
|
||||||
|
CONFIG_USB_EHCI_HCD=y
|
||||||
|
CONFIG_USB_EHCI_HCD_PLATFORM=y
|
||||||
|
CONFIG_USB_OHCI_HCD=y
|
||||||
|
CONFIG_USB_OHCI_HCD_PLATFORM=y
|
||||||
|
CONFIG_USB_STORAGE=y
|
||||||
|
CONFIG_MMC=y
|
||||||
|
CONFIG_MMC_SDHCI=y
|
||||||
|
CONFIG_MMC_SDHCI_PLTFM=y
|
||||||
|
CONFIG_MMC_DW=y
|
||||||
|
CONFIG_MMC_DW_IDMAC=y
|
||||||
|
# CONFIG_IOMMU_SUPPORT is not set
|
||||||
|
CONFIG_EXT3_FS=y
|
||||||
|
CONFIG_EXT4_FS=y
|
||||||
|
CONFIG_MSDOS_FS=y
|
||||||
|
CONFIG_VFAT_FS=y
|
||||||
|
CONFIG_NTFS_FS=y
|
||||||
|
CONFIG_TMPFS=y
|
||||||
|
CONFIG_JFFS2_FS=y
|
||||||
|
CONFIG_NFS_FS=y
|
||||||
|
CONFIG_NLS_CODEPAGE_437=y
|
||||||
|
CONFIG_NLS_ISO8859_1=y
|
||||||
|
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||||
|
# CONFIG_ENABLE_MUST_CHECK is not set
|
||||||
|
CONFIG_STRIP_ASM_SYMS=y
|
||||||
|
CONFIG_LOCKUP_DETECTOR=y
|
||||||
|
CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=10
|
||||||
|
# CONFIG_SCHED_DEBUG is not set
|
||||||
|
# CONFIG_DEBUG_PREEMPT is not set
|
||||||
|
# CONFIG_FTRACE is not set
|
||||||
|
|
@ -33,7 +33,7 @@ static void __init arc_set_early_base_baud(unsigned long dt_root)
|
||||||
if (of_flat_dt_is_compatible(dt_root, "abilis,arc-tb10x"))
|
if (of_flat_dt_is_compatible(dt_root, "abilis,arc-tb10x"))
|
||||||
arc_base_baud = core_clk/3;
|
arc_base_baud = core_clk/3;
|
||||||
else if (of_flat_dt_is_compatible(dt_root, "snps,arc-sdp"))
|
else if (of_flat_dt_is_compatible(dt_root, "snps,arc-sdp"))
|
||||||
arc_base_baud = 33333333; /* Fixed 33MHz clk */
|
arc_base_baud = 33333333; /* Fixed 33MHz clk (AXS10x) */
|
||||||
else
|
else
|
||||||
arc_base_baud = core_clk;
|
arc_base_baud = core_clk;
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -6,7 +6,7 @@
|
||||||
# published by the Free Software Foundation.
|
# published by the Free Software Foundation.
|
||||||
#
|
#
|
||||||
|
|
||||||
config ARC_PLAT_AXS10X
|
menuconfig ARC_PLAT_AXS10X
|
||||||
bool "Synopsys ARC AXS10x Software Development Platforms"
|
bool "Synopsys ARC AXS10x Software Development Platforms"
|
||||||
select DW_APB_ICTL
|
select DW_APB_ICTL
|
||||||
select GPIO_DWAPB
|
select GPIO_DWAPB
|
||||||
|
|
@ -23,6 +23,7 @@ config ARC_PLAT_AXS10X
|
||||||
if ARC_PLAT_AXS10X
|
if ARC_PLAT_AXS10X
|
||||||
|
|
||||||
config AXS101
|
config AXS101
|
||||||
|
depends on ISA_ARCOMPACT
|
||||||
bool "AXS101 with AXC001 CPU Card (ARC 770D/EM6/AS221)"
|
bool "AXS101 with AXC001 CPU Card (ARC 770D/EM6/AS221)"
|
||||||
help
|
help
|
||||||
This adds support for the 770D/EM6/AS221 CPU Card. Only the ARC
|
This adds support for the 770D/EM6/AS221 CPU Card. Only the ARC
|
||||||
|
|
@ -32,4 +33,14 @@ config AXS101
|
||||||
this daughtercard. Please use the axs101.dts device tree
|
this daughtercard. Please use the axs101.dts device tree
|
||||||
with this configuration.
|
with this configuration.
|
||||||
|
|
||||||
|
config AXS103
|
||||||
|
bool "AXS103 with AXC003 CPU Card (ARC HS38x)"
|
||||||
|
depends on ISA_ARCV2
|
||||||
|
help
|
||||||
|
This adds support for the HS38x CPU Card.
|
||||||
|
|
||||||
|
The AXS103 Platform consists of an AXS10x mainboard with
|
||||||
|
this daughtercard. Please use the axs103.dts device tree
|
||||||
|
with this configuration.
|
||||||
|
|
||||||
endif
|
endif
|
||||||
|
|
|
||||||
|
|
@ -1,5 +1,5 @@
|
||||||
/*
|
/*
|
||||||
* AXS101 Software Development Platform
|
* AXS101/AXS103 Software Development Platform
|
||||||
*
|
*
|
||||||
* Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
|
* Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
|
||||||
*
|
*
|
||||||
|
|
@ -15,8 +15,10 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include <linux/of_platform.h>
|
#include <linux/of_platform.h>
|
||||||
#include <asm/mach_desc.h>
|
#include <asm/clk.h>
|
||||||
#include <asm/io.h>
|
#include <asm/io.h>
|
||||||
|
#include <asm/mach_desc.h>
|
||||||
|
#include <asm/mcip.h>
|
||||||
|
|
||||||
#define AXS_MB_CGU 0xE0010000
|
#define AXS_MB_CGU 0xE0010000
|
||||||
#define AXS_MB_CREG 0xE0011000
|
#define AXS_MB_CREG 0xE0011000
|
||||||
|
|
@ -29,14 +31,6 @@
|
||||||
#define AXC001_CREG 0xF0001000
|
#define AXC001_CREG 0xF0001000
|
||||||
#define AXC001_GPIO_INTC 0xF0003000
|
#define AXC001_GPIO_INTC 0xF0003000
|
||||||
|
|
||||||
#define CREG_CPU_ADDR_770 (AXC001_CREG + 0x20)
|
|
||||||
#define CREG_CPU_ADDR_TUNN (AXC001_CREG + 0x60)
|
|
||||||
#define CREG_CPU_ADDR_770_UPD (AXC001_CREG + 0x34)
|
|
||||||
#define CREG_CPU_ADDR_TUNN_UPD (AXC001_CREG + 0x74)
|
|
||||||
|
|
||||||
#define CREG_CPU_ARC770_IRQ_MUX (AXC001_CREG + 0x114)
|
|
||||||
#define CREG_CPU_GPIO_UART_MUX (AXC001_CREG + 0x120)
|
|
||||||
|
|
||||||
static void __init axs10x_enable_gpio_intc_wire(void)
|
static void __init axs10x_enable_gpio_intc_wire(void)
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
|
|
@ -83,6 +77,22 @@ static void __init axs10x_enable_gpio_intc_wire(void)
|
||||||
iowrite32(1 << MB_TO_GPIO_IRQ, (void __iomem *) GPIO_INTEN);
|
iowrite32(1 << MB_TO_GPIO_IRQ, (void __iomem *) GPIO_INTEN);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static inline void __init
|
||||||
|
write_cgu_reg(uint32_t value, void __iomem *reg, void __iomem *lock_reg)
|
||||||
|
{
|
||||||
|
unsigned int loops = 128 * 1024, ctr;
|
||||||
|
|
||||||
|
iowrite32(value, reg);
|
||||||
|
|
||||||
|
ctr = loops;
|
||||||
|
while (((ioread32(lock_reg) & 1) == 1) && ctr--) /* wait for unlock */
|
||||||
|
cpu_relax();
|
||||||
|
|
||||||
|
ctr = loops;
|
||||||
|
while (((ioread32(lock_reg) & 1) == 0) && ctr--) /* wait for re-lock */
|
||||||
|
cpu_relax();
|
||||||
|
}
|
||||||
|
|
||||||
static void __init axs10x_print_board_ver(unsigned int creg, const char *str)
|
static void __init axs10x_print_board_ver(unsigned int creg, const char *str)
|
||||||
{
|
{
|
||||||
union ver {
|
union ver {
|
||||||
|
|
@ -118,6 +128,16 @@ static void __init axs10x_early_init(void)
|
||||||
axs10x_print_board_ver(CREG_MB_VER, mb);
|
axs10x_print_board_ver(CREG_MB_VER, mb);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#ifdef CONFIG_AXS101
|
||||||
|
|
||||||
|
#define CREG_CPU_ADDR_770 (AXC001_CREG + 0x20)
|
||||||
|
#define CREG_CPU_ADDR_TUNN (AXC001_CREG + 0x60)
|
||||||
|
#define CREG_CPU_ADDR_770_UPD (AXC001_CREG + 0x34)
|
||||||
|
#define CREG_CPU_ADDR_TUNN_UPD (AXC001_CREG + 0x74)
|
||||||
|
|
||||||
|
#define CREG_CPU_ARC770_IRQ_MUX (AXC001_CREG + 0x114)
|
||||||
|
#define CREG_CPU_GPIO_UART_MUX (AXC001_CREG + 0x120)
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Set up System Memory Map for ARC cpu / peripherals controllers
|
* Set up System Memory Map for ARC cpu / peripherals controllers
|
||||||
*
|
*
|
||||||
|
|
@ -287,6 +307,145 @@ static void __init axs101_early_init(void)
|
||||||
axs10x_early_init();
|
axs10x_early_init();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#endif /* CONFIG_AXS101 */
|
||||||
|
|
||||||
|
#ifdef CONFIG_AXS103
|
||||||
|
|
||||||
|
#define AXC003_CGU 0xF0000000
|
||||||
|
#define AXC003_CREG 0xF0001000
|
||||||
|
#define AXC003_MST_AXI_TUNNEL 0
|
||||||
|
#define AXC003_MST_HS38 1
|
||||||
|
|
||||||
|
#define CREG_CPU_AXI_M0_IRQ_MUX (AXC003_CREG + 0x440)
|
||||||
|
#define CREG_CPU_GPIO_UART_MUX (AXC003_CREG + 0x480)
|
||||||
|
#define CREG_CPU_TUN_IO_CTRL (AXC003_CREG + 0x494)
|
||||||
|
|
||||||
|
|
||||||
|
union pll_reg {
|
||||||
|
struct {
|
||||||
|
#ifdef CONFIG_CPU_BIG_ENDIAN
|
||||||
|
unsigned int pad:17, noupd:1, bypass:1, edge:1, high:6, low:6;
|
||||||
|
#else
|
||||||
|
unsigned int low:6, high:6, edge:1, bypass:1, noupd:1, pad:17;
|
||||||
|
#endif
|
||||||
|
};
|
||||||
|
unsigned int val;
|
||||||
|
};
|
||||||
|
|
||||||
|
static unsigned int __init axs103_get_freq(void)
|
||||||
|
{
|
||||||
|
union pll_reg idiv, fbdiv, odiv;
|
||||||
|
unsigned int f = 33333333;
|
||||||
|
|
||||||
|
idiv.val = ioread32((void __iomem *)AXC003_CGU + 0x80 + 0);
|
||||||
|
fbdiv.val = ioread32((void __iomem *)AXC003_CGU + 0x80 + 4);
|
||||||
|
odiv.val = ioread32((void __iomem *)AXC003_CGU + 0x80 + 8);
|
||||||
|
|
||||||
|
if (idiv.bypass != 1)
|
||||||
|
f = f / (idiv.low + idiv.high);
|
||||||
|
|
||||||
|
if (fbdiv.bypass != 1)
|
||||||
|
f = f * (fbdiv.low + fbdiv.high);
|
||||||
|
|
||||||
|
if (odiv.bypass != 1)
|
||||||
|
f = f / (odiv.low + odiv.high);
|
||||||
|
|
||||||
|
f = (f + 500000) / 1000000; /* Rounding */
|
||||||
|
return f;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline unsigned int __init encode_div(unsigned int id, int upd)
|
||||||
|
{
|
||||||
|
union pll_reg div;
|
||||||
|
|
||||||
|
div.val = 0;
|
||||||
|
|
||||||
|
div.noupd = !upd;
|
||||||
|
div.bypass = id == 1 ? 1 : 0;
|
||||||
|
div.edge = (id%2 == 0) ? 0 : 1; /* 0 = rising */
|
||||||
|
div.low = (id%2 == 0) ? id >> 1 : (id >> 1)+1;
|
||||||
|
div.high = id >> 1;
|
||||||
|
|
||||||
|
return div.val;
|
||||||
|
}
|
||||||
|
|
||||||
|
noinline static void __init
|
||||||
|
axs103_set_freq(unsigned int id, unsigned int fd, unsigned int od)
|
||||||
|
{
|
||||||
|
write_cgu_reg(encode_div(id, 0),
|
||||||
|
(void __iomem *)AXC003_CGU + 0x80 + 0,
|
||||||
|
(void __iomem *)AXC003_CGU + 0x110);
|
||||||
|
|
||||||
|
write_cgu_reg(encode_div(fd, 0),
|
||||||
|
(void __iomem *)AXC003_CGU + 0x80 + 4,
|
||||||
|
(void __iomem *)AXC003_CGU + 0x110);
|
||||||
|
|
||||||
|
write_cgu_reg(encode_div(od, 1),
|
||||||
|
(void __iomem *)AXC003_CGU + 0x80 + 8,
|
||||||
|
(void __iomem *)AXC003_CGU + 0x110);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void __init axs103_early_init(void)
|
||||||
|
{
|
||||||
|
switch (arc_get_core_freq()/1000000) {
|
||||||
|
case 33:
|
||||||
|
axs103_set_freq(1, 1, 1);
|
||||||
|
break;
|
||||||
|
case 50:
|
||||||
|
axs103_set_freq(1, 30, 20);
|
||||||
|
break;
|
||||||
|
case 75:
|
||||||
|
axs103_set_freq(2, 45, 10);
|
||||||
|
break;
|
||||||
|
case 90:
|
||||||
|
axs103_set_freq(2, 54, 10);
|
||||||
|
break;
|
||||||
|
case 100:
|
||||||
|
axs103_set_freq(1, 30, 10);
|
||||||
|
break;
|
||||||
|
case 125:
|
||||||
|
axs103_set_freq(2, 45, 6);
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
/*
|
||||||
|
* In this case, core_frequency derived from
|
||||||
|
* DT "clock-frequency" might not match with board value.
|
||||||
|
* Hence update it to match the board value.
|
||||||
|
*/
|
||||||
|
arc_set_core_freq(axs103_get_freq() * 1000000);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
pr_info("Freq is %dMHz\n", axs103_get_freq());
|
||||||
|
|
||||||
|
/* Memory maps already config in pre-bootloader */
|
||||||
|
|
||||||
|
/* set GPIO mux to UART */
|
||||||
|
iowrite32(0x01, (void __iomem *) CREG_CPU_GPIO_UART_MUX);
|
||||||
|
|
||||||
|
iowrite32((0x00100000U | 0x000C0000U | 0x00003322U),
|
||||||
|
(void __iomem *) CREG_CPU_TUN_IO_CTRL);
|
||||||
|
|
||||||
|
/* Set up the AXS_MB interrupt system.*/
|
||||||
|
iowrite32(12, (void __iomem *) (CREG_CPU_AXI_M0_IRQ_MUX
|
||||||
|
+ (AXC003_MST_HS38 << 2)));
|
||||||
|
|
||||||
|
/* connect ICTL - Main Board with GPIO line */
|
||||||
|
iowrite32(0x01, (void __iomem *) CREG_MB_IRQ_MUX);
|
||||||
|
|
||||||
|
axs10x_print_board_ver(AXC003_CREG + 4088, "AXC003 CPU Card");
|
||||||
|
|
||||||
|
axs10x_early_init();
|
||||||
|
|
||||||
|
#ifdef CONFIG_ARC_MCIP
|
||||||
|
/* No Hardware init, but filling the smp ops callbacks */
|
||||||
|
mcip_init_early_smp();
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_AXS101
|
||||||
|
|
||||||
static const char *axs101_compat[] __initconst = {
|
static const char *axs101_compat[] __initconst = {
|
||||||
"snps,axs101",
|
"snps,axs101",
|
||||||
NULL,
|
NULL,
|
||||||
|
|
@ -296,3 +455,22 @@ MACHINE_START(AXS101, "axs101")
|
||||||
.dt_compat = axs101_compat,
|
.dt_compat = axs101_compat,
|
||||||
.init_early = axs101_early_init,
|
.init_early = axs101_early_init,
|
||||||
MACHINE_END
|
MACHINE_END
|
||||||
|
|
||||||
|
#endif /* CONFIG_AXS101 */
|
||||||
|
|
||||||
|
#ifdef CONFIG_AXS103
|
||||||
|
|
||||||
|
static const char *axs103_compat[] __initconst = {
|
||||||
|
"snps,axs103",
|
||||||
|
NULL,
|
||||||
|
};
|
||||||
|
|
||||||
|
MACHINE_START(AXS103, "axs103")
|
||||||
|
.dt_compat = axs103_compat,
|
||||||
|
.init_early = axs103_early_init,
|
||||||
|
#ifdef CONFIG_ARC_MCIP
|
||||||
|
.init_smp = mcip_init_smp,
|
||||||
|
#endif
|
||||||
|
MACHINE_END
|
||||||
|
|
||||||
|
#endif /* CONFIG_AXS103 */
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue