ARM: S5P6442: Add Samsung S5P6442 CPU support
This patch adds support for Samsung S5P6442 CPU. This patch also adds an entry for S5P6442 cpu in plat-s5p cpu table. Signed-off-by: Adityapratap Sharma <aditya.ps@samsung.com> Signed-off-by: Atul Dahiya <atul.dahiya@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This commit is contained in:
Kukjin Kim
Ben Dooks
parent
a0af8b3c70
commit
5f7f6a4a0d
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# arch/arm/mach-s5p6442/Kconfig
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#
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# Copyright (c) 2010 Samsung Electronics Co., Ltd.
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# http://www.samsung.com/
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#
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# Licensed under GPLv2
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# Configuration options for the S5P6442
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if ARCH_S5P6442
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config CPU_S5P6442
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bool
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select PLAT_S5P
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help
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Enable S5P6442 CPU support
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config MACH_SMDK6442
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bool "SMDK6442"
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select CPU_S5P6442
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help
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Machine support for Samsung SMDK6442
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endif
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@ -0,0 +1,18 @@
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# arch/arm/mach-s5p6442/Makefile
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#
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# Copyright (c) 2010 Samsung Electronics Co., Ltd.
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# http://www.samsung.com/
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#
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# Licensed under GPLv2
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obj-y :=
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obj-m :=
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obj-n :=
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obj- :=
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# Core support for S5P6442 system
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obj-$(CONFIG_CPU_S5P6442) += cpu.o init.o
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# machine support
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zreladdr-y := 0x20008000
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params_phys-y := 0x20000100
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@ -0,0 +1,121 @@
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/* linux/arch/arm/mach-s5p6442/cpu.c
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/timer.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/sysdev.h>
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#include <linux/serial_core.h>
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#include <linux/platform_device.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/irq.h>
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#include <asm/proc-fns.h>
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#include <mach/hardware.h>
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#include <mach/map.h>
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#include <asm/irq.h>
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#include <plat/regs-serial.h>
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#include <mach/regs-clock.h>
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#include <plat/cpu.h>
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#include <plat/devs.h>
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#include <plat/clock.h>
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#include <plat/s5p6442.h>
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/* Initial IO mappings */
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static struct map_desc s5p6442_iodesc[] __initdata = {
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{
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.virtual = (unsigned long)S5P_VA_SYSTIMER,
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.pfn = __phys_to_pfn(S5P6442_PA_SYSTIMER),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)VA_VIC2,
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.pfn = __phys_to_pfn(S5P6442_PA_VIC2),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}
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};
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static void s5p6442_idle(void)
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{
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if (!need_resched())
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cpu_do_idle();
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local_irq_enable();
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}
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/* s5p6442_map_io
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*
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* register the standard cpu IO areas
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*/
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void __init s5p6442_map_io(void)
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{
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iotable_init(s5p6442_iodesc, ARRAY_SIZE(s5p6442_iodesc));
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}
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void __init s5p6442_init_clocks(int xtal)
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{
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printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
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s3c24xx_register_baseclocks(xtal);
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s5p_register_clocks(xtal);
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s5p6442_register_clocks();
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s5p6442_setup_clocks();
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}
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void __init s5p6442_init_irq(void)
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{
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/* S5P6442 supports 3 VIC */
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u32 vic[3];
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/* VIC0, VIC1, and VIC2: some interrupt reserved */
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vic[0] = 0x7fefffff;
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vic[1] = 0X7f389c81;
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vic[2] = 0X1bbbcfff;
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s5p_init_irq(vic, ARRAY_SIZE(vic));
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}
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static struct sysdev_class s5p6442_sysclass = {
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.name = "s5p6442-core",
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};
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static struct sys_device s5p6442_sysdev = {
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.cls = &s5p6442_sysclass,
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};
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static int __init s5p6442_core_init(void)
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{
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return sysdev_class_register(&s5p6442_sysclass);
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}
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core_initcall(s5p6442_core_init);
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int __init s5p6442_init(void)
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{
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printk(KERN_INFO "S5P6442: Initializing architecture\n");
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/* set idle function */
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pm_idle = s5p6442_idle;
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return sysdev_register(&s5p6442_sysdev);
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}
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@ -0,0 +1,36 @@
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/* linux/arch/arm/mach-s5p6442/include/mach/debug-macro.S
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* Based on arch/arm/mach-s3c6400/include/mach/debug-macro.S
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/* pull in the relevant register and map files. */
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#include <mach/map.h>
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#include <plat/regs-serial.h>
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.macro addruart, rx
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mrc p15, 0, \rx, c1, c0
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tst \rx, #1
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ldreq \rx, = S3C_PA_UART
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ldrne \rx, = S3C_VA_UART
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#if CONFIG_DEBUG_S3C_UART != 0
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add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART)
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#endif
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.endm
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#define fifo_full fifo_full_s5pv210
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#define fifo_level fifo_level_s5pv210
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/* include the reset of the code which will do the work, we're only
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* compiling for a single cpu processor type so the default of s3c2440
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* will be fine with us.
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*/
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#include <plat/debug-macro.S>
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/* linux/arch/arm/mach-s5p6442/include/mach/entry-macro.S
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* Low-level IRQ helper macros for the Samsung S5P6442
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <asm/hardware/vic.h>
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#include <mach/map.h>
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#include <plat/irqs.h>
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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ldr \base, =VA_VIC0
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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@ check the vic0
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mov \irqnr, # S5P_IRQ_OFFSET + 31
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ldr \irqstat, [ \base, # VIC_IRQ_STATUS ]
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teq \irqstat, #0
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@ otherwise try vic1
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addeq \tmp, \base, #(VA_VIC1 - VA_VIC0)
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addeq \irqnr, \irqnr, #32
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ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
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teqeq \irqstat, #0
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@ otherwise try vic2
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addeq \tmp, \base, #(VA_VIC2 - VA_VIC0)
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addeq \irqnr, \irqnr, #32
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ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ]
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teqeq \irqstat, #0
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clzne \irqstat, \irqstat
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subne \irqnr, \irqnr, \irqstat
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.endm
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/* linux/arch/arm/mach-s5p6442/include/mach/gpio.h
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* S5P6442 - GPIO lib support
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_GPIO_H
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#define __ASM_ARCH_GPIO_H __FILE__
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#define gpio_get_value __gpio_get_value
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#define gpio_set_value __gpio_set_value
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#define gpio_cansleep __gpio_cansleep
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#define gpio_to_irq __gpio_to_irq
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/* GPIO bank sizes */
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#define S5P6442_GPIO_A0_NR (8)
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#define S5P6442_GPIO_A1_NR (2)
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#define S5P6442_GPIO_B_NR (4)
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#define S5P6442_GPIO_C0_NR (5)
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#define S5P6442_GPIO_C1_NR (5)
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#define S5P6442_GPIO_D0_NR (2)
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#define S5P6442_GPIO_D1_NR (6)
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#define S5P6442_GPIO_E0_NR (8)
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#define S5P6442_GPIO_E1_NR (5)
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#define S5P6442_GPIO_F0_NR (8)
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#define S5P6442_GPIO_F1_NR (8)
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#define S5P6442_GPIO_F2_NR (8)
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#define S5P6442_GPIO_F3_NR (6)
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#define S5P6442_GPIO_G0_NR (7)
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#define S5P6442_GPIO_G1_NR (7)
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#define S5P6442_GPIO_G2_NR (7)
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#define S5P6442_GPIO_H0_NR (8)
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#define S5P6442_GPIO_H1_NR (8)
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#define S5P6442_GPIO_H2_NR (8)
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#define S5P6442_GPIO_H3_NR (8)
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#define S5P6442_GPIO_J0_NR (8)
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#define S5P6442_GPIO_J1_NR (6)
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#define S5P6442_GPIO_J2_NR (8)
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#define S5P6442_GPIO_J3_NR (8)
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#define S5P6442_GPIO_J4_NR (5)
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/* GPIO bank numbers */
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/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
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* space for debugging purposes so that any accidental
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* change from one gpio bank to another can be caught.
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*/
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#define S5P6442_GPIO_NEXT(__gpio) \
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((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
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enum s5p_gpio_number {
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S5P6442_GPIO_A0_START = 0,
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S5P6442_GPIO_A1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_A0),
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S5P6442_GPIO_B_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_A1),
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S5P6442_GPIO_C0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_B),
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S5P6442_GPIO_C1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_C0),
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S5P6442_GPIO_D0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_C1),
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S5P6442_GPIO_D1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_D0),
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S5P6442_GPIO_E0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_D1),
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S5P6442_GPIO_E1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_E0),
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S5P6442_GPIO_F0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_E1),
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S5P6442_GPIO_F1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F0),
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S5P6442_GPIO_F2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F1),
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S5P6442_GPIO_F3_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F2),
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S5P6442_GPIO_G0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_F3),
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S5P6442_GPIO_G1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_G0),
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S5P6442_GPIO_G2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_G1),
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S5P6442_GPIO_H0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_G2),
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S5P6442_GPIO_H1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H0),
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S5P6442_GPIO_H2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H1),
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S5P6442_GPIO_H3_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H2),
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S5P6442_GPIO_J0_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_H3),
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S5P6442_GPIO_J1_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J0),
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S5P6442_GPIO_J2_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J1),
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S5P6442_GPIO_J3_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J2),
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S5P6442_GPIO_J4_START = S5P6442_GPIO_NEXT(S5P6442_GPIO_J3),
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};
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/* S5P6442 GPIO number definitions. */
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#define S5P6442_GPA0(_nr) (S5P6442_GPIO_A0_START + (_nr))
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#define S5P6442_GPA1(_nr) (S5P6442_GPIO_A1_START + (_nr))
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#define S5P6442_GPB(_nr) (S5P6442_GPIO_B_START + (_nr))
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#define S5P6442_GPC0(_nr) (S5P6442_GPIO_C0_START + (_nr))
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#define S5P6442_GPC1(_nr) (S5P6442_GPIO_C1_START + (_nr))
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#define S5P6442_GPD0(_nr) (S5P6442_GPIO_D0_START + (_nr))
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#define S5P6442_GPD1(_nr) (S5P6442_GPIO_D1_START + (_nr))
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#define S5P6442_GPE0(_nr) (S5P6442_GPIO_E0_START + (_nr))
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#define S5P6442_GPE1(_nr) (S5P6442_GPIO_E1_START + (_nr))
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#define S5P6442_GPF0(_nr) (S5P6442_GPIO_F0_START + (_nr))
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#define S5P6442_GPF1(_nr) (S5P6442_GPIO_F1_START + (_nr))
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#define S5P6442_GPF2(_nr) (S5P6442_GPIO_F2_START + (_nr))
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#define S5P6442_GPF3(_nr) (S5P6442_GPIO_F3_START + (_nr))
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#define S5P6442_GPG0(_nr) (S5P6442_GPIO_G0_START + (_nr))
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#define S5P6442_GPG1(_nr) (S5P6442_GPIO_G1_START + (_nr))
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#define S5P6442_GPG2(_nr) (S5P6442_GPIO_G2_START + (_nr))
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#define S5P6442_GPH0(_nr) (S5P6442_GPIO_H0_START + (_nr))
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#define S5P6442_GPH1(_nr) (S5P6442_GPIO_H1_START + (_nr))
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#define S5P6442_GPH2(_nr) (S5P6442_GPIO_H2_START + (_nr))
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#define S5P6442_GPH3(_nr) (S5P6442_GPIO_H3_START + (_nr))
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#define S5P6442_GPJ0(_nr) (S5P6442_GPIO_J0_START + (_nr))
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#define S5P6442_GPJ1(_nr) (S5P6442_GPIO_J1_START + (_nr))
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#define S5P6442_GPJ2(_nr) (S5P6442_GPIO_J2_START + (_nr))
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#define S5P6442_GPJ3(_nr) (S5P6442_GPIO_J3_START + (_nr))
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#define S5P6442_GPJ4(_nr) (S5P6442_GPIO_J4_START + (_nr))
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/* the end of the S5P6442 specific gpios */
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#define S5P6442_GPIO_END (S5P6442_GPJ4(S5P6442_GPIO_J4_NR) + 1)
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#define S3C_GPIO_END S5P6442_GPIO_END
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/* define the number of gpios we need to the one after the GPJ4() range */
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#define ARCH_NR_GPIOS (S5P6442_GPJ4(S5P6442_GPIO_J4_NR) + \
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CONFIG_SAMSUNG_GPIO_EXTRA + 1)
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#include <asm-generic/gpio.h>
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#endif /* __ASM_ARCH_GPIO_H */
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@ -0,0 +1,18 @@
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/* linux/arch/arm/mach-s5p6442/include/mach/hardware.h
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* S5P6442 - Hardware support
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*
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* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_HARDWARE_H
|
||||
#define __ASM_ARCH_HARDWARE_H __FILE__
|
||||
|
||||
/* currently nothing here, placeholder */
|
||||
|
||||
#endif /* __ASM_ARCH_HARDWARE_H */
|
||||
|
|
@ -0,0 +1,58 @@
|
|||
/* linux/arch/arm/mach-s5p6442/include/mach/map.h
|
||||
*
|
||||
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com/
|
||||
*
|
||||
* S5P6442 - Memory map definitions
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_MAP_H
|
||||
#define __ASM_ARCH_MAP_H __FILE__
|
||||
|
||||
#include <plat/map-base.h>
|
||||
#include <plat/map-s5p.h>
|
||||
|
||||
#define S5P6442_PA_CHIPID (0xE0000000)
|
||||
#define S5P_PA_CHIPID S5P6442_PA_CHIPID
|
||||
|
||||
#define S5P6442_PA_SYSCON (0xE0100000)
|
||||
#define S5P_PA_SYSCON S5P6442_PA_SYSCON
|
||||
|
||||
#define S5P6442_PA_GPIO (0xE0200000)
|
||||
#define S5P_PA_GPIO S5P6442_PA_GPIO
|
||||
|
||||
#define S5P6442_PA_VIC0 (0xE4000000)
|
||||
#define S5P_PA_VIC0 S5P6442_PA_VIC0
|
||||
|
||||
#define S5P6442_PA_VIC1 (0xE4100000)
|
||||
#define S5P_PA_VIC1 S5P6442_PA_VIC1
|
||||
|
||||
#define S5P6442_PA_VIC2 (0xE4200000)
|
||||
#define S5P_PA_VIC2 S5P6442_PA_VIC2
|
||||
|
||||
#define S5P6442_PA_TIMER (0xEA000000)
|
||||
#define S5P_PA_TIMER S5P6442_PA_TIMER
|
||||
|
||||
#define S5P6442_PA_SYSTIMER (0xEA100000)
|
||||
|
||||
#define S5P6442_PA_UART (0xEC000000)
|
||||
|
||||
#define S5P_PA_UART0 (S5P6442_PA_UART + 0x0)
|
||||
#define S5P_PA_UART1 (S5P6442_PA_UART + 0x400)
|
||||
#define S5P_PA_UART2 (S5P6442_PA_UART + 0x800)
|
||||
#define S5P_SZ_UART SZ_256
|
||||
|
||||
#define S5P6442_PA_IIC0 (0xEC100000)
|
||||
|
||||
#define S5P6442_PA_SDRAM (0x20000000)
|
||||
#define S5P_PA_SDRAM S5P6442_PA_SDRAM
|
||||
|
||||
/* compatibiltiy defines. */
|
||||
#define S3C_PA_UART S5P6442_PA_UART
|
||||
#define S3C_PA_IIC S5P6442_PA_IIC0
|
||||
|
||||
#endif /* __ASM_ARCH_MAP_H */
|
||||
|
|
@ -0,0 +1,19 @@
|
|||
/* linux/arch/arm/mach-s5p6442/include/mach/memory.h
|
||||
*
|
||||
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com/
|
||||
*
|
||||
* S5P6442 - Memory definitions
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_MEMORY_H
|
||||
#define __ASM_ARCH_MEMORY_H
|
||||
|
||||
#define PHYS_OFFSET UL(0x20000000)
|
||||
#define CONSISTENT_DMA_SIZE SZ_8M
|
||||
|
||||
#endif /* __ASM_ARCH_MEMORY_H */
|
||||
|
|
@ -0,0 +1,26 @@
|
|||
/* linux/arch/arm/mach-s5p6442/include/mach/system.h
|
||||
*
|
||||
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com/
|
||||
*
|
||||
* S5P6442 - system support header
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_SYSTEM_H
|
||||
#define __ASM_ARCH_SYSTEM_H __FILE__
|
||||
|
||||
static void arch_idle(void)
|
||||
{
|
||||
/* nothing here yet */
|
||||
}
|
||||
|
||||
static void arch_reset(char mode, const char *cmd)
|
||||
{
|
||||
/* nothing here yet */
|
||||
}
|
||||
|
||||
#endif /* __ASM_ARCH_SYSTEM_H */
|
||||
|
|
@ -0,0 +1,24 @@
|
|||
/* linux/arch/arm/mach-s5p6442/include/mach/uncompress.h
|
||||
*
|
||||
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com/
|
||||
*
|
||||
* S5P6442 - uncompress code
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_UNCOMPRESS_H
|
||||
#define __ASM_ARCH_UNCOMPRESS_H
|
||||
|
||||
#include <mach/map.h>
|
||||
#include <plat/uncompress.h>
|
||||
|
||||
static void arch_detect_cpu(void)
|
||||
{
|
||||
/* we do not need to do any cpu detection here at the moment. */
|
||||
}
|
||||
|
||||
#endif /* __ASM_ARCH_UNCOMPRESS_H */
|
||||
|
|
@ -0,0 +1,44 @@
|
|||
/* linux/arch/arm/mach-s5p6442/s5p6442-init.c
|
||||
*
|
||||
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/serial_core.h>
|
||||
|
||||
#include <plat/cpu.h>
|
||||
#include <plat/devs.h>
|
||||
#include <plat/s5p6442.h>
|
||||
#include <plat/regs-serial.h>
|
||||
|
||||
static struct s3c24xx_uart_clksrc s5p6442_serial_clocks[] = {
|
||||
[0] = {
|
||||
.name = "pclk",
|
||||
.divisor = 1,
|
||||
.min_baud = 0,
|
||||
.max_baud = 0,
|
||||
},
|
||||
};
|
||||
|
||||
/* uart registration process */
|
||||
void __init s5p6442_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
|
||||
{
|
||||
struct s3c2410_uartcfg *tcfg = cfg;
|
||||
u32 ucnt;
|
||||
|
||||
for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
|
||||
if (!tcfg->clocks) {
|
||||
tcfg->clocks = s5p6442_serial_clocks;
|
||||
tcfg->clocks_size = ARRAY_SIZE(s5p6442_serial_clocks);
|
||||
}
|
||||
}
|
||||
|
||||
s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
|
||||
}
|
||||
|
|
@ -18,10 +18,12 @@
|
|||
#include <mach/regs-clock.h>
|
||||
#include <plat/cpu.h>
|
||||
#include <plat/s5p6440.h>
|
||||
#include <plat/s5p6442.h>
|
||||
|
||||
/* table of supported CPUs */
|
||||
|
||||
static const char name_s5p6440[] = "S5P6440";
|
||||
static const char name_s5p6442[] = "S5P6442";
|
||||
|
||||
static struct cpu_table cpu_ids[] __initdata = {
|
||||
{
|
||||
|
|
@ -32,6 +34,14 @@ static struct cpu_table cpu_ids[] __initdata = {
|
|||
.init_uarts = s5p6440_init_uarts,
|
||||
.init = s5p6440_init,
|
||||
.name = name_s5p6440,
|
||||
}, {
|
||||
.idcode = 0x36442000,
|
||||
.idmask = 0xffffff00,
|
||||
.map_io = s5p6442_map_io,
|
||||
.init_clocks = s5p6442_init_clocks,
|
||||
.init_uarts = s5p6442_init_uarts,
|
||||
.init = s5p6442_init,
|
||||
.name = name_s5p6442,
|
||||
},
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -28,5 +28,6 @@
|
|||
#define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000))
|
||||
#define VA_VIC0 VA_VIC(0)
|
||||
#define VA_VIC1 VA_VIC(1)
|
||||
#define VA_VIC2 VA_VIC(2)
|
||||
|
||||
#endif /* __ASM_PLAT_MAP_S5P_H */
|
||||
|
|
|
|||
|
|
@ -0,0 +1,33 @@
|
|||
/* arch/arm/plat-s5p/include/plat/s5p6442.h
|
||||
*
|
||||
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com/
|
||||
*
|
||||
* Header file for s5p6442 cpu support
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/* Common init code for S5P6442 related SoCs */
|
||||
|
||||
extern void s5p6442_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
|
||||
extern void s5p6442_register_clocks(void);
|
||||
extern void s5p6442_setup_clocks(void);
|
||||
|
||||
#ifdef CONFIG_CPU_S5P6442
|
||||
|
||||
extern int s5p6442_init(void);
|
||||
extern void s5p6442_init_irq(void);
|
||||
extern void s5p6442_map_io(void);
|
||||
extern void s5p6442_init_clocks(int xtal);
|
||||
|
||||
#define s5p6442_init_uarts s5p6442_common_init_uarts
|
||||
|
||||
#else
|
||||
#define s5p6442_init_clocks NULL
|
||||
#define s5p6442_init_uarts NULL
|
||||
#define s5p6442_map_io NULL
|
||||
#define s5p6442_init NULL
|
||||
#endif
|
||||
|
|
@ -11,6 +11,18 @@
|
|||
|
||||
#include <plat/regs-serial.h>
|
||||
|
||||
/* The S5PV210/S5PC110 and S5P6442 implementations are as belows. */
|
||||
|
||||
.macro fifo_level_s5pv210 rd, rx
|
||||
ldr \rd, [ \rx, # S3C2410_UFSTAT ]
|
||||
and \rd, \rd, #S5PV210_UFSTAT_TXMASK
|
||||
.endm
|
||||
|
||||
.macro fifo_full_s5pv210 rd, rx
|
||||
ldr \rd, [ \rx, # S3C2410_UFSTAT ]
|
||||
tst \rd, #S5PV210_UFSTAT_TXFULL
|
||||
.endm
|
||||
|
||||
/* The S3C2440 implementations are used by default as they are the
|
||||
* most widely re-used */
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue