e1000e: 82566DC fails to get link
Two recent patches to cleanup the reset[1] and initial PHY configuration[2] code paths for ICH/PCH devices inadvertently left out a 10msec delay and device ID check respectively which are necessary for the 82566DC (device id 0x104b) to be configured properly, otherwise it will not get link. [1] commite98cac447c
[2] commit3f0c16e844
CC: stable@kernel.org Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -932,7 +932,6 @@ out:
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**/
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static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw)
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{
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struct e1000_adapter *adapter = hw->adapter;
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struct e1000_phy_info *phy = &hw->phy;
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u32 i, data, cnf_size, cnf_base_addr, sw_cfg_mask;
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s32 ret_val = 0;
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@ -950,7 +949,8 @@ static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw)
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if (phy->type != e1000_phy_igp_3)
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return ret_val;
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if (adapter->pdev->device == E1000_DEV_ID_ICH8_IGP_AMT) {
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if ((hw->adapter->pdev->device == E1000_DEV_ID_ICH8_IGP_AMT) ||
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(hw->adapter->pdev->device == E1000_DEV_ID_ICH8_IGP_C)) {
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sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG;
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break;
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}
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@ -1626,6 +1626,9 @@ static s32 e1000_post_phy_reset_ich8lan(struct e1000_hw *hw)
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if (e1000_check_reset_block(hw))
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goto out;
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/* Allow time for h/w to get to quiescent state after reset */
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msleep(10);
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/* Perform any necessary post-reset workarounds */
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switch (hw->mac.type) {
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case e1000_pchlan:
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