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drm/i915/kbl: Reset secondary power well requests left on by DMC/KVMR 

The workaround added in
commit c6782b76d3 ("drm/i915/gen9: Reset secondary power well
requests left on by DMC/KVMR")
needs to be applied on Kabylake too as shown by the corresponding
timeout errors about power well 1 and MISC IO power well disabling in
the latest CI run.

CC: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1460748778-4484-1-git-send-email-imre.deak@intel.com
This commit is contained in:
Imre Deak 2016-04-15 22:32:58 +03:00
parent 8a8dae260f
commit 5f304c8736
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/i915/intel_runtime_pm.c
View File

@ -709,7 +709,7 @@ static void skl_set_power_well(struct drm_i915_private *dev_priv,
DRM_DEBUG_KMS("Disabling %s\n", power_well->name);
}
if (IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv))
if (IS_GEN9(dev_priv))
gen9_sanitize_power_well_requests(dev_priv, power_well);
}