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staging: fbtft: Indent to match open parenthesis 

Fix alignment issues by properly indenting function parameters in
accordance to the kernel coding style. Checkpatch pointed out this
issue.

CHECK: Alignment should match open parenthesis

Signed-off-by: Eva Rachel Retuya <eraretuya@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Eva Rachel Retuya 2016-02-10 17:56:07 +08:00 committed by Greg Kroah-Hartman
parent e0246ea374
commit 5f10ef7dce
3 changed files with 76 additions and 76 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

34
drivers/staging/fbtft/fb_hx8340bn.c
View File

@ -179,25 +179,25 @@ static int set_gamma(struct fbtft_par *par, unsigned long *curves)
return 0; /* only GC0 can be customized */ return 0; /* only GC0 can be customized */
write_reg(par, 0xC2, write_reg(par, 0xC2,
(CURVE(0, 8) << 4) | CURVE(0, 7), (CURVE(0, 8) << 4) | CURVE(0, 7),
(CURVE(0, 10) << 4) | CURVE(0, 9), (CURVE(0, 10) << 4) | CURVE(0, 9),
(CURVE(0, 12) << 4) | CURVE(0, 11), (CURVE(0, 12) << 4) | CURVE(0, 11),
CURVE(0, 2), CURVE(0, 2),
(CURVE(0, 4) << 4) | CURVE(0, 3), (CURVE(0, 4) << 4) | CURVE(0, 3),
CURVE(0, 5), CURVE(0, 5),
CURVE(0, 6), CURVE(0, 6),
(CURVE(0, 1) << 4) | CURVE(0, 0), (CURVE(0, 1) << 4) | CURVE(0, 0),
(CURVE(0, 14) << 2) | CURVE(0, 13)); (CURVE(0, 14) << 2) | CURVE(0, 13));
write_reg(par, 0xC3, write_reg(par, 0xC3,
(CURVE(1, 8) << 4) | CURVE(1, 7), (CURVE(1, 8) << 4) | CURVE(1, 7),
(CURVE(1, 10) << 4) | CURVE(1, 9), (CURVE(1, 10) << 4) | CURVE(1, 9),
(CURVE(1, 12) << 4) | CURVE(1, 11), (CURVE(1, 12) << 4) | CURVE(1, 11),
CURVE(1, 2), CURVE(1, 2),
(CURVE(1, 4) << 4) | CURVE(1, 3), (CURVE(1, 4) << 4) | CURVE(1, 3),
CURVE(1, 5), CURVE(1, 5),
CURVE(1, 6), CURVE(1, 6),
(CURVE(1, 1) << 4) | CURVE(1, 0)); (CURVE(1, 1) << 4) | CURVE(1, 0));
mdelay(10); mdelay(10);

12
drivers/staging/fbtft/fb_hx8353d.c
View File

@ -59,7 +59,7 @@ static int init_display(struct fbtft_par *par)
/* RGBSET */ /* RGBSET */
write_reg(par, MIPI_DCS_WRITE_LUT, write_reg(par, MIPI_DCS_WRITE_LUT,
0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30,
32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62,
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
@ -122,11 +122,11 @@ static int set_var(struct fbtft_par *par)
static int set_gamma(struct fbtft_par *par, unsigned long *curves) static int set_gamma(struct fbtft_par *par, unsigned long *curves)
{ {
write_reg(par, 0xE0, write_reg(par, 0xE0,
curves[0], curves[1], curves[2], curves[3], curves[0], curves[1], curves[2], curves[3],
curves[4], curves[5], curves[6], curves[7], curves[4], curves[5], curves[6], curves[7],
curves[8], curves[9], curves[10], curves[11], curves[8], curves[9], curves[10], curves[11],
curves[12], curves[13], curves[14], curves[15], curves[12], curves[13], curves[14], curves[15],
curves[16], curves[17], curves[18]); curves[16], curves[17], curves[18]);
return 0; return 0;
} }

106
drivers/staging/fbtft/fb_hx8357d.c
View File

@ -56,65 +56,65 @@ static int init_display(struct fbtft_par *par)
write_reg(par, HX8357_SETPANEL, 0x05); write_reg(par, HX8357_SETPANEL, 0x05);
write_reg(par, HX8357_SETPWR1, write_reg(par, HX8357_SETPWR1,
0x00, /* Not deep standby */ 0x00, /* Not deep standby */
0x15, /* BT */ 0x15, /* BT */
0x1C, /* VSPR */ 0x1C, /* VSPR */
0x1C, /* VSNR */ 0x1C, /* VSNR */
0x83, /* AP */ 0x83, /* AP */
0xAA); /* FS */ 0xAA); /* FS */
write_reg(par, HX8357D_SETSTBA, write_reg(par, HX8357D_SETSTBA,
0x50, /* OPON normal */ 0x50, /* OPON normal */
0x50, /* OPON idle */ 0x50, /* OPON idle */
0x01, /* STBA */ 0x01, /* STBA */
0x3C, /* STBA */ 0x3C, /* STBA */
0x1E, /* STBA */ 0x1E, /* STBA */
0x08); /* GEN */ 0x08); /* GEN */
write_reg(par, HX8357D_SETCYC, write_reg(par, HX8357D_SETCYC,
0x02, /* NW 0x02 */ 0x02, /* NW 0x02 */
0x40, /* RTN */ 0x40, /* RTN */
0x00, /* DIV */ 0x00, /* DIV */
0x2A, /* DUM */ 0x2A, /* DUM */
0x2A, /* DUM */ 0x2A, /* DUM */
0x0D, /* GDON */ 0x0D, /* GDON */
0x78); /* GDOFF */ 0x78); /* GDOFF */
write_reg(par, HX8357D_SETGAMMA, write_reg(par, HX8357D_SETGAMMA,
0x02, 0x02,
0x0A, 0x0A,
0x11, 0x11,
0x1d, 0x1d,
0x23, 0x23,
0x35, 0x35,
0x41, 0x41,
0x4b, 0x4b,
0x4b, 0x4b,
0x42, 0x42,
0x3A, 0x3A,
0x27, 0x27,
0x1B, 0x1B,
0x08, 0x08,
0x09, 0x09,
0x03, 0x03,
0x02, 0x02,
0x0A, 0x0A,
0x11, 0x11,
0x1d, 0x1d,
0x23, 0x23,
0x35, 0x35,
0x41, 0x41,
0x4b, 0x4b,
0x4b, 0x4b,
0x42, 0x42,
0x3A, 0x3A,
0x27, 0x27,
0x1B, 0x1B,
0x08, 0x08,
0x09, 0x09,
0x03, 0x03,
0x00, 0x00,
0x01); 0x01);
/* 16 bit */ /* 16 bit */
write_reg(par, MIPI_DCS_SET_PIXEL_FORMAT, 0x55); write_reg(par, MIPI_DCS_SET_PIXEL_FORMAT, 0x55);