From db3347846f7f20fe7e6d0da8e5d31f6c50313611 Mon Sep 17 00:00:00 2001 From: Romain Perier Date: Fri, 3 Feb 2017 15:38:00 +0100 Subject: [PATCH 01/10] ARM: dts: rockchip: Add support for ES8388 to the Radxa Rock 2 This commit adds the DT definition of the es8388 i2c device found at address 0x10. It also adds the definition for connecting the Rockchip I2S to the es8388 analog output. This commit is based on the initial work that was done by Sjoerd Simons with some improvements. Signed-off-by: Romain Perier Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288-rock2-som.dtsi | 2 +- arch/arm/boot/dts/rk3288-rock2-square.dts | 41 +++++++++++++++++++++++ 2 files changed, 42 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/rk3288-rock2-som.dtsi b/arch/arm/boot/dts/rk3288-rock2-som.dtsi index 1c0bbc9b928b..f0778a46bca9 100644 --- a/arch/arm/boot/dts/rk3288-rock2-som.dtsi +++ b/arch/arm/boot/dts/rk3288-rock2-som.dtsi @@ -136,7 +136,7 @@ regulator-always-on; }; - vcc_io: REG2 { + vcc_io: vccio_codec: REG2 { regulator-name = "VCC_IO"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; diff --git a/arch/arm/boot/dts/rk3288-rock2-square.dts b/arch/arm/boot/dts/rk3288-rock2-square.dts index 96a2e745bb93..fbf11d410c42 100644 --- a/arch/arm/boot/dts/rk3288-rock2-square.dts +++ b/arch/arm/boot/dts/rk3288-rock2-square.dts @@ -86,6 +86,19 @@ #sound-dai-cells = <0>; }; + sound-i2s { + compatible = "rockchip,rk3288-hdmi-analog"; + pinctrl-names = "default"; + pinctrl-0 = <&phone_ctl>, <&hp_det>; + rockchip,audio-codec = <&es8388>; + rockchip,hp-det-gpios = <&gpio7 7 GPIO_ACTIVE_HIGH>; + rockchip,hp-en-gpios = <&gpio8 0 GPIO_ACTIVE_HIGH>; + rockchip,i2s-controller = <&i2s>; + rockchip,model = "I2S"; + rockchip,routing = "Analog", "LOUT2", + "Analog", "ROUT2"; + }; + sdio_pwrseq: sdio-pwrseq { compatible = "mmc-pwrseq-simple"; clocks = <&hym8563>; @@ -173,10 +186,28 @@ }; }; +&i2c2 { + status = "okay"; + + es8388: es8388@10 { + compatible = "everest,es8388", "everest,es8328"; + reg = <0x10>; + AVDD-supply = <&vccio_codec>; + DVDD-supply = <&vccio_codec>; + HPVDD-supply = <&vccio_codec>; + PVDD-supply = <&vccio_codec>; + clocks = <&cru SCLK_I2S0_OUT>; + }; +}; + &i2c5 { status = "okay"; }; +&i2s { + status = "okay"; +}; + &pinctrl { ir { ir_int: ir-int { @@ -190,6 +221,16 @@ }; }; + headphone { + hp_det: hp-det { + rockchip,pins = <7 7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + phone_ctl: phone-ctl { + rockchip,pins = <8 0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + usb { host_vbus_drv: host-vbus-drv { rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>; From f5de310cf4f0eddd7e6c63ddd9f47f244516e27a Mon Sep 17 00:00:00 2001 From: Willy Tarreau Date: Sat, 11 Feb 2017 09:56:45 +0100 Subject: [PATCH 02/10] ARM: dts: rockchip: fix the MiQi board's LED definition The MiQi board's green LED doesn't work at all with the mainline kernel. There are multiple reasons to this. First, the gpio number is wrong, it is declared on gpio220 (chip 7 pin 4) instead of gpio218 (chip 7 pin 2). Second, a pinctrl is referenced, also declared with the same wrong value while it is not unused. Third, the GPIO polarity was wrong (active low instead of active high) with the default value set to "default-on", resulting in the LED being turned off even when the GPIO is correct. This patch fixes all these inconsistencies at once since these they are related to each other, and also restores the "timer" trigger which is the same as the one used by the kernels shipped with the board. It's important to note that during the port to mainline, the led's label was changed from "System" to "miqi:green:user", so scripts making use of the name will still not work until they're fixed. Fixes: b1a76f75d76e ("ARM: dts: rockchip: add MiQi board from mqmaker") Signed-off-by: Willy Tarreau Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288-miqi.dts | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) diff --git a/arch/arm/boot/dts/rk3288-miqi.dts b/arch/arm/boot/dts/rk3288-miqi.dts index 21326f3e8564..30e93f694ae8 100644 --- a/arch/arm/boot/dts/rk3288-miqi.dts +++ b/arch/arm/boot/dts/rk3288-miqi.dts @@ -68,11 +68,9 @@ compatible = "gpio-leds"; work { - gpios = <&gpio7 RK_PA4 GPIO_ACTIVE_LOW>; + gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>; label = "miqi:green:user"; - linux,default-trigger = "default-on"; - pinctrl-names = "default"; - pinctrl-0 = <&led_ctl>; + linux,default-trigger = "timer"; }; }; @@ -363,12 +361,6 @@ }; }; - leds { - led_ctl: led-ctl { - rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - sdmmc { /* * Default drive strength isn't enough to achieve even From a7a24e9259771a11caad783ef6e85087ecb49703 Mon Sep 17 00:00:00 2001 From: Eddie Cai Date: Tue, 14 Feb 2017 18:07:30 +0800 Subject: [PATCH 03/10] dt-bindings: add rk3288-based Asus Tinker board Tinker board is a credit card size develop board designed by Asus. Powered by RK3288. Acked-by: Rob Herring Signed-off-by: Eddie Cai Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt index cc4ace6397ab..226ee9131078 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.txt +++ b/Documentation/devicetree/bindings/arm/rockchip.txt @@ -1,5 +1,8 @@ Rockchip platforms device tree bindings --------------------------------------- +- Asus Tinker board + Required root node properties: + - compatible = "asus,rk3288-tinker", "rockchip,rk3288"; - Kylin RK3036 board: Required root node properties: From 223599514133293bb9afe7b82937140c3b275877 Mon Sep 17 00:00:00 2001 From: Eddie Cai Date: Tue, 14 Feb 2017 18:07:31 +0800 Subject: [PATCH 04/10] ARM: dts: rockchip: add dts for RK3288-Tinker board This patch add basic support for RK3288-Tinker board. We can boot in to rootfs with this patch. Signed-off-by: Eddie Cai Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/rk3288-tinker.dts | 536 ++++++++++++++++++++++++++++ 2 files changed, 537 insertions(+) create mode 100644 arch/arm/boot/dts/rk3288-tinker.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 011808490fed..fb468493a70e 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -695,6 +695,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3288-popmetal.dtb \ rk3288-r89.dtb \ rk3288-rock2-square.dtb \ + rk3288-tinker.dtb \ rk3288-veyron-brain.dtb \ rk3288-veyron-jaq.dtb \ rk3288-veyron-jerry.dtb \ diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts new file mode 100644 index 000000000000..f601c78386a9 --- /dev/null +++ b/arch/arm/boot/dts/rk3288-tinker.dts @@ -0,0 +1,536 @@ +/* + * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "rk3288.dtsi" +#include + +/ { + model = "Rockchip RK3288 Tinker Board"; + compatible = "asus,rk3288-tinker", "rockchip,rk3288"; + + memory { + reg = <0x0 0x80000000>; + device_type = "memory"; + }; + + ext_gmac: external-gmac-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + clock-output-names = "ext_gmac"; + }; + + gpio-keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + autorepeat; + + pinctrl-names = "default"; + pinctrl-0 = <&pwrbtn>; + + button@0 { + gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; + linux,code = ; + label = "GPIO Key Power"; + linux,input-type = <1>; + wakeup-source; + debounce-interval = <100>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + act-led { + gpios=<&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; + linux,default-trigger="mmc0"; + }; + + heartbeat-led { + gpios=<&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>; + linux,default-trigger="heartbeat"; + }; + + pwr-led { + gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-on"; + }; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,name = "rockchip,tinker-codec"; + simple-audio-card,mclk-fs = <512>; + + simple-audio-card,codec { + sound-dai = <&hdmi>; + }; + + simple-audio-card,cpu { + sound-dai = <&i2s>; + }; + }; + + vcc_sys: vsys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_sys"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; + + vcc_sd: sdmmc-regulator { + compatible = "regulator-fixed"; + gpio = <&gpio7 11 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_pwr>; + regulator-name = "vcc_sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <100000>; + vin-supply = <&vcc_io>; + }; +}; + +&cpu0 { + cpu0-supply = <&vdd_cpu>; +}; + +&gmac { + assigned-clocks = <&cru SCLK_MAC>; + assigned-clock-parents = <&ext_gmac>; + clock_in_out = "input"; + phy-mode = "rgmii"; + phy-supply = <&vcc33_lan>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + snps,reset-gpio = <&gpio4 7 0>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 1000000>; + tx_delay = <0x30>; + rx_delay = <0x10>; + status = "ok"; +}; + +&hdmi { + ddc-i2c-bus = <&i2c5>; + status = "okay"; +}; + +&i2c0 { + clock-frequency = <400000>; + status = "okay"; + + rk808: pmic@1b { + compatible = "rockchip,rk808"; + reg = <0x1b>; + interrupt-parent = <&gpio0>; + interrupts = <4 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; + clock-output-names = "xin32k", "rk808-clkout2"; + dvs-gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>, + <&gpio0 12 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int &global_pwroff &dvs_1 &dvs_2>; + rockchip,system-power-controller; + wakeup-source; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>; + vcc7-supply = <&vcc_sys>; + vcc8-supply = <&vcc_io>; + vcc9-supply = <&vcc_io>; + vcc10-supply = <&vcc_io>; + vcc11-supply = <&vcc_sys>; + vcc12-supply = <&vcc_io>; + vddio-supply = <&vcc_io>; + + regulators { + vdd_cpu: DCDC_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-name = "vdd_arm"; + regulator-ramp-delay = <6000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1250000>; + regulator-name = "vdd_gpu"; + regulator-ramp-delay = <6000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_ddr"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_io: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_io"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc18_ldo1: LDO_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc18_ldo1"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc33_mipi: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc33_mipi"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_10: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vdd_10"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc18_codec: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc18_codec"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vdd10_lcd: LDO_REG6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vdd10_lcd"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vcc_18: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_18"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc18_lcd: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc18_lcd"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc33_sd: SWITCH_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc33_sd"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc33_lan: SWITCH_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc33_lan"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + }; + }; +}; + +&i2c2 { + status = "okay"; +}; + +&i2c5 { + status = "okay"; +}; + +&i2s { + #sound-dai-cells = <0>; + status = "okay"; +}; + +&io_domains { + status = "okay"; + + sdcard-supply = <&vccio_sd>; +}; + +&pinctrl { + pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma { + drive-strength = <8>; + }; + + pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma { + bias-pull-up; + drive-strength = <8>; + }; + + backlight { + bl_en: bl-en { + rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + buttons { + pwrbtn: pwrbtn { + rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + eth_phy { + eth_phy_pwr: eth-phy-pwr { + rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int: pmic-int { + rockchip,pins = ; + }; + + dvs_1: dvs-1 { + rockchip,pins = ; + }; + + dvs_2: dvs-2 { + rockchip,pins = ; + }; + }; + + sdmmc { + sdmmc_bus4: sdmmc-bus4 { + rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, + <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, + <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, + <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>; + }; + + sdmmc_clk: sdmmc-clk { + rockchip,pins = <6 20 RK_FUNC_1 \ + &pcfg_pull_none_drv_8ma>; + }; + + sdmmc_cmd: sdmmc-cmd { + rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>; + }; + + sdmmc_pwr: sdmmc-pwr { + rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb { + host_vbus_drv: host-vbus-drv { + rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pwr_3g: pwr-3g { + rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pwm0 { + status = "okay"; +}; + +&saradc { + vref-supply = <&vcc18_ldo1>; + status ="okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + card-detect-delay = <200>; + disable-wp; /* wp not hooked up */ + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; + status = "okay"; + vmmc-supply = <&vcc33_sd>; + vqmmc-supply = <&vccio_sd>; +}; + +&tsadc { + rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ + rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; + +&uart4 { + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host1 { + status = "okay"; +}; + +&usb_otg { + status= "okay"; +}; + +&vopb { + status = "okay"; +}; + +&vopb_mmu { + status = "okay"; +}; + +&vopl { + status = "okay"; +}; + +&vopl_mmu { + status = "okay"; +}; + +&wdt { + status = "okay"; +}; From 06ecaae97f927fdf2c834272f88b984e11e3b730 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Thu, 2 Mar 2017 00:26:51 +0100 Subject: [PATCH 05/10] ARM: dts: rockchip: add rk3288 dw-mmc resets dw-mmc got its reset-properties specified, so add the softresets for it in rk3288. Signed-off-by: Heiko Stuebner Reviwed-by: Shawn Lin --- arch/arm/boot/dts/rk3288.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index df8a0dbe9d91..ad5d6022e95f 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -236,6 +236,8 @@ fifo-depth = <0x100>; interrupts = ; reg = <0xff0c0000 0x4000>; + resets = <&cru SRST_MMC0>; + reset-names = "reset"; status = "disabled"; }; @@ -248,6 +250,8 @@ fifo-depth = <0x100>; interrupts = ; reg = <0xff0d0000 0x4000>; + resets = <&cru SRST_SDIO0>; + reset-names = "reset"; status = "disabled"; }; @@ -260,6 +264,8 @@ fifo-depth = <0x100>; interrupts = ; reg = <0xff0e0000 0x4000>; + resets = <&cru SRST_SDIO1>; + reset-names = "reset"; status = "disabled"; }; @@ -272,6 +278,8 @@ fifo-depth = <0x100>; interrupts = ; reg = <0xff0f0000 0x4000>; + resets = <&cru SRST_EMMC>; + reset-names = "reset"; status = "disabled"; }; From e124f2d36169ad15cd5f491fc666ef0aaabc51a2 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Thu, 2 Mar 2017 00:42:52 +0100 Subject: [PATCH 06/10] ARM: dts: rockchip: add rk3036 dw-mmc resets dw-mmc got its reset-properties specified, so add the softresets for it in rk3036. Signed-off-by: Heiko Stuebner Reviwed-by: Shawn Lin --- arch/arm/boot/dts/rk3036.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index ff9b90bfaefd..ec91325d3b6e 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -250,6 +250,8 @@ clock-names = "biu", "ciu"; fifo-depth = <0x100>; interrupts = ; + resets = <&cru SRST_MMC0>; + reset-names = "reset"; status = "disabled"; }; @@ -262,6 +264,8 @@ clock-names = "biu", "ciu", "ciu_drv", "ciu_sample"; fifo-depth = <0x100>; interrupts = ; + resets = <&cru SRST_SDIO>; + reset-names = "reset"; status = "disabled"; }; @@ -286,6 +290,8 @@ num-slots = <1>; pinctrl-names = "default"; pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; + resets = <&cru SRST_EMMC>; + reset-names = "reset"; status = "disabled"; }; From ee0024fdeca8c2fe82df93aaed98fd754a5b3f9c Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Thu, 2 Mar 2017 00:43:21 +0100 Subject: [PATCH 07/10] ARM: dts: rockchip: add rk3066/rk3188 dw-mmc resets dw-mmc got its reset-properties specified, so add the softresets for it in rk3066/rk3188. Signed-off-by: Heiko Stuebner Reviwed-by: Shawn Lin --- arch/arm/boot/dts/rk3xxx.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index 0b45811cf28b..233513cdd279 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -224,6 +224,8 @@ clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>; clock-names = "biu", "ciu"; fifo-depth = <256>; + resets = <&cru SRST_SDMMC>; + reset-names = "reset"; status = "disabled"; }; @@ -234,6 +236,8 @@ clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>; clock-names = "biu", "ciu"; fifo-depth = <256>; + resets = <&cru SRST_SDIO>; + reset-names = "reset"; status = "disabled"; }; @@ -244,6 +248,8 @@ clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>; clock-names = "biu", "ciu"; fifo-depth = <256>; + resets = <&cru SRST_EMMC>; + reset-names = "reset"; status = "disabled"; }; From 2d1f1d4c9fb70b611bd041d0d59aeafc55c79022 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Thu, 2 Mar 2017 00:50:39 +0100 Subject: [PATCH 08/10] ARM: dts: rockchip: add rk322x dw-mmc resets dw-mmc got its reset-properties specified, so add the softresets for it in rk3228/rk3229. Signed-off-by: Heiko Stuebner Reviwed-by: Shawn Lin --- arch/arm/boot/dts/rk322x.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index 9dff8221112c..7cc344684f71 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -414,6 +414,8 @@ fifo-depth = <0x100>; pinctrl-names = "default"; pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; + resets = <&cru SRST_EMMC>; + reset-names = "reset"; status = "disabled"; }; From 2e1aa605faddb810b2bd5dac7ed418d898268e40 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 22 Mar 2017 00:05:16 +0100 Subject: [PATCH 09/10] ARM: dts: rockchip: fix PPI misconfiguration on Cortex-A9 socs According to [0] pointed out by Marc Zyngier in a report about a similar error message, PPIs 11 and 13 are edge triggered on Cortex-A9 socs including the rk3066 and rk3188 which currently mark them as level triggered. Until some time ago the gic did not care but commit 992345a58e0c ("irqchip/gic: WARN if setting the interrupt type for a PPI fails") introduced a warning for that case. Fix the warning on these socs by describing the interrupts correctly and also using the binding constants for easier reading in the future. [0] http://infocenter.arm.com/help/topic/com.arm.doc.ddi0407f/CCHEIGIC.html Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3188.dtsi | 4 ++-- arch/arm/boot/dts/rk3xxx.dtsi | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index cf91254d0a43..fa1bdb8875ae 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -529,11 +529,11 @@ }; &global_timer { - interrupts = ; + interrupts = ; }; &local_timer { - interrupts = ; + interrupts = ; }; &i2c0 { diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index 233513cdd279..c5b8592af73c 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -132,14 +132,14 @@ global_timer: global-timer@1013c200 { compatible = "arm,cortex-a9-global-timer"; reg = <0x1013c200 0x20>; - interrupts = ; + interrupts = ; clocks = <&cru CORE_PERI>; }; local_timer: local-timer@1013c600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0x1013c600 0x20>; - interrupts = ; + interrupts = ; clocks = <&cru CORE_PERI>; }; From 94bbdd77247d8c16eed5f55dddcf1cbc38d06cc4 Mon Sep 17 00:00:00 2001 From: Alexander Kochetkov Date: Tue, 21 Mar 2017 18:13:47 +0300 Subject: [PATCH 10/10] ARM: dts: rockchip: setup DMA-channels for mmc0 and emmc for rk3188 This commit enable DMA-based transfers for SD/eMMC card adapters and reduce number of interrupts produced by SD-card/eMMC-card adapters. Sometimes interrupts from SD-card/eMMC-card adapters running in PIO mode blocks execution of hrtimers and I2S DMA callbacks for a long periods (100 ms or more). Signed-off-by: Alexander Kochetkov [moved dma properties to rk3xxx.dtsi and added sdio dma] Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3xxx.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index c5b8592af73c..4aa6f60d6a22 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -223,6 +223,8 @@ interrupts = ; clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>; clock-names = "biu", "ciu"; + dmas = <&dmac2 1>; + dma-names = "rx-tx"; fifo-depth = <256>; resets = <&cru SRST_SDMMC>; reset-names = "reset"; @@ -235,6 +237,8 @@ interrupts = ; clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>; clock-names = "biu", "ciu"; + dmas = <&dmac2 3>; + dma-names = "rx-tx"; fifo-depth = <256>; resets = <&cru SRST_SDIO>; reset-names = "reset"; @@ -247,6 +251,8 @@ interrupts = ; clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>; clock-names = "biu", "ciu"; + dmas = <&dmac2 4>; + dma-names = "rx-tx"; fifo-depth = <256>; resets = <&cru SRST_EMMC>; reset-names = "reset";