[PATCH] ipw2100: kill dead macros
There are several never used macros in ipw2100. This removes them. Signed-off-by: Pavel Machek <pavel@suse.cz> Signed-off-by: Andrew Morton <akpm@osdl.org>
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@ -1116,7 +1116,6 @@ static inline int rf_kill_active(struct ipw2100_priv *priv)
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{
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{
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#define MAX_RF_KILL_CHECKS 5
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#define MAX_RF_KILL_CHECKS 5
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#define RF_KILL_CHECK_DELAY 40
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#define RF_KILL_CHECK_DELAY 40
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#define RF_KILL_CHECK_THRESHOLD 3
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unsigned short value = 0;
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unsigned short value = 0;
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u32 reg = 0;
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u32 reg = 0;
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@ -143,15 +143,6 @@ enum { IPW_DEBUG_ENABLED = 0 };
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#define IPW_DEBUG_STATE(f, a...) IPW_DEBUG(IPW_DL_STATE | IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
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#define IPW_DEBUG_STATE(f, a...) IPW_DEBUG(IPW_DL_STATE | IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
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#define IPW_DEBUG_ASSOC(f, a...) IPW_DEBUG(IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
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#define IPW_DEBUG_ASSOC(f, a...) IPW_DEBUG(IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
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#define VERIFY(f) \
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{ \
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int status = 0; \
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status = f; \
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if(status) \
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return status; \
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}
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enum {
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enum {
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IPW_HW_STATE_DISABLED = 1,
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IPW_HW_STATE_DISABLED = 1,
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IPW_HW_STATE_ENABLED = 0
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IPW_HW_STATE_ENABLED = 0
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@ -186,8 +177,6 @@ struct bd_status {
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} info;
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} info;
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} __attribute__ ((packed));
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} __attribute__ ((packed));
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#define IPW_BUFDESC_LAST_FRAG 0
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struct ipw2100_bd {
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struct ipw2100_bd {
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u32 host_addr;
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u32 host_addr;
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u32 buf_length;
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u32 buf_length;
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@ -624,9 +613,6 @@ struct ipw2100_priv {
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struct semaphore adapter_sem;
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struct semaphore adapter_sem;
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wait_queue_head_t wait_command_queue;
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wait_queue_head_t wait_command_queue;
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#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)
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u32 pm_state[PM_STATE_SIZE];
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#endif
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};
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};
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@ -728,41 +714,6 @@ struct ipw2100_priv {
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#define IPW_MEM_HOST_SHARED_TX_QUEUE_WRITE_INDEX \
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#define IPW_MEM_HOST_SHARED_TX_QUEUE_WRITE_INDEX \
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(IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND)
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(IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND)
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#if 0
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#define IPW_MEM_HOST_SHARED_TX_QUEUE_0_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x00)
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#define IPW_MEM_HOST_SHARED_TX_QUEUE_0_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x04)
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#define IPW_MEM_HOST_SHARED_TX_QUEUE_1_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x08)
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#define IPW_MEM_HOST_SHARED_TX_QUEUE_1_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0c)
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#define IPW_MEM_HOST_SHARED_TX_QUEUE_2_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x10)
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#define IPW_MEM_HOST_SHARED_TX_QUEUE_2_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x14)
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#define IPW_MEM_HOST_SHARED_TX_QUEUE_3_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x18)
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#define IPW_MEM_HOST_SHARED_TX_QUEUE_3_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x1c)
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#define IPW_MEM_HOST_SHARED_TX_QUEUE_0_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x80)
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#define IPW_MEM_HOST_SHARED_TX_QUEUE_1_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x84)
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#define IPW_MEM_HOST_SHARED_TX_QUEUE_2_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x88)
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#define IPW_MEM_HOST_SHARED_TX_QUEUE_3_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x8c)
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#define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_BASE(QueueNum) \
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(IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + (QueueNum<<3))
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#define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_SIZE(QueueNum) \
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(IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0004+(QueueNum<<3))
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#define IPW_MEM_HOST_SHARED_TX_QUEUE_READ_INDEX(QueueNum) \
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(IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0080+(QueueNum<<2))
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#define IPW_MEM_HOST_SHARED_TX_QUEUE_0_WRITE_INDEX \
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(IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x00)
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#define IPW_MEM_HOST_SHARED_TX_QUEUE_1_WRITE_INDEX \
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(IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x04)
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#define IPW_MEM_HOST_SHARED_TX_QUEUE_2_WRITE_INDEX \
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(IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x08)
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#define IPW_MEM_HOST_SHARED_TX_QUEUE_3_WRITE_INDEX \
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(IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x0c)
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#define IPW_MEM_HOST_SHARED_SLAVE_MODE_INT_REGISTER \
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(IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x78)
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#endif
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#define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_1 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x180)
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#define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_1 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x180)
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#define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_2 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x184)
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#define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_2 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x184)
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