net: phy: DP83822: Add ability to advertise Fiber connection
The DP83822 can be configured to use a Fiber connection. The strap register is read to determine if the device has been configured to use a fiber connection. With the fiber connection the PHY can be configured to detect whether the fiber connection is active by either a high signal or a low signal. Fiber mode is only applicable to the DP83822 so rework the PHY match table so that non-fiber PHYs can still use the same driver but not call or use any of the fiber features. Signed-off-by: Dan Murphy <dmurphy@ti.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Dan Murphy
David S. Miller
parent
7a63d769a8
commit
5dc39fd5ef
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@ -23,16 +23,31 @@
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#define DP83822_DEVADDR 0x1f
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#define MII_DP83822_CTRL_2 0x0a
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#define MII_DP83822_PHYSTS 0x10
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#define MII_DP83822_PHYSCR 0x11
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#define MII_DP83822_MISR1 0x12
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#define MII_DP83822_MISR2 0x13
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#define MII_DP83822_FCSCR 0x14
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#define MII_DP83822_RCSR 0x17
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#define MII_DP83822_RESET_CTRL 0x1f
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#define MII_DP83822_GENCFG 0x465
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#define MII_DP83822_SOR1 0x467
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/* GENCFG */
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#define DP83822_SIG_DET_LOW BIT(0)
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/* Control Register 2 bits */
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#define DP83822_FX_ENABLE BIT(14)
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#define DP83822_HW_RESET BIT(15)
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#define DP83822_SW_RESET BIT(14)
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/* PHY STS bits */
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#define DP83822_PHYSTS_DUPLEX BIT(2)
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#define DP83822_PHYSTS_10 BIT(1)
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#define DP83822_PHYSTS_LINK BIT(0)
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/* PHYSCR Register Fields */
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#define DP83822_PHYSCR_INT_OE BIT(0) /* Interrupt Output Enable */
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#define DP83822_PHYSCR_INTEN BIT(1) /* Interrupt Enable */
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@ -83,6 +98,28 @@
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#define DP83822_RX_CLK_SHIFT BIT(12)
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#define DP83822_TX_CLK_SHIFT BIT(11)
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/* SOR1 mode */
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#define DP83822_STRAP_MODE1 0
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#define DP83822_STRAP_MODE2 BIT(0)
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#define DP83822_STRAP_MODE3 BIT(1)
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#define DP83822_STRAP_MODE4 GENMASK(1, 0)
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#define DP83822_COL_STRAP_MASK GENMASK(11, 10)
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#define DP83822_COL_SHIFT 10
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#define DP83822_RX_ER_STR_MASK GENMASK(9, 8)
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#define DP83822_RX_ER_SHIFT 8
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#define MII_DP83822_FIBER_ADVERTISE (ADVERTISED_TP | ADVERTISED_MII | \
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ADVERTISED_FIBRE | ADVERTISED_BNC | \
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ADVERTISED_Pause | ADVERTISED_Asym_Pause | \
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ADVERTISED_100baseT_Full)
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struct dp83822_private {
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bool fx_signal_det_low;
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int fx_enabled;
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u16 fx_sd_enable;
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};
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static int dp83822_ack_interrupt(struct phy_device *phydev)
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{
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int err;
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@ -197,6 +234,7 @@ static void dp83822_get_wol(struct phy_device *phydev,
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static int dp83822_config_intr(struct phy_device *phydev)
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{
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struct dp83822_private *dp83822 = phydev->priv;
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int misr_status;
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int physcr_status;
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int err;
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@ -208,13 +246,16 @@ static int dp83822_config_intr(struct phy_device *phydev)
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misr_status |= (DP83822_RX_ERR_HF_INT_EN |
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DP83822_FALSE_CARRIER_HF_INT_EN |
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DP83822_ANEG_COMPLETE_INT_EN |
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DP83822_DUP_MODE_CHANGE_INT_EN |
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DP83822_SPEED_CHANGED_INT_EN |
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DP83822_LINK_STAT_INT_EN |
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DP83822_ENERGY_DET_INT_EN |
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DP83822_LINK_QUAL_INT_EN);
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if (!dp83822->fx_enabled)
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misr_status |= DP83822_ANEG_COMPLETE_INT_EN |
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DP83822_DUP_MODE_CHANGE_INT_EN |
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DP83822_SPEED_CHANGED_INT_EN;
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err = phy_write(phydev, MII_DP83822_MISR1, misr_status);
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if (err < 0)
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return err;
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@ -224,14 +265,16 @@ static int dp83822_config_intr(struct phy_device *phydev)
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return misr_status;
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misr_status |= (DP83822_JABBER_DET_INT_EN |
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DP83822_WOL_PKT_INT_EN |
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DP83822_SLEEP_MODE_INT_EN |
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DP83822_MDI_XOVER_INT_EN |
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DP83822_LB_FIFO_INT_EN |
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DP83822_PAGE_RX_INT_EN |
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DP83822_ANEG_ERR_INT_EN |
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DP83822_EEE_ERROR_CHANGE_INT_EN);
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if (!dp83822->fx_enabled)
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misr_status |= DP83822_MDI_XOVER_INT_EN |
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DP83822_ANEG_ERR_INT_EN |
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DP83822_WOL_PKT_INT_EN;
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err = phy_write(phydev, MII_DP83822_MISR2, misr_status);
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if (err < 0)
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return err;
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@ -270,13 +313,60 @@ static int dp8382x_disable_wol(struct phy_device *phydev)
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MII_DP83822_WOL_CFG, value);
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}
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static int dp83822_read_status(struct phy_device *phydev)
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{
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struct dp83822_private *dp83822 = phydev->priv;
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int status = phy_read(phydev, MII_DP83822_PHYSTS);
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int ctrl2;
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int ret;
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if (dp83822->fx_enabled) {
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if (status & DP83822_PHYSTS_LINK) {
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phydev->speed = SPEED_UNKNOWN;
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phydev->duplex = DUPLEX_UNKNOWN;
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} else {
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ctrl2 = phy_read(phydev, MII_DP83822_CTRL_2);
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if (ctrl2 < 0)
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return ctrl2;
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if (!(ctrl2 & DP83822_FX_ENABLE)) {
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ret = phy_write(phydev, MII_DP83822_CTRL_2,
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DP83822_FX_ENABLE | ctrl2);
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if (ret < 0)
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return ret;
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}
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}
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}
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ret = genphy_read_status(phydev);
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if (ret)
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return ret;
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if (status < 0)
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return status;
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if (status & DP83822_PHYSTS_DUPLEX)
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phydev->duplex = DUPLEX_FULL;
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else
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phydev->duplex = DUPLEX_HALF;
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if (status & DP83822_PHYSTS_10)
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phydev->speed = SPEED_10;
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else
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phydev->speed = SPEED_100;
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return 0;
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}
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static int dp83822_config_init(struct phy_device *phydev)
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{
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struct dp83822_private *dp83822 = phydev->priv;
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struct device *dev = &phydev->mdio.dev;
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int rgmii_delay;
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s32 rx_int_delay;
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s32 tx_int_delay;
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int err = 0;
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int bmcr;
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if (phy_interface_is_rgmii(phydev)) {
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rx_int_delay = phy_get_internal_delay(phydev, dev, NULL, 0,
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@ -302,6 +392,53 @@ static int dp83822_config_init(struct phy_device *phydev)
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}
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}
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if (dp83822->fx_enabled) {
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err = phy_modify(phydev, MII_DP83822_CTRL_2,
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DP83822_FX_ENABLE, 1);
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if (err < 0)
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return err;
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/* Only allow advertising what this PHY supports */
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linkmode_and(phydev->advertising, phydev->advertising,
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phydev->supported);
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linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
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phydev->supported);
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linkmode_set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
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phydev->advertising);
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/* Auto neg is not supported in fiber mode */
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bmcr = phy_read(phydev, MII_BMCR);
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if (bmcr < 0)
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return bmcr;
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if (bmcr & BMCR_ANENABLE) {
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err = phy_modify(phydev, MII_BMCR, BMCR_ANENABLE, 0);
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if (err < 0)
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return err;
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}
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phydev->autoneg = AUTONEG_DISABLE;
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linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
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phydev->supported);
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linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
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phydev->advertising);
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/* Setup fiber advertisement */
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err = phy_modify_changed(phydev, MII_ADVERTISE,
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MII_DP83822_FIBER_ADVERTISE,
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MII_DP83822_FIBER_ADVERTISE);
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if (err < 0)
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return err;
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if (dp83822->fx_signal_det_low) {
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err = phy_set_bits_mmd(phydev, DP83822_DEVADDR,
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MII_DP83822_GENCFG,
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DP83822_SIG_DET_LOW);
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if (err)
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return err;
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}
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}
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return dp8382x_disable_wol(phydev);
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}
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@ -314,13 +451,85 @@ static int dp83822_phy_reset(struct phy_device *phydev)
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{
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int err;
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err = phy_write(phydev, MII_DP83822_RESET_CTRL, DP83822_HW_RESET);
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err = phy_write(phydev, MII_DP83822_RESET_CTRL, DP83822_SW_RESET);
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if (err < 0)
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return err;
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return phydev->drv->config_init(phydev);
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}
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#ifdef CONFIG_OF_MDIO
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static int dp83822_of_init(struct phy_device *phydev)
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{
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struct dp83822_private *dp83822 = phydev->priv;
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struct device *dev = &phydev->mdio.dev;
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/* Signal detection for the PHY is only enabled if the FX_EN and the
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* SD_EN pins are strapped. Signal detection can only enabled if FX_EN
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* is strapped otherwise signal detection is disabled for the PHY.
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*/
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if (dp83822->fx_enabled && dp83822->fx_sd_enable)
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dp83822->fx_signal_det_low = device_property_present(dev,
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"ti,link-loss-low");
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if (!dp83822->fx_enabled)
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dp83822->fx_enabled = device_property_present(dev,
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"ti,fiber-mode");
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return 0;
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}
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#else
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static int dp83822_of_init(struct phy_device *phydev)
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{
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return 0;
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}
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#endif /* CONFIG_OF_MDIO */
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static int dp83822_read_straps(struct phy_device *phydev)
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{
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struct dp83822_private *dp83822 = phydev->priv;
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int fx_enabled, fx_sd_enable;
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int val;
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val = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_SOR1);
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if (val < 0)
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return val;
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fx_enabled = (val & DP83822_COL_STRAP_MASK) >> DP83822_COL_SHIFT;
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if (fx_enabled == DP83822_STRAP_MODE2 ||
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fx_enabled == DP83822_STRAP_MODE3)
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dp83822->fx_enabled = 1;
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if (dp83822->fx_enabled) {
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fx_sd_enable = (val & DP83822_RX_ER_STR_MASK) >> DP83822_RX_ER_SHIFT;
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if (fx_sd_enable == DP83822_STRAP_MODE3 ||
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fx_sd_enable == DP83822_STRAP_MODE4)
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dp83822->fx_sd_enable = 1;
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}
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return 0;
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}
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static int dp83822_probe(struct phy_device *phydev)
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{
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struct dp83822_private *dp83822;
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int ret;
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dp83822 = devm_kzalloc(&phydev->mdio.dev, sizeof(*dp83822),
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GFP_KERNEL);
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if (!dp83822)
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return -ENOMEM;
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phydev->priv = dp83822;
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ret = dp83822_read_straps(phydev);
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if (ret)
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return ret;
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dp83822_of_init(phydev);
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return 0;
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}
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static int dp83822_suspend(struct phy_device *phydev)
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{
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int value;
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@ -352,8 +561,10 @@ static int dp83822_resume(struct phy_device *phydev)
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PHY_ID_MATCH_MODEL(_id), \
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.name = (_name), \
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/* PHY_BASIC_FEATURES */ \
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.probe = dp83822_probe, \
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.soft_reset = dp83822_phy_reset, \
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.config_init = dp83822_config_init, \
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.read_status = dp83822_read_status, \
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.get_wol = dp83822_get_wol, \
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.set_wol = dp83822_set_wol, \
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.ack_interrupt = dp83822_ack_interrupt, \
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