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Staging driver update for 5.16-rc1 

Here is the big set of staging driver updates and cleanups for 5.16-rc1.
 
 Overall we ended up removing a lot of code this time, a bit over 20,000
 lines are now gone thanks to a lot of cleanup work by many developers.
 
 Nothing huge in here functionality wise, just loads of cleanups:
 	- r8188eu driver major cleanups and removal of unused and dead
 	  code
 	- wlan-ng minor cleanups
 	- fbtft driver cleanups
 	- most driver cleanups
 	- rtl8* drivers cleanups
 	- rts5208 driver cleanups
 	- vt6655 driver cleanups
 	- vc04_services drivers cleanups
 	- wfx cleanups on the way to almost getting this merged out of
 	  staging (it's close!)
 	- tiny mips changes needed for the mt7621 drivers, they have
 	  been acked by the respective subsystem maintainers to go
 	  through this tree.
 
 All of these have been in linux-next for a while with no reported
 issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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 =FyAK
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Merge tag 'staging-5.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging

Pull staging driver updates from Greg KH:
 "Here is the big set of staging driver updates and cleanups for
  5.16-rc1.

  Overall we ended up removing a lot of code this time, a bit over
  20,000 lines are now gone thanks to a lot of cleanup work by many
  developers.

  Nothing huge in here functionality wise, just loads of cleanups:

   - r8188eu driver major cleanups and removal of unused and dead code

   - wlan-ng minor cleanups

   - fbtft driver cleanups

   - most driver cleanups

   - rtl8* drivers cleanups

   - rts5208 driver cleanups

   - vt6655 driver cleanups

   - vc04_services drivers cleanups

   - wfx cleanups on the way to almost getting this merged out of
     staging (it's close!)

   - tiny mips changes needed for the mt7621 drivers, they have been
     acked by the respective subsystem maintainers to go through this
     tree.

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'staging-5.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (622 commits)
  staging: r8188eu: hal: remove goto statement and local variable
  staging: rtl8723bs: hal remove the assignment to itself
  staging: rtl8723bs: fix unmet dependency on CRYPTO for CRYPTO_LIB_ARC4
  staging: vchiq_core: get rid of typedef
  staging: fieldbus: anybus: reframe comment to avoid warning
  staging: r8188eu: fix missing unlock in rtw_resume()
  staging: r8188eu: core: remove the goto from rtw_IOL_accquire_xmit_frame
  staging: r8188eu: core: remove goto statement
  staging: vt6655: Rename `dwAL7230InitTable` array
  staging: vt6655: Rename `dwAL2230PowerTable` array
  staging: vt6655: Rename `dwAL7230InitTableAMode` array
  staging: vt6655: Rename `dwAL7230ChannelTable2` array
  staging: vt6655: Rename `dwAL7230ChannelTable1` array
  staging: vt6655: Rename `dwAL7230ChannelTable0` array
  staging: vt6655: Rename `dwAL2230ChannelTable1` array
  staging: vt6655: Rename `dwAL2230ChannelTable0` array
  staging: r8712u: fix control-message timeout
  staging: rtl8192u: fix control-message timeouts
  staging: mt7621-dts: add missing SPDX license to files
  staging: vchiq_core: fix quoted strings split across lines
  ...
This commit is contained in:
Linus Torvalds 2021-11-04 07:56:22 -07:00
parent 048ff8629e 10508ae08e
commit 5cd4dc44b8
258 changed files with 3181 additions and 22211 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/mips/include/asm/mach-ralink/spaces.h
View File

@ -2,8 +2,8 @@
#ifndef __ASM_MACH_RALINK_SPACES_H_
#define __ASM_MACH_RALINK_SPACES_H_
#define PCI_IOBASE _AC(0xa0000000, UL)
#define PCI_IOSIZE SZ_16M
#define PCI_IOBASE mips_io_port_base
#define PCI_IOSIZE SZ_64K
#define IO_SPACE_LIMIT (PCI_IOSIZE - 1)
#include <asm/mach-generic/spaces.h>

4
arch/mips/include/asm/pci.h
View File

@ -20,6 +20,10 @@
#include <linux/list.h>
#include <linux/of.h>
#ifdef CONFIG_PCI_DRIVERS_GENERIC
#define pci_remap_iospace pci_remap_iospace
#endif
#ifdef CONFIG_PCI_DRIVERS_LEGACY
/*

14
arch/mips/pci/pci-generic.c
View File

@ -46,3 +46,17 @@ void pcibios_fixup_bus(struct pci_bus *bus)
{
pci_read_bridge_bases(bus);
}
int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr)
{
unsigned long vaddr;
if (res->start != 0) {
WARN_ONCE(1, "resource start address is not zero\n");
return -ENODEV;
}
vaddr = (unsigned long)ioremap(phys_addr, resource_size(res));
set_io_port_base(vaddr);
return 0;
}

2
drivers/pci/pci.c
View File

@ -4101,6 +4101,7 @@ unsigned long __weak pci_address_to_pio(phys_addr_t address)
* architectures that have memory mapped IO functions defined (and the
* PCI_IOBASE value defined) should call this function.
*/
#ifndef pci_remap_iospace
int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr)
{
#if defined(PCI_IOBASE) && defined(CONFIG_MMU)
@ -4124,6 +4125,7 @@ int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr)
#endif
}
EXPORT_SYMBOL(pci_remap_iospace);
#endif
/**
* pci_unmap_iospace - Unmap the memory mapped I/O space

88
drivers/staging/axis-fifo/axis-fifo.c
View File

@ -30,6 +30,7 @@
#include <linux/types.h>
#include <linux/uaccess.h>
#include <linux/jiffies.h>
#include <linux/miscdevice.h>
#include <linux/of_address.h>
#include <linux/of_device.h>
@ -102,9 +103,6 @@
* globals
* ----------------------------
*/
static struct class *axis_fifo_driver_class; /* char device class */
static int read_timeout = 1000; /* ms to wait before read() times out */
static int write_timeout = 1000; /* ms to wait before write() times out */
@ -140,9 +138,7 @@ struct axis_fifo {
unsigned int read_flags; /* read file flags */
struct device *dt_device; /* device created from the device tree */
struct device *device; /* device associated with char_device */
dev_t devt; /* our char device number */
struct cdev char_device; /* our char device */
struct miscdevice miscdev;
};
/* ----------------------------
@ -319,6 +315,11 @@ static const struct attribute_group axis_fifo_attrs_group = {
.attrs = axis_fifo_attrs,
};
static const struct attribute_group *axis_fifo_attrs_groups[] = {
&axis_fifo_attrs_group,
NULL,
};
/* ----------------------------
* implementation
* ----------------------------
@ -684,8 +685,8 @@ static irqreturn_t axis_fifo_irq(int irq, void *dw)
static int axis_fifo_open(struct inode *inod, struct file *f)
{
struct axis_fifo *fifo = (struct axis_fifo *)container_of(inod->i_cdev,
struct axis_fifo, char_device);
struct axis_fifo *fifo = container_of(f->private_data,
struct axis_fifo, miscdev);
f->private_data = fifo;
if (((f->f_flags & O_ACCMODE) == O_WRONLY) ||
@ -812,9 +813,7 @@ static int axis_fifo_probe(struct platform_device *pdev)
struct resource *r_mem; /* IO mem resources */
struct device *dev = &pdev->dev; /* OS device (from device tree) */
struct axis_fifo *fifo = NULL;
char device_name[32];
char *device_name;
int rc = 0; /* error return value */
/* ----------------------------
@ -822,8 +821,12 @@ static int axis_fifo_probe(struct platform_device *pdev)
* ----------------------------
*/
device_name = devm_kzalloc(dev, 32, GFP_KERNEL);
if (!device_name)
return -ENOMEM;
/* allocate device wrapper memory */
fifo = devm_kmalloc(dev, sizeof(*fifo), GFP_KERNEL);
fifo = devm_kzalloc(dev, sizeof(*fifo), GFP_KERNEL);
if (!fifo)
return -ENOMEM;
@ -859,9 +862,7 @@ static int axis_fifo_probe(struct platform_device *pdev)
dev_dbg(fifo->dt_device, "remapped memory to 0x%p\n", fifo->base_addr);
/* create unique device name */
snprintf(device_name, sizeof(device_name), "%s_%pa",
DRIVER_NAME, &r_mem->start);
snprintf(device_name, 32, "%s_%pa", DRIVER_NAME, &r_mem->start);
dev_dbg(fifo->dt_device, "device name [%s]\n", device_name);
/* ----------------------------
@ -904,51 +905,21 @@ static int axis_fifo_probe(struct platform_device *pdev)
* ----------------------------
*/
/* allocate device number */
rc = alloc_chrdev_region(&fifo->devt, 0, 1, DRIVER_NAME);
/* create character device */
fifo->miscdev.fops = &fops;
fifo->miscdev.minor = MISC_DYNAMIC_MINOR;
fifo->miscdev.name = device_name;
fifo->miscdev.groups = axis_fifo_attrs_groups;
fifo->miscdev.parent = dev;
rc = misc_register(&fifo->miscdev);
if (rc < 0)
goto err_initial;
dev_dbg(fifo->dt_device, "allocated device number major %i minor %i\n",
MAJOR(fifo->devt), MINOR(fifo->devt));
/* create driver file */
fifo->device = device_create(axis_fifo_driver_class, NULL, fifo->devt,
NULL, device_name);
if (IS_ERR(fifo->device)) {
dev_err(fifo->dt_device,
"couldn't create driver file\n");
rc = PTR_ERR(fifo->device);
goto err_chrdev_region;
}
dev_set_drvdata(fifo->device, fifo);
/* create character device */
cdev_init(&fifo->char_device, &fops);
rc = cdev_add(&fifo->char_device, fifo->devt, 1);
if (rc < 0) {
dev_err(fifo->dt_device, "couldn't create character device\n");
goto err_dev;
}
/* create sysfs entries */
rc = devm_device_add_group(fifo->device, &axis_fifo_attrs_group);
if (rc < 0) {
dev_err(fifo->dt_device, "couldn't register sysfs group\n");
goto err_cdev;
}
dev_info(fifo->dt_device, "axis-fifo created at %pa mapped to 0x%pa, irq=%i, major=%i, minor=%i\n",
&r_mem->start, &fifo->base_addr, fifo->irq,
MAJOR(fifo->devt), MINOR(fifo->devt));
dev_info(fifo->dt_device, "axis-fifo created at %pa mapped to 0x%pa, irq=%i\n",
&r_mem->start, &fifo->base_addr, fifo->irq);
return 0;
err_cdev:
cdev_del(&fifo->char_device);
err_dev:
device_destroy(axis_fifo_driver_class, fifo->devt);
err_chrdev_region:
unregister_chrdev_region(fifo->devt, 1);
err_initial:
dev_set_drvdata(dev, NULL);
return rc;
@ -959,10 +930,7 @@ static int axis_fifo_remove(struct platform_device *pdev)
struct device *dev = &pdev->dev;
struct axis_fifo *fifo = dev_get_drvdata(dev);
cdev_del(&fifo->char_device);
dev_set_drvdata(fifo->device, NULL);
device_destroy(axis_fifo_driver_class, fifo->devt);
unregister_chrdev_region(fifo->devt, 1);
misc_deregister(&fifo->miscdev);
dev_set_drvdata(dev, NULL);
return 0;
@ -987,9 +955,6 @@ static int __init axis_fifo_init(void)
{
pr_info("axis-fifo driver loaded with parameters read_timeout = %i, write_timeout = %i\n",
read_timeout, write_timeout);
axis_fifo_driver_class = class_create(THIS_MODULE, DRIVER_NAME);
if (IS_ERR(axis_fifo_driver_class))
return PTR_ERR(axis_fifo_driver_class);
return platform_driver_register(&axis_fifo_driver);
}
@ -998,7 +963,6 @@ module_init(axis_fifo_init);
static void __exit axis_fifo_exit(void)
{
platform_driver_unregister(&axis_fifo_driver);
class_destroy(axis_fifo_driver_class);
}
module_exit(axis_fifo_exit);

11
drivers/staging/fbtft/fbtft-core.c
View File

@ -1038,7 +1038,8 @@ int fbtft_init_display(struct fbtft_par *par)
i++;
/* make debug message */
for (j = 0; par->init_sequence[i + 1 + j] >= 0; j++);
for (j = 0; par->init_sequence[i + 1 + j] >= 0; j++)
;
fbtft_par_dbg(DEBUG_INIT_DISPLAY, par,
"init: write(0x%02X) %*ph\n",
@ -1318,23 +1319,17 @@ EXPORT_SYMBOL(fbtft_probe_common);
* @info: Framebuffer
*
* Unregisters and releases the framebuffer
*
* Return: 0 if successful, negative if error
*/
int fbtft_remove_common(struct device *dev, struct fb_info *info)
void fbtft_remove_common(struct device *dev, struct fb_info *info)
{
struct fbtft_par *par;
if (!info)
return -EINVAL;
par = info->par;
if (par)
fbtft_par_dbg(DEBUG_DRIVER_INIT_FUNCTIONS, par,
"%s()\n", __func__);
fbtft_unregister_framebuffer(info);
fbtft_framebuffer_release(info);
return 0;
}
EXPORT_SYMBOL(fbtft_remove_common);

8
drivers/staging/fbtft/fbtft.h
View File

@ -252,7 +252,7 @@ void fbtft_unregister_backlight(struct fbtft_par *par);
int fbtft_init_display(struct fbtft_par *par);
int fbtft_probe_common(struct fbtft_display *display, struct spi_device *sdev,
struct platform_device *pdev);
int fbtft_remove_common(struct device *dev, struct fb_info *info);
void fbtft_remove_common(struct device *dev, struct fb_info *info);
/* fbtft-io.c */
int fbtft_write_spi(struct fbtft_par *par, void *buf, size_t len);
@ -283,7 +283,8 @@ static int fbtft_driver_remove_spi(struct spi_device *spi) \
{ \
struct fb_info *info = spi_get_drvdata(spi); \
\
return fbtft_remove_common(&spi->dev, info); \
fbtft_remove_common(&spi->dev, info); \
return 0; \
} \
\
static int fbtft_driver_probe_pdev(struct platform_device *pdev) \
@ -295,7 +296,8 @@ static int fbtft_driver_remove_pdev(struct platform_device *pdev) \
{ \
struct fb_info *info = platform_get_drvdata(pdev); \
\
return fbtft_remove_common(&pdev->dev, info); \
fbtft_remove_common(&pdev->dev, info); \
return 0; \
} \
\
static const struct of_device_id dt_ids[] = { \

8
drivers/staging/fieldbus/anybuss/host.c
View File

@ -1318,11 +1318,11 @@ anybuss_host_common_probe(struct device *dev,
}
/*
* startup sequence:
* perform dummy IND_AB read to prevent false 'init done' irq
* a) perform dummy IND_AB read to prevent false 'init done' irq
* (already done by test_dpram() above)
* release reset
* wait for first interrupt
* interrupt came in: ready to go !
* b) release reset
* c) wait for first interrupt
* d) interrupt came in: ready to go !
*/
reset_deassert(cd);
if (!wait_for_completion_timeout(&cd->card_boot, TIMEOUT)) {

4
drivers/staging/gdm724x/gdm_lte.c
View File

@ -867,6 +867,7 @@ int register_lte_device(struct phy_dev *phy_dev,
struct nic *nic;
struct net_device *net;
char pdn_dev_name[16];
u8 addr[ETH_ALEN];
int ret = 0;
u8 index;
@ -893,11 +894,12 @@ int register_lte_device(struct phy_dev *phy_dev,
nic->phy_dev = phy_dev;
nic->nic_id = index;
form_mac_address(net->dev_addr,
form_mac_address(addr,
nic->src_mac_addr,
nic->dest_mac_addr,
mac_address,
index);
eth_hw_addr_set(net, addr);
SET_NETDEV_DEV(net, dev);
SET_NETDEV_DEVTYPE(net, &wwan_type);

3
drivers/staging/ks7010/Kconfig
View File

@ -5,6 +5,9 @@ config KS7010
select WIRELESS_EXT
select WEXT_PRIV
select FW_LOADER
select CRYPTO
select CRYPTO_HASH
select CRYPTO_MICHAEL_MIC
help
This is a driver for KeyStream KS7010 based SDIO WIFI cards. It is
found on at least later Spectec SDW-821 (FCC-ID "S2Y-WLAN-11G-K" only,

2
drivers/staging/ks7010/ks_hostif.c
View File

@ -541,7 +541,7 @@ void hostif_mib_get_confirm(struct ks_wlan_private *priv)
hostif_sme_enqueue(priv, SME_GET_MAC_ADDRESS);
ether_addr_copy(priv->eth_addr, priv->rxp);
priv->mac_address_valid = true;
ether_addr_copy(dev->dev_addr, priv->eth_addr);
eth_hw_addr_set(dev, priv->eth_addr);
netdev_info(dev, "MAC ADDRESS = %pM\n", priv->eth_addr);
break;
case DOT11_PRODUCT_VERSION:

4
drivers/staging/ks7010/ks_wlan_net.c
View File

@ -2490,7 +2490,7 @@ int ks_wlan_set_mac_address(struct net_device *dev, void *addr)
if (netif_running(dev))
return -EBUSY;
memcpy(dev->dev_addr, mac_addr->sa_data, dev->addr_len);
eth_hw_addr_set(dev, mac_addr->sa_data);
ether_addr_copy(priv->eth_addr, mac_addr->sa_data);
priv->mac_address_valid = false;
@ -2625,7 +2625,7 @@ int ks_wlan_net_start(struct net_device *dev)
/* dummy address set */
ether_addr_copy(priv->eth_addr, dummy_addr);
ether_addr_copy(dev->dev_addr, priv->eth_addr);
eth_hw_addr_set(dev, priv->eth_addr);
/* The ks_wlan-specific entries in the device structure. */
dev->netdev_ops = &ks_wlan_netdev_ops;

2
drivers/staging/most/dim2/Makefile
View File

@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_MOST_DIM2) += most_dim2.o
most_dim2-objs := dim2.o hal.o sysfs.o
most_dim2-objs := dim2.o hal.o

115
drivers/staging/most/dim2/dim2.c
View File

@ -108,6 +108,7 @@ struct dim2_hdm {
struct dim2_platform_data {
int (*enable)(struct platform_device *pdev);
void (*disable)(struct platform_device *pdev);
u8 fcnt;
};
#define iface_to_hdm(iface) container_of(iface, struct dim2_hdm, most_iface)
@ -117,7 +118,8 @@ struct dim2_platform_data {
(((p)[1] == 0x18) && ((p)[2] == 0x05) && ((p)[3] == 0x0C) && \
((p)[13] == 0x3C) && ((p)[14] == 0x00) && ((p)[15] == 0x0A))
bool dim2_sysfs_get_state_cb(void)
static ssize_t state_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
bool state;
unsigned long flags;
@ -126,9 +128,18 @@ bool dim2_sysfs_get_state_cb(void)
state = dim_get_lock_state();
spin_unlock_irqrestore(&dim_lock, flags);
return state;
return sysfs_emit(buf, "%s\n", state ? "locked" : "");
}
static DEVICE_ATTR_RO(state);
static struct attribute *dim2_attrs[] = {
&dev_attr_state.attr,
NULL,
};
ATTRIBUTE_GROUPS(dim2);
/**
* dimcb_on_error - callback from HAL to report miscommunication between
* HDM and HAL
@ -716,6 +727,23 @@ static int get_dim2_clk_speed(const char *clock_speed, u8 *val)
return -EINVAL;
}
static void dim2_release(struct device *d)
{
struct dim2_hdm *dev = container_of(d, struct dim2_hdm, dev);
unsigned long flags;
kthread_stop(dev->netinfo_task);
spin_lock_irqsave(&dim_lock, flags);
dim_shutdown();
spin_unlock_irqrestore(&dim_lock, flags);
if (dev->disable_platform)
dev->disable_platform(to_platform_device(d->parent));
kfree(dev);
}
/*
* dim2_probe - dim2 probe handler
* @pdev: platform device structure
@ -732,11 +760,12 @@ static int dim2_probe(struct platform_device *pdev)
struct resource *res;
int ret, i;
u8 hal_ret;
u8 dev_fcnt = fcnt;
int irq;
enum { MLB_INT_IDX, AHB0_INT_IDX };
dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
if (!dev)
return -ENOMEM;
@ -748,30 +777,38 @@ static int dim2_probe(struct platform_device *pdev)
"microchip,clock-speed", &clock_speed);
if (ret) {
dev_err(&pdev->dev, "missing dt property clock-speed\n");
return ret;
goto err_free_dev;
}
ret = get_dim2_clk_speed(clock_speed, &dev->clk_speed);
if (ret) {
dev_err(&pdev->dev, "bad dt property clock-speed\n");
return ret;
goto err_free_dev;
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
dev->io_base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(dev->io_base))
return PTR_ERR(dev->io_base);
if (IS_ERR(dev->io_base)) {
ret = PTR_ERR(dev->io_base);
goto err_free_dev;
}
of_id = of_match_node(dim2_of_match, pdev->dev.of_node);
pdata = of_id->data;
ret = pdata && pdata->enable ? pdata->enable(pdev) : 0;
if (ret)
return ret;
if (pdata) {
if (pdata->enable) {
ret = pdata->enable(pdev);
if (ret)
goto err_free_dev;
}
dev->disable_platform = pdata->disable;
if (pdata->fcnt)
dev_fcnt = pdata->fcnt;
}
dev->disable_platform = pdata ? pdata->disable : NULL;
dev_info(&pdev->dev, "sync: num of frames per sub-buffer: %u\n", fcnt);
hal_ret = dim_startup(dev->io_base, dev->clk_speed, fcnt);
dev_info(&pdev->dev, "sync: num of frames per sub-buffer: %u\n",
dev_fcnt);
hal_ret = dim_startup(dev->io_base, dev->clk_speed, dev_fcnt);
if (hal_ret != DIM_NO_ERROR) {
dev_err(&pdev->dev, "dim_startup failed: %d\n", hal_ret);
ret = -ENODEV;
@ -857,32 +894,19 @@ static int dim2_probe(struct platform_device *pdev)
dev->most_iface.request_netinfo = request_netinfo;
dev->most_iface.driver_dev = &pdev->dev;
dev->most_iface.dev = &dev->dev;
dev->dev.init_name = "dim2_state";
dev->dev.init_name = dev->name;
dev->dev.parent = &pdev->dev;
dev->dev.release = dim2_release;
ret = most_register_interface(&dev->most_iface);
if (ret) {
dev_err(&pdev->dev, "failed to register MOST interface\n");
goto err_stop_thread;
}
return most_register_interface(&dev->most_iface);
ret = dim2_sysfs_probe(&dev->dev);
if (ret) {
dev_err(&pdev->dev, "failed to create sysfs attribute\n");
goto err_unreg_iface;
}
return 0;
err_unreg_iface:
most_deregister_interface(&dev->most_iface);
err_stop_thread:
kthread_stop(dev->netinfo_task);
err_shutdown_dim:
dim_shutdown();
err_disable_platform:
if (dev->disable_platform)
dev->disable_platform(pdev);
err_free_dev:
kfree(dev);
return ret;
}
@ -896,18 +920,8 @@ err_disable_platform:
static int dim2_remove(struct platform_device *pdev)
{
struct dim2_hdm *dev = platform_get_drvdata(pdev);
unsigned long flags;
dim2_sysfs_destroy(&dev->dev);
most_deregister_interface(&dev->most_iface);
kthread_stop(dev->netinfo_task);
spin_lock_irqsave(&dim_lock, flags);
dim_shutdown();
spin_unlock_irqrestore(&dim_lock, flags);
if (dev->disable_platform)
dev->disable_platform(pdev);
return 0;
}
@ -1047,9 +1061,19 @@ static void rcar_m3_disable(struct platform_device *pdev)
enum dim2_platforms { FSL_MX6, RCAR_H2, RCAR_M3 };
static struct dim2_platform_data plat_data[] = {
[FSL_MX6] = { .enable = fsl_mx6_enable, .disable = fsl_mx6_disable },
[RCAR_H2] = { .enable = rcar_h2_enable, .disable = rcar_h2_disable },
[RCAR_M3] = { .enable = rcar_m3_enable, .disable = rcar_m3_disable },
[FSL_MX6] = {
.enable = fsl_mx6_enable,
.disable = fsl_mx6_disable,
},
[RCAR_H2] = {
.enable = rcar_h2_enable,
.disable = rcar_h2_disable,
},
[RCAR_M3] = {
.enable = rcar_m3_enable,
.disable = rcar_m3_disable,
.fcnt = 3,
},
};
static const struct of_device_id dim2_of_match[] = {
@ -1082,6 +1106,7 @@ static struct platform_driver dim2_driver = {
.driver = {
.name = "hdm_dim2",
.of_match_table = dim2_of_match,
.dev_groups = dim2_groups,
},
};

49
drivers/staging/most/dim2/sysfs.c
View File

@ -1,49 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* sysfs.c - MediaLB sysfs information
*
* Copyright (C) 2015, Microchip Technology Germany II GmbH & Co. KG
*/
/* Author: Andrey Shvetsov <andrey.shvetsov@k2l.de> */
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/kernel.h>
#include "sysfs.h"
#include <linux/device.h>
static ssize_t state_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
bool state = dim2_sysfs_get_state_cb();
return sprintf(buf, "%s\n", state ? "locked" : "");
}
static DEVICE_ATTR_RO(state);
static struct attribute *dev_attrs[] = {
&dev_attr_state.attr,
NULL,
};
static struct attribute_group dev_attr_group = {
.attrs = dev_attrs,
};
static const struct attribute_group *dev_attr_groups[] = {
&dev_attr_group,
NULL,
};
int dim2_sysfs_probe(struct device *dev)
{
dev->groups = dev_attr_groups;
return device_register(dev);
}
void dim2_sysfs_destroy(struct device *dev)
{
device_unregister(dev);
}

11
drivers/staging/most/dim2/sysfs.h
View File

@ -16,15 +16,4 @@ struct medialb_bus {
struct kobject kobj_group;
};
struct device;
int dim2_sysfs_probe(struct device *dev);
void dim2_sysfs_destroy(struct device *dev);
/*
* callback,
* must deliver MediaLB state as true if locked or false if unlocked
*/
bool dim2_sysfs_get_state_cb(void);
#endif /* DIM2_SYSFS_H */

2
drivers/staging/most/net/net.c
View File

@ -564,7 +564,7 @@ static void on_netinfo(struct most_interface *iface,
if (m && is_valid_ether_addr(m)) {
if (!is_valid_ether_addr(dev->dev_addr)) {
netdev_info(dev, "set mac %pM\n", m);
ether_addr_copy(dev->dev_addr, m);
eth_hw_addr_set(dev, m);
netif_dormant_off(dev);
} else if (!ether_addr_equal(dev->dev_addr, m)) {
netdev_warn(dev, "reject mac %pM\n", m);

6
drivers/staging/mt7621-dma/hsdma-mt7621.c
View File

@ -162,8 +162,7 @@ struct mtk_hsdam_engine {
struct mtk_hsdma_chan chan[1];
};
static inline struct mtk_hsdam_engine *mtk_hsdma_chan_get_dev(
struct mtk_hsdma_chan *chan)
static inline struct mtk_hsdam_engine *mtk_hsdma_chan_get_dev(struct mtk_hsdma_chan *chan)
{
return container_of(chan->vchan.chan.device, struct mtk_hsdam_engine,
ddev);
@ -174,8 +173,7 @@ static inline struct mtk_hsdma_chan *to_mtk_hsdma_chan(struct dma_chan *c)
return container_of(c, struct mtk_hsdma_chan, vchan.chan);
}
static inline struct mtk_hsdma_desc *to_mtk_hsdma_desc(
struct virt_dma_desc *vdesc)
static inline struct mtk_hsdma_desc *to_mtk_hsdma_desc(struct virt_dma_desc *vdesc)
{
return container_of(vdesc, struct mtk_hsdma_desc, vdesc);
}

3
drivers/staging/mt7621-dts/gbpc1.dts
View File

@ -1,3 +1,4 @@
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/dts-v1/;
#include "mt7621.dtsi"
@ -18,7 +19,7 @@
bootargs = "console=ttyS0,57600";
};
palmbus: palmbus@1E000000 {
palmbus: palmbus@1e000000 {
i2c@900 {
status = "okay";
};

1
drivers/staging/mt7621-dts/gbpc2.dts
View File

@ -1,3 +1,4 @@
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/dts-v1/;
#include "gbpc1.dts"

74
drivers/staging/mt7621-dts/mt7621.dtsi
View File

@ -1,3 +1,4 @@
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
#include <dt-bindings/interrupt-controller/mips-gic.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/mt7621-clk.h>
@ -8,12 +9,19 @@
compatible = "mediatek,mt7621-soc";
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "mips,mips1004Kc";
reg = <0>;
};
cpu@1 {
device_type = "cpu";
compatible = "mips,mips1004Kc";
reg = <1>;
};
};
@ -47,10 +55,10 @@
regulator-always-on;
};
palmbus: palmbus@1E000000 {
palmbus: palmbus@1e000000 {
compatible = "palmbus";
reg = <0x1E000000 0x100000>;
ranges = <0x0 0x1E000000 0x0FFFFF>;
reg = <0x1e000000 0x100000>;
ranges = <0x0 0x1e000000 0x0fffff>;
#address-cells = <1>;
#size-cells = <1>;
@ -100,43 +108,11 @@
pinctrl-0 = <&i2c_pins>;
};
i2s: i2s@a00 {
compatible = "mediatek,mt7621-i2s";
reg = <0xa00 0x100>;
clocks = <&sysc MT7621_CLK_I2S>;
clock-names = "i2s";
resets = <&rstctrl 17>;
reset-names = "i2s";
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 16 IRQ_TYPE_LEVEL_HIGH>;
txdma-req = <2>;
rxdma-req = <3>;
dmas = <&gdma 4>,
<&gdma 6>;
dma-names = "tx", "rx";
status = "disabled";
};
memc: syscon@5000 {
compatible = "mediatek,mt7621-memc", "syscon";
reg = <0x5000 0x1000>;
};
cpc: cpc@1fbf0000 {
compatible = "mediatek,mt7621-cpc";
reg = <0x1fbf0000 0x8000>;
};
mc: mc@1fbf8000 {
compatible = "mediatek,mt7621-mc";
reg = <0x1fbf8000 0x8000>;
};
uartlite: uartlite@c00 {
compatible = "ns16550a";
reg = <0xc00 0x100>;
@ -181,7 +157,7 @@
reset-names = "dma";
interrupt-parent = <&gic>;
interrupts = <0 13 4>;
interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
#dma-channels = <16>;
@ -200,7 +176,7 @@
reset-names = "hsdma";
interrupt-parent = <&gic>;
interrupts = <0 11 4>;
interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
#dma-channels = <1>;
@ -301,11 +277,11 @@
#reset-cells = <1>;
};
sdhci: sdhci@1E130000 {
sdhci: sdhci@1e130000 {
status = "disabled";
compatible = "mediatek,mt7620-mmc";
reg = <0x1E130000 0x4000>;
reg = <0x1e130000 0x4000>;
bus-width = <4>;
max-frequency = <48000000>;
@ -327,7 +303,7 @@
interrupts = <GIC_SHARED 20 IRQ_TYPE_LEVEL_HIGH>;
};
xhci: xhci@1E1C0000 {
xhci: xhci@1e1c0000 {
status = "okay";
compatible = "mediatek,mt8173-xhci";
@ -358,18 +334,14 @@
};
};
nand: nand@1e003000 {
status = "disabled";
cpc: cpc@1fbf0000 {
compatible = "mti,mips-cpc";
reg = <0x1fbf0000 0x8000>;
};
compatible = "mediatek,mt7621-nand";
bank-width = <2>;
reg = <0x1e003000 0x800
0x1e003800 0x800>;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&sysc MT7621_CLK_NAND>;
clock-names = "nand";
cdmm: cdmm@1fbf8000 {
compatible = "mti,mips-cdmm";
reg = <0x1fbf8000 0x8000>;
};
ethernet: ethernet@1e100000 {

2
drivers/staging/mt7621-pci/pci-mt7621.c
View File

@ -482,7 +482,7 @@ static int mt7621_pcie_enable_ports(struct pci_host_bridge *host)
/* Setup MEMWIN and IOWIN */
pcie_write(pcie, 0xffffffff, RALINK_PCI_MEMBASE);
pcie_write(pcie, entry->res->start, RALINK_PCI_IOBASE);
pcie_write(pcie, entry->res->start - entry->offset, RALINK_PCI_IOBASE);
list_for_each_entry(port, &pcie->ports, list) {
if (port->enabled) {

2
drivers/staging/octeon/ethernet.c
View File

@ -350,7 +350,7 @@ static int cvm_oct_set_mac_filter(struct net_device *dev)
(cvmx_helper_interface_get_mode(interface) !=
CVMX_HELPER_INTERFACE_MODE_SPI)) {
int i;
u8 *ptr = dev->dev_addr;
const u8 *ptr = dev->dev_addr;
u64 mac = 0;
int index = INDEX(priv->port);

18
drivers/staging/pi433/pi433_if.c
View File

@ -649,7 +649,7 @@ pi433_tx_thread(void *data)
/* clear fifo, set fifo threshold, set payload length */
retval = rf69_set_mode(spi, standby); /* this clears the fifo */
if (retval < 0)
return retval;
goto abort;
if (device->rx_active && !rx_interrupted) {
/*
@ -661,33 +661,33 @@ pi433_tx_thread(void *data)
retval = rf69_set_fifo_threshold(spi, FIFO_THRESHOLD);
if (retval < 0)
return retval;
goto abort;
if (tx_cfg.enable_length_byte == OPTION_ON) {
retval = rf69_set_payload_length(spi, size * tx_cfg.repetitions);
if (retval < 0)
return retval;
goto abort;
} else {
retval = rf69_set_payload_length(spi, 0);
if (retval < 0)
return retval;
goto abort;
}
/* configure the rf chip */
retval = rf69_set_tx_cfg(device, &tx_cfg);
if (retval < 0)
return retval;
goto abort;
/* enable fifo level interrupt */
retval = rf69_set_dio_mapping(spi, DIO1, DIO_FIFO_LEVEL);
if (retval < 0)
return retval;
goto abort;
device->irq_state[DIO1] = DIO_FIFO_LEVEL;
irq_set_irq_type(device->irq_num[DIO1], IRQ_TYPE_EDGE_FALLING);
/* enable packet sent interrupt */
retval = rf69_set_dio_mapping(spi, DIO0, DIO_PACKET_SENT);
if (retval < 0)
return retval;
goto abort;
device->irq_state[DIO0] = DIO_PACKET_SENT;
irq_set_irq_type(device->irq_num[DIO0], IRQ_TYPE_EDGE_RISING);
enable_irq(device->irq_num[DIO0]); /* was disabled by rx active check */
@ -695,7 +695,7 @@ pi433_tx_thread(void *data)
/* enable transmission */
retval = rf69_set_mode(spi, transmit);
if (retval < 0)
return retval;
goto abort;
/* transfer this msg (and repetitions) to chip fifo */
device->free_in_fifo = FIFO_SIZE;
@ -742,7 +742,7 @@ pi433_tx_thread(void *data)
dev_dbg(device->dev, "thread: Packet sent. Set mode to stby.");
retval = rf69_set_mode(spi, standby);
if (retval < 0)
return retval;
goto abort;
/* everything sent? */
if (kfifo_is_empty(&device->tx_fifo)) {

23
drivers/staging/pi433/pi433_if.h
View File

@ -5,14 +5,13 @@
* userspace interface for pi433 radio module
*
* Pi433 is a 433MHz radio module for the Raspberry Pi.
* It is based on the HopeRf Module RFM69CW. Therefore inside of this
* driver, you'll find an abstraction of the rf69 chip.
* It is based on the HopeRf Module RFM69CW. Therefore, inside of this
* driver you'll find an abstraction of the rf69 chip.
*
* If needed, this driver could be extended, to also support other
* devices, basing on HopeRfs rf69.
* If needed this driver could also be extended to support other
* devices based on HopeRf rf69 as well as HopeRf modules with a similar
* interface such as RFM69HCW, RFM12, RFM95 and so on.
*
* The driver can also be extended, to support other modules of
* HopeRf with a similar interace - e. g. RFM69HCW, RFM12, RFM95, ...
* Copyright (C) 2016 Wolf-Entwicklungen
* Marcus Wolf <linux@wolf-entwicklungen.de>
*/
@ -33,8 +32,8 @@ enum option_on_off {
/* IOCTL structs and commands */
/**
* struct pi433_tx_config
* describes the configuration of the radio module for sending
* struct pi433_tx_cfg
* describes the configuration of the radio module for sending data
* @frequency:
* @bit_rate:
* @modulation:
@ -46,7 +45,7 @@ enum option_on_off {
* @repetitions:
*
* ATTENTION:
* If the contents of 'pi433_tx_config' ever change
* If the contents of 'pi433_tx_cfg' ever change
* incompatibly, then the ioctl number (see define below) must change.
*
* NOTE: struct layout is the same in 64bit and 32bit userspace.
@ -81,8 +80,8 @@ struct pi433_tx_cfg {
};
/**
* struct pi433_rx_config
* describes the configuration of the radio module for sending
* struct pi433_rx_cfg
* describes the configuration of the radio module for receiving data
* @frequency:
* @bit_rate:
* @modulation:
@ -94,7 +93,7 @@ struct pi433_tx_cfg {
* @repetitions:
*
* ATTENTION:
* If the contents of 'pi433_rx_config' ever change
* If the contents of 'pi433_rx_cfg' ever change
* incompatibly, then the ioctl number (see define below) must change
*
* NOTE: struct layout is the same in 64bit and 32bit userspace.

18
drivers/staging/qlge/qlge_main.c
View File

@ -321,8 +321,8 @@ int qlge_get_mac_addr_reg(struct qlge_adapter *qdev, u32 type, u16 index,
/* Set up a MAC, multicast or VLAN address for the
* inbound frame matching.
*/
static int qlge_set_mac_addr_reg(struct qlge_adapter *qdev, u8 *addr, u32 type,
u16 index)
static int qlge_set_mac_addr_reg(struct qlge_adapter *qdev, const u8 *addr,
u32 type, u16 index)
{
u32 offset = 0;
int status = 0;
@ -441,7 +441,7 @@ static int qlge_set_mac_addr(struct qlge_adapter *qdev, int set)
status = qlge_sem_spinlock(qdev, SEM_MAC_ADDR_MASK);
if (status)
return status;
status = qlge_set_mac_addr_reg(qdev, (u8 *)addr,
status = qlge_set_mac_addr_reg(qdev, (const u8 *)addr,
MAC_ADDR_TYPE_CAM_MAC,
qdev->func * MAX_CQ);
qlge_sem_unlock(qdev, SEM_MAC_ADDR_MASK);
@ -724,9 +724,7 @@ static int qlge_get_8000_flash_params(struct qlge_adapter *qdev)
goto exit;
}
memcpy(qdev->ndev->dev_addr,
mac_addr,
qdev->ndev->addr_len);
eth_hw_addr_set(qdev->ndev, mac_addr);
exit:
qlge_sem_unlock(qdev, SEM_FLASH_MASK);
@ -774,9 +772,7 @@ static int qlge_get_8012_flash_params(struct qlge_adapter *qdev)
goto exit;
}
memcpy(qdev->ndev->dev_addr,
qdev->flash.flash_params_8012.mac_addr,
qdev->ndev->addr_len);
eth_hw_addr_set(qdev->ndev, qdev->flash.flash_params_8012.mac_addr);
exit:
qlge_sem_unlock(qdev, SEM_FLASH_MASK);
@ -4214,14 +4210,14 @@ static int qlge_set_mac_address(struct net_device *ndev, void *p)
if (!is_valid_ether_addr(addr->sa_data))
return -EADDRNOTAVAIL;
memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len);
eth_hw_addr_set(ndev, addr->sa_data);
/* Update local copy of current mac address. */
memcpy(qdev->current_mac_addr, ndev->dev_addr, ndev->addr_len);
status = qlge_sem_spinlock(qdev, SEM_MAC_ADDR_MASK);
if (status)
return status;
status = qlge_set_mac_addr_reg(qdev, (u8 *)ndev->dev_addr,
status = qlge_set_mac_addr_reg(qdev, (const u8 *)ndev->dev_addr,
MAC_ADDR_TYPE_CAM_MAC,
qdev->func * MAX_CQ);
if (status)

2
drivers/staging/qlge/qlge_mpi.c
View File

@ -862,7 +862,7 @@ int qlge_mb_wol_set_magic(struct qlge_adapter *qdev, u32 enable_wol)
struct mbox_params mbc;
struct mbox_params *mbcp = &mbc;
int status;
u8 *addr = qdev->ndev->dev_addr;
const u8 *addr = qdev->ndev->dev_addr;
memset(mbcp, 0, sizeof(struct mbox_params));

10
drivers/staging/r8188eu/Kconfig
View File

@ -14,13 +14,3 @@ config R8188EU
sources for version v4.1.4_6773.20130222, and contains modifications for
newer kernel features. If built as a module, it will be called r8188eu.
if R8188EU
config 88EU_AP_MODE
bool "Realtek RTL8188EU AP mode"
help
This option enables Access Point mode. Unless you know that your system
will never be used as an AP, or the target system has limited memory,
"Y" should be selected.
endif

155
drivers/staging/r8188eu/Makefile
View File

@ -1,105 +1,58 @@
SHELL := /bin/bash
EXTRA_CFLAGS += $(USER_EXTRA_CFLAGS)
EXTRA_CFLAGS += -O1
ccflags-y += -D__CHECK_ENDIAN__
CONFIG_BT_COEXIST = n
CONFIG_WOWLAN = n
OUTSRC_FILES := \
hal/HalHWImg8188E_MAC.o \
hal/HalHWImg8188E_BB.o \
hal/HalHWImg8188E_RF.o \
hal/HalPhyRf_8188e.o \
hal/HalPwrSeqCmd.o \
hal/Hal8188EPwrSeq.o \
hal/Hal8188ERateAdaptive.o\
hal/hal_intf.o \
hal/hal_com.o \
hal/odm.o \
hal/odm_debug.o \
hal/odm_interface.o \
hal/odm_HWConfig.o \
hal/odm_RegConfig8188E.o\
hal/odm_RTL8188E.o \
hal/rtl8188e_cmd.o \
hal/rtl8188e_dm.o \
hal/rtl8188e_hal_init.o \
hal/rtl8188e_mp.o \
hal/rtl8188e_phycfg.o \
hal/rtl8188e_rf6052.o \
hal/rtl8188e_rxdesc.o \
hal/rtl8188e_sreset.o \
hal/rtl8188e_xmit.o \
hal/rtl8188eu_led.o \
hal/rtl8188eu_recv.o \
hal/rtl8188eu_xmit.o \
hal/usb_halinit.o \
hal/usb_ops_linux.o
RTL871X = rtl8188e
HCI_NAME = usb
_OS_INTFS_FILES := \
os_dep/ioctl_linux.o \
os_dep/mlme_linux.o \
os_dep/os_intfs.o \
os_dep/osdep_service.o \
os_dep/recv_linux.o \
os_dep/usb_intf.o \
os_dep/usb_ops_linux.o \
os_dep/xmit_linux.o
_HAL_INTFS_FILES += $(OUTSRC_FILES)
ifeq ($(CONFIG_BT_COEXIST), y)
EXTRA_CFLAGS += -DCONFIG_BT_COEXIST
endif
ifeq ($(CONFIG_WOWLAN), y)
EXTRA_CFLAGS += -DCONFIG_WOWLAN
endif
SUBARCH := $(shell uname -m | sed -e "s/i.86/i386/; s/ppc.*/powerpc/; s/armv.l/arm/; s/aarch64/arm64/;")
ARCH ?= $(SUBARCH)
CROSS_COMPILE ?=
KVER ?= $(if $(KERNELRELEASE),$(KERNELRELEASE),$(shell uname -r))
KSRC ?= $(if $(KERNEL_SRC),$(KERNEL_SRC),/lib/modules/$(KVER)/build)
MODDESTDIR := /lib/modules/$(KVER)/kernel/drivers/net/wireless
INSTALL_PREFIX :=
rtk_core := \
core/rtw_ap.o \
core/rtw_br_ext.o \
core/rtw_cmd.o \
core/rtw_debug.o \
core/rtw_efuse.o \
core/rtw_ieee80211.o \
core/rtw_io.o \
core/rtw_ioctl_set.o \
core/rtw_iol.o \
core/rtw_led.o \
core/rtw_mlme.o \
core/rtw_mlme_ext.o \
core/rtw_mp.o \
core/rtw_mp_ioctl.o \
core/rtw_pwrctrl.o \
core/rtw_p2p.o \
core/rtw_recv.o \
core/rtw_rf.o \
core/rtw_security.o \
core/rtw_sreset.o \
core/rtw_sta_mgt.o \
core/rtw_wlan_util.o \
r8188eu-y = \
hal/HalHWImg8188E_MAC.o \
hal/HalHWImg8188E_BB.o \
hal/HalHWImg8188E_RF.o \
hal/HalPhyRf_8188e.o \
hal/HalPwrSeqCmd.o \
hal/Hal8188EPwrSeq.o \
hal/Hal8188ERateAdaptive.o \
hal/hal_intf.o \
hal/hal_com.o \
hal/odm.o \
hal/odm_debug.o \
hal/odm_interface.o \
hal/odm_HWConfig.o \
hal/odm_RegConfig8188E.o \
hal/odm_RTL8188E.o \
hal/rtl8188e_cmd.o \
hal/rtl8188e_dm.o \
hal/rtl8188e_hal_init.o \
hal/rtl8188e_phycfg.o \
hal/rtl8188e_rf6052.o \
hal/rtl8188e_rxdesc.o \
hal/rtl8188e_sreset.o \
hal/rtl8188e_xmit.o \
hal/rtl8188eu_led.o \
hal/rtl8188eu_recv.o \
hal/rtl8188eu_xmit.o \
hal/usb_halinit.o \
hal/usb_ops_linux.o \
os_dep/ioctl_linux.o \
os_dep/mlme_linux.o \
os_dep/os_intfs.o \
os_dep/osdep_service.o \
os_dep/recv_linux.o \
os_dep/usb_intf.o \
os_dep/usb_ops_linux.o \
os_dep/xmit_linux.o \
core/rtw_ap.o \
core/rtw_br_ext.o \
core/rtw_cmd.o \
core/rtw_efuse.o \
core/rtw_ieee80211.o \
core/rtw_ioctl_set.o \
core/rtw_iol.o \
core/rtw_led.o \
core/rtw_mlme.o \
core/rtw_mlme_ext.o \
core/rtw_pwrctrl.o \
core/rtw_p2p.o \
core/rtw_recv.o \
core/rtw_rf.o \
core/rtw_security.o \
core/rtw_sta_mgt.o \
core/rtw_wlan_util.o \
core/rtw_xmit.o
r8188eu-y += $(rtk_core)
r8188eu-y += $(_HAL_INTFS_FILES)
r8188eu-y += $(_OS_INTFS_FILES)
obj-$(CONFIG_R8188EU) := r8188eu.o

607
drivers/staging/r8188eu/core/rtw_ap.c
View File

@ -7,8 +7,7 @@
#include "../include/drv_types.h"
#include "../include/wifi.h"
#include "../include/ieee80211.h"
#ifdef CONFIG_88EU_AP_MODE
#include "../include/rtl8188e_cmd.h"
void init_mlme_ap_info(struct adapter *padapter)
{
@ -19,7 +18,7 @@ void init_mlme_ap_info(struct adapter *padapter)
spin_lock_init(&pmlmepriv->bcn_update_lock);
/* for ACL */
_rtw_init_queue(&pacl_list->acl_node_q);
rtw_init_queue(&pacl_list->acl_node_q);
start_ap_mode(padapter);
}
@ -343,7 +342,7 @@ void add_RATid(struct adapter *padapter, struct sta_info *psta, u8 rssi_level)
}
/* n mode ra_bitmap */
if (psta_ht->ht_option) {
rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
GetHwReg8188EU(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
if (rf_type == RF_2T2R)
limit = 16;/* 2R */
else
@ -393,7 +392,7 @@ void add_RATid(struct adapter *padapter, struct sta_info *psta, u8 rssi_level)
/* bitmap[28:31]= Rate Adaptive id */
/* arg[0:4] = macid */
/* arg[5] = Short GI */
rtw_hal_add_ra_tid(padapter, tx_ra_bitmap, arg, rssi_level);
rtl8188e_Add_RateATid(padapter, tx_ra_bitmap, arg, rssi_level);
if (shortGIrate)
init_rate |= BIT(6);
@ -453,7 +452,7 @@ void update_bmc_sta(struct adapter *padapter)
init_rate = get_highest_rate_idx(tx_ra_bitmap & 0x0fffffff) & 0x3f;
/* ap mode */
rtw_hal_set_odm_var(padapter, HAL_ODM_STA_INFO, psta, true);
rtl8188e_SetHalODMVar(padapter, HAL_ODM_STA_INFO, psta, true);
{
u8 arg = 0;
@ -467,7 +466,7 @@ void update_bmc_sta(struct adapter *padapter)
/* bitmap[28:31]= Rate Adaptive id */
/* arg[0:4] = macid */
/* arg[5] = Short GI */
rtw_hal_add_ra_tid(padapter, tx_ra_bitmap, arg, 0);
rtl8188e_Add_RateATid(padapter, tx_ra_bitmap, arg, 0);
}
/* set ra_id, init_rate */
psta->raid = raid;
@ -505,7 +504,7 @@ void update_sta_info_apmode(struct adapter *padapter, struct sta_info *psta)
DBG_88E("%s\n", __func__);
/* ap mode */
rtw_hal_set_odm_var(padapter, HAL_ODM_STA_INFO, psta, true);
rtl8188e_SetHalODMVar(padapter, HAL_ODM_STA_INFO, psta, true);
if (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X)
psta->ieee8021x_blocked = true;
@ -558,550 +557,6 @@ void update_sta_info_apmode(struct adapter *padapter, struct sta_info *psta)
spin_unlock_bh(&psta->lock);
}
static void update_hw_ht_param(struct adapter *padapter)
{
unsigned char max_AMPDU_len;
unsigned char min_MPDU_spacing;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
DBG_88E("%s\n", __func__);
/* handle A-MPDU parameter field */
/*
AMPDU_para [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k
AMPDU_para [4:2]:Min MPDU Start Spacing
*/
max_AMPDU_len = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x03;
min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) >> 2;
rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_MIN_SPACE, (u8 *)(&min_MPDU_spacing));
rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&max_AMPDU_len));
/* */
/* Config SM Power Save setting */
/* */
pmlmeinfo->SM_PS = (le16_to_cpu(pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info) & 0x0C) >> 2;
if (pmlmeinfo->SM_PS == WLAN_HT_CAP_SM_PS_STATIC)
DBG_88E("%s(): WLAN_HT_CAP_SM_PS_STATIC\n", __func__);
}
static void start_bss_network(struct adapter *padapter, u8 *pbuf)
{
u8 *p;
u8 val8, cur_channel, cur_bwmode, cur_ch_offset;
u16 bcn_interval;
u32 acparm;
int ie_len;
struct registry_priv *pregpriv = &padapter->registrypriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct security_priv *psecuritypriv = &padapter->securitypriv;
struct wlan_bssid_ex *pnetwork = (struct wlan_bssid_ex *)&pmlmepriv->cur_network.network;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct wlan_bssid_ex *pnetwork_mlmeext = &pmlmeinfo->network;
struct HT_info_element *pht_info = NULL;
#ifdef CONFIG_88EU_P2P
struct wifidirect_info *pwdinfo = &padapter->wdinfo;
#endif /* CONFIG_88EU_P2P */
bcn_interval = (u16)pnetwork->Configuration.BeaconPeriod;
cur_channel = pnetwork->Configuration.DSConfig;
cur_bwmode = HT_CHANNEL_WIDTH_20;
cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
/* check if there is wps ie, */
/* if there is wpsie in beacon, the hostapd will update beacon twice when stating hostapd, */
/* and at first time the security ie (RSN/WPA IE) will not include in beacon. */
if (!rtw_get_wps_ie(pnetwork->IEs + _FIXED_IE_LENGTH_, pnetwork->IELength - _FIXED_IE_LENGTH_, NULL, NULL))
pmlmeext->bstart_bss = true;
/* todo: update wmm, ht cap */
if (pmlmepriv->qospriv.qos_option)
pmlmeinfo->WMM_enable = true;
if (pmlmepriv->htpriv.ht_option) {
pmlmeinfo->WMM_enable = true;
pmlmeinfo->HT_enable = true;
update_hw_ht_param(padapter);
}
if (pmlmepriv->cur_network.join_res != true) { /* setting only at first time */
/* WEP Key will be set before this function, do not clear CAM. */
if ((psecuritypriv->dot11PrivacyAlgrthm != _WEP40_) &&
(psecuritypriv->dot11PrivacyAlgrthm != _WEP104_))
flush_all_cam_entry(padapter); /* clear CAM */
}
/* set MSR to AP_Mode */
Set_MSR(padapter, _HW_STATE_AP_);
/* Set BSSID REG */
rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pnetwork->MacAddress);
/* Set EDCA param reg */
acparm = 0x002F3217; /* VO */
rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acparm));
acparm = 0x005E4317; /* VI */
rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acparm));
acparm = 0x005ea42b;
rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm));
acparm = 0x0000A444; /* BK */
rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acparm));
/* Set Security */
val8 = (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) ? 0xcc : 0xcf;
rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8));
/* Beacon Control related register */
rtw_hal_set_hwreg(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)(&bcn_interval));
UpdateBrateTbl(padapter, pnetwork->SupportedRates);
rtw_hal_set_hwreg(padapter, HW_VAR_BASIC_RATE, pnetwork->SupportedRates);
if (!pmlmepriv->cur_network.join_res) { /* setting only at first time */
/* turn on all dynamic functions */
Switch_DM_Func(padapter, DYNAMIC_ALL_FUNC_ENABLE, true);
}
/* set channel, bwmode */
p = rtw_get_ie((pnetwork->IEs + sizeof(struct ndis_802_11_fixed_ie)), _HT_ADD_INFO_IE_, &ie_len, (pnetwork->IELength - sizeof(struct ndis_802_11_fixed_ie)));
if (p && ie_len) {
pht_info = (struct HT_info_element *)(p + 2);
if ((pregpriv->cbw40_enable) && (pht_info->infos[0] & BIT(2))) {
/* switch to the 40M Hz mode */
cur_bwmode = HT_CHANNEL_WIDTH_40;
switch (pht_info->infos[0] & 0x3) {
case 1:
cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER;
break;
case 3:
cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER;
break;
default:
cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
break;
}
}
}
/* TODO: need to judge the phy parameters on concurrent mode for single phy */
set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode);
DBG_88E("CH =%d, BW =%d, offset =%d\n", cur_channel, cur_bwmode, cur_ch_offset);
/* */
pmlmeext->cur_channel = cur_channel;
pmlmeext->cur_bwmode = cur_bwmode;
pmlmeext->cur_ch_offset = cur_ch_offset;
pmlmeext->cur_wireless_mode = pmlmepriv->cur_network.network_type;
/* update cur_wireless_mode */
update_wireless_mode(padapter);
/* udpate capability after cur_wireless_mode updated */
update_capinfo(padapter, rtw_get_capability((struct wlan_bssid_ex *)pnetwork));
/* let pnetwork_mlmeext == pnetwork_mlme. */
memcpy(pnetwork_mlmeext, pnetwork, pnetwork->Length);
#ifdef CONFIG_88EU_P2P
memcpy(pwdinfo->p2p_group_ssid, pnetwork->Ssid.Ssid, pnetwork->Ssid.SsidLength);
pwdinfo->p2p_group_ssid_len = pnetwork->Ssid.SsidLength;
#endif /* CONFIG_88EU_P2P */
if (pmlmeext->bstart_bss) {
update_beacon(padapter, _TIM_IE_, NULL, false);
/* issue beacon frame */
if (send_beacon(padapter) == _FAIL)
DBG_88E("issue_beacon, fail!\n");
}
/* update bc/mc sta_info */
update_bmc_sta(padapter);
}
int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len)
{
int ret = _SUCCESS;
u8 *p;
u8 *pHT_caps_ie = NULL;
u8 *pHT_info_ie = NULL;
struct sta_info *psta = NULL;
u16 cap, ht_cap = false;
uint ie_len = 0;
int group_cipher, pairwise_cipher;
u8 channel, network_type, supportRate[NDIS_802_11_LENGTH_RATES_EX];
int supportRateNum = 0;
u8 OUI1[] = {0x00, 0x50, 0xf2, 0x01};
u8 WMM_PARA_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01};
struct registry_priv *pregistrypriv = &padapter->registrypriv;
struct security_priv *psecuritypriv = &padapter->securitypriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct wlan_bssid_ex *pbss_network = (struct wlan_bssid_ex *)&pmlmepriv->cur_network.network;
u8 *ie = pbss_network->IEs;
/* SSID */
/* Supported rates */
/* DS Params */
/* WLAN_EID_COUNTRY */
/* ERP Information element */
/* Extended supported rates */
/* WPA/WPA2 */
/* Wi-Fi Wireless Multimedia Extensions */
/* ht_capab, ht_oper */
/* WPS IE */
DBG_88E("%s, len =%d\n", __func__, len);
if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != true)
return _FAIL;
if (len > MAX_IE_SZ)
return _FAIL;
pbss_network->IELength = len;
memset(ie, 0, MAX_IE_SZ);
memcpy(ie, pbuf, pbss_network->IELength);
if (pbss_network->InfrastructureMode != Ndis802_11APMode)
return _FAIL;
pbss_network->Rssi = 0;
memcpy(pbss_network->MacAddress, myid(&padapter->eeprompriv), ETH_ALEN);
/* beacon interval */
p = rtw_get_beacon_interval_from_ie(ie);/* 8: TimeStamp, 2: Beacon Interval 2:Capability */
pbss_network->Configuration.BeaconPeriod = get_unaligned_le16(p);
/* capability */
cap = get_unaligned_le16(ie);
/* SSID */
p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _SSID_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_));
if (p && ie_len > 0) {
memset(&pbss_network->Ssid, 0, sizeof(struct ndis_802_11_ssid));
memcpy(pbss_network->Ssid.Ssid, (p + 2), ie_len);
pbss_network->Ssid.SsidLength = ie_len;
}
/* channel */
channel = 0;
pbss_network->Configuration.Length = 0;
p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _DSSET_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_));
if (p && ie_len > 0)
channel = *(p + 2);
pbss_network->Configuration.DSConfig = channel;
memset(supportRate, 0, NDIS_802_11_LENGTH_RATES_EX);
/* get supported rates */
p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_));
if (p) {
memcpy(supportRate, p + 2, ie_len);
supportRateNum = ie_len;
}
/* get ext_supported rates */
p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _EXT_SUPPORTEDRATES_IE_, &ie_len, pbss_network->IELength - _BEACON_IE_OFFSET_);
if (p) {
memcpy(supportRate + supportRateNum, p + 2, ie_len);
supportRateNum += ie_len;
}
network_type = rtw_check_network_type(supportRate, supportRateNum, channel);
rtw_set_supported_rate(pbss_network->SupportedRates, network_type);
/* parsing ERP_IE */
p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _ERPINFO_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_));
if (p && ie_len > 0)
ERP_IE_handler(padapter, (struct ndis_802_11_var_ie *)p);
/* update privacy/security */
if (cap & BIT(4))
pbss_network->Privacy = 1;
else
pbss_network->Privacy = 0;
psecuritypriv->wpa_psk = 0;
/* wpa2 */
group_cipher = 0;
pairwise_cipher = 0;
psecuritypriv->wpa2_group_cipher = _NO_PRIVACY_;
psecuritypriv->wpa2_pairwise_cipher = _NO_PRIVACY_;
p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _RSN_IE_2_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_));
if (p && ie_len > 0) {
if (rtw_parse_wpa2_ie(p, ie_len + 2, &group_cipher, &pairwise_cipher, NULL) == _SUCCESS) {
psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X;
psecuritypriv->dot8021xalg = 1;/* psk, todo:802.1x */
psecuritypriv->wpa_psk |= BIT(1);
psecuritypriv->wpa2_group_cipher = group_cipher;
psecuritypriv->wpa2_pairwise_cipher = pairwise_cipher;
}
}
/* wpa */
ie_len = 0;
group_cipher = 0;
pairwise_cipher = 0;
psecuritypriv->wpa_group_cipher = _NO_PRIVACY_;
psecuritypriv->wpa_pairwise_cipher = _NO_PRIVACY_;
for (p = ie + _BEACON_IE_OFFSET_;; p += (ie_len + 2)) {
p = rtw_get_ie(p, _SSN_IE_1_, &ie_len,
(pbss_network->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2)));
if ((p) && (!memcmp(p + 2, OUI1, 4))) {
if (rtw_parse_wpa_ie(p, ie_len + 2, &group_cipher,
&pairwise_cipher, NULL) == _SUCCESS) {
psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X;
psecuritypriv->dot8021xalg = 1;/* psk, todo:802.1x */
psecuritypriv->wpa_psk |= BIT(0);
psecuritypriv->wpa_group_cipher = group_cipher;
psecuritypriv->wpa_pairwise_cipher = pairwise_cipher;
}
break;
}
if (!p || ie_len == 0)
break;
}
/* wmm */
ie_len = 0;
pmlmepriv->qospriv.qos_option = 0;
if (pregistrypriv->wmm_enable) {
for (p = ie + _BEACON_IE_OFFSET_;; p += (ie_len + 2)) {
p = rtw_get_ie(p, _VENDOR_SPECIFIC_IE_, &ie_len,
(pbss_network->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2)));
if ((p) && !memcmp(p + 2, WMM_PARA_IE, 6)) {
pmlmepriv->qospriv.qos_option = 1;
*(p + 8) |= BIT(7);/* QoS Info, support U-APSD */
/* disable all ACM bits since the WMM admission control is not supported */
*(p + 10) &= ~BIT(4); /* BE */
*(p + 14) &= ~BIT(4); /* BK */
*(p + 18) &= ~BIT(4); /* VI */
*(p + 22) &= ~BIT(4); /* VO */
break;
}
if (!p || ie_len == 0)
break;
}
}
/* parsing HT_CAP_IE */
p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_CAPABILITY_IE_, &ie_len,
(pbss_network->IELength - _BEACON_IE_OFFSET_));
if (p && ie_len > 0) {
u8 rf_type;
struct ieee80211_ht_cap *pht_cap = (struct ieee80211_ht_cap *)(p + 2);
pHT_caps_ie = p;
ht_cap = true;
network_type |= WIRELESS_11_24N;
rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
if ((psecuritypriv->wpa_pairwise_cipher & WPA_CIPHER_CCMP) ||
(psecuritypriv->wpa2_pairwise_cipher & WPA_CIPHER_CCMP))
pht_cap->ampdu_params_info |= (IEEE80211_HT_AMPDU_PARM_DENSITY & (0x07 << 2));
else
pht_cap->ampdu_params_info |= (IEEE80211_HT_AMPDU_PARM_DENSITY & 0x00);
/* set Max Rx AMPDU size to 64K */
pht_cap->ampdu_params_info |= (IEEE80211_HT_AMPDU_PARM_FACTOR & 0x03);
if (rf_type == RF_1T1R) {
pht_cap->mcs.rx_mask[0] = 0xff;
pht_cap->mcs.rx_mask[1] = 0x0;
}
memcpy(&pmlmepriv->htpriv.ht_cap, p + 2, ie_len);
}
/* parsing HT_INFO_IE */
p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_ADD_INFO_IE_, &ie_len,
(pbss_network->IELength - _BEACON_IE_OFFSET_));
if (p && ie_len > 0)
pHT_info_ie = p;
switch (network_type) {
case WIRELESS_11B:
pbss_network->NetworkTypeInUse = Ndis802_11DS;
break;
case WIRELESS_11G:
case WIRELESS_11BG:
case WIRELESS_11G_24N:
case WIRELESS_11BG_24N:
pbss_network->NetworkTypeInUse = Ndis802_11OFDM24;
break;
default:
pbss_network->NetworkTypeInUse = Ndis802_11OFDM24;
break;
}
pmlmepriv->cur_network.network_type = network_type;
pmlmepriv->htpriv.ht_option = false;
if ((psecuritypriv->wpa2_pairwise_cipher & WPA_CIPHER_TKIP) ||
(psecuritypriv->wpa_pairwise_cipher & WPA_CIPHER_TKIP)) {
/* todo: */
/* ht_cap = false; */
}
/* ht_cap */
if (pregistrypriv->ht_enable && ht_cap) {
pmlmepriv->htpriv.ht_option = true;
pmlmepriv->qospriv.qos_option = 1;
if (pregistrypriv->ampdu_enable == 1)
pmlmepriv->htpriv.ampdu_enable = true;
HT_caps_handler(padapter, (struct ndis_802_11_var_ie *)pHT_caps_ie);
HT_info_handler(padapter, (struct ndis_802_11_var_ie *)pHT_info_ie);
}
pbss_network->Length = get_wlan_bssid_ex_sz((struct wlan_bssid_ex *)pbss_network);
/* issue beacon to start bss network */
start_bss_network(padapter, (u8 *)pbss_network);
/* alloc sta_info for ap itself */
psta = rtw_get_stainfo(&padapter->stapriv, pbss_network->MacAddress);
if (!psta) {
psta = rtw_alloc_stainfo(&padapter->stapriv, pbss_network->MacAddress);
if (!psta)
return _FAIL;
}
/* fix bug of flush_cam_entry at STOP AP mode */
psta->state |= WIFI_AP_STATE;
rtw_indicate_connect(padapter);
pmlmepriv->cur_network.join_res = true;/* for check if already set beacon */
return ret;
}
void rtw_set_macaddr_acl(struct adapter *padapter, int mode)
{
struct sta_priv *pstapriv = &padapter->stapriv;
struct wlan_acl_pool *pacl_list = &pstapriv->acl_list;
DBG_88E("%s, mode =%d\n", __func__, mode);
pacl_list->mode = mode;
}
int rtw_acl_add_sta(struct adapter *padapter, u8 *addr)
{
struct list_head *plist, *phead;
u8 added = false;
int i, ret = 0;
struct rtw_wlan_acl_node *paclnode;
struct sta_priv *pstapriv = &padapter->stapriv;
struct wlan_acl_pool *pacl_list = &pstapriv->acl_list;
struct __queue *pacl_node_q = &pacl_list->acl_node_q;
DBG_88E("%s(acl_num =%d) =%pM\n", __func__, pacl_list->num, (addr));
if ((NUM_ACL - 1) < pacl_list->num)
return -1;
spin_lock_bh(&pacl_node_q->lock);
phead = get_list_head(pacl_node_q);
plist = phead->next;
while (phead != plist) {
paclnode = container_of(plist, struct rtw_wlan_acl_node, list);
plist = plist->next;
if (!memcmp(paclnode->addr, addr, ETH_ALEN)) {
if (paclnode->valid) {
added = true;
DBG_88E("%s, sta has been added\n", __func__);
break;
}
}
}
spin_unlock_bh(&pacl_node_q->lock);
if (added)
return ret;
spin_lock_bh(&pacl_node_q->lock);
for (i = 0; i < NUM_ACL; i++) {
paclnode = &pacl_list->aclnode[i];
if (!paclnode->valid) {
INIT_LIST_HEAD(&paclnode->list);
memcpy(paclnode->addr, addr, ETH_ALEN);
paclnode->valid = true;
list_add_tail(&paclnode->list, get_list_head(pacl_node_q));
pacl_list->num++;
break;
}
}
DBG_88E("%s, acl_num =%d\n", __func__, pacl_list->num);
spin_unlock_bh(&pacl_node_q->lock);
return ret;
}
int rtw_acl_remove_sta(struct adapter *padapter, u8 *addr)
{
struct list_head *plist, *phead;
int ret = 0;
struct rtw_wlan_acl_node *paclnode;
struct sta_priv *pstapriv = &padapter->stapriv;
struct wlan_acl_pool *pacl_list = &pstapriv->acl_list;
struct __queue *pacl_node_q = &pacl_list->acl_node_q;
DBG_88E("%s(acl_num =%d) =%pM\n", __func__, pacl_list->num, (addr));
spin_lock_bh(&pacl_node_q->lock);
phead = get_list_head(pacl_node_q);
plist = phead->next;
while (phead != plist) {
paclnode = container_of(plist, struct rtw_wlan_acl_node, list);
plist = plist->next;
if (!memcmp(paclnode->addr, addr, ETH_ALEN)) {
if (paclnode->valid) {
paclnode->valid = false;
list_del_init(&paclnode->list);
pacl_list->num--;
}
}
}
spin_unlock_bh(&pacl_node_q->lock);
DBG_88E("%s, acl_num =%d\n", __func__, pacl_list->num);
return ret;
}
static void update_bcn_fixed_ie(struct adapter *padapter)
{
DBG_88E("%s\n", __func__);
@ -1289,7 +744,7 @@ void update_beacon(struct adapter *padapter, u8 ie_id, u8 *oui, u8 tx)
/*
op_mode
Set to 0 (HT pure) under the followign conditions
Set to 0 (HT pure) under the following conditions
- all STAs in the BSS are 20/40 MHz HT in 20/40 MHz BSS or
- all STAs in the BSS are 20 MHz HT in 20 MHz BSS
Set to 1 (HT non-member protection) if there may be non-HT STAs
@ -1633,41 +1088,6 @@ u8 ap_free_sta(struct adapter *padapter, struct sta_info *psta,
return beacon_updated;
}
int rtw_ap_inform_ch_switch(struct adapter *padapter, u8 new_ch, u8 ch_offset)
{
struct list_head *phead, *plist;
int ret = 0;
struct sta_info *psta = NULL;
struct sta_priv *pstapriv = &padapter->stapriv;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
if ((pmlmeinfo->state & 0x03) != WIFI_FW_AP_STATE)
return ret;
DBG_88E(FUNC_NDEV_FMT" with ch:%u, offset:%u\n",
FUNC_NDEV_ARG(padapter->pnetdev), new_ch, ch_offset);
spin_lock_bh(&pstapriv->asoc_list_lock);
phead = &pstapriv->asoc_list;
plist = phead->next;
/* for each sta in asoc_queue */
while (phead != plist) {
psta = container_of(plist, struct sta_info, asoc_list);
plist = plist->next;
issue_action_spct_ch_switch(padapter, psta->hwaddr, new_ch, ch_offset);
psta->expire_to = ((pstapriv->expire_to * 2) > 5) ? 5 : (pstapriv->expire_to * 2);
}
spin_unlock_bh(&pstapriv->asoc_list_lock);
issue_action_spct_ch_switch(padapter, bc_addr, new_ch, ch_offset);
return ret;
}
int rtw_sta_flush(struct adapter *padapter)
{
struct list_head *phead, *plist;
@ -1736,15 +1156,6 @@ void sta_info_update(struct adapter *padapter, struct sta_info *psta)
update_sta_info_apmode(padapter, psta);
}
/* called >= TSR LEVEL for USB or SDIO Interface*/
void ap_sta_info_defer_update(struct adapter *padapter, struct sta_info *psta)
{
if (psta->state & _FW_LINKED) {
/* add ratid */
add_RATid(padapter, psta, 0);/* DM_RATR_STA_INIT */
}
}
void start_ap_mode(struct adapter *padapter)
{
int i;
@ -1846,5 +1257,3 @@ void stop_ap_mode(struct adapter *padapter)
rtw_free_mlme_priv_ie_data(pmlmepriv);
}
#endif /* CONFIG_88EU_AP_MODE */

3
drivers/staging/r8188eu/core/rtw_br_ext.c
View File

@ -695,8 +695,7 @@ void dhcp_flag_bcast(struct adapter *priv, struct sk_buff *skb)
}
}
void *scdb_findEntry(struct adapter *priv, unsigned char *macAddr,
unsigned char *ipAddr)
void *scdb_findEntry(struct adapter *priv, unsigned char *ipAddr)
{
unsigned char networkAddr[MAX_NETWORK_ADDR_LEN];
struct nat25_network_db_entry *db;

618
drivers/staging/r8188eu/core/rtw_cmd.c
View File

@ -9,6 +9,8 @@
#include "../include/mlme_osdep.h"
#include "../include/rtw_br_ext.h"
#include "../include/rtw_mlme_ext.h"
#include "../include/rtl8188e_dm.h"
#include "../include/rtl8188e_sreset.h"
/*
Caller and the rtw_cmd_thread can protect cmd_q by spin_lock.
@ -19,11 +21,12 @@ static int _rtw_init_cmd_priv(struct cmd_priv *pcmdpriv)
{
int res = _SUCCESS;
sema_init(&pcmdpriv->cmd_queue_sema, 0);
init_completion(&pcmdpriv->enqueue_cmd);
/* sema_init(&(pcmdpriv->cmd_done_sema), 0); */
sema_init(&pcmdpriv->terminate_cmdthread_sema, 0);
init_completion(&pcmdpriv->start_cmd_thread);
init_completion(&pcmdpriv->stop_cmd_thread);
_rtw_init_queue(&pcmdpriv->cmd_queue);
rtw_init_queue(&pcmdpriv->cmd_queue);
/* allocate DMA-able/Non-Page memory for cmd_buf and rsp_buf */
@ -167,16 +170,6 @@ static int rtw_cmd_filter(struct cmd_priv *pcmdpriv, struct cmd_obj *cmd_obj)
{
u8 bAllow = false; /* set to true to allow enqueuing cmd when hw_init_completed is false */
/* To decide allow or not */
if ((pcmdpriv->padapter->pwrctrlpriv.bHWPwrPindetect) &&
(!pcmdpriv->padapter->registrypriv.usbss_enable)) {
if (cmd_obj->cmdcode == GEN_CMD_CODE(_Set_Drv_Extra)) {
struct drvextra_cmd_parm *pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)cmd_obj->parmbuf;
if (pdrvextra_cmd_parm->ec_id == POWER_SAVING_CTRL_WK_CID)
bAllow = true;
}
}
if (cmd_obj->cmdcode == GEN_CMD_CODE(_SetChannelPlan))
bAllow = true;
@ -205,7 +198,7 @@ u32 rtw_enqueue_cmd(struct cmd_priv *pcmdpriv, struct cmd_obj *cmd_obj)
res = _rtw_enqueue_cmd(&pcmdpriv->cmd_queue, cmd_obj);
if (res == _SUCCESS)
up(&pcmdpriv->cmd_queue_sema);
complete(&pcmdpriv->enqueue_cmd);
exit:
@ -221,14 +214,6 @@ struct cmd_obj *rtw_dequeue_cmd(struct cmd_priv *pcmdpriv)
return cmd_obj;
}
void rtw_cmd_clr_isr(struct cmd_priv *pcmdpriv)
{
pcmdpriv->cmd_done_cnt++;
/* up(&(pcmdpriv->cmd_done_sema)); */
}
void rtw_free_cmd_obj(struct cmd_obj *pcmd)
{
@ -259,23 +244,14 @@ int rtw_cmd_thread(void *context)
struct adapter *padapter = (struct adapter *)context;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
thread_enter("RTW_CMD_THREAD");
pcmdbuf = pcmdpriv->cmd_buf;
pcmdpriv->cmdthd_running = true;
up(&pcmdpriv->terminate_cmdthread_sema);
complete(&pcmdpriv->start_cmd_thread);
while (1) {
if (_rtw_down_sema(&pcmdpriv->cmd_queue_sema) == _FAIL)
break;
wait_for_completion(&pcmdpriv->enqueue_cmd);
if (padapter->bDriverStopped ||
padapter->bSurpriseRemoved) {
DBG_88E("%s: DriverStopped(%d) SurpriseRemoved(%d) break at line %d\n",
__func__, padapter->bDriverStopped, padapter->bSurpriseRemoved, __LINE__);
break;
}
_next:
if (padapter->bDriverStopped ||
padapter->bSurpriseRemoved) {
@ -345,43 +321,11 @@ post_process:
rtw_free_cmd_obj(pcmd);
} while (1);
up(&pcmdpriv->terminate_cmdthread_sema);
complete(&pcmdpriv->stop_cmd_thread);
thread_exit();
}
u8 rtw_setstandby_cmd(struct adapter *padapter, uint action)
{
struct cmd_obj *ph2c;
struct usb_suspend_parm *psetusbsuspend;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
u8 ret = _SUCCESS;
ph2c = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
if (!ph2c) {
ret = _FAIL;
goto exit;
}
psetusbsuspend = kzalloc(sizeof(struct usb_suspend_parm), GFP_ATOMIC);
if (!psetusbsuspend) {
kfree(ph2c);
ret = _FAIL;
goto exit;
}
psetusbsuspend->action = action;
init_h2fwcmd_w_parm_no_rsp(ph2c, psetusbsuspend, GEN_CMD_CODE(_SetUsbSuspend));
ret = rtw_enqueue_cmd(pcmdpriv, ph2c);
exit:
return ret;
}
/*
rtw_sitesurvey_cmd(~)
### NOTE:#### (!!!!)
@ -491,228 +435,12 @@ exit:
return res;
}
u8 rtw_setbasicrate_cmd(struct adapter *padapter, u8 *rateset)
{
struct cmd_obj *ph2c;
struct setbasicrate_parm *pssetbasicratepara;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
u8 res = _SUCCESS;
ph2c = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
if (!ph2c) {
res = _FAIL;
goto exit;
}
pssetbasicratepara = kzalloc(sizeof(struct setbasicrate_parm), GFP_ATOMIC);
if (!pssetbasicratepara) {
kfree(ph2c);
res = _FAIL;
goto exit;
}
init_h2fwcmd_w_parm_no_rsp(ph2c, pssetbasicratepara, _SetBasicRate_CMD_);
memcpy(pssetbasicratepara->basicrates, rateset, NumRates);
res = rtw_enqueue_cmd(pcmdpriv, ph2c);
exit:
return res;
}
/*
unsigned char rtw_setphy_cmd(unsigned char *adapter)
1. be called only after rtw_update_registrypriv_dev_network(~) or mp testing program
2. for AdHoc/Ap mode or mp mode?
*/
u8 rtw_setphy_cmd(struct adapter *padapter, u8 modem, u8 ch)
{
struct cmd_obj *ph2c;
struct setphy_parm *psetphypara;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
u8 res = _SUCCESS;
ph2c = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
if (!ph2c) {
res = _FAIL;
goto exit;
}
psetphypara = kzalloc(sizeof(struct setphy_parm), GFP_ATOMIC);
if (!psetphypara) {
kfree(ph2c);
res = _FAIL;
goto exit;
}
init_h2fwcmd_w_parm_no_rsp(ph2c, psetphypara, _SetPhy_CMD_);
psetphypara->modem = modem;
psetphypara->rfchannel = ch;
res = rtw_enqueue_cmd(pcmdpriv, ph2c);
exit:
return res;
}
u8 rtw_setbbreg_cmd(struct adapter *padapter, u8 offset, u8 val)
{
struct cmd_obj *ph2c;
struct writeBB_parm *pwritebbparm;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
u8 res = _SUCCESS;
ph2c = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
if (!ph2c) {
res = _FAIL;
goto exit;
}
pwritebbparm = kzalloc(sizeof(struct writeBB_parm), GFP_ATOMIC);
if (!pwritebbparm) {
kfree(ph2c);
res = _FAIL;
goto exit;
}
init_h2fwcmd_w_parm_no_rsp(ph2c, pwritebbparm, GEN_CMD_CODE(_SetBBReg));
pwritebbparm->offset = offset;
pwritebbparm->value = val;
res = rtw_enqueue_cmd(pcmdpriv, ph2c);
exit:
return res;
}
u8 rtw_getbbreg_cmd(struct adapter *padapter, u8 offset, u8 *pval)
{
struct cmd_obj *ph2c;
struct readBB_parm *prdbbparm;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
u8 res = _SUCCESS;
ph2c = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
if (!ph2c) {
res = _FAIL;
goto exit;
}
prdbbparm = kzalloc(sizeof(struct readBB_parm), GFP_ATOMIC);
if (!prdbbparm) {
kfree(ph2c);
return _FAIL;
}
INIT_LIST_HEAD(&ph2c->list);
ph2c->cmdcode = GEN_CMD_CODE(_GetBBReg);
ph2c->parmbuf = (unsigned char *)prdbbparm;
ph2c->cmdsz = sizeof(struct readBB_parm);
ph2c->rsp = pval;
ph2c->rspsz = sizeof(struct readBB_rsp);
prdbbparm->offset = offset;
res = rtw_enqueue_cmd(pcmdpriv, ph2c);
exit:
return res;
}
u8 rtw_setrfreg_cmd(struct adapter *padapter, u8 offset, u32 val)
{
struct cmd_obj *ph2c;
struct writeRF_parm *pwriterfparm;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
u8 res = _SUCCESS;
ph2c = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
if (!ph2c) {
res = _FAIL;
goto exit;
}
pwriterfparm = kzalloc(sizeof(struct writeRF_parm), GFP_ATOMIC);
if (!pwriterfparm) {
kfree(ph2c);
res = _FAIL;
goto exit;
}
init_h2fwcmd_w_parm_no_rsp(ph2c, pwriterfparm, GEN_CMD_CODE(_SetRFReg));
pwriterfparm->offset = offset;
pwriterfparm->value = val;
res = rtw_enqueue_cmd(pcmdpriv, ph2c);
exit:
return res;
}
u8 rtw_getrfreg_cmd(struct adapter *padapter, u8 offset, u8 *pval)
{
struct cmd_obj *ph2c;
struct readRF_parm *prdrfparm;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
u8 res = _SUCCESS;
ph2c = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
if (!ph2c) {
res = _FAIL;
goto exit;
}
prdrfparm = kzalloc(sizeof(struct readRF_parm), GFP_ATOMIC);
if (!prdrfparm) {
kfree(ph2c);
res = _FAIL;
goto exit;
}
INIT_LIST_HEAD(&ph2c->list);
ph2c->cmdcode = GEN_CMD_CODE(_GetRFReg);
ph2c->parmbuf = (unsigned char *)prdrfparm;
ph2c->cmdsz = sizeof(struct readRF_parm);
ph2c->rsp = pval;
ph2c->rspsz = sizeof(struct readRF_rsp);
prdrfparm->offset = offset;
res = rtw_enqueue_cmd(pcmdpriv, ph2c);
exit:
return res;
}
void rtw_getbbrfreg_cmdrsp_callback(struct adapter *padapter, struct cmd_obj *pcmd)
{
kfree(pcmd->parmbuf);
kfree(pcmd);
if (padapter->registrypriv.mp_mode == 1)
padapter->mppriv.workparam.bcompleted = true;
}
void rtw_readtssi_cmdrsp_callback(struct adapter *padapter, struct cmd_obj *pcmd)
{
kfree(pcmd->parmbuf);
kfree(pcmd);
if (padapter->registrypriv.mp_mode == 1)
padapter->mppriv.workparam.bcompleted = true;
}
u8 rtw_createbss_cmd(struct adapter *padapter)
@ -743,32 +471,6 @@ exit:
return res;
}
u8 rtw_createbss_cmd_ex(struct adapter *padapter, unsigned char *pbss, unsigned int sz)
{
struct cmd_obj *pcmd;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
u8 res = _SUCCESS;
pcmd = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
if (!pcmd) {
res = _FAIL;
goto exit;
}
INIT_LIST_HEAD(&pcmd->list);
pcmd->cmdcode = GEN_CMD_CODE(_CreateBss);
pcmd->parmbuf = pbss;
pcmd->cmdsz = sz;
pcmd->rsp = NULL;
pcmd->rspsz = 0;
res = rtw_enqueue_cmd(pcmdpriv, pcmd);
exit:
return res;
}
u8 rtw_joinbss_cmd(struct adapter *padapter, struct wlan_network *pnetwork)
{
u8 res = _SUCCESS;
@ -1073,115 +775,6 @@ exit:
return res;
}
u8 rtw_setrttbl_cmd(struct adapter *padapter, struct setratable_parm *prate_table)
{
struct cmd_obj *ph2c;
struct setratable_parm *psetrttblparm;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
u8 res = _SUCCESS;
ph2c = kzalloc(sizeof(struct cmd_obj), GFP_KERNEL);
if (!ph2c) {
res = _FAIL;
goto exit;
}
psetrttblparm = kzalloc(sizeof(struct setratable_parm), GFP_KERNEL);
if (!psetrttblparm) {
kfree(ph2c);
res = _FAIL;
goto exit;
}
init_h2fwcmd_w_parm_no_rsp(ph2c, psetrttblparm, GEN_CMD_CODE(_SetRaTable));
memcpy(psetrttblparm, prate_table, sizeof(struct setratable_parm));
res = rtw_enqueue_cmd(pcmdpriv, ph2c);
exit:
return res;
}
u8 rtw_getrttbl_cmd(struct adapter *padapter, struct getratable_rsp *pval)
{
struct cmd_obj *ph2c;
struct getratable_parm *pgetrttblparm;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
u8 res = _SUCCESS;
ph2c = kzalloc(sizeof(struct cmd_obj), GFP_KERNEL);
if (!ph2c) {
res = _FAIL;
goto exit;
}
pgetrttblparm = kzalloc(sizeof(struct getratable_parm), GFP_KERNEL);
if (!pgetrttblparm) {
kfree(ph2c);
res = _FAIL;
goto exit;
}
/* init_h2fwcmd_w_parm_no_rsp(ph2c, psetrttblparm, GEN_CMD_CODE(_SetRaTable)); */
INIT_LIST_HEAD(&ph2c->list);
ph2c->cmdcode = GEN_CMD_CODE(_GetRaTable);
ph2c->parmbuf = (unsigned char *)pgetrttblparm;
ph2c->cmdsz = sizeof(struct getratable_parm);
ph2c->rsp = (u8 *)pval;
ph2c->rspsz = sizeof(struct getratable_rsp);
pgetrttblparm->rsvd = 0x0;
res = rtw_enqueue_cmd(pcmdpriv, ph2c);
exit:
return res;
}
u8 rtw_setassocsta_cmd(struct adapter *padapter, u8 *mac_addr)
{
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
struct cmd_obj *ph2c;
struct set_assocsta_parm *psetassocsta_para;
struct set_stakey_rsp *psetassocsta_rsp = NULL;
u8 res = _SUCCESS;
ph2c = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
if (!ph2c) {
res = _FAIL;
goto exit;
}
psetassocsta_para = kzalloc(sizeof(struct set_assocsta_parm), GFP_ATOMIC);
if (!psetassocsta_para) {
kfree(ph2c);
res = _FAIL;
goto exit;
}
psetassocsta_rsp = kzalloc(sizeof(struct set_assocsta_rsp), GFP_ATOMIC);
if (!psetassocsta_rsp) {
kfree(ph2c);
kfree(psetassocsta_para);
return _FAIL;
}
init_h2fwcmd_w_parm_no_rsp(ph2c, psetassocsta_para, _SetAssocSta_CMD_);
ph2c->rsp = (u8 *)psetassocsta_rsp;
ph2c->rspsz = sizeof(struct set_assocsta_rsp);
memcpy(psetassocsta_para->addr, mac_addr, ETH_ALEN);
res = rtw_enqueue_cmd(pcmdpriv, ph2c);
exit:
return res;
}
u8 rtw_addbareq_cmd(struct adapter *padapter, u8 tid, u8 *addr)
{
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
@ -1250,57 +843,6 @@ exit:
return res;
}
u8 rtw_set_ch_cmd(struct adapter *padapter, u8 ch, u8 bw, u8 ch_offset, u8 enqueue)
{
struct cmd_obj *pcmdobj;
struct set_ch_parm *set_ch_parm;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
u8 res = _SUCCESS;
DBG_88E(FUNC_NDEV_FMT" ch:%u, bw:%u, ch_offset:%u\n",
FUNC_NDEV_ARG(padapter->pnetdev), ch, bw, ch_offset);
/* check input parameter */
/* prepare cmd parameter */
set_ch_parm = kzalloc(sizeof(*set_ch_parm), GFP_ATOMIC);
if (!set_ch_parm) {
res = _FAIL;
goto exit;
}
set_ch_parm->ch = ch;
set_ch_parm->bw = bw;
set_ch_parm->ch_offset = ch_offset;
if (enqueue) {
/* need enqueue, prepare cmd_obj and enqueue */
pcmdobj = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
if (!pcmdobj) {
kfree(set_ch_parm);
res = _FAIL;
goto exit;
}
init_h2fwcmd_w_parm_no_rsp(pcmdobj, set_ch_parm, GEN_CMD_CODE(_SetChannel));
res = rtw_enqueue_cmd(pcmdpriv, pcmdobj);
} else {
/* no need to enqueue, do the cmd hdl directly and free cmd parameter */
if (H2C_SUCCESS != set_ch_hdl(padapter, (u8 *)set_ch_parm))
res = _FAIL;
kfree(set_ch_parm);
}
/* do something based on res... */
exit:
DBG_88E(FUNC_NDEV_FMT" res:%u\n", FUNC_NDEV_ARG(padapter->pnetdev), res);
return res;
}
u8 rtw_set_chplan_cmd(struct adapter *padapter, u8 chplan, u8 enqueue)
{
struct cmd_obj *pcmdobj;
@ -1352,74 +894,6 @@ exit:
return res;
}
u8 rtw_led_blink_cmd(struct adapter *padapter, struct LED_871x *pLed)
{
struct cmd_obj *pcmdobj;
struct LedBlink_param *ledBlink_param;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
u8 res = _SUCCESS;
pcmdobj = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
if (!pcmdobj) {
res = _FAIL;
goto exit;
}
ledBlink_param = kzalloc(sizeof(struct LedBlink_param), GFP_ATOMIC);
if (!ledBlink_param) {
kfree(pcmdobj);
res = _FAIL;
goto exit;
}
ledBlink_param->pLed = pLed;
init_h2fwcmd_w_parm_no_rsp(pcmdobj, ledBlink_param, GEN_CMD_CODE(_LedBlink));
res = rtw_enqueue_cmd(pcmdpriv, pcmdobj);
exit:
return res;
}
u8 rtw_set_csa_cmd(struct adapter *padapter, u8 new_ch_no)
{
struct cmd_obj *pcmdobj;
struct SetChannelSwitch_param *setChannelSwitch_param;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
u8 res = _SUCCESS;
pcmdobj = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
if (!pcmdobj) {
res = _FAIL;
goto exit;
}
setChannelSwitch_param = kzalloc(sizeof(struct SetChannelSwitch_param),
GFP_ATOMIC);
if (!setChannelSwitch_param) {
kfree(pcmdobj);
res = _FAIL;
goto exit;
}
setChannelSwitch_param->new_ch_no = new_ch_no;
init_h2fwcmd_w_parm_no_rsp(pcmdobj, setChannelSwitch_param, GEN_CMD_CODE(_SetChannelSwitch));
res = rtw_enqueue_cmd(pcmdpriv, pcmdobj);
exit:
return res;
}
u8 rtw_tdls_cmd(struct adapter *padapter, u8 *addr, u8 option)
{
return _SUCCESS;
}
static void traffic_status_watchdog(struct adapter *padapter)
{
u8 bEnterPS;
@ -1486,17 +960,15 @@ static void dynamic_chk_wk_hdl(struct adapter *padapter, u8 *pbuf, int sz)
padapter = (struct adapter *)pbuf;
pmlmepriv = &padapter->mlmepriv;
#ifdef CONFIG_88EU_AP_MODE
if (check_fwstate(pmlmepriv, WIFI_AP_STATE))
expire_timeout_chk(padapter);
#endif
rtw_hal_sreset_xmit_status_check(padapter);
rtl8188e_sreset_xmit_status_check(padapter);
linked_status_chk(padapter);
traffic_status_watchdog(padapter);
rtw_hal_dm_watchdog(padapter);
rtl8188e_HalDmWatchDog(padapter);
}
static void lps_ctrl_wk_hdl(struct adapter *padapter, u8 lps_ctrl_type)
@ -1523,12 +995,12 @@ static void lps_ctrl_wk_hdl(struct adapter *padapter, u8 lps_ctrl_type)
mstatus = 1;/* connect */
/* Reset LPS Setting */
padapter->pwrctrlpriv.LpsIdleCount = 0;
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus));
SetHwReg8188EU(padapter, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus));
break;
case LPS_CTRL_DISCONNECT:
mstatus = 0;/* disconnect */
LPS_Leave(padapter);
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus));
SetHwReg8188EU(padapter, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus));
break;
case LPS_CTRL_SPECIAL_PACKET:
/* DBG_88E("LPS_CTRL_SPECIAL_PACKET\n"); */
@ -1588,7 +1060,7 @@ exit:
static void rpt_timer_setting_wk_hdl(struct adapter *padapter, u16 min_time)
{
rtw_hal_set_hwreg(padapter, HW_VAR_RPT_TIMER_SETTING, (u8 *)(&min_time));
SetHwReg8188EU(padapter, HW_VAR_RPT_TIMER_SETTING, (u8 *)(&min_time));
}
u8 rtw_rpt_timer_cfg_cmd(struct adapter *padapter, u16 min_time)
@ -1625,7 +1097,7 @@ exit:
static void antenna_select_wk_hdl(struct adapter *padapter, u8 antenna)
{
rtw_hal_set_hwreg(padapter, HW_VAR_ANTENNA_DIVERSITY_SELECT, (u8 *)(&antenna));
SetHwReg8188EU(padapter, HW_VAR_ANTENNA_DIVERSITY_SELECT, (u8 *)(&antenna));
}
u8 rtw_antenna_select_cmd(struct adapter *padapter, u8 antenna, u8 enqueue)
@ -1636,7 +1108,7 @@ u8 rtw_antenna_select_cmd(struct adapter *padapter, u8 antenna, u8 enqueue)
u8 support_ant_div;
u8 res = _SUCCESS;
rtw_hal_get_def_var(padapter, HAL_DEF_IS_SUPPORT_ANT_DIV, &support_ant_div);
GetHalDefVar8188EUsb(padapter, HAL_DEF_IS_SUPPORT_ANT_DIV, &support_ant_div);
if (!support_ant_div)
return res;
@ -1669,12 +1141,6 @@ exit:
return res;
}
static void power_saving_wk_hdl(struct adapter *padapter, u8 *pbuf, int sz)
{
rtw_ps_processor(padapter);
}
#ifdef CONFIG_88EU_P2P
u8 p2p_protocol_wk_cmd(struct adapter *padapter, int intCmdType)
{
struct cmd_obj *ph2c;
@ -1711,7 +1177,6 @@ exit:
return res;
}
#endif /* CONFIG_88EU_P2P */
u8 rtw_ps_cmd(struct adapter *padapter)
{
@ -1745,8 +1210,6 @@ exit:
return res;
}
#ifdef CONFIG_88EU_AP_MODE
static void rtw_chk_hi_queue_hdl(struct adapter *padapter)
{
int cnt = 0;
@ -1763,7 +1226,7 @@ static void rtw_chk_hi_queue_hdl(struct adapter *padapter)
/* while ((rtw_read32(padapter, 0x414)&0x00ffff00)!= 0) */
/* while ((rtw_read32(padapter, 0x414)&0x0000ff00)!= 0) */
rtw_hal_get_hwreg(padapter, HW_VAR_CHK_HI_QUEUE_EMPTY, &val);
GetHwReg8188EU(padapter, HW_VAR_CHK_HI_QUEUE_EMPTY, &val);
while (!val) {
msleep(100);
@ -1773,7 +1236,7 @@ static void rtw_chk_hi_queue_hdl(struct adapter *padapter)
if (cnt > 10)
break;
rtw_hal_get_hwreg(padapter, HW_VAR_CHK_HI_QUEUE_EMPTY, &val);
GetHwReg8188EU(padapter, HW_VAR_CHK_HI_QUEUE_EMPTY, &val);
}
if (cnt <= 10) {
@ -1817,7 +1280,6 @@ u8 rtw_chk_hi_queue_cmd(struct adapter *padapter)
exit:
return res;
}
#endif
u8 rtw_c2h_wk_cmd(struct adapter *padapter, u8 *c2h_evt)
{
@ -1852,29 +1314,12 @@ exit:
return res;
}
static s32 c2h_evt_hdl(struct adapter *adapter, struct c2h_evt_hdr *c2h_evt, c2h_id_filter filter)
static void c2h_evt_hdl(struct adapter *adapter, struct c2h_evt_hdr *c2h_evt, c2h_id_filter filter)
{
s32 ret = _FAIL;
u8 buf[16];
if (!c2h_evt) {
/* No c2h event in cmd_obj, read c2h event before handling*/
if (c2h_evt_read(adapter, buf) == _SUCCESS) {
c2h_evt = (struct c2h_evt_hdr *)buf;
if (filter && !filter(c2h_evt->id))
goto exit;
ret = rtw_hal_c2h_handler(adapter, c2h_evt);
}
} else {
if (filter && !filter(c2h_evt->id))
goto exit;
ret = rtw_hal_c2h_handler(adapter, c2h_evt);
}
exit:
return ret;
if (!c2h_evt)
c2h_evt_read(adapter, buf);
}
static void c2h_wk_callback(struct work_struct *work)
@ -1882,7 +1327,6 @@ static void c2h_wk_callback(struct work_struct *work)
struct evt_priv *evtpriv = container_of(work, struct evt_priv, c2h_wk);
struct adapter *adapter = container_of(evtpriv, struct adapter, evtpriv);
struct c2h_evt_hdr *c2h_evt;
c2h_id_filter ccx_id_filter = rtw_hal_c2h_id_filter_ccx(adapter);
evtpriv->c2h_wk_alive = true;
@ -1912,16 +1356,8 @@ static void c2h_wk_callback(struct work_struct *work)
continue;
}
if (ccx_id_filter(c2h_evt->id)) {
/* Handle CCX report here */
rtw_hal_c2h_handler(adapter, c2h_evt);
kfree(c2h_evt);
} else {
#ifdef CONFIG_88EU_P2P
/* Enqueue into cmd_thread for others */
rtw_c2h_wk_cmd(adapter, (u8 *)c2h_evt);
#endif
}
/* Enqueue into cmd_thread for others */
rtw_c2h_wk_cmd(adapter, (u8 *)c2h_evt);
}
evtpriv->c2h_wk_alive = false;
@ -1941,7 +1377,7 @@ u8 rtw_drvextra_cmd_hdl(struct adapter *padapter, unsigned char *pbuf)
dynamic_chk_wk_hdl(padapter, pdrvextra_cmd->pbuf, pdrvextra_cmd->type_size);
break;
case POWER_SAVING_CTRL_WK_CID:
power_saving_wk_hdl(padapter, pdrvextra_cmd->pbuf, pdrvextra_cmd->type_size);
rtw_ps_processor(padapter);
break;
case LPS_CTRL_WK_CID:
lps_ctrl_wk_hdl(padapter, (u8)pdrvextra_cmd->type_size);
@ -1952,7 +1388,6 @@ u8 rtw_drvextra_cmd_hdl(struct adapter *padapter, unsigned char *pbuf)
case ANT_SELECT_WK_CID:
antenna_select_wk_hdl(padapter, pdrvextra_cmd->type_size);
break;
#ifdef CONFIG_88EU_P2P
case P2P_PS_WK_CID:
p2p_ps_wk_hdl(padapter, pdrvextra_cmd->type_size);
break;
@ -1961,12 +1396,9 @@ u8 rtw_drvextra_cmd_hdl(struct adapter *padapter, unsigned char *pbuf)
/* I used the type_size as the type command */
p2p_protocol_wk_hdl(padapter, pdrvextra_cmd->type_size);
break;
#endif
#ifdef CONFIG_88EU_AP_MODE
case CHECK_HIQ_WK_CID:
rtw_chk_hi_queue_hdl(padapter);
break;
#endif /* CONFIG_88EU_AP_MODE */
case C2H_WK_CID:
c2h_evt_hdl(padapter, (struct c2h_evt_hdr *)pdrvextra_cmd->pbuf, NULL);
break;

904
drivers/staging/r8188eu/core/rtw_debug.c
View File

@ -1,904 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2012 Realtek Corporation. */
#define _RTW_DEBUG_C_
#include "../include/rtw_debug.h"
#include "../include/drv_types.h"
int proc_get_drv_version(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
int len = 0;
len += snprintf(page + len, count - len, "%s\n", DRIVERVERSION);
*eof = 1;
return len;
}
int proc_get_write_reg(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
*eof = 1;
return 0;
}
int proc_set_write_reg(struct file *file, const char __user *buffer,
unsigned long count, void *data)
{
struct net_device *dev = (struct net_device *)data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
char tmp[32];
u32 addr, val, len;
if (count < 3) {
DBG_88E("argument size is less than 3\n");
return -EFAULT;
}
if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) {
int num = sscanf(tmp, "%x %x %x", &addr, &val, &len);
if (num != 3) {
DBG_88E("invalid write_reg parameter!\n");
return count;
}
switch (len) {
case 1:
rtw_write8(padapter, addr, (u8)val);
break;
case 2:
rtw_write16(padapter, addr, (u16)val);
break;
case 4:
rtw_write32(padapter, addr, val);
break;
default:
DBG_88E("error write length =%d", len);
break;
}
}
return count;
}
static u32 proc_get_read_addr = 0xeeeeeeee;
static u32 proc_get_read_len = 0x4;
int proc_get_read_reg(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
if (proc_get_read_addr == 0xeeeeeeee) {
*eof = 1;
return len;
}
switch (proc_get_read_len) {
case 1:
len += snprintf(page + len, count - len, "rtw_read8(0x%x)=0x%x\n", proc_get_read_addr, rtw_read8(padapter, proc_get_read_addr));
break;
case 2:
len += snprintf(page + len, count - len, "rtw_read16(0x%x)=0x%x\n", proc_get_read_addr, rtw_read16(padapter, proc_get_read_addr));
break;
case 4:
len += snprintf(page + len, count - len, "rtw_read32(0x%x)=0x%x\n", proc_get_read_addr, rtw_read32(padapter, proc_get_read_addr));
break;
default:
len += snprintf(page + len, count - len, "error read length=%d\n", proc_get_read_len);
break;
}
*eof = 1;
return len;
}
int proc_set_read_reg(struct file *file, const char __user *buffer,
unsigned long count, void *data)
{
char tmp[16];
u32 addr, len;
if (count < 2) {
DBG_88E("argument size is less than 2\n");
return -EFAULT;
}
if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) {
int num = sscanf(tmp, "%x %x", &addr, &len);
if (num != 2) {
DBG_88E("invalid read_reg parameter!\n");
return count;
}
proc_get_read_addr = addr;
proc_get_read_len = len;
}
return count;
}
int proc_get_fwstate(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
int len = 0;
len += snprintf(page + len, count - len, "fwstate=0x%x\n", get_fwstate(pmlmepriv));
*eof = 1;
return len;
}
int proc_get_sec_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct security_priv *psecuritypriv = &padapter->securitypriv;
int len = 0;
len += snprintf(page + len, count - len, "auth_alg=0x%x, enc_alg=0x%x, auth_type=0x%x, enc_type=0x%x\n",
psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm,
psecuritypriv->ndisauthtype, psecuritypriv->ndisencryptstatus);
*eof = 1;
return len;
}
int proc_get_mlmext_state(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
int len = 0;
len += snprintf(page + len, count - len, "pmlmeinfo->state=0x%x\n", pmlmeinfo->state);
*eof = 1;
return len;
}
int proc_get_qos_option(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
int len = 0;
len += snprintf(page + len, count - len, "qos_option=%d\n", pmlmepriv->qospriv.qos_option);
*eof = 1;
return len;
}
int proc_get_ht_option(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
int len = 0;
len += snprintf(page + len, count - len, "ht_option=%d\n", pmlmepriv->htpriv.ht_option);
*eof = 1;
return len;
}
int proc_get_rf_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
int len = 0;
len += snprintf(page + len, count - len, "cur_ch=%d, cur_bw=%d, cur_ch_offet=%d\n",
pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset);
*eof = 1;
return len;
}
int proc_get_ap_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct sta_info *psta;
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct wlan_network *cur_network = &pmlmepriv->cur_network;
struct sta_priv *pstapriv = &padapter->stapriv;
int len = 0;
psta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress);
if (psta) {
int i;
struct recv_reorder_ctrl *preorder_ctrl;
len += snprintf(page + len, count - len, "SSID=%s\n", cur_network->network.Ssid.Ssid);
len += snprintf(page + len, count - len, "sta's macaddr:%pM\n", psta->hwaddr);
len += snprintf(page + len, count - len, "cur_channel=%d, cur_bwmode=%d, cur_ch_offset=%d\n", pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset);
len += snprintf(page + len, count - len, "rtsen=%d, cts2slef=%d\n", psta->rtsen, psta->cts2self);
len += snprintf(page + len, count - len, "state=0x%x, aid=%d, macid=%d, raid=%d\n", psta->state, psta->aid, psta->mac_id, psta->raid);
len += snprintf(page + len, count - len, "qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate);
len += snprintf(page + len, count - len, "bwmode=%d, ch_offset=%d, sgi=%d\n", psta->htpriv.bwmode, psta->htpriv.ch_offset, psta->htpriv.sgi);
len += snprintf(page + len, count - len, "ampdu_enable = %d\n", psta->htpriv.ampdu_enable);
len += snprintf(page + len, count - len, "agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap);
for (i = 0; i < 16; i++) {
preorder_ctrl = &psta->recvreorder_ctrl[i];
if (preorder_ctrl->enable)
len += snprintf(page + len, count - len, "tid=%d, indicate_seq=%d\n", i, preorder_ctrl->indicate_seq);
}
} else {
len += snprintf(page + len, count - len, "can't get sta's macaddr, cur_network's macaddr: %pM\n", cur_network->network.MacAddress);
}
*eof = 1;
return len;
}
int proc_get_adapter_state(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
len += snprintf(page + len, count - len, "bSurpriseRemoved=%d, bDriverStopped=%d\n",
padapter->bSurpriseRemoved, padapter->bDriverStopped);
*eof = 1;
return len;
}
int proc_get_trx_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct recv_priv *precvpriv = &padapter->recvpriv;
int len = 0;
len += snprintf(page + len, count - len, "free_xmitbuf_cnt=%d, free_xmitframe_cnt=%d, free_ext_xmitbuf_cnt=%d, free_recvframe_cnt=%d\n",
pxmitpriv->free_xmitbuf_cnt, pxmitpriv->free_xmitframe_cnt, pxmitpriv->free_xmit_extbuf_cnt, precvpriv->free_recvframe_cnt);
len += snprintf(page + len, count - len, "rx_urb_pending_cn=%d\n", precvpriv->rx_pending_cnt);
*eof = 1;
return len;
}
int proc_get_mac_reg_dump1(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
int i, j = 1;
len += snprintf(page + len, count - len, "\n======= MAC REG =======\n");
for (i = 0x0; i < 0x300; i += 4) {
if (j % 4 == 1)
len += snprintf(page + len, count - len, "0x%02x", i);
len += snprintf(page + len, count - len, " 0x%08x ", rtw_read32(padapter, i));
if ((j++) % 4 == 0)
len += snprintf(page + len, count - len, "\n");
}
*eof = 1;
return len;
}
int proc_get_mac_reg_dump2(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
int i, j = 1;
len += snprintf(page + len, count - len, "\n======= MAC REG =======\n");
memset(page, 0, count);
for (i = 0x300; i < 0x600; i += 4) {
if (j % 4 == 1)
len += snprintf(page + len, count - len, "0x%02x", i);
len += snprintf(page + len, count - len, " 0x%08x ", rtw_read32(padapter, i));
if ((j++) % 4 == 0)
len += snprintf(page + len, count - len, "\n");
}
*eof = 1;
return len;
}
int proc_get_mac_reg_dump3(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
int i, j = 1;
len += snprintf(page + len, count - len, "\n======= MAC REG =======\n");
for (i = 0x600; i < 0x800; i += 4) {
if (j % 4 == 1)
len += snprintf(page + len, count - len, "0x%02x", i);
len += snprintf(page + len, count - len, " 0x%08x ", rtw_read32(padapter, i));
if ((j++) % 4 == 0)
len += snprintf(page + len, count - len, "\n");
}
*eof = 1;
return len;
}
int proc_get_bb_reg_dump1(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
int i, j = 1;
len += snprintf(page + len, count - len, "\n======= BB REG =======\n");
for (i = 0x800; i < 0xB00; i += 4) {
if (j % 4 == 1)
len += snprintf(page + len, count - len, "0x%02x", i);
len += snprintf(page + len, count - len, " 0x%08x ", rtw_read32(padapter, i));
if ((j++) % 4 == 0)
len += snprintf(page + len, count - len, "\n");
}
*eof = 1;
return len;
}
int proc_get_bb_reg_dump2(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
int i, j = 1;
len += snprintf(page + len, count - len, "\n======= BB REG =======\n");
for (i = 0xB00; i < 0xE00; i += 4) {
if (j % 4 == 1)
len += snprintf(page + len, count - len, "0x%02x", i);
len += snprintf(page + len, count - len, " 0x%08x ", rtw_read32(padapter, i));
if ((j++) % 4 == 0)
len += snprintf(page + len, count - len, "\n");
}
*eof = 1;
return len;
}
int proc_get_bb_reg_dump3(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
int i, j = 1;
len += snprintf(page + len, count - len, "\n======= BB REG =======\n");
for (i = 0xE00; i < 0x1000; i += 4) {
if (j % 4 == 1)
len += snprintf(page + len, count - len, "0x%02x", i);
len += snprintf(page + len, count - len, " 0x%08x ", rtw_read32(padapter, i));
if ((j++) % 4 == 0)
len += snprintf(page + len, count - len, "\n");
}
*eof = 1;
return len;
}
int proc_get_rf_reg_dump1(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
int i, j = 1, path;
u32 value;
len += snprintf(page + len, count - len, "\n======= RF REG =======\n");
path = 1;
len += snprintf(page + len, count - len, "\nRF_Path(%x)\n", path);
for (i = 0; i < 0xC0; i++) {
value = rtw_hal_read_rfreg(padapter, path, i, 0xffffffff);
if (j % 4 == 1)
len += snprintf(page + len, count - len, "0x%02x ", i);
len += snprintf(page + len, count - len, " 0x%08x ", value);
if ((j++) % 4 == 0)
len += snprintf(page + len, count - len, "\n");
}
*eof = 1;
return len;
}
int proc_get_rf_reg_dump2(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
int i, j = 1, path;
u32 value;
len += snprintf(page + len, count - len, "\n======= RF REG =======\n");
path = 1;
len += snprintf(page + len, count - len, "\nRF_Path(%x)\n", path);
for (i = 0xC0; i < 0x100; i++) {
value = rtw_hal_read_rfreg(padapter, path, i, 0xffffffff);
if (j % 4 == 1)
len += snprintf(page + len, count - len, "0x%02x ", i);
len += snprintf(page + len, count - len, " 0x%08x ", value);
if ((j++) % 4 == 0)
len += snprintf(page + len, count - len, "\n");
}
*eof = 1;
return len;
}
int proc_get_rf_reg_dump3(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
int i, j = 1, path;
u32 value;
len += snprintf(page + len, count - len, "\n======= RF REG =======\n");
path = 2;
len += snprintf(page + len, count - len, "\nRF_Path(%x)\n", path);
for (i = 0; i < 0xC0; i++) {
value = rtw_hal_read_rfreg(padapter, path, i, 0xffffffff);
if (j % 4 == 1)
len += snprintf(page + len, count - len, "0x%02x ", i);
len += snprintf(page + len, count - len, " 0x%08x ", value);
if ((j++) % 4 == 0)
len += snprintf(page + len, count - len, "\n");
}
*eof = 1;
return len;
}
int proc_get_rf_reg_dump4(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
int i, j = 1, path;
u32 value;
len += snprintf(page + len, count - len, "\n======= RF REG =======\n");
path = 2;
len += snprintf(page + len, count - len, "\nRF_Path(%x)\n", path);
for (i = 0xC0; i < 0x100; i++) {
value = rtw_hal_read_rfreg(padapter, path, i, 0xffffffff);
if (j % 4 == 1)
len += snprintf(page + len, count - len, "0x%02x ", i);
len += snprintf(page + len, count - len, " 0x%08x ", value);
if ((j++) % 4 == 0)
len += snprintf(page + len, count - len, "\n");
}
*eof = 1;
return len;
}
int proc_get_rx_signal(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
len = snprintf(page + len, count,
"rssi:%d\n"
"rxpwdb:%d\n"
"signal_strength:%u\n"
"signal_qual:%u\n"
"noise:%u\n",
padapter->recvpriv.rssi,
padapter->recvpriv.rxpwdb,
padapter->recvpriv.signal_strength,
padapter->recvpriv.signal_qual,
padapter->recvpriv.noise
);
*eof = 1;
return len;
}
int proc_set_rx_signal(struct file *file, const char __user *buffer,
unsigned long count, void *data)
{
struct net_device *dev = (struct net_device *)data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
char tmp[32];
u32 is_signal_dbg;
s32 signal_strength;
if (count < 1)
return -EFAULT;
if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) {
int num = sscanf(tmp, "%u %u", &is_signal_dbg, &signal_strength);
is_signal_dbg = is_signal_dbg == 0 ? 0 : 1;
if (is_signal_dbg && num != 2)
return count;
signal_strength = signal_strength > 100 ? 100 : signal_strength;
signal_strength = signal_strength < 0 ? 0 : signal_strength;
padapter->recvpriv.is_signal_dbg = is_signal_dbg;
padapter->recvpriv.signal_strength_dbg = signal_strength;
if (is_signal_dbg)
DBG_88E("set %s %u\n", "DBG_SIGNAL_STRENGTH", signal_strength);
else
DBG_88E("set %s\n", "HW_SIGNAL_STRENGTH");
}
return count;
}
int proc_get_ht_enable(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct registry_priv *pregpriv = &padapter->registrypriv;
int len = 0;
if (pregpriv)
len += snprintf(page + len, count - len,
"%d\n",
pregpriv->ht_enable
);
*eof = 1;
return len;
}
int proc_set_ht_enable(struct file *file, const char __user *buffer,
unsigned long count, void *data)
{
struct net_device *dev = (struct net_device *)data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct registry_priv *pregpriv = &padapter->registrypriv;
char tmp[32];
s32 mode = 0;
if (count < 1)
return -EFAULT;
if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) {
if (pregpriv) {
pregpriv->ht_enable = mode;
pr_info("ht_enable=%d\n", pregpriv->ht_enable);
}
}
return count;
}
int proc_get_cbw40_enable(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct registry_priv *pregpriv = &padapter->registrypriv;
int len = 0;
if (pregpriv)
len += snprintf(page + len, count - len,
"%d\n",
pregpriv->cbw40_enable
);
*eof = 1;
return len;
}
int proc_set_cbw40_enable(struct file *file, const char __user *buffer,
unsigned long count, void *data)
{
struct net_device *dev = (struct net_device *)data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct registry_priv *pregpriv = &padapter->registrypriv;
char tmp[32];
s32 mode = 0;
if (count < 1)
return -EFAULT;
if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) {
if (pregpriv) {
pregpriv->cbw40_enable = mode;
pr_info("cbw40_enable=%d\n", mode);
}
}
return count;
}
int proc_get_ampdu_enable(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct registry_priv *pregpriv = &padapter->registrypriv;
int len = 0;
if (pregpriv)
len += snprintf(page + len, count - len,
"%d\n",
pregpriv->ampdu_enable
);
*eof = 1;
return len;
}
int proc_set_ampdu_enable(struct file *file, const char __user *buffer,
unsigned long count, void *data)
{
struct net_device *dev = (struct net_device *)data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct registry_priv *pregpriv = &padapter->registrypriv;
char tmp[32];
s32 mode = 0;
if (count < 1)
return -EFAULT;
if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) {
if (pregpriv) {
pregpriv->ampdu_enable = mode;
pr_info("ampdu_enable=%d\n", mode);
}
}
return count;
}
int proc_get_two_path_rssi(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
if (padapter)
len += snprintf(page + len, count - len,
"%d %d\n",
padapter->recvpriv.RxRssi[0],
padapter->recvpriv.RxRssi[1]
);
*eof = 1;
return len;
}
int proc_get_rx_stbc(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct registry_priv *pregpriv = &padapter->registrypriv;
int len = 0;
if (pregpriv)
len += snprintf(page + len, count - len,
"%d\n",
pregpriv->rx_stbc
);
*eof = 1;
return len;
}
int proc_set_rx_stbc(struct file *file, const char __user *buffer,
unsigned long count, void *data)
{
struct net_device *dev = (struct net_device *)data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct registry_priv *pregpriv = &padapter->registrypriv;
char tmp[32];
u32 mode = 0;
if (count < 1)
return -EFAULT;
if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) {
if (pregpriv) {
pregpriv->rx_stbc = mode;
printk("rx_stbc=%d\n", mode);
}
}
return count;
}
int proc_get_rssi_disp(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
*eof = 1;
return 0;
}
int proc_set_rssi_disp(struct file *file, const char __user *buffer,
unsigned long count, void *data)
{
struct net_device *dev = (struct net_device *)data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
char tmp[32];
u32 enable = 0;
if (count < 1) {
DBG_88E("argument size is less than 1\n");
return -EFAULT;
}
if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) {
int num = sscanf(tmp, "%x", &enable);
if (num != 1) {
DBG_88E("invalid set_rssi_disp parameter!\n");
return count;
}
if (enable) {
DBG_88E("Turn On Rx RSSI Display Function\n");
padapter->bRxRSSIDisplay = enable;
} else {
DBG_88E("Turn Off Rx RSSI Display Function\n");
padapter->bRxRSSIDisplay = 0;
}
}
return count;
}
#ifdef CONFIG_88EU_AP_MODE
int proc_get_all_sta_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct sta_info *psta;
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct sta_priv *pstapriv = &padapter->stapriv;
int i, j;
struct list_head *plist, *phead;
struct recv_reorder_ctrl *preorder_ctrl;
int len = 0;
len += snprintf(page + len, count - len, "sta_dz_bitmap=0x%x, tim_bitmap=0x%x\n", pstapriv->sta_dz_bitmap, pstapriv->tim_bitmap);
spin_lock_bh(&pstapriv->sta_hash_lock);
for (i = 0; i < NUM_STA; i++) {
phead = &pstapriv->sta_hash[i];
plist = phead->next;
while (phead != plist) {
psta = container_of(plist, struct sta_info, hash_list);
plist = plist->next;
len += snprintf(page + len, count - len, "sta's macaddr: %pM\n", psta->hwaddr);
len += snprintf(page + len, count - len, "rtsen=%d, cts2slef=%d\n", psta->rtsen, psta->cts2self);
len += snprintf(page + len, count - len, "state=0x%x, aid=%d, macid=%d, raid=%d\n", psta->state, psta->aid, psta->mac_id, psta->raid);
len += snprintf(page + len, count - len, "qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate);
len += snprintf(page + len, count - len, "bwmode=%d, ch_offset=%d, sgi=%d\n", psta->htpriv.bwmode, psta->htpriv.ch_offset, psta->htpriv.sgi);
len += snprintf(page + len, count - len, "ampdu_enable = %d\n", psta->htpriv.ampdu_enable);
len += snprintf(page + len, count - len, "agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap);
len += snprintf(page + len, count - len, "sleepq_len=%d\n", psta->sleepq_len);
len += snprintf(page + len, count - len, "capability=0x%x\n", psta->capability);
len += snprintf(page + len, count - len, "flags=0x%x\n", psta->flags);
len += snprintf(page + len, count - len, "wpa_psk=0x%x\n", psta->wpa_psk);
len += snprintf(page + len, count - len, "wpa2_group_cipher=0x%x\n", psta->wpa2_group_cipher);
len += snprintf(page + len, count - len, "wpa2_pairwise_cipher=0x%x\n", psta->wpa2_pairwise_cipher);
len += snprintf(page + len, count - len, "qos_info=0x%x\n", psta->qos_info);
len += snprintf(page + len, count - len, "dot118021XPrivacy=0x%x\n", psta->dot118021XPrivacy);
for (j = 0; j < 16; j++) {
preorder_ctrl = &psta->recvreorder_ctrl[j];
if (preorder_ctrl->enable)
len += snprintf(page + len, count - len, "tid=%d, indicate_seq=%d\n", j, preorder_ctrl->indicate_seq);
}
}
}
spin_unlock_bh(&pstapriv->sta_hash_lock);
*eof = 1;
return len;
}
#endif
int proc_get_best_channel(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
int len = 0;
u32 i, best_channel_24G = 1, index_24G = 0;
for (i = 0; pmlmeext->channel_set[i].ChannelNum != 0; i++) {
if (pmlmeext->channel_set[i].ChannelNum == 1)
index_24G = i;
}
for (i = 0; pmlmeext->channel_set[i].ChannelNum != 0; i++) {
/* 2.4G */
if (pmlmeext->channel_set[i].ChannelNum == 6) {
if (pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_24G].rx_count) {
index_24G = i;
best_channel_24G = pmlmeext->channel_set[i].ChannelNum;
}
}
/* debug */
len += snprintf(page + len, count - len, "The rx cnt of channel %3d = %d\n",
pmlmeext->channel_set[i].ChannelNum, pmlmeext->channel_set[i].rx_count);
}
len += snprintf(page + len, count - len, "best_channel_24G = %d\n", best_channel_24G);
*eof = 1;
return len;
}

582
drivers/staging/r8188eu/core/rtw_efuse.c
View File

@ -25,13 +25,10 @@ u8 fakeBTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN] = {0};
u8 fakeBTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN] = {0};
/*------------------------Define local variable------------------------------*/
/* */
#define REG_EFUSE_CTRL 0x0030
#define EFUSE_CTRL REG_EFUSE_CTRL /* E-Fuse Control. */
/* */
static bool Efuse_Read1ByteFromFakeContent(struct adapter *pAdapter,
u16 Offset,
u8 *Value)
static bool Efuse_Read1ByteFromFakeContent(u16 Offset, u8 *Value)
{
if (Offset >= EFUSE_MAX_HW_SIZE)
return false;
@ -58,62 +55,6 @@ Efuse_Write1ByteToFakeContent(
return true;
}
/*-----------------------------------------------------------------------------
* Function: Efuse_PowerSwitch
*
* Overview: When we want to enable write operation, we should change to
* pwr on state. When we stop write, we should switch to 500k mode
* and disable LDO 2.5V.
*
* Input: NONE
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 11/17/2008 MHC Create Version 0.
*
*---------------------------------------------------------------------------*/
void
Efuse_PowerSwitch(
struct adapter *pAdapter,
u8 write,
u8 PwrState)
{
pAdapter->HalFunc.EfusePowerSwitch(pAdapter, write, PwrState);
}
/*-----------------------------------------------------------------------------
* Function: efuse_GetCurrentSize
*
* Overview: Get current efuse size!!!
*
* Input: NONE
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 11/16/2008 MHC Create Version 0.
*
*---------------------------------------------------------------------------*/
u16
Efuse_GetCurrentSize(
struct adapter *pAdapter,
u8 efuseType,
bool pseudo)
{
u16 ret = 0;
ret = pAdapter->HalFunc.EfuseGetCurrentSize(pAdapter, efuseType, pseudo);
return ret;
}
/* 11/16/2008 MH Add description. Get current efuse area enabled word!!. */
u8
Efuse_CalculateWordCnts(u8 word_en)
@ -153,7 +94,7 @@ ReadEFuseByte(
u16 retry;
if (pseudo) {
Efuse_Read1ByteFromFakeContent(Adapter, _offset, pbuf);
Efuse_Read1ByteFromFakeContent(_offset, pbuf);
return;
}
@ -184,93 +125,6 @@ ReadEFuseByte(
*pbuf = (u8)(value32 & 0xff);
}
/* */
/* Description: */
/* 1. Execute E-Fuse read byte operation according as map offset and */
/* save to E-Fuse table. */
/* 2. Referred from SD1 Richard. */
/* */
/* Assumption: */
/* 1. Boot from E-Fuse and successfully auto-load. */
/* 2. PASSIVE_LEVEL (USB interface) */
/* */
/* Created by Roger, 2008.10.21. */
/* */
/* 2008/12/12 MH 1. Reorganize code flow and reserve bytes. and add description. */
/* 2. Add efuse utilization collect. */
/* 2008/12/22 MH Read Efuse must check if we write section 1 data again!!! Sec1 */
/* write addr must be after sec5. */
/* */
static void efuse_ReadEFuse(struct adapter *Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, bool pseudo)
{
Adapter->HalFunc.ReadEFuse(Adapter, efuseType, _offset, _size_byte, pbuf, pseudo);
}
void EFUSE_GetEfuseDefinition(struct adapter *pAdapter, u8 efuseType, u8 type, void *pOut, bool pseudo
)
{
pAdapter->HalFunc.EFUSEGetEfuseDefinition(pAdapter, efuseType, type, pOut, pseudo);
}
/*-----------------------------------------------------------------------------
* Function: EFUSE_Read1Byte
*
* Overview: Copy from WMAC fot EFUSE read 1 byte.
*
* Input: NONE
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 09/23/2008 MHC Copy from WMAC.
*
*---------------------------------------------------------------------------*/
u8 EFUSE_Read1Byte(struct adapter *Adapter, u16 Address)
{
u8 data;
u8 Bytetemp = {0x00};
u8 temp = {0x00};
u32 k = 0;
u16 contentLen = 0;
EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI, TYPE_EFUSE_REAL_CONTENT_LEN, (void *)&contentLen, false);
if (Address < contentLen) { /* E-fuse 512Byte */
/* Write E-fuse Register address bit0~7 */
temp = Address & 0xFF;
rtw_write8(Adapter, EFUSE_CTRL + 1, temp);
Bytetemp = rtw_read8(Adapter, EFUSE_CTRL + 2);
/* Write E-fuse Register address bit8~9 */
temp = ((Address >> 8) & 0x03) | (Bytetemp & 0xFC);
rtw_write8(Adapter, EFUSE_CTRL + 2, temp);
/* Write 0x30[31]= 0 */
Bytetemp = rtw_read8(Adapter, EFUSE_CTRL + 3);
temp = Bytetemp & 0x7F;
rtw_write8(Adapter, EFUSE_CTRL + 3, temp);
/* Wait Write-ready (0x30[31]= 1) */
Bytetemp = rtw_read8(Adapter, EFUSE_CTRL + 3);
while (!(Bytetemp & 0x80)) {
Bytetemp = rtw_read8(Adapter, EFUSE_CTRL + 3);
k++;
if (k == 1000) {
k = 0;
break;
}
}
data = rtw_read8(Adapter, EFUSE_CTRL);
return data;
} else {
return 0xFF;
}
} /* EFUSE_Read1Byte */
/* 11/16/2008 MH Read one byte from real Efuse. */
u8 efuse_OneByteRead(struct adapter *pAdapter, u16 addr, u8 *data, bool pseudo)
{
@ -278,7 +132,7 @@ u8 efuse_OneByteRead(struct adapter *pAdapter, u16 addr, u8 *data, bool pseudo)
u8 result;
if (pseudo) {
result = Efuse_Read1ByteFromFakeContent(pAdapter, addr, data);
result = Efuse_Read1ByteFromFakeContent(addr, data);
return result;
}
/* -----------------e-fuse reg ctrl --------------------------------- */
@ -333,33 +187,6 @@ u8 efuse_OneByteWrite(struct adapter *pAdapter, u16 addr, u8 data, bool pseudo)
return result;
}
int Efuse_PgPacketRead(struct adapter *pAdapter, u8 offset, u8 *data, bool pseudo)
{
int ret = 0;
ret = pAdapter->HalFunc.Efuse_PgPacketRead(pAdapter, offset, data, pseudo);
return ret;
}
int Efuse_PgPacketWrite(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *data, bool pseudo)
{
int ret;
ret = pAdapter->HalFunc.Efuse_PgPacketWrite(pAdapter, offset, word_en, data, pseudo);
return ret;
}
static int Efuse_PgPacketWrite_BT(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *data, bool pseudo)
{
int ret;
ret = pAdapter->HalFunc.Efuse_PgPacketWrite_BT(pAdapter, offset, word_en, data, pseudo);
return ret;
}
/*-----------------------------------------------------------------------------
* Function: efuse_WordEnableDataRead
*
@ -397,368 +224,6 @@ void efuse_WordEnableDataRead(u8 word_en, u8 *sourdata, u8 *targetdata)
}
}
u8 Efuse_WordEnableDataWrite(struct adapter *pAdapter, u16 efuse_addr, u8 word_en, u8 *data, bool pseudo)
{
u8 ret = 0;
ret = pAdapter->HalFunc.Efuse_WordEnableDataWrite(pAdapter, efuse_addr, word_en, data, pseudo);
return ret;
}
static u8 efuse_read8(struct adapter *padapter, u16 address, u8 *value)
{
return efuse_OneByteRead(padapter, address, value, false);
}
static u8 efuse_write8(struct adapter *padapter, u16 address, u8 *value)
{
return efuse_OneByteWrite(padapter, address, *value, false);
}
/*
* read/wirte raw efuse data
*/
u8 rtw_efuse_access(struct adapter *padapter, u8 write, u16 start_addr, u16 cnts, u8 *data)
{
int i = 0;
u16 real_content_len = 0, max_available_size = 0;
u8 res = _FAIL;
u8 (*rw8)(struct adapter *, u16, u8*);
EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_REAL_CONTENT_LEN, (void *)&real_content_len, false);
EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_available_size, false);
if (start_addr > real_content_len)
return _FAIL;
if (write) {
if ((start_addr + cnts) > max_available_size)
return _FAIL;
rw8 = &efuse_write8;
} else {
rw8 = &efuse_read8;
}
Efuse_PowerSwitch(padapter, write, true);
/* e-fuse one byte read / write */
for (i = 0; i < cnts; i++) {
if (start_addr >= real_content_len) {
res = _FAIL;
break;
}
res = rw8(padapter, start_addr++, data++);
if (_FAIL == res)
break;
}
Efuse_PowerSwitch(padapter, write, false);
return res;
}
/* */
u16 efuse_GetMaxSize(struct adapter *padapter)
{
u16 max_size;
EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_size, false);
return max_size;
}
/* */
u8 efuse_GetCurrentSize(struct adapter *padapter, u16 *size)
{
Efuse_PowerSwitch(padapter, false, true);
*size = Efuse_GetCurrentSize(padapter, EFUSE_WIFI, false);
Efuse_PowerSwitch(padapter, false, false);
return _SUCCESS;
}
/* */
u8 rtw_efuse_map_read(struct adapter *padapter, u16 addr, u16 cnts, u8 *data)
{
u16 mapLen = 0;
EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, false);
if ((addr + cnts) > mapLen)
return _FAIL;
Efuse_PowerSwitch(padapter, false, true);
efuse_ReadEFuse(padapter, EFUSE_WIFI, addr, cnts, data, false);
Efuse_PowerSwitch(padapter, false, false);
return _SUCCESS;
}
u8 rtw_BT_efuse_map_read(struct adapter *padapter, u16 addr, u16 cnts, u8 *data)
{
u16 mapLen = 0;
EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, false);
if ((addr + cnts) > mapLen)
return _FAIL;
Efuse_PowerSwitch(padapter, false, true);
efuse_ReadEFuse(padapter, EFUSE_BT, addr, cnts, data, false);
Efuse_PowerSwitch(padapter, false, false);
return _SUCCESS;
}
/* */
u8 rtw_efuse_map_write(struct adapter *padapter, u16 addr, u16 cnts, u8 *data)
{
u8 offset, word_en;
u8 *map;
u8 newdata[PGPKT_DATA_SIZE + 1];
s32 i, idx;
u8 ret = _SUCCESS;
u16 mapLen = 0;
EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, false);
if ((addr + cnts) > mapLen)
return _FAIL;
map = kzalloc(mapLen, GFP_KERNEL);
if (!map)
return _FAIL;
ret = rtw_efuse_map_read(padapter, 0, mapLen, map);
if (ret == _FAIL)
goto exit;
Efuse_PowerSwitch(padapter, true, true);
offset = (addr >> 3);
word_en = 0xF;
memset(newdata, 0xFF, PGPKT_DATA_SIZE + 1);
i = addr & 0x7; /* index of one package */
idx = 0; /* data index */
if (i & 0x1) {
/* odd start */
if (data[idx] != map[addr + idx]) {
word_en &= ~BIT(i >> 1);
newdata[i - 1] = map[addr + idx - 1];
newdata[i] = data[idx];
}
i++;
idx++;
}
do {
for (; i < PGPKT_DATA_SIZE; i += 2) {
if (cnts == idx)
break;
if ((cnts - idx) == 1) {
if (data[idx] != map[addr + idx]) {
word_en &= ~BIT(i >> 1);
newdata[i] = data[idx];
newdata[i + 1] = map[addr + idx + 1];
}
idx++;
break;
} else {
if ((data[idx] != map[addr + idx]) ||
(data[idx + 1] != map[addr + idx + 1])) {
word_en &= ~BIT(i >> 1);
newdata[i] = data[idx];
newdata[i + 1] = data[idx + 1];
}
idx += 2;
}
if (idx == cnts)
break;
}
if (word_en != 0xF) {
ret = Efuse_PgPacketWrite(padapter, offset, word_en, newdata, false);
DBG_88E("offset=%x\n", offset);
DBG_88E("word_en=%x\n", word_en);
for (i = 0; i < PGPKT_DATA_SIZE; i++)
DBG_88E("data=%x \t", newdata[i]);
if (ret == _FAIL)
break;
}
if (idx == cnts)
break;
offset++;
i = 0;
word_en = 0xF;
memset(newdata, 0xFF, PGPKT_DATA_SIZE);
} while (1);
Efuse_PowerSwitch(padapter, true, false);
exit:
kfree(map);
return ret;
}
/* */
u8 rtw_BT_efuse_map_write(struct adapter *padapter, u16 addr, u16 cnts, u8 *data)
{
u8 offset, word_en;
u8 *map;
u8 newdata[PGPKT_DATA_SIZE + 1];
s32 i, idx;
u8 ret = _SUCCESS;
u16 mapLen = 0;
EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, false);
if ((addr + cnts) > mapLen)
return _FAIL;
map = kzalloc(mapLen, GFP_KERNEL);
if (!map)
return _FAIL;
ret = rtw_BT_efuse_map_read(padapter, 0, mapLen, map);
if (ret == _FAIL)
goto exit;
Efuse_PowerSwitch(padapter, true, true);
offset = (addr >> 3);
word_en = 0xF;
memset(newdata, 0xFF, PGPKT_DATA_SIZE + 1);
i = addr & 0x7; /* index of one package */
idx = 0; /* data index */
if (i & 0x1) {
/* odd start */
if (data[idx] != map[addr + idx]) {
word_en &= ~BIT(i >> 1);
newdata[i - 1] = map[addr + idx - 1];
newdata[i] = data[idx];
}
i++;
idx++;
}
do {
for (; i < PGPKT_DATA_SIZE; i += 2) {
if (cnts == idx)
break;
if ((cnts - idx) == 1) {
if (data[idx] != map[addr + idx]) {
word_en &= ~BIT(i >> 1);
newdata[i] = data[idx];
newdata[i + 1] = map[addr + idx + 1];
}
idx++;
break;
} else {
if ((data[idx] != map[addr + idx]) ||
(data[idx + 1] != map[addr + idx + 1])) {
word_en &= ~BIT(i >> 1);
newdata[i] = data[idx];
newdata[i + 1] = data[idx + 1];
}
idx += 2;
}
if (idx == cnts)
break;
}
if (word_en != 0xF) {
DBG_88E("%s: offset=%#X\n", __func__, offset);
DBG_88E("%s: word_en=%#X\n", __func__, word_en);
DBG_88E("%s: data=", __func__);
for (i = 0; i < PGPKT_DATA_SIZE; i++)
DBG_88E("0x%02X ", newdata[i]);
DBG_88E("\n");
ret = Efuse_PgPacketWrite_BT(padapter, offset, word_en, newdata, false);
if (ret == _FAIL)
break;
}
if (idx == cnts)
break;
offset++;
i = 0;
word_en = 0xF;
memset(newdata, 0xFF, PGPKT_DATA_SIZE);
} while (1);
Efuse_PowerSwitch(padapter, true, false);
exit:
kfree(map);
return ret;
}
/*-----------------------------------------------------------------------------
* Function: efuse_ShadowRead1Byte
* efuse_ShadowRead2Byte
* efuse_ShadowRead4Byte
*
* Overview: Read from efuse init map by one/two/four bytes !!!!!
*
* Input: NONE
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 11/12/2008 MHC Create Version 0.
*
*---------------------------------------------------------------------------*/
static void
efuse_ShadowRead1Byte(
struct adapter *pAdapter,
u16 Offset,
u8 *Value)
{
struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter);
*Value = pEEPROM->efuse_eeprom_data[Offset];
} /* EFUSE_ShadowRead1Byte */
/* Read Two Bytes */
static void
efuse_ShadowRead2Byte(
struct adapter *pAdapter,
u16 Offset,
u16 *Value)
{
struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter);
*Value = pEEPROM->efuse_eeprom_data[Offset];
*Value |= pEEPROM->efuse_eeprom_data[Offset + 1] << 8;
} /* EFUSE_ShadowRead2Byte */
/* Read Four Bytes */
static void
efuse_ShadowRead4Byte(
struct adapter *pAdapter,
u16 Offset,
u32 *Value)
{
struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter);
*Value = pEEPROM->efuse_eeprom_data[Offset];
*Value |= pEEPROM->efuse_eeprom_data[Offset + 1] << 8;
*Value |= pEEPROM->efuse_eeprom_data[Offset + 2] << 16;
*Value |= pEEPROM->efuse_eeprom_data[Offset + 3] << 24;
} /* efuse_ShadowRead4Byte */
/*-----------------------------------------------------------------------------
* Function: Efuse_ReadAllMap
*
@ -779,13 +244,13 @@ static void Efuse_ReadAllMap(struct adapter *pAdapter, u8 efuseType, u8 *Efuse,
{
u16 mapLen = 0;
Efuse_PowerSwitch(pAdapter, false, true);
rtl8188e_EfusePowerSwitch(pAdapter, false, true);
EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, pseudo);
rtl8188e_EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, pseudo);
efuse_ReadEFuse(pAdapter, efuseType, 0, mapLen, Efuse, pseudo);
rtl8188e_ReadEFuse(pAdapter, efuseType, 0, mapLen, Efuse, pseudo);
Efuse_PowerSwitch(pAdapter, false, false);
rtl8188e_EfusePowerSwitch(pAdapter, false, false);
}
/*-----------------------------------------------------------------------------
@ -809,40 +274,13 @@ void EFUSE_ShadowMapUpdate(
u8 efuseType,
bool pseudo)
{
struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter);
struct eeprom_priv *pEEPROM = &pAdapter->eeprompriv;
u16 mapLen = 0;
EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, pseudo);
rtl8188e_EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, pseudo);
if (pEEPROM->bautoload_fail_flag)
memset(pEEPROM->efuse_eeprom_data, 0xFF, mapLen);
else
Efuse_ReadAllMap(pAdapter, efuseType, pEEPROM->efuse_eeprom_data, pseudo);
} /* EFUSE_ShadowMapUpdate */
/*-----------------------------------------------------------------------------
* Function: EFUSE_ShadowRead
*
* Overview: Read from efuse init map !!!!!
*
* Input: NONE
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 11/12/2008 MHC Create Version 0.
*
*---------------------------------------------------------------------------*/
void EFUSE_ShadowRead(struct adapter *pAdapter, u8 Type, u16 Offset, u32 *Value)
{
if (Type == 1)
efuse_ShadowRead1Byte(pAdapter, Offset, (u8 *)Value);
else if (Type == 2)
efuse_ShadowRead2Byte(pAdapter, Offset, (u16 *)Value);
else if (Type == 4)
efuse_ShadowRead4Byte(pAdapter, Offset, (u32 *)Value);
} /* EFUSE_ShadowRead */

339
drivers/staging/r8188eu/core/rtw_ieee80211.c
View File

@ -140,59 +140,6 @@ u8 *rtw_set_ie
return pbuf + len + 2;
}
inline u8 *rtw_set_ie_ch_switch(u8 *buf, u32 *buf_len, u8 ch_switch_mode,
u8 new_ch, u8 ch_switch_cnt)
{
u8 ie_data[3];
ie_data[0] = ch_switch_mode;
ie_data[1] = new_ch;
ie_data[2] = ch_switch_cnt;
return rtw_set_ie(buf, WLAN_EID_CHANNEL_SWITCH, 3, ie_data, buf_len);
}
inline u8 secondary_ch_offset_to_hal_ch_offset(u8 ch_offset)
{
if (ch_offset == SCN)
return HAL_PRIME_CHNL_OFFSET_DONT_CARE;
else if (ch_offset == SCA)
return HAL_PRIME_CHNL_OFFSET_UPPER;
else if (ch_offset == SCB)
return HAL_PRIME_CHNL_OFFSET_LOWER;
return HAL_PRIME_CHNL_OFFSET_DONT_CARE;
}
inline u8 hal_ch_offset_to_secondary_ch_offset(u8 ch_offset)
{
if (ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE)
return SCN;
else if (ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER)
return SCB;
else if (ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER)
return SCA;
return SCN;
}
inline u8 *rtw_set_ie_secondary_ch_offset(u8 *buf, u32 *buf_len, u8 secondary_ch_offset)
{
return rtw_set_ie(buf, WLAN_EID_SECONDARY_CHANNEL_OFFSET, 1, &secondary_ch_offset, buf_len);
}
inline u8 *rtw_set_ie_mesh_ch_switch_parm(u8 *buf, u32 *buf_len, u8 ttl,
u8 flags, u16 reason, u16 precedence)
{
u8 ie_data[6];
ie_data[0] = ttl;
ie_data[1] = flags;
*(u16 *)(ie_data + 2) = cpu_to_le16(reason);
*(u16 *)(ie_data + 4) = cpu_to_le16(precedence);
return rtw_set_ie(buf, 0x118, 6, ie_data, buf_len);
}
/*----------------------------------------------------------------------------
index: the information element id index, limit is the limit for search
-----------------------------------------------------------------------------*/
@ -225,96 +172,6 @@ u8 *rtw_get_ie(u8 *pbuf, int index, int *len, int limit)
return NULL;
}
/**
* rtw_get_ie_ex - Search specific IE from a series of IEs
* @in_ie: Address of IEs to search
* @in_len: Length limit from in_ie
* @eid: Element ID to match
* @oui: OUI to match
* @oui_len: OUI length
* @ie: If not NULL and the specific IE is found, the IE will be copied to the buf starting from the specific IE
* @ielen: If not NULL and the specific IE is found, will set to the length of the entire IE
*
* Returns: The address of the specific IE found, or NULL
*/
u8 *rtw_get_ie_ex(u8 *in_ie, uint in_len, u8 eid, u8 *oui, u8 oui_len, u8 *ie, uint *ielen)
{
uint cnt;
u8 *target_ie = NULL;
if (ielen)
*ielen = 0;
if (!in_ie || in_len <= 0)
return target_ie;
cnt = 0;
while (cnt < in_len) {
if (eid == in_ie[cnt] && (!oui || !memcmp(&in_ie[cnt + 2], oui, oui_len))) {
target_ie = &in_ie[cnt];
if (ie)
memcpy(ie, &in_ie[cnt], in_ie[cnt + 1] + 2);
if (ielen)
*ielen = in_ie[cnt + 1] + 2;
break;
} else {
cnt += in_ie[cnt + 1] + 2; /* goto next */
}
}
return target_ie;
}
/**
* rtw_ies_remove_ie - Find matching IEs and remove
* @ies: Address of IEs to search
* @ies_len: Pointer of length of ies, will update to new length
* @offset: The offset to start scarch
* @eid: Element ID to match
* @oui: OUI to match
* @oui_len: OUI length
*
* Returns: _SUCCESS: ies is updated, _FAIL: not updated
*/
int rtw_ies_remove_ie(u8 *ies, uint *ies_len, uint offset, u8 eid, u8 *oui, u8 oui_len)
{
int ret = _FAIL;
u8 *target_ie;
u32 target_ielen;
u8 *start;
uint search_len;
if (!ies || !ies_len || *ies_len <= offset)
goto exit;
start = ies + offset;
search_len = *ies_len - offset;
while (1) {
target_ie = rtw_get_ie_ex(start, search_len, eid, oui, oui_len, NULL, &target_ielen);
if (target_ie && target_ielen) {
u8 buf[MAX_IE_SZ] = {0};
u8 *remain_ies = target_ie + target_ielen;
uint remain_len = search_len - (remain_ies - start);
memcpy(buf, remain_ies, remain_len);
memcpy(target_ie, buf, remain_len);
*ies_len = *ies_len - target_ielen;
ret = _SUCCESS;
start = target_ie;
search_len = remain_len;
} else {
break;
}
}
exit:
return ret;
}
void rtw_set_supported_rate(u8 *SupportedRates, uint mode)
{
@ -1021,97 +878,24 @@ u8 key_2char2num(u8 hch, u8 lch)
void rtw_macaddr_cfg(u8 *mac_addr)
{
u8 mac[ETH_ALEN];
if (!mac_addr)
return;
if (rtw_initmac) { /* Users specify the mac address */
int jj, kk;
for (jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3)
mac[jj] = key_2char2num(rtw_initmac[kk], rtw_initmac[kk + 1]);
memcpy(mac_addr, mac, ETH_ALEN);
} else { /* Use the mac address stored in the Efuse */
memcpy(mac, mac_addr, ETH_ALEN);
if (rtw_initmac && mac_pton(rtw_initmac, mac)) {
/* Users specify the mac address */
ether_addr_copy(mac_addr, mac);
} else {
/* Use the mac address stored in the Efuse */
ether_addr_copy(mac, mac_addr);
}
if (((mac[0] == 0xff) && (mac[1] == 0xff) && (mac[2] == 0xff) &&
(mac[3] == 0xff) && (mac[4] == 0xff) && (mac[5] == 0xff)) ||
((mac[0] == 0x0) && (mac[1] == 0x0) && (mac[2] == 0x0) &&
(mac[3] == 0x0) && (mac[4] == 0x0) && (mac[5] == 0x0))) {
mac[0] = 0x00;
mac[1] = 0xe0;
mac[2] = 0x4c;
mac[3] = 0x87;
mac[4] = 0x00;
mac[5] = 0x00;
/* use default mac addresss */
memcpy(mac_addr, mac, ETH_ALEN);
DBG_88E("MAC Address from efuse error, assign default one !!!\n");
if (is_broadcast_ether_addr(mac) || is_zero_ether_addr(mac)) {
eth_random_addr(mac_addr);
DBG_88E("MAC Address from efuse error, assign random one !!!\n");
}
DBG_88E("rtw_macaddr_cfg MAC Address = %pM\n", (mac_addr));
}
void dump_ies(u8 *buf, u32 buf_len)
{
u8 *pos = (u8 *)buf;
u8 id, len;
while (pos - buf <= buf_len) {
id = *pos;
len = *(pos + 1);
DBG_88E("%s ID:%u, LEN:%u\n", __func__, id, len);
#ifdef CONFIG_88EU_P2P
dump_p2p_ie(pos, len);
#endif
dump_wps_ie(pos, len);
pos += (2 + len);
}
}
void dump_wps_ie(u8 *ie, u32 ie_len)
{
u8 *pos = (u8 *)ie;
u16 id;
u16 len;
u8 *wps_ie;
uint wps_ielen;
wps_ie = rtw_get_wps_ie(ie, ie_len, NULL, &wps_ielen);
if (wps_ie != ie || wps_ielen == 0)
return;
pos += 6;
while (pos - ie < ie_len) {
id = RTW_GET_BE16(pos);
len = RTW_GET_BE16(pos + 2);
DBG_88E("%s ID:0x%04x, LEN:%u\n", __func__, id, len);
pos += (4 + len);
}
}
#ifdef CONFIG_88EU_P2P
void dump_p2p_ie(u8 *ie, u32 ie_len)
{
u8 *pos = (u8 *)ie;
u8 id;
u16 len;
u8 *p2p_ie;
uint p2p_ielen;
p2p_ie = rtw_get_p2p_ie(ie, ie_len, NULL, &p2p_ielen);
if (p2p_ie != ie || p2p_ielen == 0)
return;
pos += 6;
while (pos - ie < ie_len) {
id = *pos;
len = get_unaligned_le16(pos + 1);
DBG_88E("%s ID:%u, LEN:%u\n", __func__, id, len);
pos += (3 + len);
}
DBG_88E("rtw_macaddr_cfg MAC Address = %pM\n", mac_addr);
}
/**
@ -1294,52 +1078,6 @@ void rtw_wlan_bssid_ex_remove_p2p_attr(struct wlan_bssid_ex *bss_ex, u8 attr_id)
}
}
#endif /* CONFIG_88EU_P2P */
/* Baron adds to avoid FreeBSD warning */
int ieee80211_is_empty_essid(const char *essid, int essid_len)
{
/* Single white space is for Linksys APs */
if (essid_len == 1 && essid[0] == ' ')
return 1;
/* Otherwise, if the entire essid is 0, we assume it is hidden */
while (essid_len) {
essid_len--;
if (essid[essid_len] != '\0')
return 0;
}
return 1;
}
int ieee80211_get_hdrlen(u16 fc)
{
int hdrlen = 24;
switch (WLAN_FC_GET_TYPE(fc)) {
case RTW_IEEE80211_FTYPE_DATA:
if (fc & RTW_IEEE80211_STYPE_QOS_DATA)
hdrlen += 2;
if ((fc & RTW_IEEE80211_FCTL_FROMDS) && (fc & RTW_IEEE80211_FCTL_TODS))
hdrlen += 6; /* Addr4 */
break;
case RTW_IEEE80211_FTYPE_CTL:
switch (WLAN_FC_GET_STYPE(fc)) {
case RTW_IEEE80211_STYPE_CTS:
case RTW_IEEE80211_STYPE_ACK:
hdrlen = 10;
break;
default:
hdrlen = 16;
break;
}
break;
}
return hdrlen;
}
static int rtw_get_cipher_info(struct wlan_network *pnetwork)
{
u32 wpa_ielen;
@ -1482,58 +1220,3 @@ u16 rtw_mcs_rate(u8 rf_type, u8 bw_40MHz, u8 short_GI_20, u8 short_GI_40, unsign
}
return max_rate;
}
int rtw_action_frame_parse(const u8 *frame, u32 frame_len, u8 *category, u8 *action)
{
const u8 *frame_body = frame + sizeof(struct rtw_ieee80211_hdr_3addr);
u16 fc;
u8 c, a = 0;
fc = le16_to_cpu(((struct rtw_ieee80211_hdr_3addr *)frame)->frame_ctl);
if ((fc & (RTW_IEEE80211_FCTL_FTYPE | RTW_IEEE80211_FCTL_STYPE)) !=
(RTW_IEEE80211_FTYPE_MGMT | RTW_IEEE80211_STYPE_ACTION))
return false;
c = frame_body[0];
switch (c) {
case RTW_WLAN_CATEGORY_P2P: /* vendor-specific */
break;
default:
a = frame_body[1];
}
if (category)
*category = c;
if (action)
*action = a;
return true;
}
static const char *_action_public_str[] = {
"ACT_PUB_BSSCOEXIST",
"ACT_PUB_DSE_ENABLE",
"ACT_PUB_DSE_DEENABLE",
"ACT_PUB_DSE_REG_LOCATION",
"ACT_PUB_EXT_CHL_SWITCH",
"ACT_PUB_DSE_MSR_REQ",
"ACT_PUB_DSE_MSR_RPRT",
"ACT_PUB_MP",
"ACT_PUB_DSE_PWR_CONSTRAINT",
"ACT_PUB_VENDOR",
"ACT_PUB_GAS_INITIAL_REQ",
"ACT_PUB_GAS_INITIAL_RSP",
"ACT_PUB_GAS_COMEBACK_REQ",
"ACT_PUB_GAS_COMEBACK_RSP",
"ACT_PUB_TDLS_DISCOVERY_RSP",
"ACT_PUB_LOCATION_TRACK",
"ACT_PUB_RSVD",
};
const char *action_public_str(u8 action)
{
action = (action >= ACT_PUBLIC_MAX) ? ACT_PUBLIC_MAX : action;
return _action_public_str[action];
}

299
drivers/staging/r8188eu/core/rtw_io.c
View File

@ -1,299 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
/*
The purpose of rtw_io.c
a. provides the API
b. provides the protocol engine
c. provides the software interface between caller and the hardware interface
Compiler Flag Option:
USB:
a. USE_ASYNC_IRP: Both sync/async operations are provided.
Only sync read/rtw_write_mem operations are provided.
jackson@realtek.com.tw
*/
#define _RTW_IO_C_
#include "../include/osdep_service.h"
#include "../include/drv_types.h"
#include "../include/rtw_io.h"
#include "../include/osdep_intf.h"
#include "../include/usb_ops.h"
#define rtw_le16_to_cpu(val) le16_to_cpu(val)
#define rtw_le32_to_cpu(val) le32_to_cpu(val)
#define rtw_cpu_to_le16(val) cpu_to_le16(val)
#define rtw_cpu_to_le32(val) cpu_to_le32(val)
u8 _rtw_read8(struct adapter *adapter, u32 addr)
{
u8 r_val;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &pio_priv->intf;
u8 (*_read8)(struct intf_hdl *pintfhdl, u32 addr);
_read8 = pintfhdl->io_ops._read8;
r_val = _read8(pintfhdl, addr);
return r_val;
}
u16 _rtw_read16(struct adapter *adapter, u32 addr)
{
u16 r_val;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &pio_priv->intf;
u16 (*_read16)(struct intf_hdl *pintfhdl, u32 addr);
_read16 = pintfhdl->io_ops._read16;
r_val = _read16(pintfhdl, addr);
return r_val;
}
u32 _rtw_read32(struct adapter *adapter, u32 addr)
{
u32 r_val;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &pio_priv->intf;
u32 (*_read32)(struct intf_hdl *pintfhdl, u32 addr);
_read32 = pintfhdl->io_ops._read32;
r_val = _read32(pintfhdl, addr);
return r_val;
}
int _rtw_write8(struct adapter *adapter, u32 addr, u8 val)
{
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &pio_priv->intf;
int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
int ret;
_write8 = pintfhdl->io_ops._write8;
ret = _write8(pintfhdl, addr, val);
return RTW_STATUS_CODE(ret);
}
int _rtw_write16(struct adapter *adapter, u32 addr, u16 val)
{
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &pio_priv->intf;
int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
int ret;
_write16 = pintfhdl->io_ops._write16;
ret = _write16(pintfhdl, addr, val);
return RTW_STATUS_CODE(ret);
}
int _rtw_write32(struct adapter *adapter, u32 addr, u32 val)
{
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &pio_priv->intf;
int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
int ret;
_write32 = pintfhdl->io_ops._write32;
ret = _write32(pintfhdl, addr, val);
return RTW_STATUS_CODE(ret);
}
int _rtw_writeN(struct adapter *adapter, u32 addr, u32 length, u8 *pdata)
{
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = (struct intf_hdl *)(&pio_priv->intf);
int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata);
int ret;
_writeN = pintfhdl->io_ops._writeN;
ret = _writeN(pintfhdl, addr, length, pdata);
return RTW_STATUS_CODE(ret);
}
int _rtw_write8_async(struct adapter *adapter, u32 addr, u8 val)
{
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &pio_priv->intf;
int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
int ret;
_write8_async = pintfhdl->io_ops._write8_async;
ret = _write8_async(pintfhdl, addr, val);
return RTW_STATUS_CODE(ret);
}
int _rtw_write16_async(struct adapter *adapter, u32 addr, u16 val)
{
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &pio_priv->intf;
int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
int ret;
_write16_async = pintfhdl->io_ops._write16_async;
ret = _write16_async(pintfhdl, addr, val);
return RTW_STATUS_CODE(ret);
}
int _rtw_write32_async(struct adapter *adapter, u32 addr, u32 val)
{
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &pio_priv->intf;
int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
int ret;
_write32_async = pintfhdl->io_ops._write32_async;
ret = _write32_async(pintfhdl, addr, val);
return RTW_STATUS_CODE(ret);
}
void _rtw_read_mem(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
{
void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &pio_priv->intf;
if (adapter->bDriverStopped || adapter->bSurpriseRemoved)
return;
_read_mem = pintfhdl->io_ops._read_mem;
_read_mem(pintfhdl, addr, cnt, pmem);
}
void _rtw_write_mem(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
{
void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &pio_priv->intf;
_write_mem = pintfhdl->io_ops._write_mem;
_write_mem(pintfhdl, addr, cnt, pmem);
}
void _rtw_read_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
{
u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &pio_priv->intf;
if (adapter->bDriverStopped || adapter->bSurpriseRemoved)
return;
_read_port = pintfhdl->io_ops._read_port;
_read_port(pintfhdl, addr, cnt, pmem);
}
void _rtw_read_port_cancel(struct adapter *adapter)
{
void (*_read_port_cancel)(struct intf_hdl *pintfhdl);
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &pio_priv->intf;
_read_port_cancel = pintfhdl->io_ops._read_port_cancel;
if (_read_port_cancel)
_read_port_cancel(pintfhdl);
}
u32 _rtw_write_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
{
u32 (*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &pio_priv->intf;
u32 ret = _SUCCESS;
_write_port = pintfhdl->io_ops._write_port;
ret = _write_port(pintfhdl, addr, cnt, pmem);
return ret;
}
u32 _rtw_write_port_and_wait(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem, int timeout_ms)
{
int ret = _SUCCESS;
struct xmit_buf *pxmitbuf = (struct xmit_buf *)pmem;
struct submit_ctx sctx;
rtw_sctx_init(&sctx, timeout_ms);
pxmitbuf->sctx = &sctx;
ret = _rtw_write_port(adapter, addr, cnt, pmem);
if (ret == _SUCCESS)
ret = rtw_sctx_wait(&sctx);
return ret;
}
void _rtw_write_port_cancel(struct adapter *adapter)
{
void (*_write_port_cancel)(struct intf_hdl *pintfhdl);
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &pio_priv->intf;
_write_port_cancel = pintfhdl->io_ops._write_port_cancel;
if (_write_port_cancel)
_write_port_cancel(pintfhdl);
}
int rtw_init_io_priv(struct adapter *padapter, void (*set_intf_ops)(struct _io_ops *pops))
{
struct io_priv *piopriv = &padapter->iopriv;
struct intf_hdl *pintf = &piopriv->intf;
if (!set_intf_ops)
return _FAIL;
piopriv->padapter = padapter;
pintf->padapter = padapter;
pintf->pintf_dev = adapter_to_dvobj(padapter);
set_intf_ops(&pintf->io_ops);
return _SUCCESS;
}

397
drivers/staging/r8188eu/core/rtw_ioctl_set.c
View File

@ -13,29 +13,6 @@
extern void indicate_wx_scan_complete_event(struct adapter *padapter);
u8 rtw_validate_ssid(struct ndis_802_11_ssid *ssid)
{
u8 i;
u8 ret = true;
if (ssid->SsidLength > 32) {
ret = false;
goto exit;
}
for (i = 0; i < ssid->SsidLength; i++) {
/* wifi, printable ascii code must be supported */
if (!((ssid->Ssid[i] >= 0x20) && (ssid->Ssid[i] <= 0x7e))) {
ret = false;
break;
}
}
exit:
return ret;
}
u8 rtw_do_join(struct adapter *padapter)
{
struct list_head *plist, *phead;
@ -74,7 +51,7 @@ u8 rtw_do_join(struct adapter *padapter)
ret = _FAIL;
}
goto exit;
return ret;
} else {
int select_ret;
@ -101,10 +78,9 @@ u8 rtw_do_join(struct adapter *padapter)
rtw_generate_random_ibss(pibss);
if (rtw_createbss_cmd(padapter) != _SUCCESS) {
ret = false;
goto exit;
}
if (rtw_createbss_cmd(padapter) != _SUCCESS)
return false;
pmlmepriv->to_join = false;
} else {
/* can't associate ; reset under-linking */
@ -125,8 +101,6 @@ u8 rtw_do_join(struct adapter *padapter)
}
}
exit:
return ret;
}
@ -312,9 +286,7 @@ u8 rtw_set_802_11_infrastructure_mode(struct adapter *padapter,
/* change to other mode from Ndis802_11APMode */
cur_network->join_res = -1;
#ifdef CONFIG_88EU_AP_MODE
stop_ap_mode(padapter);
#endif
}
if ((check_fwstate(pmlmepriv, _FW_LINKED)) ||
@ -343,9 +315,6 @@ u8 rtw_set_802_11_infrastructure_mode(struct adapter *padapter,
break;
case Ndis802_11APMode:
set_fwstate(pmlmepriv, WIFI_AP_STATE);
#ifdef CONFIG_88EU_AP_MODE
start_ap_mode(padapter);
#endif
break;
case Ndis802_11AutoUnknown:
case Ndis802_11InfrastructureMax:
@ -472,298 +441,6 @@ exit:
return ret;
}
u8 rtw_set_802_11_remove_wep(struct adapter *padapter, u32 keyindex)
{
u8 ret = _SUCCESS;
if (keyindex >= 0x80000000 || !padapter) {
ret = false;
goto exit;
} else {
int res;
struct security_priv *psecuritypriv = &padapter->securitypriv;
if (keyindex < 4) {
memset(&psecuritypriv->dot11DefKey[keyindex], 0, 16);
res = rtw_set_key(padapter, psecuritypriv, keyindex, 0);
psecuritypriv->dot11DefKeylen[keyindex] = 0;
if (res == _FAIL)
ret = _FAIL;
} else {
ret = _FAIL;
}
}
exit:
return ret;
}
u8 rtw_set_802_11_add_key(struct adapter *padapter, struct ndis_802_11_key *key)
{
uint encryptionalgo;
u8 *pbssid;
struct sta_info *stainfo;
u8 bgroup = false;
u8 bgrouptkey = false;/* can be removed later */
u8 ret = _SUCCESS;
if (((key->KeyIndex & 0x80000000) == 0) && ((key->KeyIndex & 0x40000000) > 0)) {
/* It is invalid to clear bit 31 and set bit 30. If the miniport driver encounters this combination, */
/* it must fail the request and return NDIS_STATUS_INVALID_DATA. */
ret = _FAIL;
goto exit;
}
if (key->KeyIndex & 0x40000000) {
/* Pairwise key */
pbssid = get_bssid(&padapter->mlmepriv);
stainfo = rtw_get_stainfo(&padapter->stapriv, pbssid);
if (stainfo && padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X)
encryptionalgo = stainfo->dot118021XPrivacy;
else
encryptionalgo = padapter->securitypriv.dot11PrivacyAlgrthm;
if (key->KeyIndex & 0x000000FF) {
/* The key index is specified in the lower 8 bits by values of zero to 255. */
/* The key index should be set to zero for a Pairwise key, and the driver should fail with */
/* NDIS_STATUS_INVALID_DATA if the lower 8 bits is not zero */
ret = _FAIL;
goto exit;
}
/* check BSSID */
if (is_broadcast_ether_addr(key->BSSID)) {
ret = false;
goto exit;
}
/* Check key length for TKIP. */
if ((encryptionalgo == _TKIP_) && (key->KeyLength != 32)) {
ret = _FAIL;
goto exit;
}
/* Check key length for AES. */
if ((encryptionalgo == _AES_) && (key->KeyLength != 16)) {
/* For our supplicant, EAPPkt9x.vxd, cannot differentiate TKIP and AES case. */
if (key->KeyLength == 32) {
key->KeyLength = 16;
} else {
ret = _FAIL;
goto exit;
}
}
/* Check key length for WEP. For NDTEST, 2005.01.27, by rcnjko. */
if ((encryptionalgo == _WEP40_ || encryptionalgo == _WEP104_) &&
(key->KeyLength != 5 && key->KeyLength != 13)) {
ret = _FAIL;
goto exit;
}
bgroup = false;
} else {
/* Group key - KeyIndex(BIT(30) == 0) */
/* when add wep key through add key and didn't assigned encryption type before */
if ((padapter->securitypriv.ndisauthtype <= 3) &&
(padapter->securitypriv.dot118021XGrpPrivacy == 0)) {
switch (key->KeyLength) {
case 5:
padapter->securitypriv.dot11PrivacyAlgrthm = _WEP40_;
break;
case 13:
padapter->securitypriv.dot11PrivacyAlgrthm = _WEP104_;
break;
default:
padapter->securitypriv.dot11PrivacyAlgrthm = _NO_PRIVACY_;
break;
}
encryptionalgo = padapter->securitypriv.dot11PrivacyAlgrthm;
} else {
encryptionalgo = padapter->securitypriv.dot118021XGrpPrivacy;
}
if (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE) && !is_broadcast_ether_addr(key->BSSID)) {
ret = _FAIL;
goto exit;
}
/* Check key length for TKIP */
if ((encryptionalgo == _TKIP_) && (key->KeyLength != 32)) {
ret = _FAIL;
goto exit;
} else if (encryptionalgo == _AES_ && (key->KeyLength != 16 && key->KeyLength != 32)) {
/* Check key length for AES */
/* For NDTEST, we allow keylen = 32 in this case. 2005.01.27, by rcnjko. */
ret = _FAIL;
goto exit;
}
/* Change the key length for EAPPkt9x.vxd. Added by Annie, 2005-11-03. */
if ((encryptionalgo == _AES_) && (key->KeyLength == 32))
key->KeyLength = 16;
if (key->KeyIndex & 0x8000000) {/* error ??? 0x8000_0000 */
bgrouptkey = true;
}
if ((check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE)) &&
(check_fwstate(&padapter->mlmepriv, _FW_LINKED)))
bgrouptkey = true;
bgroup = true;
}
/* If WEP encryption algorithm, just call rtw_set_802_11_add_wep(). */
if ((padapter->securitypriv.dot11AuthAlgrthm != dot11AuthAlgrthm_8021X) &&
(encryptionalgo == _WEP40_ || encryptionalgo == _WEP104_)) {
u32 keyindex;
u32 len = FIELD_OFFSET(struct ndis_802_11_key, KeyMaterial) + key->KeyLength;
struct ndis_802_11_wep *wep = &padapter->securitypriv.ndiswep;
wep->Length = len;
keyindex = key->KeyIndex & 0x7fffffff;
wep->KeyIndex = keyindex;
wep->KeyLength = key->KeyLength;
memcpy(wep->KeyMaterial, key->KeyMaterial, key->KeyLength);
memcpy(&padapter->securitypriv.dot11DefKey[keyindex].skey[0], key->KeyMaterial, key->KeyLength);
padapter->securitypriv.dot11DefKeylen[keyindex] = key->KeyLength;
padapter->securitypriv.dot11PrivacyKeyIndex = keyindex;
ret = rtw_set_802_11_add_wep(padapter, wep);
goto exit;
}
if (key->KeyIndex & 0x20000000) {
/* SetRSC */
if (bgroup) {
unsigned long long keysrc = key->KeyRSC & 0x00FFFFFFFFFFFFULL;
memcpy(&padapter->securitypriv.dot11Grprxpn, &keysrc, 8);
} else {
unsigned long long keysrc = key->KeyRSC & 0x00FFFFFFFFFFFFULL;
memcpy(&padapter->securitypriv.dot11Grptxpn, &keysrc, 8);
}
}
/* Indicate this key idx is used for TX */
/* Save the key in KeyMaterial */
if (bgroup) { /* Group transmit key */
int res;
if (bgrouptkey)
padapter->securitypriv.dot118021XGrpKeyid = (u8)key->KeyIndex;
if ((key->KeyIndex & 0x3) == 0) {
ret = _FAIL;
goto exit;
}
memset(&padapter->securitypriv.dot118021XGrpKey[(u8)((key->KeyIndex) & 0x03)], 0, 16);
memset(&padapter->securitypriv.dot118021XGrptxmickey[(u8)((key->KeyIndex) & 0x03)], 0, 16);
memset(&padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)], 0, 16);
if ((key->KeyIndex & 0x10000000)) {
memcpy(&padapter->securitypriv.dot118021XGrptxmickey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial + 16, 8);
memcpy(&padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial + 24, 8);
} else {
memcpy(&padapter->securitypriv.dot118021XGrptxmickey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial + 24, 8);
memcpy(&padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial + 16, 8);
}
/* set group key by index */
memcpy(&padapter->securitypriv.dot118021XGrpKey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial, key->KeyLength);
key->KeyIndex = key->KeyIndex & 0x03;
padapter->securitypriv.binstallGrpkey = true;
padapter->securitypriv.bcheck_grpkey = false;
res = rtw_set_key(padapter, &padapter->securitypriv, key->KeyIndex, 1);
if (res == _FAIL)
ret = _FAIL;
goto exit;
} else { /* Pairwise Key */
u8 res;
pbssid = get_bssid(&padapter->mlmepriv);
stainfo = rtw_get_stainfo(&padapter->stapriv, pbssid);
if (stainfo) {
memset(&stainfo->dot118021x_UncstKey, 0, 16);/* clear keybuffer */
memcpy(&stainfo->dot118021x_UncstKey, key->KeyMaterial, 16);
if (encryptionalgo == _TKIP_) {
padapter->securitypriv.busetkipkey = false;
/* _set_timer(&padapter->securitypriv.tkip_timer, 50); */
/* if TKIP, save the Receive/Transmit MIC key in KeyMaterial[128-255] */
if ((key->KeyIndex & 0x10000000)) {
memcpy(&stainfo->dot11tkiptxmickey, key->KeyMaterial + 16, 8);
memcpy(&stainfo->dot11tkiprxmickey, key->KeyMaterial + 24, 8);
} else {
memcpy(&stainfo->dot11tkiptxmickey, key->KeyMaterial + 24, 8);
memcpy(&stainfo->dot11tkiprxmickey, key->KeyMaterial + 16, 8);
}
}
/* Set key to CAM through H2C command */
if (bgrouptkey) /* never go to here */
res = rtw_setstakey_cmd(padapter, (unsigned char *)stainfo, false);
else
res = rtw_setstakey_cmd(padapter, (unsigned char *)stainfo, true);
if (!res)
ret = _FAIL;
}
}
exit:
return ret;
}
u8 rtw_set_802_11_remove_key(struct adapter *padapter, struct ndis_802_11_remove_key *key)
{
u8 *pbssid;
struct sta_info *stainfo;
u8 bgroup = (key->KeyIndex & 0x4000000) > 0 ? false : true;
u8 keyIndex = (u8)key->KeyIndex & 0x03;
u8 ret = _SUCCESS;
if ((key->KeyIndex & 0xbffffffc) > 0) {
ret = _FAIL;
goto exit;
}
if (bgroup) {
/* clear group key by index */
memset(&padapter->securitypriv.dot118021XGrpKey[keyIndex], 0, 16);
/* \todo Send a H2C Command to Firmware for removing this Key in CAM Entry. */
} else {
pbssid = get_bssid(&padapter->mlmepriv);
stainfo = rtw_get_stainfo(&padapter->stapriv, pbssid);
if (stainfo) {
/* clear key by BSSID */
memset(&stainfo->dot118021x_UncstKey, 0, 16);
/* \todo Send a H2C Command to Firmware for disable this Key in CAM Entry. */
} else {
ret = _FAIL;
goto exit;
}
}
exit:
return ret;
}
/*
* rtw_get_cur_max_rate -
* @adapter: pointer to struct adapter structure
@ -786,11 +463,6 @@ u16 rtw_get_cur_max_rate(struct adapter *adapter)
u16 mcs_rate = 0;
u32 ht_ielen = 0;
if (adapter->registrypriv.mp_mode == 1) {
if (check_fwstate(pmlmepriv, WIFI_MP_STATE))
return 0;
}
if ((!check_fwstate(pmlmepriv, _FW_LINKED)) &&
(!check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)))
return 0;
@ -808,7 +480,7 @@ u16 rtw_get_cur_max_rate(struct adapter *adapter)
short_GI_20 = (le16_to_cpu(pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info) & IEEE80211_HT_CAP_SGI_20) ? 1 : 0;
short_GI_40 = (le16_to_cpu(pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info) & IEEE80211_HT_CAP_SGI_40) ? 1 : 0;
rtw_hal_get_hwreg(adapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
GetHwReg8188EU(adapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
max_rate = rtw_mcs_rate(
rf_type,
bw_40MHz & (pregistrypriv->cbw40_enable),
@ -830,62 +502,3 @@ u16 rtw_get_cur_max_rate(struct adapter *adapter)
return max_rate;
}
/*
* rtw_set_scan_mode -
* @adapter: pointer to struct adapter structure
* @scan_mode:
*
* Return _SUCCESS or _FAIL
*/
int rtw_set_scan_mode(struct adapter *adapter, enum rt_scan_type scan_mode)
{
if (scan_mode != SCAN_ACTIVE && scan_mode != SCAN_PASSIVE)
return _FAIL;
adapter->mlmepriv.scan_mode = scan_mode;
return _SUCCESS;
}
/*
* rtw_set_channel_plan -
* @adapter: pointer to struct adapter structure
* @channel_plan:
*
* Return _SUCCESS or _FAIL
*/
int rtw_set_channel_plan(struct adapter *adapter, u8 channel_plan)
{
/* handle by cmd_thread to sync with scan operation */
return rtw_set_chplan_cmd(adapter, channel_plan, 1);
}
/*
* rtw_set_country -
* @adapter: pointer to struct adapter structure
* @country_code: string of country code
*
* Return _SUCCESS or _FAIL
*/
int rtw_set_country(struct adapter *adapter, const char *country_code)
{
int channel_plan = RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN_2G;
DBG_88E("%s country_code:%s\n", __func__, country_code);
/* TODO: should have a table to match country code and RT_CHANNEL_DOMAIN */
/* TODO: should consider 2-character and 3-character country code */
if (0 == strcmp(country_code, "US"))
channel_plan = RT_CHANNEL_DOMAIN_FCC;
else if (0 == strcmp(country_code, "EU"))
channel_plan = RT_CHANNEL_DOMAIN_ETSI;
else if (0 == strcmp(country_code, "JP"))
channel_plan = RT_CHANNEL_DOMAIN_MKK;
else if (0 == strcmp(country_code, "CN"))
channel_plan = RT_CHANNEL_DOMAIN_CHINA;
else
DBG_88E("%s unknown country_code:%s\n", __func__, country_code);
return rtw_set_channel_plan(adapter, channel_plan);
}

34
drivers/staging/r8188eu/core/rtw_iol.c
View File

@ -13,15 +13,14 @@ struct xmit_frame *rtw_IOL_accquire_xmit_frame(struct adapter *adapter)
xmit_frame = rtw_alloc_xmitframe(pxmitpriv);
if (!xmit_frame) {
DBG_88E("%s rtw_alloc_xmitframe return null\n", __func__);
goto exit;
return NULL;
}
xmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
if (!xmitbuf) {
DBG_88E("%s rtw_alloc_xmitbuf return null\n", __func__);
rtw_free_xmitframe(pxmitpriv, xmit_frame);
xmit_frame = NULL;
goto exit;
return NULL;
}
xmit_frame->frame_tag = MGNT_FRAMETAG;
@ -35,7 +34,7 @@ struct xmit_frame *rtw_IOL_accquire_xmit_frame(struct adapter *adapter)
pattrib->subtype = WIFI_BEACON;
pattrib->pktlen = 0;
pattrib->last_txcmdsz = 0;
exit:
return xmit_frame;
}
@ -72,16 +71,6 @@ bool rtw_IOL_applied(struct adapter *adapter)
return false;
}
int rtw_IOL_exec_cmds_sync(struct adapter *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt)
{
return rtw_hal_iol_cmd(adapter, xmit_frame, max_wating_ms, bndy_cnt);
}
int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary)
{
return _SUCCESS;
}
int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, u8 mask)
{
struct ioreg_cfg cmd = {8, IOREG_CMD_WB_REG, 0x0, 0x0, 0x0};
@ -173,20 +162,3 @@ u8 rtw_IOL_cmd_boundary_handle(struct xmit_frame *pxmit_frame)
}
return is_cmd_bndy;
}
void rtw_IOL_cmd_buf_dump(struct adapter *Adapter, int buf_len, u8 *pbuf)
{
int i;
int j = 1;
pr_info("###### %s ######\n", __func__);
for (i = 0; i < buf_len; i++) {
printk("%02x-", *(pbuf + i));
if (j % 32 == 0)
printk("\n");
j++;
}
printk("\n");
pr_info("=============ioreg_cmd len=%d===============\n", buf_len);
}

1189
drivers/staging/r8188eu/core/rtw_led.c
View File

File diff suppressed because it is too large Load Diff

126
drivers/staging/r8188eu/core/rtw_mlme.c
View File

@ -14,6 +14,7 @@
#include "../include/wlan_bssdef.h"
#include "../include/rtw_ioctl_set.h"
#include "../include/usb_osintf.h"
#include "../include/rtl8188e_dm.h"
extern unsigned char MCS_rate_2R[16];
extern unsigned char MCS_rate_1R[16];
@ -48,8 +49,8 @@ int _rtw_init_mlme_priv(struct adapter *padapter)
pmlmepriv->scan_mode = SCAN_ACTIVE;/* 1: active, 0: pasive. Maybe someday we should rename this varable to "active_mode" (Jeff) */
spin_lock_init(&pmlmepriv->lock);
_rtw_init_queue(&pmlmepriv->free_bss_pool);
_rtw_init_queue(&pmlmepriv->scanned_queue);
rtw_init_queue(&pmlmepriv->free_bss_pool);
rtw_init_queue(&pmlmepriv->scanned_queue);
set_scanned_network_val(pmlmepriv, 0);
@ -88,7 +89,6 @@ static void rtw_mfree_mlme_priv_lock(struct mlme_priv *pmlmepriv)
{
}
#if defined(CONFIG_88EU_AP_MODE)
static void rtw_free_mlme_ie_data(u8 **ppie, u32 *plen)
{
kfree(*ppie);
@ -111,11 +111,6 @@ void rtw_free_mlme_priv_ie_data(struct mlme_priv *pmlmepriv)
rtw_free_mlme_ie_data(&pmlmepriv->p2p_go_probe_resp_ie, &pmlmepriv->p2p_go_probe_resp_ie_len);
rtw_free_mlme_ie_data(&pmlmepriv->p2p_assoc_req_ie, &pmlmepriv->p2p_assoc_req_ie_len);
}
#else
void rtw_free_mlme_priv_ie_data(struct mlme_priv *pmlmepriv)
{
}
#endif
void _rtw_free_mlme_priv(struct mlme_priv *pmlmepriv)
{
@ -130,42 +125,6 @@ void _rtw_free_mlme_priv(struct mlme_priv *pmlmepriv)
}
int _rtw_enqueue_network(struct __queue *queue, struct wlan_network *pnetwork)
{
if (!pnetwork)
goto exit;
spin_lock_bh(&queue->lock);
list_add_tail(&pnetwork->list, &queue->queue);
spin_unlock_bh(&queue->lock);
exit:
return _SUCCESS;
}
struct wlan_network *_rtw_dequeue_network(struct __queue *queue)
{
struct wlan_network *pnetwork;
spin_lock_bh(&queue->lock);
if (list_empty(&queue->queue)) {
pnetwork = NULL;
} else {
pnetwork = container_of((&queue->queue)->next, struct wlan_network, list);
list_del_init(&pnetwork->list);
}
spin_unlock_bh(&queue->lock);
return pnetwork;
}
struct wlan_network *_rtw_alloc_network(struct mlme_priv *pmlmepriv)/* _queue *free_queue) */
{
struct wlan_network *pnetwork;
@ -331,11 +290,6 @@ u16 rtw_get_capability(struct wlan_bssid_ex *bss)
return le16_to_cpu(val);
}
u8 *rtw_get_timestampe_from_ie(u8 *ie)
{
return ie + 0;
}
u8 *rtw_get_beacon_interval_from_ie(u8 *ie)
{
return ie + 8;
@ -469,7 +423,7 @@ void update_network(struct wlan_bssid_ex *dst, struct wlan_bssid_ex *src,
u8 sq_final;
long rssi_final;
rtw_hal_antdiv_rssi_compared(padapter, dst, src); /* this will update src.Rssi, need consider again */
AntDivCompare8188E(padapter, dst, src); /* this will update src.Rssi, need consider again */
/* The rule below is 1/5 for sample value, 4/5 for history value */
if (check_fwstate(&padapter->mlmepriv, _FW_LINKED) && is_same_network(&padapter->mlmepriv.cur_network.network, src)) {
@ -550,7 +504,7 @@ void rtw_update_scanned_network(struct adapter *adapter, struct wlan_bssid_ex *t
/* If there are no more slots, expire the oldest */
pnetwork = oldest;
rtw_hal_get_def_var(adapter, HAL_DEF_CURRENT_ANTENNA, &target->PhyInfo.Optimum_antenna);
GetHalDefVar8188EUsb(adapter, HAL_DEF_CURRENT_ANTENNA, &target->PhyInfo.Optimum_antenna);
memcpy(&pnetwork->network, target, get_wlan_bssid_ex_sz(target));
/* variable initialize */
pnetwork->fixed = false;
@ -573,7 +527,7 @@ void rtw_update_scanned_network(struct adapter *adapter, struct wlan_bssid_ex *t
bssid_ex_sz = get_wlan_bssid_ex_sz(target);
target->Length = bssid_ex_sz;
rtw_hal_get_def_var(adapter, HAL_DEF_CURRENT_ANTENNA, &target->PhyInfo.Optimum_antenna);
GetHalDefVar8188EUsb(adapter, HAL_DEF_CURRENT_ANTENNA, &target->PhyInfo.Optimum_antenna);
memcpy(&pnetwork->network, target, bssid_ex_sz);
pnetwork->last_scanned = jiffies;
@ -611,9 +565,7 @@ static void rtw_add_network(struct adapter *adapter,
struct wlan_bssid_ex *pnetwork)
{
#if defined(CONFIG_88EU_P2P)
rtw_wlan_bssid_ex_remove_p2p_attr(pnetwork, P2P_ATTR_GROUP_INFO);
#endif
update_current_network(adapter, pnetwork);
rtw_update_scanned_network(adapter, pnetwork);
@ -945,29 +897,6 @@ inline void rtw_indicate_scan_done(struct adapter *padapter, bool aborted)
rtw_os_indicate_scan_done(padapter, aborted);
}
void rtw_scan_abort(struct adapter *adapter)
{
u32 start;
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
start = jiffies;
pmlmeext->scan_abort = true;
while (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) &&
rtw_get_passing_time_ms(start) <= 200) {
if (adapter->bDriverStopped || adapter->bSurpriseRemoved)
break;
DBG_88E(FUNC_NDEV_FMT"fw_state=_FW_UNDER_SURVEY!\n", FUNC_NDEV_ARG(adapter->pnetdev));
msleep(20);
}
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) {
if (!adapter->bDriverStopped && !adapter->bSurpriseRemoved)
DBG_88E(FUNC_NDEV_FMT"waiting for scan_abort time out!\n", FUNC_NDEV_ARG(adapter->pnetdev));
rtw_indicate_scan_done(adapter, true);
}
pmlmeext->scan_abort = false;
}
static struct sta_info *rtw_joinbss_update_stainfo(struct adapter *padapter, struct wlan_network *pnetwork)
{
int i;
@ -984,7 +913,7 @@ static struct sta_info *rtw_joinbss_update_stainfo(struct adapter *padapter, str
psta->aid = pnetwork->join_res;
psta->mac_id = 0;
/* sta mode */
rtw_hal_set_odm_var(padapter, HAL_ODM_STA_INFO, psta, true);
rtl8188e_SetHalODMVar(padapter, HAL_ODM_STA_INFO, psta, true);
/* security related */
if (padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) {
padapter->securitypriv.binstallGrpkey = false;
@ -1200,24 +1129,20 @@ void rtw_joinbss_event_callback(struct adapter *adapter, u8 *pbuf)
static u8 search_max_mac_id(struct adapter *padapter)
{
u8 mac_id;
#if defined(CONFIG_88EU_AP_MODE)
u8 aid;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct sta_priv *pstapriv = &padapter->stapriv;
#endif
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
#if defined(CONFIG_88EU_AP_MODE)
if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) {
for (aid = (pstapriv->max_num_sta); aid > 0; aid--) {
if (pstapriv->sta_aid[aid - 1])
break;
}
mac_id = aid + 1;
} else
#endif
{/* adhoc id = 31~2 */
} else {
/* adhoc id = 31~2 */
for (mac_id = (NUM_STA - 1); mac_id >= IBSS_START_MAC_ID; mac_id--) {
if (pmlmeinfo->FW_sta_info[mac_id].status == 1)
break;
@ -1237,11 +1162,10 @@ void rtw_sta_media_status_rpt(struct adapter *adapter, struct sta_info *psta,
return;
macid = search_max_mac_id(adapter);
rtw_hal_set_hwreg(adapter, HW_VAR_TX_RPT_MAX_MACID, (u8 *)&macid);
SetHwReg8188EU(adapter, HW_VAR_TX_RPT_MAX_MACID, (u8 *)&macid);
/* MACID|OPMODE:1 connect */
media_status_rpt = (u16)((psta->mac_id << 8) | mstatus);
rtw_hal_set_hwreg(adapter, HW_VAR_H2C_MEDIA_STATUS_RPT,
(u8 *)&media_status_rpt);
SetHwReg8188EU(adapter, HW_VAR_H2C_MEDIA_STATUS_RPT, (u8 *)&media_status_rpt);
}
void rtw_stassoc_event_callback(struct adapter *adapter, u8 *pbuf)
@ -1255,14 +1179,12 @@ void rtw_stassoc_event_callback(struct adapter *adapter, u8 *pbuf)
if (!rtw_access_ctrl(adapter, pstassoc->macaddr))
return;
#if defined(CONFIG_88EU_AP_MODE)
if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) {
psta = rtw_get_stainfo(&adapter->stapriv, pstassoc->macaddr);
if (psta)
rtw_indicate_sta_assoc_event(adapter, psta);
return;
}
#endif
/* for AD-HOC mode */
psta = rtw_get_stainfo(&adapter->stapriv, pstassoc->macaddr);
if (psta)
@ -1276,7 +1198,7 @@ void rtw_stassoc_event_callback(struct adapter *adapter, u8 *pbuf)
psta->mac_id = (uint)pstassoc->cam_id;
DBG_88E("%s\n", __func__);
/* for ad-hoc mode */
rtw_hal_set_odm_var(adapter, HAL_ODM_STA_INFO, psta, true);
rtl8188e_SetHalODMVar(adapter, HAL_ODM_STA_INFO, psta, true);
rtw_sta_media_status_rpt(adapter, psta, 1);
if (adapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X)
psta->dot118021XPrivacy = adapter->securitypriv.dot11PrivacyAlgrthm;
@ -1323,7 +1245,7 @@ void rtw_stadel_event_callback(struct adapter *adapter, u8 *pbuf)
u16 media_status;
media_status = (mac_id << 8) | 0; /* MACID|OPMODE:0 means disconnect */
/* for STA, AP, ADHOC mode, report disconnect stauts to FW */
rtw_hal_set_hwreg(adapter, HW_VAR_H2C_MEDIA_STATUS_RPT, (u8 *)&media_status);
SetHwReg8188EU(adapter, HW_VAR_H2C_MEDIA_STATUS_RPT, (u8 *)&media_status);
}
if (check_fwstate(pmlmepriv, WIFI_AP_STATE))
@ -1486,10 +1408,8 @@ void rtw_dynamic_check_timer_handlder(struct adapter *adapter)
rtw_dynamic_chk_wk_cmd(adapter);
if (pregistrypriv->wifi_spec == 1) {
#ifdef CONFIG_88EU_P2P
struct wifidirect_info *pwdinfo = &adapter->wdinfo;
if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE))
#endif
{
/* auto site survey */
rtw_auto_scan_handler(adapter);
@ -1618,10 +1538,10 @@ int rtw_select_and_join_from_scanned_queue(struct mlme_priv *pmlmepriv)
rtw_free_assoc_resources(adapter, 0);
}
rtw_hal_get_def_var(adapter, HAL_DEF_IS_SUPPORT_ANT_DIV, &(supp_ant_div));
GetHalDefVar8188EUsb(adapter, HAL_DEF_IS_SUPPORT_ANT_DIV, &supp_ant_div);
if (supp_ant_div) {
u8 cur_ant;
rtw_hal_get_def_var(adapter, HAL_DEF_CURRENT_ANTENNA, &(cur_ant));
GetHalDefVar8188EUsb(adapter, HAL_DEF_CURRENT_ANTENNA, &cur_ant);
DBG_88E("#### Opt_Ant_(%s), cur_Ant(%s)\n",
(2 == candidate->network.PhyInfo.Optimum_antenna) ? "A" : "B",
(2 == cur_ant) ? "A" : "B"
@ -1690,8 +1610,6 @@ int rtw_set_key(struct adapter *adapter, struct security_priv *psecuritypriv, in
goto exit;
}
memset(psetkeyparm, 0, sizeof(struct setkey_parm));
if (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X)
psetkeyparm->algorithm = (unsigned char)psecuritypriv->dot118021XGrpPrivacy;
else
@ -1722,6 +1640,8 @@ int rtw_set_key(struct adapter *adapter, struct security_priv *psecuritypriv, in
psetkeyparm->grpkey = 1;
break;
default:
kfree(psetkeyparm);
kfree(pcmd);
res = _FAIL;
goto exit;
}
@ -1959,10 +1879,10 @@ void rtw_joinbss_reset(struct adapter *padapter)
threshold = 1;
else
threshold = 0;
rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold));
SetHwReg8188EU(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold));
} else {
threshold = 1;
rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold));
SetHwReg8188EU(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold));
}
}
@ -2002,15 +1922,15 @@ unsigned int rtw_restructure_ht_ie(struct adapter *padapter, u8 *in_ie, u8 *out_
IEEE80211_HT_CAP_TX_STBC |
IEEE80211_HT_CAP_DSSSCCK40);
rtw_hal_get_def_var(padapter, HAL_DEF_RX_PACKET_OFFSET, &rx_packet_offset);
rtw_hal_get_def_var(padapter, HAL_DEF_MAX_RECVBUF_SZ, &max_recvbuf_sz);
GetHalDefVar8188EUsb(padapter, HAL_DEF_RX_PACKET_OFFSET, &rx_packet_offset);
GetHalDefVar8188EUsb(padapter, HAL_DEF_MAX_RECVBUF_SZ, &max_recvbuf_sz);
/*
AMPDU_para [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k
AMPDU_para [4:2]:Min MPDU Start Spacing
*/
rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor);
GetHalDefVar8188EUsb(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor);
ht_capie.ampdu_params_info = (max_rx_ampdu_factor & 0x03);
if (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)
@ -2081,7 +2001,7 @@ void rtw_update_ht_cap(struct adapter *padapter, u8 *pie, uint ie_len)
int i;
u8 rf_type;
padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
GetHwReg8188EU(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
/* update the MCS rates */
for (i = 0; i < 16; i++) {

386
drivers/staging/r8188eu/core/rtw_mlme_ext.c
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File diff suppressed because it is too large Load Diff

935
drivers/staging/r8188eu/core/rtw_mp.c
View File

@ -1,935 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#define _RTW_MP_C_
#include "../include/drv_types.h"
#include "../include/odm_precomp.h"
#include "../include/rtl8188e_hal.h"
u32 read_bbreg(struct adapter *padapter, u32 addr, u32 bitmask)
{
return rtw_hal_read_bbreg(padapter, addr, bitmask);
}
void write_bbreg(struct adapter *padapter, u32 addr, u32 bitmask, u32 val)
{
rtw_hal_write_bbreg(padapter, addr, bitmask, val);
}
u32 _read_rfreg(struct adapter *padapter, u8 rfpath, u32 addr, u32 bitmask)
{
return rtw_hal_read_rfreg(padapter, (enum rf_radio_path)rfpath, addr, bitmask);
}
void _write_rfreg(struct adapter *padapter, u8 rfpath, u32 addr, u32 bitmask, u32 val)
{
rtw_hal_write_rfreg(padapter, (enum rf_radio_path)rfpath, addr, bitmask, val);
}
u32 read_rfreg(struct adapter *padapter, u8 rfpath, u32 addr)
{
return _read_rfreg(padapter, (enum rf_radio_path)rfpath, addr, bRFRegOffsetMask);
}
void write_rfreg(struct adapter *padapter, u8 rfpath, u32 addr, u32 val)
{
_write_rfreg(padapter, (enum rf_radio_path)rfpath, addr, bRFRegOffsetMask, val);
}
static void _init_mp_priv_(struct mp_priv *pmp_priv)
{
struct wlan_bssid_ex *pnetwork;
memset(pmp_priv, 0, sizeof(struct mp_priv));
pmp_priv->mode = MP_OFF;
pmp_priv->channel = 1;
pmp_priv->bandwidth = HT_CHANNEL_WIDTH_20;
pmp_priv->prime_channel_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
pmp_priv->rateidx = MPT_RATE_1M;
pmp_priv->txpoweridx = 0x2A;
pmp_priv->antenna_tx = ANTENNA_A;
pmp_priv->antenna_rx = ANTENNA_AB;
pmp_priv->check_mp_pkt = 0;
pmp_priv->tx_pktcount = 0;
pmp_priv->rx_pktcount = 0;
pmp_priv->rx_crcerrpktcount = 0;
pmp_priv->network_macaddr[0] = 0x00;
pmp_priv->network_macaddr[1] = 0xE0;
pmp_priv->network_macaddr[2] = 0x4C;
pmp_priv->network_macaddr[3] = 0x87;
pmp_priv->network_macaddr[4] = 0x66;
pmp_priv->network_macaddr[5] = 0x55;
pnetwork = &pmp_priv->mp_network.network;
memcpy(pnetwork->MacAddress, pmp_priv->network_macaddr, ETH_ALEN);
pnetwork->Ssid.SsidLength = 8;
memcpy(pnetwork->Ssid.Ssid, "mp_871x", pnetwork->Ssid.SsidLength);
}
static void mp_init_xmit_attrib(struct mp_tx *pmptx, struct adapter *padapter)
{
struct pkt_attrib *pattrib;
struct tx_desc *desc;
/* init xmitframe attribute */
pattrib = &pmptx->attrib;
memset(pattrib, 0, sizeof(struct pkt_attrib));
desc = &pmptx->desc;
memset(desc, 0, TXDESC_SIZE);
pattrib->ether_type = 0x8712;
memset(pattrib->dst, 0xFF, ETH_ALEN);
pattrib->ack_policy = 0;
pattrib->hdrlen = WLAN_HDR_A3_LEN;
pattrib->subtype = WIFI_DATA;
pattrib->priority = 0;
pattrib->qsel = pattrib->priority;
pattrib->nr_frags = 1;
pattrib->encrypt = 0;
pattrib->bswenc = false;
pattrib->qos_en = false;
}
s32 init_mp_priv(struct adapter *padapter)
{
struct mp_priv *pmppriv = &padapter->mppriv;
_init_mp_priv_(pmppriv);
pmppriv->papdater = padapter;
pmppriv->tx.stop = 1;
mp_init_xmit_attrib(&pmppriv->tx, padapter);
switch (padapter->registrypriv.rf_config) {
case RF_1T1R:
pmppriv->antenna_tx = ANTENNA_A;
pmppriv->antenna_rx = ANTENNA_A;
break;
case RF_1T2R:
default:
pmppriv->antenna_tx = ANTENNA_A;
pmppriv->antenna_rx = ANTENNA_AB;
break;
case RF_2T2R:
case RF_2T2R_GREEN:
pmppriv->antenna_tx = ANTENNA_AB;
pmppriv->antenna_rx = ANTENNA_AB;
break;
case RF_2T4R:
pmppriv->antenna_tx = ANTENNA_AB;
pmppriv->antenna_rx = ANTENNA_ABCD;
break;
}
return _SUCCESS;
}
void free_mp_priv(struct mp_priv *pmp_priv)
{
kfree(pmp_priv->pallocated_mp_xmitframe_buf);
pmp_priv->pallocated_mp_xmitframe_buf = NULL;
pmp_priv->pmp_xmtframe_buf = NULL;
}
#define PHY_IQCalibrate(a, b) PHY_IQCalibrate_8188E(a, b)
#define PHY_LCCalibrate(a) PHY_LCCalibrate_8188E(a)
#define PHY_SetRFPathSwitch(a, b) PHY_SetRFPathSwitch_8188E(a, b)
s32 MPT_InitializeAdapter(struct adapter *pAdapter, u8 Channel)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
s32 rtStatus = _SUCCESS;
struct mpt_context *pMptCtx = &pAdapter->mppriv.MptCtx;
struct mlme_priv *pmlmepriv = &pAdapter->mlmepriv;
/* HW Initialization for 8190 MPT. */
/* SW Initialization for 8190 MP. */
pMptCtx->bMptDrvUnload = false;
pMptCtx->bMassProdTest = false;
pMptCtx->bMptIndexEven = true; /* default gain index is -6.0db */
pMptCtx->h2cReqNum = 0x0;
/* Init mpt event. */
/* init for BT MP */
pMptCtx->bMptWorkItemInProgress = false;
pMptCtx->CurrMptAct = NULL;
/* */
/* Don't accept any packets */
rtw_write32(pAdapter, REG_RCR, 0);
PHY_IQCalibrate(pAdapter, false);
dm_CheckTXPowerTracking(&pHalData->odmpriv); /* trigger thermal meter */
PHY_LCCalibrate(pAdapter);
pMptCtx->backup0xc50 = (u8)PHY_QueryBBReg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0);
pMptCtx->backup0xc58 = (u8)PHY_QueryBBReg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0);
pMptCtx->backup0xc30 = (u8)PHY_QueryBBReg(pAdapter, rOFDM0_RxDetector1, bMaskByte0);
pMptCtx->backup0x52_RF_A = (u8)PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0);
pMptCtx->backup0x52_RF_B = (u8)PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0);
/* set ant to wifi side in mp mode */
rtw_write16(pAdapter, 0x870, 0x300);
rtw_write16(pAdapter, 0x860, 0x110);
if (pAdapter->registrypriv.mp_mode == 1)
pmlmepriv->fw_state = WIFI_MP_STATE;
return rtStatus;
}
/*-----------------------------------------------------------------------------
* Function: MPT_DeInitAdapter()
*
* Overview: Extra DeInitialization for Mass Production Test.
*
* Input: struct adapter * pAdapter
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 05/08/2007 MHC Create Version 0.
* 05/18/2007 MHC Add normal driver MPHalt code.
*
*---------------------------------------------------------------------------*/
void MPT_DeInitAdapter(struct adapter *pAdapter)
{
struct mpt_context *pMptCtx = &pAdapter->mppriv.MptCtx;
pMptCtx->bMptDrvUnload = true;
}
static u8 mpt_ProStartTest(struct adapter *padapter)
{
struct mpt_context *pMptCtx = &padapter->mppriv.MptCtx;
pMptCtx->bMassProdTest = true;
pMptCtx->bStartContTx = false;
pMptCtx->bCckContTx = false;
pMptCtx->bOfdmContTx = false;
pMptCtx->bSingleCarrier = false;
pMptCtx->bCarrierSuppression = false;
pMptCtx->bSingleTone = false;
return _SUCCESS;
}
/*
* General use
*/
s32 SetPowerTracking(struct adapter *padapter, u8 enable)
{
Hal_SetPowerTracking(padapter, enable);
return 0;
}
void GetPowerTracking(struct adapter *padapter, u8 *enable)
{
Hal_GetPowerTracking(padapter, enable);
}
static void disable_dm(struct adapter *padapter)
{
u8 v8;
/* 3 1. disable firmware dynamic mechanism */
/* disable Power Training, Rate Adaptive */
v8 = rtw_read8(padapter, REG_BCN_CTRL);
v8 &= ~EN_BCN_FUNCTION;
rtw_write8(padapter, REG_BCN_CTRL, v8);
/* 3 2. disable driver dynamic mechanism */
/* disable Dynamic Initial Gain */
/* disable High Power */
/* disable Power Tracking */
Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, false);
/* enable APK, LCK and IQK but disable power tracking */
Switch_DM_Func(padapter, DYNAMIC_RF_CALIBRATION, true);
}
/* This function initializes the DUT to the MP test mode */
s32 mp_start_test(struct adapter *padapter)
{
struct wlan_bssid_ex bssid;
struct sta_info *psta;
u32 length;
u8 val8;
s32 res = _SUCCESS;
struct mp_priv *pmppriv = &padapter->mppriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct wlan_network *tgt_network = &pmlmepriv->cur_network;
padapter->registrypriv.mp_mode = 1;
pmppriv->bSetTxPower = 0; /* for manually set tx power */
/* 3 disable dynamic mechanism */
disable_dm(padapter);
/* 3 0. update mp_priv */
if (padapter->registrypriv.rf_config == RF_819X_MAX_TYPE) {
switch (GET_RF_TYPE(padapter)) {
case RF_1T1R:
pmppriv->antenna_tx = ANTENNA_A;
pmppriv->antenna_rx = ANTENNA_A;
break;
case RF_1T2R:
default:
pmppriv->antenna_tx = ANTENNA_A;
pmppriv->antenna_rx = ANTENNA_AB;
break;
case RF_2T2R:
case RF_2T2R_GREEN:
pmppriv->antenna_tx = ANTENNA_AB;
pmppriv->antenna_rx = ANTENNA_AB;
break;
case RF_2T4R:
pmppriv->antenna_tx = ANTENNA_AB;
pmppriv->antenna_rx = ANTENNA_ABCD;
break;
}
}
mpt_ProStartTest(padapter);
/* 3 1. initialize a new struct wlan_bssid_ex */
/* memset(&bssid, 0, sizeof(struct wlan_bssid_ex)); */
memcpy(bssid.MacAddress, pmppriv->network_macaddr, ETH_ALEN);
bssid.Ssid.SsidLength = strlen("mp_pseudo_adhoc");
memcpy(bssid.Ssid.Ssid, (u8 *)"mp_pseudo_adhoc", bssid.Ssid.SsidLength);
bssid.InfrastructureMode = Ndis802_11IBSS;
bssid.NetworkTypeInUse = Ndis802_11DS;
bssid.IELength = 0;
length = get_wlan_bssid_ex_sz(&bssid);
if (length % 4)
bssid.Length = ((length >> 2) + 1) << 2; /* round up to multiple of 4 bytes. */
else
bssid.Length = length;
spin_lock_bh(&pmlmepriv->lock);
if (check_fwstate(pmlmepriv, WIFI_MP_STATE))
goto end_of_mp_start_test;
/* init mp_start_test status */
if (check_fwstate(pmlmepriv, _FW_LINKED)) {
rtw_disassoc_cmd(padapter, 500, true);
rtw_indicate_disconnect(padapter);
rtw_free_assoc_resources(padapter, 1);
}
pmppriv->prev_fw_state = get_fwstate(pmlmepriv);
if (padapter->registrypriv.mp_mode == 1)
pmlmepriv->fw_state = WIFI_MP_STATE;
set_fwstate(pmlmepriv, _FW_UNDER_LINKING);
/* 3 2. create a new psta for mp driver */
/* clear psta in the cur_network, if any */
psta = rtw_get_stainfo(&padapter->stapriv, tgt_network->network.MacAddress);
if (psta)
rtw_free_stainfo(padapter, psta);
psta = rtw_alloc_stainfo(&padapter->stapriv, bssid.MacAddress);
if (!psta) {
pmlmepriv->fw_state = pmppriv->prev_fw_state;
res = _FAIL;
goto end_of_mp_start_test;
}
/* 3 3. join psudo AdHoc */
tgt_network->join_res = 1;
tgt_network->aid = 1;
psta->aid = 1;
memcpy(&tgt_network->network, &bssid, length);
rtw_indicate_connect(padapter);
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
end_of_mp_start_test:
spin_unlock_bh(&pmlmepriv->lock);
if (res == _SUCCESS) {
/* set MSR to WIFI_FW_ADHOC_STATE */
val8 = rtw_read8(padapter, MSR) & 0xFC; /* 0x0102 */
val8 |= WIFI_FW_ADHOC_STATE;
rtw_write8(padapter, MSR, val8); /* Link in ad hoc network */
}
return res;
}
/* */
/* This function change the DUT from the MP test mode into normal mode */
void mp_stop_test(struct adapter *padapter)
{
struct mp_priv *pmppriv = &padapter->mppriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct wlan_network *tgt_network = &pmlmepriv->cur_network;
struct sta_info *psta;
if (pmppriv->mode == MP_ON) {
pmppriv->bSetTxPower = 0;
spin_lock_bh(&pmlmepriv->lock);
if (!check_fwstate(pmlmepriv, WIFI_MP_STATE))
goto end_of_mp_stop_test;
/* 3 1. disconnect psudo AdHoc */
rtw_indicate_disconnect(padapter);
/* 3 2. clear psta used in mp test mode. */
psta = rtw_get_stainfo(&padapter->stapriv, tgt_network->network.MacAddress);
if (psta)
rtw_free_stainfo(padapter, psta);
/* 3 3. return to normal state (default:station mode) */
pmlmepriv->fw_state = pmppriv->prev_fw_state; /* WIFI_STATION_STATE; */
/* flush the cur_network */
memset(tgt_network, 0, sizeof(struct wlan_network));
_clr_fwstate_(pmlmepriv, WIFI_MP_STATE);
end_of_mp_stop_test:
spin_unlock_bh(&pmlmepriv->lock);
}
}
/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/
/*
* SetChannel
* Description
* Use H2C command to change channel,
* not only modify rf register, but also other setting need to be done.
*/
void SetChannel(struct adapter *pAdapter)
{
Hal_SetChannel(pAdapter);
}
/*
* Notice
* Switch bandwitdth may change center frequency(channel)
*/
void SetBandwidth(struct adapter *pAdapter)
{
Hal_SetBandwidth(pAdapter);
}
void SetAntenna(struct adapter *pAdapter)
{
Hal_SetAntenna(pAdapter);
}
void SetAntennaPathPower(struct adapter *pAdapter)
{
Hal_SetAntennaPathPower(pAdapter);
}
void SetTxPower(struct adapter *pAdapter)
{
Hal_SetTxPower(pAdapter);
}
void SetDataRate(struct adapter *pAdapter)
{
Hal_SetDataRate(pAdapter);
}
void MP_PHY_SetRFPathSwitch(struct adapter *pAdapter, bool bMain)
{
PHY_SetRFPathSwitch(pAdapter, bMain);
}
s32 SetThermalMeter(struct adapter *pAdapter, u8 target_ther)
{
return Hal_SetThermalMeter(pAdapter, target_ther);
}
void GetThermalMeter(struct adapter *pAdapter, u8 *value)
{
Hal_GetThermalMeter(pAdapter, value);
}
void SetSingleCarrierTx(struct adapter *pAdapter, u8 bStart)
{
PhySetTxPowerLevel(pAdapter);
Hal_SetSingleCarrierTx(pAdapter, bStart);
}
void SetSingleToneTx(struct adapter *pAdapter, u8 bStart)
{
PhySetTxPowerLevel(pAdapter);
Hal_SetSingleToneTx(pAdapter, bStart);
}
void SetCarrierSuppressionTx(struct adapter *pAdapter, u8 bStart)
{
PhySetTxPowerLevel(pAdapter);
Hal_SetCarrierSuppressionTx(pAdapter, bStart);
}
void SetContinuousTx(struct adapter *pAdapter, u8 bStart)
{
PhySetTxPowerLevel(pAdapter);
Hal_SetContinuousTx(pAdapter, bStart);
}
void PhySetTxPowerLevel(struct adapter *pAdapter)
{
struct mp_priv *pmp_priv = &pAdapter->mppriv;
if (pmp_priv->bSetTxPower == 0) /* for NO manually set power index */
PHY_SetTxPowerLevel8188E(pAdapter, pmp_priv->channel);
}
/* */
static void dump_mpframe(struct adapter *padapter, struct xmit_frame *pmpframe)
{
rtw_hal_mgnt_xmit(padapter, pmpframe);
}
static struct xmit_frame *alloc_mp_xmitframe(struct xmit_priv *pxmitpriv)
{
struct xmit_frame *pmpframe;
struct xmit_buf *pxmitbuf;
pmpframe = rtw_alloc_xmitframe(pxmitpriv);
if (!pmpframe)
return NULL;
pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
if (!pxmitbuf) {
rtw_free_xmitframe(pxmitpriv, pmpframe);
return NULL;
}
pmpframe->frame_tag = MP_FRAMETAG;
pmpframe->pxmitbuf = pxmitbuf;
pmpframe->buf_addr = pxmitbuf->pbuf;
pxmitbuf->priv_data = pmpframe;
return pmpframe;
}
static int mp_xmit_packet_thread(void *context)
{
struct xmit_frame *pxmitframe;
struct mp_tx *pmptx;
struct mp_priv *pmp_priv;
struct xmit_priv *pxmitpriv;
struct adapter *padapter;
pmp_priv = (struct mp_priv *)context;
pmptx = &pmp_priv->tx;
padapter = pmp_priv->papdater;
pxmitpriv = &padapter->xmitpriv;
thread_enter("RTW_MP_THREAD");
/* DBG_88E("%s:pkTx Start\n", __func__); */
while (1) {
pxmitframe = alloc_mp_xmitframe(pxmitpriv);
if (!pxmitframe) {
if (pmptx->stop ||
padapter->bSurpriseRemoved ||
padapter->bDriverStopped) {
goto exit;
} else {
msleep(1);
continue;
}
}
memcpy((u8 *)(pxmitframe->buf_addr + TXDESC_OFFSET), pmptx->buf, pmptx->write_size);
memcpy(&pxmitframe->attrib, &pmptx->attrib, sizeof(struct pkt_attrib));
dump_mpframe(padapter, pxmitframe);
pmptx->sended++;
pmp_priv->tx_pktcount++;
if (pmptx->stop ||
padapter->bSurpriseRemoved ||
padapter->bDriverStopped)
goto exit;
if ((pmptx->count != 0) &&
(pmptx->count == pmptx->sended))
goto exit;
flush_signals_thread();
}
exit:
kfree(pmptx->pallocated_buf);
pmptx->pallocated_buf = NULL;
pmptx->stop = 1;
thread_exit();
}
void fill_txdesc_for_mp(struct adapter *padapter, struct tx_desc *ptxdesc)
{
struct mp_priv *pmp_priv = &padapter->mppriv;
memcpy(ptxdesc, &pmp_priv->tx.desc, TXDESC_SIZE);
}
void SetPacketTx(struct adapter *padapter)
{
u8 *ptr, *pkt_start, *pkt_end;
u32 pkt_size;
struct tx_desc *desc;
struct rtw_ieee80211_hdr *hdr;
u8 payload;
bool bmcast;
struct pkt_attrib *pattrib;
struct mp_priv *pmp_priv;
pmp_priv = &padapter->mppriv;
if (pmp_priv->tx.stop)
return;
pmp_priv->tx.sended = 0;
pmp_priv->tx.stop = 0;
pmp_priv->tx_pktcount = 0;
/* 3 1. update_attrib() */
pattrib = &pmp_priv->tx.attrib;
memcpy(pattrib->src, padapter->eeprompriv.mac_addr, ETH_ALEN);
memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
memcpy(pattrib->ra, pattrib->dst, ETH_ALEN);
bmcast = is_multicast_ether_addr(pattrib->ra);
if (bmcast) {
pattrib->mac_id = 1;
pattrib->psta = rtw_get_bcmc_stainfo(padapter);
} else {
pattrib->mac_id = 0;
pattrib->psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv));
}
pattrib->last_txcmdsz = pattrib->hdrlen + pattrib->pktlen;
/* 3 2. allocate xmit buffer */
pkt_size = pattrib->last_txcmdsz;
kfree(pmp_priv->tx.pallocated_buf);
pmp_priv->tx.write_size = pkt_size;
pmp_priv->tx.buf_size = pkt_size + XMITBUF_ALIGN_SZ;
pmp_priv->tx.pallocated_buf = kzalloc(pmp_priv->tx.buf_size, GFP_KERNEL);
if (!pmp_priv->tx.pallocated_buf) {
DBG_88E("%s: malloc(%d) fail!!\n", __func__, pmp_priv->tx.buf_size);
return;
}
pmp_priv->tx.buf = (u8 *)N_BYTE_ALIGMENT((size_t)(pmp_priv->tx.pallocated_buf), XMITBUF_ALIGN_SZ);
ptr = pmp_priv->tx.buf;
desc = &pmp_priv->tx.desc;
memset(desc, 0, TXDESC_SIZE);
pkt_start = ptr;
pkt_end = pkt_start + pkt_size;
/* 3 3. init TX descriptor */
/* offset 0 */
desc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
desc->txdw0 |= cpu_to_le32(pkt_size & 0x0000FFFF); /* packet size */
desc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) & 0x00FF0000); /* 32 bytes for TX Desc */
if (bmcast)
desc->txdw0 |= cpu_to_le32(BMC); /* broadcast packet */
desc->txdw1 |= cpu_to_le32((0x01 << 26) & 0xff000000);
/* offset 4 */
desc->txdw1 |= cpu_to_le32((pattrib->mac_id) & 0x3F); /* CAM_ID(MAC_ID) */
desc->txdw1 |= cpu_to_le32((pattrib->qsel << QSEL_SHT) & 0x00001F00); /* Queue Select, TID */
desc->txdw1 |= cpu_to_le32((pattrib->raid << RATE_ID_SHT) & 0x000F0000); /* Rate Adaptive ID */
/* offset 8 */
/* offset 12 */
desc->txdw3 |= cpu_to_le32((pattrib->seqnum << 16) & 0x0fff0000);
/* offset 16 */
desc->txdw4 |= cpu_to_le32(HW_SSN);
desc->txdw4 |= cpu_to_le32(USERATE);
desc->txdw4 |= cpu_to_le32(DISDATAFB);
if (pmp_priv->preamble) {
if (pmp_priv->rateidx <= MPT_RATE_54M)
desc->txdw4 |= cpu_to_le32(DATA_SHORT); /* CCK Short Preamble */
}
if (pmp_priv->bandwidth == HT_CHANNEL_WIDTH_40)
desc->txdw4 |= cpu_to_le32(DATA_BW);
/* offset 20 */
desc->txdw5 |= cpu_to_le32(pmp_priv->rateidx & 0x0000001F);
if (pmp_priv->preamble) {
if (pmp_priv->rateidx > MPT_RATE_54M)
desc->txdw5 |= cpu_to_le32(SGI); /* MCS Short Guard Interval */
}
desc->txdw5 |= cpu_to_le32(RTY_LMT_EN); /* retry limit enable */
desc->txdw5 |= cpu_to_le32(0x00180000); /* DATA/RTS Rate Fallback Limit */
/* 3 4. make wlan header, make_wlanhdr() */
hdr = (struct rtw_ieee80211_hdr *)pkt_start;
SetFrameSubType(&hdr->frame_ctl, pattrib->subtype);
memcpy(hdr->addr1, pattrib->dst, ETH_ALEN); /* DA */
memcpy(hdr->addr2, pattrib->src, ETH_ALEN); /* SA */
memcpy(hdr->addr3, get_bssid(&padapter->mlmepriv), ETH_ALEN); /* RA, BSSID */
/* 3 5. make payload */
ptr = pkt_start + pattrib->hdrlen;
switch (pmp_priv->tx.payload) {
case 0:
payload = 0x00;
break;
case 1:
payload = 0x5a;
break;
case 2:
payload = 0xa5;
break;
case 3:
payload = 0xff;
break;
default:
payload = 0x00;
break;
}
memset(ptr, payload, pkt_end - ptr);
/* 3 6. start thread */
pmp_priv->tx.PktTxThread = kthread_run(mp_xmit_packet_thread, pmp_priv, "RTW_MP_THREAD");
if (IS_ERR(pmp_priv->tx.PktTxThread))
DBG_88E("Create PktTx Thread Fail !!!!!\n");
}
void SetPacketRx(struct adapter *pAdapter, u8 bStartRx)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
if (bStartRx) {
/* Accept CRC error and destination address */
pHalData->ReceiveConfig = AAP | APM | AM | AB | APP_ICV |
AMF | ADF | APP_FCS | HTC_LOC_CTRL |
APP_MIC | APP_PHYSTS;
pHalData->ReceiveConfig |= (RCR_ACRC32 | RCR_AAP);
rtw_write32(pAdapter, REG_RCR, pHalData->ReceiveConfig);
/* Accept all data frames */
rtw_write16(pAdapter, REG_RXFLTMAP2, 0xFFFF);
} else {
rtw_write32(pAdapter, REG_RCR, 0);
}
}
void ResetPhyRxPktCount(struct adapter *pAdapter)
{
u32 i, phyrx_set = 0;
for (i = 0; i <= 0xF; i++) {
phyrx_set = 0;
phyrx_set |= _RXERR_RPT_SEL(i); /* select */
phyrx_set |= RXERR_RPT_RST; /* set counter to zero */
rtw_write32(pAdapter, REG_RXERR_RPT, phyrx_set);
}
}
static u32 GetPhyRxPktCounts(struct adapter *pAdapter, u32 selbit)
{
/* selection */
u32 phyrx_set = 0, count = 0;
phyrx_set = _RXERR_RPT_SEL(selbit & 0xF);
rtw_write32(pAdapter, REG_RXERR_RPT, phyrx_set);
/* Read packet count */
count = rtw_read32(pAdapter, REG_RXERR_RPT) & RXERR_COUNTER_MASK;
return count;
}
u32 GetPhyRxPktReceived(struct adapter *pAdapter)
{
u32 OFDM_cnt = 0, CCK_cnt = 0, HT_cnt = 0;
OFDM_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_OFDM_MPDU_OK);
CCK_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_CCK_MPDU_OK);
HT_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_HT_MPDU_OK);
return OFDM_cnt + CCK_cnt + HT_cnt;
}
u32 GetPhyRxPktCRC32Error(struct adapter *pAdapter)
{
u32 OFDM_cnt = 0, CCK_cnt = 0, HT_cnt = 0;
OFDM_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_OFDM_MPDU_FAIL);
CCK_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_CCK_MPDU_FAIL);
HT_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_HT_MPDU_FAIL);
return OFDM_cnt + CCK_cnt + HT_cnt;
}
/* reg 0x808[9:0]: FFT data x */
/* reg 0x808[22]: 0 --> 1 to get 1 FFT data y */
/* reg 0x8B4[15:0]: FFT data y report */
static u32 rtw_GetPSDData(struct adapter *pAdapter, u32 point)
{
int psd_val;
psd_val = rtw_read32(pAdapter, 0x808);
psd_val &= 0xFFBFFC00;
psd_val |= point;
rtw_write32(pAdapter, 0x808, psd_val);
mdelay(1);
psd_val |= 0x00400000;
rtw_write32(pAdapter, 0x808, psd_val);
mdelay(1);
psd_val = rtw_read32(pAdapter, 0x8B4);
psd_val &= 0x0000FFFF;
return psd_val;
}
/*
*pts start_point_min stop_point_max
* 128 64 64 + 128 = 192
* 256 128 128 + 256 = 384
* 512 256 256 + 512 = 768
* 1024 512 512 + 1024 = 1536
*/
u32 mp_query_psd(struct adapter *pAdapter, u8 *data)
{
u32 i, psd_pts = 0, psd_start = 0, psd_stop = 0;
u32 psd_data = 0;
if (!netif_running(pAdapter->pnetdev))
return 0;
if (!check_fwstate(&pAdapter->mlmepriv, WIFI_MP_STATE))
return 0;
if (strlen(data) == 0) { /* default value */
psd_pts = 128;
psd_start = 64;
psd_stop = 128;
} else {
sscanf(data, "pts =%d, start =%d, stop =%d", &psd_pts, &psd_start, &psd_stop);
}
memset(data, '\0', sizeof(*data));
i = psd_start;
while (i < psd_stop) {
if (i >= psd_pts) {
psd_data = rtw_GetPSDData(pAdapter, i - psd_pts);
} else {
psd_data = rtw_GetPSDData(pAdapter, i);
}
sprintf(data + strlen(data), "%x ", psd_data);
i++;
}
msleep(100);
return strlen(data) + 1;
}
void _rtw_mp_xmit_priv(struct xmit_priv *pxmitpriv)
{
int i, res;
struct adapter *padapter = pxmitpriv->adapter;
struct xmit_buf *pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmitbuf;
u32 max_xmit_extbuf_size = MAX_XMIT_EXTBUF_SZ;
u32 num_xmit_extbuf = NR_XMIT_EXTBUFF;
if (padapter->registrypriv.mp_mode == 0) {
max_xmit_extbuf_size = MAX_XMIT_EXTBUF_SZ;
num_xmit_extbuf = NR_XMIT_EXTBUFF;
} else {
max_xmit_extbuf_size = 6000;
num_xmit_extbuf = 8;
}
pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmit_extbuf;
for (i = 0; i < num_xmit_extbuf; i++) {
rtw_os_xmit_resource_free(padapter, pxmitbuf, (max_xmit_extbuf_size + XMITBUF_ALIGN_SZ));
pxmitbuf++;
}
vfree(pxmitpriv->pallocated_xmit_extbuf);
if (padapter->registrypriv.mp_mode == 0) {
max_xmit_extbuf_size = 6000;
num_xmit_extbuf = 8;
} else {
max_xmit_extbuf_size = MAX_XMIT_EXTBUF_SZ;
num_xmit_extbuf = NR_XMIT_EXTBUFF;
}
/* Init xmit extension buff */
_rtw_init_queue(&pxmitpriv->free_xmit_extbuf_queue);
pxmitpriv->pallocated_xmit_extbuf = vzalloc(num_xmit_extbuf * sizeof(struct xmit_buf) + 4);
if (!pxmitpriv->pallocated_xmit_extbuf) {
res = _FAIL;
goto exit;
}
pxmitpriv->pxmit_extbuf = (u8 *)N_BYTE_ALIGMENT((size_t)(pxmitpriv->pallocated_xmit_extbuf), 4);
pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmit_extbuf;
for (i = 0; i < num_xmit_extbuf; i++) {
INIT_LIST_HEAD(&pxmitbuf->list);
pxmitbuf->priv_data = NULL;
pxmitbuf->padapter = padapter;
pxmitbuf->ext_tag = true;
res = rtw_os_xmit_resource_alloc(padapter, pxmitbuf, max_xmit_extbuf_size + XMITBUF_ALIGN_SZ);
if (res == _FAIL) {
res = _FAIL;
goto exit;
}
list_add_tail(&pxmitbuf->list, &pxmitpriv->free_xmit_extbuf_queue.queue);
pxmitbuf++;
}
pxmitpriv->free_xmit_extbuf_cnt = num_xmit_extbuf;
exit:
;
}
void Hal_ProSetCrystalCap(struct adapter *pAdapter, u32 CrystalCapVal)
{
CrystalCapVal = CrystalCapVal & 0x3F;
// write 0x24[16:11] = 0x24[22:17] = CrystalCap
PHY_SetBBReg(pAdapter, REG_AFE_XTAL_CTRL, 0x7FF800,
(CrystalCapVal | (CrystalCapVal << 6)));
}

1170
drivers/staging/r8188eu/core/rtw_mp_ioctl.c
View File

File diff suppressed because it is too large Load Diff

43
drivers/staging/r8188eu/core/rtw_p2p.c
View File

@ -7,8 +7,6 @@
#include "../include/rtw_p2p.h"
#include "../include/wifi.h"
#ifdef CONFIG_88EU_P2P
static int rtw_p2p_is_channel_list_ok(u8 desired_ch, u8 *ch_list, u8 ch_cnt)
{
int found = 0, i = 0;
@ -735,13 +733,6 @@ u32 build_assoc_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 status
return len;
}
u32 build_deauth_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
{
u32 len = 0;
return len;
}
u32 process_probe_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len)
{
u8 *p;
@ -1494,7 +1485,7 @@ static void pre_tx_invitereq_handler(struct adapter *padapter)
u8 val8 = 1;
set_channel_bwmode(padapter, pwdinfo->invitereq_info.peer_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20);
padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
SetHwReg8188EU(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
issue_probereq_p2p(padapter, NULL);
_set_timer(&pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT);
@ -1506,7 +1497,7 @@ static void pre_tx_provdisc_handler(struct adapter *padapter)
u8 val8 = 1;
set_channel_bwmode(padapter, pwdinfo->tx_prov_disc_info.peer_channel_num[0], HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20);
rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
SetHwReg8188EU(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
issue_probereq_p2p(padapter, NULL);
_set_timer(&pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT);
@ -1518,7 +1509,7 @@ static void pre_tx_negoreq_handler(struct adapter *padapter)
u8 val8 = 1;
set_channel_bwmode(padapter, pwdinfo->nego_req_info.peer_channel_num[0], HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20);
rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
SetHwReg8188EU(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
issue_probereq_p2p(padapter, NULL);
_set_timer(&pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT);
@ -1643,7 +1634,7 @@ void p2p_ps_wk_hdl(struct adapter *padapter, u8 p2p_ps_state)
case P2P_PS_DISABLE:
pwdinfo->p2p_ps_state = p2p_ps_state;
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_P2P_PS_OFFLOAD, (u8 *)(&p2p_ps_state));
SetHwReg8188EU(padapter, HW_VAR_H2C_FW_P2P_PS_OFFLOAD, (u8 *)(&p2p_ps_state));
pwdinfo->noa_index = 0;
pwdinfo->ctwindow = 0;
@ -1653,7 +1644,7 @@ void p2p_ps_wk_hdl(struct adapter *padapter, u8 p2p_ps_state)
if (padapter->pwrctrlpriv.bFwCurrentInPSMode) {
if (pwrpriv->smart_ps == 0) {
pwrpriv->smart_ps = 2;
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&padapter->pwrctrlpriv.pwr_mode));
SetHwReg8188EU(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&padapter->pwrctrlpriv.pwr_mode));
}
}
break;
@ -1665,10 +1656,10 @@ void p2p_ps_wk_hdl(struct adapter *padapter, u8 p2p_ps_state)
if (pwrpriv->smart_ps != 0) {
pwrpriv->smart_ps = 0;
DBG_88E("%s(): Enter CTW, change SmartPS\n", __func__);
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&padapter->pwrctrlpriv.pwr_mode));
SetHwReg8188EU(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&padapter->pwrctrlpriv.pwr_mode));
}
}
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_P2P_PS_OFFLOAD, (u8 *)(&p2p_ps_state));
SetHwReg8188EU(padapter, HW_VAR_H2C_FW_P2P_PS_OFFLOAD, (u8 *)(&p2p_ps_state));
}
break;
case P2P_PS_SCAN:
@ -1676,7 +1667,7 @@ void p2p_ps_wk_hdl(struct adapter *padapter, u8 p2p_ps_state)
case P2P_PS_ALLSTASLEEP:
if (pwdinfo->p2p_ps_mode > P2P_PS_NONE) {
pwdinfo->p2p_ps_state = p2p_ps_state;
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_P2P_PS_OFFLOAD, (u8 *)(&p2p_ps_state));
SetHwReg8188EU(padapter, HW_VAR_H2C_FW_P2P_PS_OFFLOAD, (u8 *)(&p2p_ps_state));
}
break;
default:
@ -1832,7 +1823,6 @@ void rtw_init_wifidirect_timers(struct adapter *padapter)
void rtw_init_wifidirect_addrs(struct adapter *padapter, u8 *dev_addr, u8 *iface_addr)
{
#ifdef CONFIG_88EU_P2P
struct wifidirect_info *pwdinfo = &padapter->wdinfo;
/*init device&interface address */
@ -1840,7 +1830,6 @@ void rtw_init_wifidirect_addrs(struct adapter *padapter, u8 *dev_addr, u8 *iface
memcpy(pwdinfo->device_addr, dev_addr, ETH_ALEN);
if (iface_addr)
memcpy(pwdinfo->interface_addr, iface_addr, ETH_ALEN);
#endif
}
void init_wifidirect_info(struct adapter *padapter, enum P2P_ROLE role)
@ -1955,7 +1944,7 @@ int rtw_p2p_enable(struct adapter *padapter, enum P2P_ROLE role)
/* Enable P2P function */
init_wifidirect_info(padapter, role);
rtw_hal_set_odm_var(padapter, HAL_ODM_P2P_STATE, NULL, true);
rtl8188e_SetHalODMVar(padapter, HAL_ODM_P2P_STATE, NULL, true);
} else if (role == P2P_ROLE_DISABLE) {
if (_FAIL == rtw_pwr_wakeup(padapter)) {
ret = _FAIL;
@ -1974,7 +1963,7 @@ int rtw_p2p_enable(struct adapter *padapter, enum P2P_ROLE role)
memset(&pwdinfo->rx_prov_disc_info, 0x00, sizeof(struct rx_provdisc_req_info));
}
rtw_hal_set_odm_var(padapter, HAL_ODM_P2P_STATE, NULL, false);
rtl8188e_SetHalODMVar(padapter, HAL_ODM_P2P_STATE, NULL, false);
/* Restore to initial setting. */
update_tx_basic_rate(padapter, padapter->registrypriv.wireless_mode);
@ -1983,15 +1972,3 @@ int rtw_p2p_enable(struct adapter *padapter, enum P2P_ROLE role)
exit:
return ret;
}
#else
u8 p2p_ps_wk_cmd(struct adapter *padapter, u8 p2p_ps_state, u8 enqueue)
{
return _FAIL;
}
void process_p2p_ps_ie(struct adapter *padapter, u8 *IEs, u32 IELength)
{
}
#endif /* CONFIG_88EU_P2P */

140
drivers/staging/r8188eu/core/rtw_pwrctrl.c
View File

@ -13,9 +13,6 @@ void ips_enter(struct adapter *padapter)
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
struct xmit_priv *pxmit_priv = &padapter->xmitpriv;
if (padapter->registrypriv.mp_mode == 1)
return;
if (pxmit_priv->free_xmitbuf_cnt != NR_XMITBUFF ||
pxmit_priv->free_xmit_extbuf_cnt != NR_XMIT_EXTBUFF) {
DBG_88E_LEVEL(_drv_info_, "There are some pkts to transmit\n");
@ -24,7 +21,7 @@ void ips_enter(struct adapter *padapter)
return;
}
_enter_pwrlock(&pwrpriv->lock);
mutex_lock(&pwrpriv->lock);
pwrpriv->bips_processing = true;
@ -45,7 +42,7 @@ void ips_enter(struct adapter *padapter)
}
pwrpriv->bips_processing = false;
_exit_pwrlock(&pwrpriv->lock);
mutex_unlock(&pwrpriv->lock);
}
int ips_leave(struct adapter *padapter)
@ -56,7 +53,7 @@ int ips_leave(struct adapter *padapter)
int result = _SUCCESS;
int keyid;
_enter_pwrlock(&pwrpriv->lock);
mutex_lock(&pwrpriv->lock);
if ((pwrpriv->rf_pwrstate == rf_off) && (!pwrpriv->bips_processing)) {
pwrpriv->bips_processing = true;
@ -90,7 +87,7 @@ int ips_leave(struct adapter *padapter)
pwrpriv->bpower_saving = false;
}
_exit_pwrlock(&pwrpriv->lock);
mutex_unlock(&pwrpriv->lock);
return result;
}
@ -99,10 +96,7 @@ static bool rtw_pwr_unassociated_idle(struct adapter *adapter)
{
struct adapter *buddy = adapter->pbuddy_adapter;
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
#ifdef CONFIG_88EU_P2P
struct wifidirect_info *pwdinfo = &adapter->wdinfo;
#endif
bool ret = false;
if (adapter->pwrctrlpriv.ips_deny_time >= jiffies)
@ -113,29 +107,19 @@ static bool rtw_pwr_unassociated_idle(struct adapter *adapter)
check_fwstate(pmlmepriv, WIFI_UNDER_WPS) ||
check_fwstate(pmlmepriv, WIFI_AP_STATE) ||
check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE | WIFI_ADHOC_STATE) ||
#if defined(CONFIG_88EU_P2P)
!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE))
#else
0)
#endif
goto exit;
/* consider buddy, if exist */
if (buddy) {
struct mlme_priv *b_pmlmepriv = &buddy->mlmepriv;
#ifdef CONFIG_88EU_P2P
struct wifidirect_info *b_pwdinfo = &buddy->wdinfo;
#endif
if (check_fwstate(b_pmlmepriv, WIFI_ASOC_STATE | WIFI_SITE_MONITOR) ||
check_fwstate(b_pmlmepriv, WIFI_UNDER_LINKING | WIFI_UNDER_WPS) ||
check_fwstate(b_pmlmepriv, WIFI_AP_STATE) ||
check_fwstate(b_pmlmepriv, WIFI_ADHOC_MASTER_STATE | WIFI_ADHOC_STATE) ||
#if defined(CONFIG_88EU_P2P)
!rtw_p2p_chk_state(b_pwdinfo, P2P_STATE_NONE))
#else
0)
#endif
goto exit;
}
ret = true;
@ -148,32 +132,12 @@ void rtw_ps_processor(struct adapter *padapter)
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
enum rt_rf_power_state rfpwrstate;
pwrpriv->ps_processing = true;
if (pwrpriv->bips_processing)
goto exit;
if (padapter->pwrctrlpriv.bHWPwrPindetect) {
rfpwrstate = RfOnOffDetect(padapter);
DBG_88E("@@@@- #2 %s==> rfstate:%s\n", __func__, (rfpwrstate == rf_on) ? "rf_on" : "rf_off");
if (rfpwrstate != pwrpriv->rf_pwrstate) {
if (rfpwrstate == rf_off) {
pwrpriv->change_rfpwrstate = rf_off;
pwrpriv->brfoffbyhw = true;
padapter->bCardDisableWOHSM = true;
rtw_hw_suspend(padapter);
} else {
pwrpriv->change_rfpwrstate = rf_on;
rtw_hw_resume(padapter);
}
DBG_88E("current rf_pwrstate(%s)\n", (pwrpriv->rf_pwrstate == rf_off) ? "rf_off" : "rf_on");
}
pwrpriv->pwr_state_check_cnts++;
}
if (pwrpriv->ips_mode_req == IPS_NONE)
goto exit;
@ -199,51 +163,6 @@ static void pwr_state_check_handler(struct timer_list *t)
rtw_ps_cmd(padapter);
}
/*
*
* Parameters
* padapter
* pslv power state level, only could be PS_STATE_S0 ~ PS_STATE_S4
*
*/
void rtw_set_rpwm(struct adapter *padapter, u8 pslv)
{
u8 rpwm;
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
pslv = PS_STATE(pslv);
if (pwrpriv->btcoex_rfon) {
if (pslv < PS_STATE_S4)
pslv = PS_STATE_S3;
}
if (pwrpriv->rpwm == pslv)
return;
if ((padapter->bSurpriseRemoved) ||
(!padapter->hw_init_completed)) {
pwrpriv->cpwm = PS_STATE_S4;
return;
}
if (padapter->bDriverStopped) {
if (pslv < PS_STATE_S2)
return;
}
rpwm = pslv | pwrpriv->tog;
pwrpriv->rpwm = pslv;
rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&rpwm));
pwrpriv->tog += 0x80;
pwrpriv->cpwm = pslv;
}
static u8 PS_RDY_CHECK(struct adapter *padapter)
{
u32 curr_time, delta_time;
@ -274,9 +193,7 @@ static u8 PS_RDY_CHECK(struct adapter *padapter)
void rtw_set_ps_mode(struct adapter *padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode)
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
#ifdef CONFIG_88EU_P2P
struct wifidirect_info *pwdinfo = &padapter->wdinfo;
#endif /* CONFIG_88EU_P2P */
if (ps_mode > PM_Card_Disable)
return;
@ -292,31 +209,24 @@ void rtw_set_ps_mode(struct adapter *padapter, u8 ps_mode, u8 smart_ps, u8 bcn_a
/* if (pwrpriv->pwr_mode == PS_MODE_ACTIVE) */
if (ps_mode == PS_MODE_ACTIVE) {
#ifdef CONFIG_88EU_P2P
if (pwdinfo->opp_ps == 0) {
DBG_88E("rtw_set_ps_mode: Leave 802.11 power save\n");
pwrpriv->pwr_mode = ps_mode;
rtw_set_rpwm(padapter, PS_STATE_S4);
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode));
SetHwReg8188EU(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode));
pwrpriv->bFwCurrentInPSMode = false;
}
} else {
#endif /* CONFIG_88EU_P2P */
if (PS_RDY_CHECK(padapter)) {
DBG_88E("%s: Enter 802.11 power save\n", __func__);
pwrpriv->bFwCurrentInPSMode = true;
pwrpriv->pwr_mode = ps_mode;
pwrpriv->smart_ps = smart_ps;
pwrpriv->bcn_ant_mode = bcn_ant_mode;
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode));
SetHwReg8188EU(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode));
#ifdef CONFIG_88EU_P2P
/* Set CTWindow after LPS */
if (pwdinfo->opp_ps == 1)
p2p_ps_wk_cmd(padapter, P2P_PS_ENABLE, 0);
#endif /* CONFIG_88EU_P2P */
rtw_set_rpwm(padapter, PS_STATE_S2);
}
}
@ -336,7 +246,7 @@ s32 LPS_RF_ON_check(struct adapter *padapter, u32 delay_ms)
start_time = jiffies;
while (1) {
rtw_hal_get_hwreg(padapter, HW_VAR_FWLPS_RF_ON, &bAwake);
GetHwReg8188EU(padapter, HW_VAR_FWLPS_RF_ON, &bAwake);
if (bAwake)
break;
@ -427,7 +337,7 @@ void rtw_init_pwrctrl_priv(struct adapter *padapter)
{
struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv;
_init_pwrlock(&pwrctrlpriv->lock);
mutex_init(&pwrctrlpriv->lock);
pwrctrlpriv->rf_pwrstate = rf_on;
pwrctrlpriv->ips_enter_cnts = 0;
pwrctrlpriv->ips_leave_cnts = 0;
@ -443,50 +353,18 @@ void rtw_init_pwrctrl_priv(struct adapter *padapter)
pwrctrlpriv->bkeepfwalive = false;
pwrctrlpriv->LpsIdleCount = 0;
if (padapter->registrypriv.mp_mode == 1)
pwrctrlpriv->power_mgnt = PS_MODE_ACTIVE;
else
pwrctrlpriv->power_mgnt = padapter->registrypriv.power_mgnt;/* PS_MODE_MIN; */
pwrctrlpriv->power_mgnt = padapter->registrypriv.power_mgnt;/* PS_MODE_MIN; */
pwrctrlpriv->bLeisurePs = (PS_MODE_ACTIVE != pwrctrlpriv->power_mgnt) ? true : false;
pwrctrlpriv->bFwCurrentInPSMode = false;
pwrctrlpriv->rpwm = 0;
pwrctrlpriv->cpwm = PS_STATE_S4;
pwrctrlpriv->pwr_mode = PS_MODE_ACTIVE;
pwrctrlpriv->smart_ps = padapter->registrypriv.smart_ps;
pwrctrlpriv->bcn_ant_mode = 0;
pwrctrlpriv->tog = 0x80;
pwrctrlpriv->btcoex_rfon = false;
timer_setup(&pwrctrlpriv->pwr_state_check_timer, pwr_state_check_handler, 0);
}
void rtw_free_pwrctrl_priv(struct adapter *adapter)
{
struct pwrctrl_priv *pwrctrlpriv = &adapter->pwrctrlpriv;
_free_pwrlock(&pwrctrlpriv->lock);
}
u8 rtw_interface_ps_func(struct adapter *padapter, enum hal_intf_ps_func efunc_id, u8 *val)
{
u8 bResult = true;
rtw_hal_intf_ps_func(padapter, efunc_id, val);
return bResult;
}
inline void rtw_set_ips_deny(struct adapter *padapter, u32 ms)
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
pwrpriv->ips_deny_time = jiffies + rtw_ms_to_systime(ms);
}
/*
* rtw_pwr_wakeup - Wake the NIC up from: 1)IPS. 2)USB autosuspend
* @adapter: pointer to struct adapter structure

116
drivers/staging/r8188eu/core/rtw_recv.c
View File

@ -9,6 +9,7 @@
#include "../include/mlme_osdep.h"
#include "../include/usb_ops.h"
#include "../include/wifi.h"
#include "../include/rtl8188e_recv.h"
static u8 SNAP_ETH_TYPE_IPX[2] = {0x81, 0x37};
static u8 SNAP_ETH_TYPE_APPLETALK_AARP[2] = {0x80, 0xf3};
@ -31,7 +32,7 @@ void _rtw_init_sta_recv_priv(struct sta_recv_priv *psta_recvpriv)
spin_lock_init(&psta_recvpriv->lock);
_rtw_init_queue(&psta_recvpriv->defrag_q);
rtw_init_queue(&psta_recvpriv->defrag_q);
}
@ -45,9 +46,9 @@ int _rtw_init_recv_priv(struct recv_priv *precvpriv, struct adapter *padapter)
spin_lock_init(&precvpriv->lock);
_rtw_init_queue(&precvpriv->free_recv_queue);
_rtw_init_queue(&precvpriv->recv_pending_queue);
_rtw_init_queue(&precvpriv->uc_swdec_pending_queue);
rtw_init_queue(&precvpriv->free_recv_queue);
rtw_init_queue(&precvpriv->recv_pending_queue);
rtw_init_queue(&precvpriv->uc_swdec_pending_queue);
precvpriv->adapter = padapter;
@ -82,7 +83,7 @@ int _rtw_init_recv_priv(struct recv_priv *precvpriv, struct adapter *padapter)
sema_init(&precvpriv->allrxreturnevt, 0);
res = rtw_hal_init_recv_priv(padapter);
res = rtl8188eu_init_recv_priv(padapter);
timer_setup(&precvpriv->signal_stat_timer, rtw_signal_stat_timer_hdl, 0);
precvpriv->signal_stat_sampling_interval = 1000; /* ms */
@ -103,7 +104,7 @@ void _rtw_free_recv_priv(struct recv_priv *precvpriv)
vfree(precvpriv->pallocated_frame_buf);
rtw_hal_free_recv_priv(padapter);
rtl8188eu_free_recv_priv(padapter);
}
struct recv_frame *_rtw_alloc_recvframe(struct __queue *pfree_recv_queue)
@ -147,14 +148,6 @@ struct recv_frame *rtw_alloc_recvframe(struct __queue *pfree_recv_queue)
return precvframe;
}
void rtw_init_recvframe(struct recv_frame *precvframe, struct recv_priv *precvpriv)
{
/* Perry: This can be removed */
INIT_LIST_HEAD(&precvframe->list);
precvframe->len = 0;
}
int rtw_free_recvframe(struct recv_frame *precvframe, struct __queue *pfree_recv_queue)
{
struct adapter *padapter;
@ -257,56 +250,6 @@ u32 rtw_free_uc_swdec_pending_queue(struct adapter *adapter)
return cnt;
}
int rtw_enqueue_recvbuf_to_head(struct recv_buf *precvbuf, struct __queue *queue)
{
spin_lock_bh(&queue->lock);
list_del_init(&precvbuf->list);
list_add(&precvbuf->list, get_list_head(queue));
spin_unlock_bh(&queue->lock);
return _SUCCESS;
}
int rtw_enqueue_recvbuf(struct recv_buf *precvbuf, struct __queue *queue)
{
unsigned long flags;
spin_lock_irqsave(&queue->lock, flags);
list_del_init(&precvbuf->list);
list_add_tail(&precvbuf->list, get_list_head(queue));
spin_unlock_irqrestore(&queue->lock, flags);
return _SUCCESS;
}
struct recv_buf *rtw_dequeue_recvbuf(struct __queue *queue)
{
struct recv_buf *precvbuf;
struct list_head *plist, *phead;
unsigned long flags;
spin_lock_irqsave(&queue->lock, flags);
if (list_empty(&queue->queue)) {
precvbuf = NULL;
} else {
phead = get_list_head(queue);
plist = phead->next;
precvbuf = container_of(plist, struct recv_buf, list);
list_del_init(&precvbuf->list);
}
spin_unlock_irqrestore(&queue->lock, flags);
return precvbuf;
}
static int recvframe_chkmic(struct adapter *adapter, struct recv_frame *precvframe)
{
int i, res = _SUCCESS;
@ -418,13 +361,13 @@ static struct recv_frame *decryptor(struct adapter *padapter, struct recv_frame
switch (prxattrib->encrypt) {
case _WEP40_:
case _WEP104_:
rtw_wep_decrypt(padapter, (u8 *)precv_frame);
rtw_wep_decrypt(padapter, precv_frame);
break;
case _TKIP_:
res = rtw_tkip_decrypt(padapter, (u8 *)precv_frame);
res = rtw_tkip_decrypt(padapter, precv_frame);
break;
case _AES_:
res = rtw_aes_decrypt(padapter, (u8 *)precv_frame);
res = rtw_aes_decrypt(padapter, precv_frame);
break;
default:
break;
@ -523,7 +466,6 @@ static int recv_decache(struct recv_frame *precv_frame, u8 bretry, struct stainf
void process_pwrbit_data(struct adapter *padapter, struct recv_frame *precv_frame);
void process_pwrbit_data(struct adapter *padapter, struct recv_frame *precv_frame)
{
#ifdef CONFIG_88EU_AP_MODE
unsigned char pwrbit;
u8 *ptr = precv_frame->rx_data;
struct rx_pkt_attrib *pattrib = &precv_frame->attrib;
@ -543,13 +485,10 @@ void process_pwrbit_data(struct adapter *padapter, struct recv_frame *precv_fram
wakeup_sta_to_xmit(padapter, psta);
}
}
#endif
}
static void process_wmmps_data(struct adapter *padapter, struct recv_frame *precv_frame)
{
#ifdef CONFIG_88EU_AP_MODE
struct rx_pkt_attrib *pattrib = &precv_frame->attrib;
struct sta_priv *pstapriv = &padapter->stapriv;
struct sta_info *psta = NULL;
@ -598,8 +537,6 @@ static void process_wmmps_data(struct adapter *padapter, struct recv_frame *prec
}
}
}
#endif
}
static void count_rx_stats(struct adapter *padapter, struct recv_frame *prframe, struct sta_info *sta)
@ -710,14 +647,8 @@ int sta2sta_data_frame(struct adapter *adapter, struct recv_frame *precv_frame,
else
*psta = rtw_get_stainfo(pstapriv, sta_addr); /* get ap_info */
if (!*psta) {
if (adapter->registrypriv.mp_mode == 1) {
if (check_fwstate(pmlmepriv, WIFI_MP_STATE))
adapter->mppriv.rx_pktloss++;
}
ret = _FAIL;
if (!*psta)
goto exit;
}
exit:
@ -883,7 +814,6 @@ exit:
static int validate_recv_ctrl_frame(struct adapter *padapter,
struct recv_frame *precv_frame)
{
#ifdef CONFIG_88EU_AP_MODE
struct rx_pkt_attrib *pattrib = &precv_frame->attrib;
struct sta_priv *pstapriv = &padapter->stapriv;
u8 *pframe = precv_frame->rx_data;
@ -966,8 +896,6 @@ static int validate_recv_ctrl_frame(struct adapter *padapter,
pxmitframe->attrib.triggered = 1;
rtw_hal_xmitframe_enqueue(padapter, pxmitframe);
if (psta->sleepq_len == 0) {
pstapriv->tim_bitmap &= ~BIT(psta->aid);
@ -998,8 +926,6 @@ static int validate_recv_ctrl_frame(struct adapter *padapter,
}
}
#endif
return _FAIL;
}
@ -1189,7 +1115,7 @@ static int validate_recv_frame(struct adapter *adapter, struct recv_frame *precv
pattrib->order = GetOrder(ptr);
/* Dump rx packets */
rtw_hal_get_def_var(adapter, HAL_DEF_DBG_DUMP_RXPKT, &(bDumpRxPkt));
GetHalDefVar8188EUsb(adapter, HAL_DEF_DBG_DUMP_RXPKT, &bDumpRxPkt);
if (bDumpRxPkt == 1) {/* dump all rx packets */
int i;
DBG_88E("#############################\n");
@ -1860,22 +1786,7 @@ static int process_recv_indicatepkts(struct adapter *padapter, struct recv_frame
static int recv_func_prehandle(struct adapter *padapter, struct recv_frame *rframe)
{
int ret = _SUCCESS;
struct rx_pkt_attrib *pattrib = &rframe->attrib;
struct __queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
if (padapter->registrypriv.mp_mode == 1) {
if (pattrib->crc_err == 1)
padapter->mppriv.rx_crcerrpktcount++;
else
padapter->mppriv.rx_pktcount++;
if (!check_fwstate(pmlmepriv, WIFI_MP_LPBK_STATE)) {
ret = _FAIL;
rtw_free_recvframe(rframe, pfree_recv_queue);/* free this recv_frame */
goto exit;
}
}
/* check the frame crtl field and decache */
ret = validate_recv_frame(padapter, rframe);
@ -1998,9 +1909,6 @@ s32 rtw_recv_entry(struct recv_frame *precvframe)
_recv_entry_drop:
if (padapter->registrypriv.mp_mode == 1)
padapter->mppriv.rx_pktloss = precvpriv->rx_drop;
return ret;
}

17
drivers/staging/r8188eu/core/rtw_rf.c
View File

@ -53,20 +53,3 @@ u32 rtw_ch2freq(u32 channel)
return freq;
}
u32 rtw_freq2ch(u32 freq)
{
u8 i;
u32 ch = 0;
for (i = 0; i < ch_freq_map_num; i++) {
if (freq == ch_freq_map[i].frequency) {
ch = ch_freq_map[i].channel;
break;
}
}
if (i == ch_freq_map_num)
ch = 1;
return ch;
}

197
drivers/staging/r8188eu/core/rtw_security.c
View File

@ -10,80 +10,15 @@
/* WEP related ===== */
#define CRC32_POLY 0x04c11db7
struct arc4context {
u32 x;
u32 y;
u8 state[256];
};
static void arcfour_init(struct arc4context *parc4ctx, u8 *key, u32 key_len)
{
u32 t, u;
u32 keyindex;
u32 stateindex;
u8 *state;
u32 counter;
state = parc4ctx->state;
parc4ctx->x = 0;
parc4ctx->y = 0;
for (counter = 0; counter < 256; counter++)
state[counter] = (u8)counter;
keyindex = 0;
stateindex = 0;
for (counter = 0; counter < 256; counter++) {
t = state[counter];
stateindex = (stateindex + key[keyindex] + t) & 0xff;
u = state[stateindex];
state[stateindex] = (u8)t;
state[counter] = (u8)u;
if (++keyindex >= key_len)
keyindex = 0;
}
}
static u32 arcfour_byte(struct arc4context *parc4ctx)
{
u32 x;
u32 y;
u32 sx, sy;
u8 *state;
state = parc4ctx->state;
x = (parc4ctx->x + 1) & 0xff;
sx = state[x];
y = (sx + parc4ctx->y) & 0xff;
sy = state[y];
parc4ctx->x = x;
parc4ctx->y = y;
state[y] = (u8)sx;
state[x] = (u8)sy;
return state[(sx + sy) & 0xff];
}
static void arcfour_encrypt(struct arc4context *parc4ctx, u8 *dest, u8 *src, u32 len)
{
u32 i;
for (i = 0; i < len; i++)
dest[i] = src[i] ^ (unsigned char)arcfour_byte(parc4ctx);
}
/*
Need to consider the fragment situation
*/
void rtw_wep_encrypt(struct adapter *padapter, u8 *pxmitframe)
void rtw_wep_encrypt(struct adapter *padapter, struct xmit_frame *pxmitframe)
{ /* exclude ICV */
union {
__le32 f0;
u8 f1[4];
} crc;
struct arc4context mycontext;
int curfragnum, length;
u32 keylength;
@ -91,17 +26,16 @@ void rtw_wep_encrypt(struct adapter *padapter, u8 *pxmitframe)
u8 *pframe, *payload, *iv; /* wepkey */
u8 wepkey[16];
u8 hw_hdr_offset = 0;
struct pkt_attrib *pattrib = &((struct xmit_frame *)pxmitframe)->attrib;
struct pkt_attrib *pattrib = &pxmitframe->attrib;
struct security_priv *psecuritypriv = &padapter->securitypriv;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct arc4_ctx *ctx = &psecuritypriv->xmit_arc4_ctx;
if (!((struct xmit_frame *)pxmitframe)->buf_addr)
if (!pxmitframe->buf_addr)
return;
hw_hdr_offset = TXDESC_SIZE +
(((struct xmit_frame *)pxmitframe)->pkt_offset * PACKET_OFFSET_SZ);
pframe = ((struct xmit_frame *)pxmitframe)->buf_addr + hw_hdr_offset;
hw_hdr_offset = TXDESC_SIZE + pxmitframe->pkt_offset * PACKET_OFFSET_SZ;
pframe = pxmitframe->buf_addr + hw_hdr_offset;
/* start to encrypt each fragment */
if ((pattrib->encrypt == _WEP40_) || (pattrib->encrypt == _WEP104_)) {
@ -118,15 +52,15 @@ void rtw_wep_encrypt(struct adapter *padapter, u8 *pxmitframe)
crc.f0 = cpu_to_le32(~crc32_le(~0, payload, length));
arcfour_init(&mycontext, wepkey, 3 + keylength);
arcfour_encrypt(&mycontext, payload, payload, length);
arcfour_encrypt(&mycontext, payload + length, crc.f1, 4);
arc4_setkey(ctx, wepkey, 3 + keylength);
arc4_crypt(ctx, payload, payload, length);
arc4_crypt(ctx, payload + length, crc.f1, 4);
} else {
length = pxmitpriv->frag_len - pattrib->hdrlen - pattrib->iv_len - pattrib->icv_len;
crc.f0 = cpu_to_le32(~crc32_le(~0, payload, length));
arcfour_init(&mycontext, wepkey, 3 + keylength);
arcfour_encrypt(&mycontext, payload, payload, length);
arcfour_encrypt(&mycontext, payload + length, crc.f1, 4);
arc4_setkey(ctx, wepkey, 3 + keylength);
arc4_crypt(ctx, payload, payload, length);
arc4_crypt(ctx, payload + length, crc.f1, 4);
pframe += pxmitpriv->frag_len;
pframe = (u8 *)RND4((size_t)(pframe));
@ -136,18 +70,18 @@ void rtw_wep_encrypt(struct adapter *padapter, u8 *pxmitframe)
}
void rtw_wep_decrypt(struct adapter *padapter, u8 *precvframe)
void rtw_wep_decrypt(struct adapter *padapter, struct recv_frame *precvframe)
{
/* exclude ICV */
struct arc4context mycontext;
int length;
u32 keylength;
u8 *pframe, *payload, *iv, wepkey[16];
u8 keyindex;
struct rx_pkt_attrib *prxattrib = &(((struct recv_frame *)precvframe)->attrib);
struct rx_pkt_attrib *prxattrib = &precvframe->attrib;
struct security_priv *psecuritypriv = &padapter->securitypriv;
struct arc4_ctx *ctx = &psecuritypriv->recv_arc4_ctx;
pframe = (unsigned char *)((struct recv_frame *)precvframe)->rx_data;
pframe = precvframe->rx_data;
/* start to decrypt recvframe */
if ((prxattrib->encrypt == _WEP40_) || (prxattrib->encrypt == _WEP104_)) {
@ -156,13 +90,13 @@ void rtw_wep_decrypt(struct adapter *padapter, u8 *precvframe)
keylength = psecuritypriv->dot11DefKeylen[keyindex];
memcpy(&wepkey[0], iv, 3);
memcpy(&wepkey[3], &psecuritypriv->dot11DefKey[keyindex].skey[0], keylength);
length = ((struct recv_frame *)precvframe)->len - prxattrib->hdrlen - prxattrib->iv_len;
length = precvframe->len - prxattrib->hdrlen - prxattrib->iv_len;
payload = pframe + prxattrib->iv_len + prxattrib->hdrlen;
/* decrypt payload include icv */
arcfour_init(&mycontext, wepkey, 3 + keylength);
arcfour_encrypt(&mycontext, payload, payload, length);
arc4_setkey(ctx, wepkey, 3 + keylength);
arc4_crypt(ctx, payload, payload, length);
}
}
@ -502,7 +436,7 @@ static void phase2(u8 *rc4key, const u8 *tk, const u16 *p1k, u16 iv16)
}
/* The hlen isn't include the IV */
u32 rtw_tkip_encrypt(struct adapter *padapter, u8 *pxmitframe)
u32 rtw_tkip_encrypt(struct adapter *padapter, struct xmit_frame *pxmitframe)
{ /* exclude ICV */
u16 pnl;
u32 pnh;
@ -513,23 +447,23 @@ u32 rtw_tkip_encrypt(struct adapter *padapter, u8 *pxmitframe)
u8 f1[4];
} crc;
u8 hw_hdr_offset = 0;
struct arc4context mycontext;
int curfragnum, length;
u8 *pframe, *payload, *iv, *prwskey;
union pn48 dot11txpn;
struct sta_info *stainfo;
struct pkt_attrib *pattrib = &((struct xmit_frame *)pxmitframe)->attrib;
struct pkt_attrib *pattrib = &pxmitframe->attrib;
struct security_priv *psecuritypriv = &padapter->securitypriv;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct arc4_ctx *ctx = &psecuritypriv->xmit_arc4_ctx;
u32 res = _SUCCESS;
if (!((struct xmit_frame *)pxmitframe)->buf_addr)
if (!pxmitframe->buf_addr)
return _FAIL;
hw_hdr_offset = TXDESC_SIZE +
(((struct xmit_frame *)pxmitframe)->pkt_offset * PACKET_OFFSET_SZ);
pframe = ((struct xmit_frame *)pxmitframe)->buf_addr + hw_hdr_offset;
hw_hdr_offset = TXDESC_SIZE + pxmitframe->pkt_offset * PACKET_OFFSET_SZ;
pframe = pxmitframe->buf_addr + hw_hdr_offset;
/* 4 start to encrypt each fragment */
if (pattrib->encrypt == _TKIP_) {
if (pattrib->psta)
@ -558,16 +492,16 @@ u32 rtw_tkip_encrypt(struct adapter *padapter, u8 *pxmitframe)
length = pattrib->last_txcmdsz - pattrib->hdrlen - pattrib->iv_len - pattrib->icv_len;
crc.f0 = cpu_to_le32(~crc32_le(~0, payload, length));
arcfour_init(&mycontext, rc4key, 16);
arcfour_encrypt(&mycontext, payload, payload, length);
arcfour_encrypt(&mycontext, payload + length, crc.f1, 4);
arc4_setkey(ctx, rc4key, 16);
arc4_crypt(ctx, payload, payload, length);
arc4_crypt(ctx, payload + length, crc.f1, 4);
} else {
length = pxmitpriv->frag_len - pattrib->hdrlen - pattrib->iv_len - pattrib->icv_len;
crc.f0 = cpu_to_le32(~crc32_le(~0, payload, length));
arcfour_init(&mycontext, rc4key, 16);
arcfour_encrypt(&mycontext, payload, payload, length);
arcfour_encrypt(&mycontext, payload + length, crc.f1, 4);
arc4_setkey(ctx, rc4key, 16);
arc4_crypt(ctx, payload, payload, length);
arc4_crypt(ctx, payload + length, crc.f1, 4);
pframe += pxmitpriv->frag_len;
pframe = (u8 *)RND4((size_t)(pframe));
@ -582,7 +516,7 @@ u32 rtw_tkip_encrypt(struct adapter *padapter, u8 *pxmitframe)
}
/* The hlen isn't include the IV */
u32 rtw_tkip_decrypt(struct adapter *padapter, u8 *precvframe)
u32 rtw_tkip_decrypt(struct adapter *padapter, struct recv_frame *precvframe)
{ /* exclude ICV */
u16 pnl;
u32 pnh;
@ -592,17 +526,17 @@ u32 rtw_tkip_decrypt(struct adapter *padapter, u8 *precvframe)
__le32 f0;
u8 f1[4];
} crc;
struct arc4context mycontext;
int length;
u8 *pframe, *payload, *iv, *prwskey;
union pn48 dot11txpn;
struct sta_info *stainfo;
struct rx_pkt_attrib *prxattrib = &((struct recv_frame *)precvframe)->attrib;
struct rx_pkt_attrib *prxattrib = &precvframe->attrib;
struct security_priv *psecuritypriv = &padapter->securitypriv;
struct arc4_ctx *ctx = &psecuritypriv->recv_arc4_ctx;
u32 res = _SUCCESS;
pframe = (unsigned char *)((struct recv_frame *)precvframe)->rx_data;
pframe = precvframe->rx_data;
/* 4 start to decrypt recvframe */
if (prxattrib->encrypt == _TKIP_) {
@ -621,7 +555,7 @@ u32 rtw_tkip_decrypt(struct adapter *padapter, u8 *precvframe)
iv = pframe + prxattrib->hdrlen;
payload = pframe + prxattrib->iv_len + prxattrib->hdrlen;
length = ((struct recv_frame *)precvframe)->len - prxattrib->hdrlen - prxattrib->iv_len;
length = precvframe->len - prxattrib->hdrlen - prxattrib->iv_len;
GET_TKIP_PN(iv, dot11txpn);
@ -633,8 +567,8 @@ u32 rtw_tkip_decrypt(struct adapter *padapter, u8 *precvframe)
/* 4 decrypt payload include icv */
arcfour_init(&mycontext, rc4key, 16);
arcfour_encrypt(&mycontext, payload, payload, length);
arc4_setkey(ctx, rc4key, 16);
arc4_crypt(ctx, payload, payload, length);
crc.f0 = cpu_to_le32(~crc32_le(~0, payload, length));
@ -1154,7 +1088,7 @@ static int aes_cipher(u8 *key, uint hdrlen, u8 *pframe, uint plen)
return _SUCCESS;
}
u32 rtw_aes_encrypt(struct adapter *padapter, u8 *pxmitframe)
u32 rtw_aes_encrypt(struct adapter *padapter, struct xmit_frame *pxmitframe)
{ /* exclude ICV */
/*static*/
@ -1165,20 +1099,18 @@ u32 rtw_aes_encrypt(struct adapter *padapter, u8 *pxmitframe)
u8 *pframe, *prwskey; /* *payload,*iv */
u8 hw_hdr_offset = 0;
struct sta_info *stainfo;
struct pkt_attrib *pattrib = &((struct xmit_frame *)pxmitframe)->attrib;
struct pkt_attrib *pattrib = &pxmitframe->attrib;
struct security_priv *psecuritypriv = &padapter->securitypriv;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
/* uint offset = 0; */
u32 res = _SUCCESS;
if (!((struct xmit_frame *)pxmitframe)->buf_addr)
if (!pxmitframe->buf_addr)
return _FAIL;
hw_hdr_offset = TXDESC_SIZE +
(((struct xmit_frame *)pxmitframe)->pkt_offset * PACKET_OFFSET_SZ);
pframe = ((struct xmit_frame *)pxmitframe)->buf_addr + hw_hdr_offset;
hw_hdr_offset = TXDESC_SIZE + pxmitframe->pkt_offset * PACKET_OFFSET_SZ;
pframe = pxmitframe->buf_addr + hw_hdr_offset;
/* 4 start to encrypt each fragment */
if (pattrib->encrypt == _AES_) {
@ -1406,17 +1338,18 @@ static int aes_decipher(u8 *key, uint hdrlen,
return res;
}
u32 rtw_aes_decrypt(struct adapter *padapter, u8 *precvframe)
u32 rtw_aes_decrypt(struct adapter *padapter, struct recv_frame *precvframe)
{ /* exclude ICV */
/* Intermediate Buffers */
int length;
u8 *pframe, *prwskey; /* *payload,*iv */
struct sta_info *stainfo;
struct rx_pkt_attrib *prxattrib = &((struct recv_frame *)precvframe)->attrib;
struct rx_pkt_attrib *prxattrib = &precvframe->attrib;
struct security_priv *psecuritypriv = &padapter->securitypriv;
u32 res = _SUCCESS;
pframe = (unsigned char *)((struct recv_frame *)precvframe)->rx_data;
pframe = precvframe->rx_data;
/* 4 start to encrypt each fragment */
if (prxattrib->encrypt == _AES_) {
stainfo = rtw_get_stainfo(&padapter->stapriv, &prxattrib->ta[0]);
@ -1438,7 +1371,7 @@ u32 rtw_aes_decrypt(struct adapter *padapter, u8 *precvframe)
} else {
prwskey = &stainfo->dot118021x_UncstKey.skey[0];
}
length = ((struct recv_frame *)precvframe)->len - prxattrib->hdrlen - prxattrib->iv_len;
length = precvframe->len - prxattrib->hdrlen - prxattrib->iv_len;
res = aes_decipher(prwskey, prxattrib->hdrlen, pframe, length);
} else {
res = _FAIL;
@ -1622,35 +1555,3 @@ const u8 rcons[] = {
0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x1B, 0x36
/* for 128-bit blocks, Rijndael never uses more than 10 rcon values */
};
/**
* Expand the cipher key into the encryption key schedule.
*
* @return the number of rounds for the given cipher key size.
*/
#define ROUND(i, d, s) \
do { \
d##0 = TE0(s##0) ^ TE1(s##1) ^ TE2(s##2) ^ TE3(s##3) ^ rk[4 * i]; \
d##1 = TE0(s##1) ^ TE1(s##2) ^ TE2(s##3) ^ TE3(s##0) ^ rk[4 * i + 1]; \
d##2 = TE0(s##2) ^ TE1(s##3) ^ TE2(s##0) ^ TE3(s##1) ^ rk[4 * i + 2]; \
d##3 = TE0(s##3) ^ TE1(s##0) ^ TE2(s##1) ^ TE3(s##2) ^ rk[4 * i + 3]; \
} while (0);
/**
* omac1_aes_128 - One-Key CBC MAC (OMAC1) hash with AES-128 (aka AES-CMAC)
* @key: 128-bit key for the hash operation
* @data: Data buffer for which a MAC is determined
* @data_len: Length of data buffer in bytes
* @mac: Buffer for MAC (128 bits, i.e., 16 bytes)
* Returns: 0 on success, -1 on failure
*
* This is a mode for using block cipher (AES in this case) for authentication.
* OMAC1 was standardized with the name CMAC by NIST in a Special Publication
* (SP) 800-38B.
*/
void rtw_use_tkipkey_handler(void *FunctionContext)
{
struct adapter *padapter = (struct adapter *)FunctionContext;
padapter->securitypriv.busetkipkey = true;
}

62
drivers/staging/r8188eu/core/rtw_sreset.c
View File

@ -1,62 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2012 Realtek Corporation. */
#include "../include/rtw_sreset.h"
void sreset_init_value(struct adapter *padapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
_rtw_mutex_init(&psrtpriv->silentreset_mutex);
psrtpriv->silent_reset_inprogress = false;
psrtpriv->wifi_error_status = WIFI_STATUS_SUCCESS;
psrtpriv->last_tx_time = 0;
psrtpriv->last_tx_complete_time = 0;
}
void sreset_reset_value(struct adapter *padapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
psrtpriv->silent_reset_inprogress = false;
psrtpriv->wifi_error_status = WIFI_STATUS_SUCCESS;
psrtpriv->last_tx_time = 0;
psrtpriv->last_tx_complete_time = 0;
}
u8 sreset_get_wifi_status(struct adapter *padapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
u8 status = WIFI_STATUS_SUCCESS;
u32 val32 = 0;
if (psrtpriv->silent_reset_inprogress)
return status;
val32 = rtw_read32(padapter, REG_TXDMA_STATUS);
if (val32 == 0xeaeaeaea) {
psrtpriv->wifi_error_status = WIFI_IF_NOT_EXIST;
} else if (val32 != 0) {
DBG_88E("txdmastatu(%x)\n", val32);
psrtpriv->wifi_error_status = WIFI_MAC_TXDMA_ERROR;
}
if (WIFI_STATUS_SUCCESS != psrtpriv->wifi_error_status) {
DBG_88E("==>%s error_status(0x%x)\n", __func__, psrtpriv->wifi_error_status);
status = (psrtpriv->wifi_error_status & (~(USB_READ_PORT_FAIL | USB_WRITE_PORT_FAIL)));
}
DBG_88E("==> %s wifi_status(0x%x)\n", __func__, status);
/* status restore */
psrtpriv->wifi_error_status = WIFI_STATUS_SUCCESS;
return status;
}
void sreset_set_wifi_error_status(struct adapter *padapter, u32 status)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
pHalData->srestpriv.wifi_error_status = status;
}

34
drivers/staging/r8188eu/core/rtw_sta_mgt.c
View File

@ -18,14 +18,12 @@ static void _rtw_init_stainfo(struct sta_info *psta)
spin_lock_init(&psta->lock);
INIT_LIST_HEAD(&psta->list);
INIT_LIST_HEAD(&psta->hash_list);
_rtw_init_queue(&psta->sleep_q);
rtw_init_queue(&psta->sleep_q);
psta->sleepq_len = 0;
_rtw_init_sta_xmit_priv(&psta->sta_xmitpriv);
_rtw_init_sta_recv_priv(&psta->sta_recvpriv);
#ifdef CONFIG_88EU_AP_MODE
INIT_LIST_HEAD(&psta->asoc_list);
INIT_LIST_HEAD(&psta->auth_list);
@ -38,21 +36,16 @@ static void _rtw_init_stainfo(struct sta_info *psta)
psta->bpairwise_key_installed = false;
#ifdef CONFIG_88EU_AP_MODE
psta->nonerp_set = 0;
psta->no_short_slot_time_set = 0;
psta->no_short_preamble_set = 0;
psta->no_ht_gf_set = 0;
psta->no_ht_set = 0;
psta->ht_20mhz_set = 0;
#endif
psta->under_exist_checking = 0;
psta->keep_alive_trycnt = 0;
#endif /* CONFIG_88EU_AP_MODE */
}
u32 _rtw_init_sta_priv(struct sta_priv *pstapriv)
@ -68,13 +61,13 @@ u32 _rtw_init_sta_priv(struct sta_priv *pstapriv)
pstapriv->pstainfo_buf = pstapriv->pallocated_stainfo_buf + 4 -
((size_t)(pstapriv->pallocated_stainfo_buf) & 3);
_rtw_init_queue(&pstapriv->free_sta_queue);
rtw_init_queue(&pstapriv->free_sta_queue);
spin_lock_init(&pstapriv->sta_hash_lock);
pstapriv->asoc_sta_count = 0;
_rtw_init_queue(&pstapriv->sleep_q);
_rtw_init_queue(&pstapriv->wakeup_q);
rtw_init_queue(&pstapriv->sleep_q);
rtw_init_queue(&pstapriv->wakeup_q);
psta = (struct sta_info *)(pstapriv->pstainfo_buf);
@ -88,8 +81,6 @@ u32 _rtw_init_sta_priv(struct sta_priv *pstapriv)
psta++;
}
#ifdef CONFIG_88EU_AP_MODE
pstapriv->sta_dz_bitmap = 0;
pstapriv->tim_bitmap = 0;
@ -104,7 +95,6 @@ u32 _rtw_init_sta_priv(struct sta_priv *pstapriv)
pstapriv->assoc_to = 3;
pstapriv->expire_to = 3; /* 3*2 = 6 sec */
pstapriv->max_num_sta = NUM_STA;
#endif
return _SUCCESS;
}
@ -155,9 +145,8 @@ u32 _rtw_free_sta_priv(struct sta_priv *pstapriv)
spin_unlock_bh(&pstapriv->sta_hash_lock);
/*===============================*/
if (pstapriv->pallocated_stainfo_buf)
vfree(pstapriv->pallocated_stainfo_buf);
}
vfree(pstapriv->pallocated_stainfo_buf);
}
return _SUCCESS;
}
@ -222,7 +211,7 @@ struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, u8 *hwaddr)
preorder_ctrl->wend_b = 0xffff;
preorder_ctrl->wsize_b = 64;/* 64; */
_rtw_init_queue(&preorder_ctrl->pending_recvframe_queue);
rtw_init_queue(&preorder_ctrl->pending_recvframe_queue);
rtw_init_recv_timer(preorder_ctrl);
}
@ -321,9 +310,7 @@ u32 rtw_free_stainfo(struct adapter *padapter, struct sta_info *psta)
}
if (!(psta->state & WIFI_AP_STATE))
rtw_hal_set_odm_var(padapter, HAL_ODM_STA_INFO, psta, false);
#ifdef CONFIG_88EU_AP_MODE
rtl8188e_SetHalODMVar(padapter, HAL_ODM_STA_INFO, psta, false);
spin_lock_bh(&pstapriv->auth_list_lock);
if (!list_empty(&psta->auth_list)) {
@ -354,8 +341,6 @@ u32 rtw_free_stainfo(struct adapter *padapter, struct sta_info *psta)
psta->under_exist_checking = 0;
#endif /* CONFIG_88EU_AP_MODE */
spin_lock_bh(&pfree_sta_queue->lock);
list_add_tail(&psta->list, get_list_head(pfree_sta_queue));
spin_unlock_bh(&pfree_sta_queue->lock);
@ -471,7 +456,6 @@ struct sta_info *rtw_get_bcmc_stainfo(struct adapter *padapter)
u8 rtw_access_ctrl(struct adapter *padapter, u8 *mac_addr)
{
u8 res = true;
#ifdef CONFIG_88EU_AP_MODE
struct list_head *plist, *phead;
struct rtw_wlan_acl_node *paclnode;
u8 match = false;
@ -502,7 +486,5 @@ u8 rtw_access_ctrl(struct adapter *padapter, u8 *mac_addr)
else
res = true;
#endif
return res;
}

157
drivers/staging/r8188eu/core/rtw_wlan_util.c
View File

@ -266,27 +266,27 @@ void Save_DM_Func_Flag(struct adapter *padapter)
{
u8 saveflag = true;
rtw_hal_set_hwreg(padapter, HW_VAR_DM_FUNC_OP, (u8 *)(&saveflag));
SetHwReg8188EU(padapter, HW_VAR_DM_FUNC_OP, (u8 *)(&saveflag));
}
void Restore_DM_Func_Flag(struct adapter *padapter)
{
u8 saveflag = false;
rtw_hal_set_hwreg(padapter, HW_VAR_DM_FUNC_OP, (u8 *)(&saveflag));
SetHwReg8188EU(padapter, HW_VAR_DM_FUNC_OP, (u8 *)(&saveflag));
}
void Switch_DM_Func(struct adapter *padapter, u32 mode, u8 enable)
{
if (enable)
rtw_hal_set_hwreg(padapter, HW_VAR_DM_FUNC_SET, (u8 *)(&mode));
SetHwReg8188EU(padapter, HW_VAR_DM_FUNC_SET, (u8 *)(&mode));
else
rtw_hal_set_hwreg(padapter, HW_VAR_DM_FUNC_CLR, (u8 *)(&mode));
SetHwReg8188EU(padapter, HW_VAR_DM_FUNC_CLR, (u8 *)(&mode));
}
static void Set_NETYPE0_MSR(struct adapter *padapter, u8 type)
{
rtw_hal_set_hwreg(padapter, HW_VAR_MEDIA_STATUS, (u8 *)(&type));
SetHwReg8188EU(padapter, HW_VAR_MEDIA_STATUS, (u8 *)(&type));
}
void Set_MSR(struct adapter *padapter, u8 type)
@ -304,21 +304,11 @@ inline void rtw_set_oper_ch(struct adapter *adapter, u8 ch)
adapter->mlmeextpriv.oper_channel = ch;
}
inline u8 rtw_get_oper_bw(struct adapter *adapter)
{
return adapter->mlmeextpriv.oper_bwmode;
}
inline void rtw_set_oper_bw(struct adapter *adapter, u8 bw)
{
adapter->mlmeextpriv.oper_bwmode = bw;
}
inline u8 rtw_get_oper_choffset(struct adapter *adapter)
{
return adapter->mlmeextpriv.oper_ch_offset;
}
inline void rtw_set_oper_choffset(struct adapter *adapter, u8 offset)
{
adapter->mlmeextpriv.oper_ch_offset = offset;
@ -328,7 +318,7 @@ void SelectChannel(struct adapter *padapter, unsigned char channel)
{
/* saved channel info */
rtw_set_oper_ch(padapter, channel);
rtw_hal_set_chan(padapter, channel);
PHY_SwChnl8188E(padapter, channel);
}
void SetBWMode(struct adapter *padapter, unsigned short bwmode,
@ -338,7 +328,7 @@ void SetBWMode(struct adapter *padapter, unsigned short bwmode,
rtw_set_oper_bw(padapter, bwmode);
rtw_set_oper_choffset(padapter, channel_offset);
rtw_hal_set_bwmode(padapter, (enum ht_channel_width)bwmode, channel_offset);
PHY_SetBWMode8188E(padapter, (enum ht_channel_width)bwmode, channel_offset);
}
void set_channel_bwmode(struct adapter *padapter, unsigned char channel, unsigned char channel_offset, unsigned short bwmode)
@ -369,20 +359,10 @@ void set_channel_bwmode(struct adapter *padapter, unsigned char channel, unsigne
rtw_set_oper_bw(padapter, bwmode);
rtw_set_oper_choffset(padapter, channel_offset);
rtw_hal_set_chan(padapter, center_ch); /* set center channel */
PHY_SwChnl8188E(padapter, center_ch); /* set center channel */
SetBWMode(padapter, bwmode, channel_offset);
}
int get_bsstype(unsigned short capability)
{
if (capability & BIT(0))
return WIFI_FW_AP_STATE;
else if (capability & BIT(1))
return WIFI_FW_ADHOC_STATE;
else
return 0;
}
__inline u8 *get_my_bssid(struct wlan_bssid_ex *pnetwork)
{
return pnetwork->MacAddress;
@ -447,14 +427,9 @@ unsigned int decide_wait_for_beacon_timeout(unsigned int bcn_interval)
return bcn_interval << 2;
}
void CAM_empty_entry(struct adapter *Adapter, u8 ucIndex)
{
rtw_hal_set_hwreg(Adapter, HW_VAR_CAM_EMPTY_ENTRY, (u8 *)(&ucIndex));
}
void invalidate_cam_all(struct adapter *padapter)
{
rtw_hal_set_hwreg(padapter, HW_VAR_CAM_INVALID_ALL, NULL);
SetHwReg8188EU(padapter, HW_VAR_CAM_INVALID_ALL, NULL);
}
void write_cam(struct adapter *padapter, u8 entry, u16 ctrl, u8 *mac, u8 *key)
@ -482,7 +457,7 @@ void write_cam(struct adapter *padapter, u8 entry, u16 ctrl, u8 *mac, u8 *key)
cam_val[0] = val;
cam_val[1] = addr + (unsigned int)j;
rtw_hal_set_hwreg(padapter, HW_VAR_CAM_WRITE, (u8 *)cam_val);
SetHwReg8188EU(padapter, HW_VAR_CAM_WRITE, (u8 *)cam_val);
}
}
@ -517,7 +492,7 @@ void flush_all_cam_entry(struct adapter *padapter)
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
rtw_hal_set_hwreg(padapter, HW_VAR_CAM_INVALID_ALL, NULL);
SetHwReg8188EU(padapter, HW_VAR_CAM_INVALID_ALL, NULL);
memset((u8 *)(pmlmeinfo->FW_sta_info), 0, sizeof(pmlmeinfo->FW_sta_info));
}
@ -578,21 +553,21 @@ void WMMOnAssocRsp(struct adapter *padapter)
switch (ACI) {
case 0x0:
rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acParm));
SetHwReg8188EU(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acParm));
acm_mask |= (ACM ? BIT(1) : 0);
edca[XMIT_BE_QUEUE] = acParm;
break;
case 0x1:
rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acParm));
SetHwReg8188EU(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acParm));
edca[XMIT_BK_QUEUE] = acParm;
break;
case 0x2:
rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acParm));
SetHwReg8188EU(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acParm));
acm_mask |= (ACM ? BIT(2) : 0);
edca[XMIT_VI_QUEUE] = acParm;
break;
case 0x3:
rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acParm));
SetHwReg8188EU(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acParm));
acm_mask |= (ACM ? BIT(3) : 0);
edca[XMIT_VO_QUEUE] = acParm;
break;
@ -602,14 +577,14 @@ void WMMOnAssocRsp(struct adapter *padapter)
}
if (padapter->registrypriv.acm_method == 1)
rtw_hal_set_hwreg(padapter, HW_VAR_ACM_CTRL, (u8 *)(&acm_mask));
SetHwReg8188EU(padapter, HW_VAR_ACM_CTRL, (u8 *)(&acm_mask));
else
padapter->mlmepriv.acm_mask = acm_mask;
inx[0] = 0; inx[1] = 1; inx[2] = 2; inx[3] = 3;
if (pregpriv->wifi_spec == 1) {
u32 j, tmp, change_inx = false;
u32 j, change_inx = false;
/* entry indx: 0->vo, 1->vi, 2->be, 3->bk. */
for (i = 0; i < 4; i++) {
@ -624,13 +599,8 @@ void WMMOnAssocRsp(struct adapter *padapter)
}
if (change_inx) {
tmp = edca[i];
edca[i] = edca[j];
edca[j] = tmp;
tmp = inx[i];
inx[i] = inx[j];
inx[j] = tmp;
swap(edca[i], edca[j]);
swap(inx[i], inx[j]);
change_inx = false;
}
@ -760,7 +730,7 @@ void HT_caps_handler(struct adapter *padapter, struct ndis_802_11_var_ie *pIE)
}
}
rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
GetHwReg8188EU(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
/* update the MCS rates */
for (i = 0; i < 16; i++) {
@ -817,9 +787,9 @@ void HTOnAssocRsp(struct adapter *padapter)
min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) >> 2;
rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_MIN_SPACE, (u8 *)(&min_MPDU_spacing));
SetHwReg8188EU(padapter, HW_VAR_AMPDU_MIN_SPACE, (u8 *)(&min_MPDU_spacing));
rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&max_AMPDU_len));
SetHwReg8188EU(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&max_AMPDU_len));
}
void ERP_IE_handler(struct adapter *padapter, struct ndis_802_11_var_ie *pIE)
@ -1123,72 +1093,6 @@ unsigned int is_ap_in_tkip(struct adapter *padapter)
}
}
unsigned int should_forbid_n_rate(struct adapter *padapter)
{
u32 i;
struct ndis_802_11_var_ie *pIE;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct wlan_bssid_ex *cur_network = &pmlmepriv->cur_network.network;
if (rtw_get_capability((struct wlan_bssid_ex *)cur_network) & WLAN_CAPABILITY_PRIVACY) {
for (i = sizeof(struct ndis_802_11_fixed_ie); i < cur_network->IELength;) {
pIE = (struct ndis_802_11_var_ie *)(cur_network->IEs + i);
switch (pIE->ElementID) {
case _VENDOR_SPECIFIC_IE_:
if (!memcmp(pIE->data, RTW_WPA_OUI, 4) &&
((!memcmp((pIE->data + 12), WPA_CIPHER_SUITE_CCMP, 4)) ||
(!memcmp((pIE->data + 16), WPA_CIPHER_SUITE_CCMP, 4))))
return false;
break;
case _RSN_IE_2_:
if ((!memcmp((pIE->data + 8), RSN_CIPHER_SUITE_CCMP, 4)) ||
(!memcmp((pIE->data + 12), RSN_CIPHER_SUITE_CCMP, 4)))
return false;
break;
default:
break;
}
i += (pIE->Length + 2);
}
return true;
} else {
return false;
}
}
unsigned int is_ap_in_wep(struct adapter *padapter)
{
u32 i;
struct ndis_802_11_var_ie *pIE;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct wlan_bssid_ex *cur_network = &pmlmeinfo->network;
if (rtw_get_capability((struct wlan_bssid_ex *)cur_network) & WLAN_CAPABILITY_PRIVACY) {
for (i = sizeof(struct ndis_802_11_fixed_ie); i < pmlmeinfo->network.IELength;) {
pIE = (struct ndis_802_11_var_ie *)(pmlmeinfo->network.IEs + i);
switch (pIE->ElementID) {
case _VENDOR_SPECIFIC_IE_:
if (!memcmp(pIE->data, RTW_WPA_OUI, 4))
return false;
break;
case _RSN_IE_2_:
return false;
default:
break;
}
i += (pIE->Length + 2);
}
return true;
} else {
return false;
}
}
int wifirate2_ratetbl_inx(unsigned char rate)
{
int inx = 0;
@ -1324,7 +1228,6 @@ void set_sta_rate(struct adapter *padapter, struct sta_info *psta)
void update_tx_basic_rate(struct adapter *padapter, u8 wirelessmode)
{
unsigned char supported_rates[NDIS_802_11_LENGTH_RATES_EX];
#ifdef CONFIG_88EU_P2P
struct wifidirect_info *pwdinfo = &padapter->wdinfo;
/* Added by Albert 2011/03/22 */
@ -1332,7 +1235,6 @@ void update_tx_basic_rate(struct adapter *padapter, u8 wirelessmode)
/* So, the Tx packet shouldn't use the CCK rate */
if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE))
return;
#endif /* CONFIG_88EU_P2P */
memset(supported_rates, 0, NDIS_802_11_LENGTH_RATES_EX);
if ((wirelessmode & WIRELESS_11B) && (wirelessmode == WIRELESS_11B))
@ -1347,7 +1249,7 @@ void update_tx_basic_rate(struct adapter *padapter, u8 wirelessmode)
else
update_mgnt_tx_rate(padapter, IEEE80211_OFDM_RATE_6MB);
rtw_hal_set_hwreg(padapter, HW_VAR_BASIC_RATE, supported_rates);
SetHwReg8188EU(padapter, HW_VAR_BASIC_RATE, supported_rates);
}
unsigned char check_assoc_AP(u8 *pframe, uint len)
@ -1369,7 +1271,6 @@ unsigned char check_assoc_AP(u8 *pframe, uint len)
DBG_88E("link to Artheros AP\n");
return HT_IOT_PEER_ATHEROS;
} else if ((!memcmp(pIE->data, BROADCOM_OUI1, 3)) ||
(!memcmp(pIE->data, BROADCOM_OUI2, 3)) ||
(!memcmp(pIE->data, BROADCOM_OUI2, 3))) {
DBG_88E("link to Broadcom AP\n");
return HT_IOT_PEER_BROADCOM;
@ -1465,13 +1366,13 @@ void update_capinfo(struct adapter *Adapter, u16 updateCap)
if (pmlmeinfo->preamble_mode != PREAMBLE_SHORT) { /* PREAMBLE_LONG or PREAMBLE_AUTO */
ShortPreamble = true;
pmlmeinfo->preamble_mode = PREAMBLE_SHORT;
rtw_hal_set_hwreg(Adapter, HW_VAR_ACK_PREAMBLE, (u8 *)&ShortPreamble);
SetHwReg8188EU(Adapter, HW_VAR_ACK_PREAMBLE, (u8 *)&ShortPreamble);
}
} else { /* Long Preamble */
if (pmlmeinfo->preamble_mode != PREAMBLE_LONG) { /* PREAMBLE_SHORT or PREAMBLE_AUTO */
ShortPreamble = false;
pmlmeinfo->preamble_mode = PREAMBLE_LONG;
rtw_hal_set_hwreg(Adapter, HW_VAR_ACK_PREAMBLE, (u8 *)&ShortPreamble);
SetHwReg8188EU(Adapter, HW_VAR_ACK_PREAMBLE, (u8 *)&ShortPreamble);
}
}
@ -1493,7 +1394,7 @@ void update_capinfo(struct adapter *Adapter, u16 updateCap)
}
}
rtw_hal_set_hwreg(Adapter, HW_VAR_SLOT_TIME, &pmlmeinfo->slotTime);
SetHwReg8188EU(Adapter, HW_VAR_SLOT_TIME, &pmlmeinfo->slotTime);
}
void update_wireless_mode(struct adapter *padapter)
@ -1529,7 +1430,7 @@ void update_wireless_mode(struct adapter *padapter)
SIFS_Timer = 0x0a0a0808;/* 0x0808 -> for CCK, 0x0a0a -> for OFDM */
/* change this value if having IOT issues. */
padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_RESP_SIFS, (u8 *)&SIFS_Timer);
SetHwReg8188EU(padapter, HW_VAR_RESP_SIFS, (u8 *)&SIFS_Timer);
if (pmlmeext->cur_wireless_mode & WIRELESS_11B)
update_mgnt_tx_rate(padapter, IEEE80211_CCK_RATE_1MB);
@ -1611,12 +1512,12 @@ void update_TSF(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len)
void correct_TSF(struct adapter *padapter, struct mlme_ext_priv *pmlmeext)
{
rtw_hal_set_hwreg(padapter, HW_VAR_CORRECT_TSF, NULL);
SetHwReg8188EU(padapter, HW_VAR_CORRECT_TSF, NULL);
}
void beacon_timing_control(struct adapter *padapter)
{
rtw_hal_bcn_related_reg_setting(padapter);
SetBeaconRelatedRegisters8188EUsb(padapter);
}
static struct adapter *pbuddy_padapter;

121
drivers/staging/r8188eu/core/rtw_xmit.c
View File

@ -9,6 +9,7 @@
#include "../include/osdep_intf.h"
#include "../include/usb_ops.h"
#include "../include/usb_osintf.h"
#include "../include/rtl8188e_xmit.h"
static u8 P802_1H_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0xf8 };
static u8 RFC1042_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0x00 };
@ -17,7 +18,7 @@ static void _init_txservq(struct tx_servq *ptxservq)
{
INIT_LIST_HEAD(&ptxservq->tx_pending);
_rtw_init_queue(&ptxservq->sta_pending);
rtw_init_queue(&ptxservq->sta_pending);
ptxservq->qcnt = 0;
}
@ -48,22 +49,21 @@ s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter)
/* We don't need to memset padapter->XXX to zero, because adapter is allocated by vzalloc(). */
spin_lock_init(&pxmitpriv->lock);
sema_init(&pxmitpriv->xmit_sema, 0);
sema_init(&pxmitpriv->terminate_xmitthread_sema, 0);
/*
Please insert all the queue initializaiton using _rtw_init_queue below
Please insert all the queue initializaiton using rtw_init_queue below
*/
pxmitpriv->adapter = padapter;
_rtw_init_queue(&pxmitpriv->be_pending);
_rtw_init_queue(&pxmitpriv->bk_pending);
_rtw_init_queue(&pxmitpriv->vi_pending);
_rtw_init_queue(&pxmitpriv->vo_pending);
_rtw_init_queue(&pxmitpriv->bm_pending);
rtw_init_queue(&pxmitpriv->be_pending);
rtw_init_queue(&pxmitpriv->bk_pending);
rtw_init_queue(&pxmitpriv->vi_pending);
rtw_init_queue(&pxmitpriv->vo_pending);
rtw_init_queue(&pxmitpriv->bm_pending);
_rtw_init_queue(&pxmitpriv->free_xmit_queue);
rtw_init_queue(&pxmitpriv->free_xmit_queue);
/*
Please allocate memory with the sz = (struct xmit_frame) * NR_XMITFRAME,
@ -105,8 +105,8 @@ s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter)
pxmitpriv->frag_len = MAX_FRAG_THRESHOLD;
/* init xmit_buf */
_rtw_init_queue(&pxmitpriv->free_xmitbuf_queue);
_rtw_init_queue(&pxmitpriv->pending_xmitbuf_queue);
rtw_init_queue(&pxmitpriv->free_xmitbuf_queue);
rtw_init_queue(&pxmitpriv->pending_xmitbuf_queue);
pxmitpriv->pallocated_xmitbuf = vzalloc(NR_XMITBUFF * sizeof(struct xmit_buf) + 4);
@ -147,7 +147,7 @@ s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter)
pxmitpriv->free_xmitbuf_cnt = NR_XMITBUFF;
/* Init xmit extension buff */
_rtw_init_queue(&pxmitpriv->free_xmit_extbuf_queue);
rtw_init_queue(&pxmitpriv->free_xmit_extbuf_queue);
pxmitpriv->pallocated_xmit_extbuf = vzalloc(num_xmit_extbuf * sizeof(struct xmit_buf) + 4);
@ -196,10 +196,10 @@ s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter)
pxmitpriv->voq_cnt = 0;
pxmitpriv->ack_tx = false;
_rtw_mutex_init(&pxmitpriv->ack_tx_mutex);
mutex_init(&pxmitpriv->ack_tx_mutex);
rtw_sctx_init(&pxmitpriv->ack_tx_ops, 0);
rtw_hal_init_xmit_priv(padapter);
rtl8188eu_init_xmit_priv(padapter);
exit:
@ -243,7 +243,7 @@ void _rtw_free_xmit_priv(struct xmit_priv *pxmitpriv)
rtw_free_hwxmits(padapter);
_rtw_mutex_free(&pxmitpriv->ack_tx_mutex);
mutex_destroy(&pxmitpriv->ack_tx_mutex);
}
static void update_attrib_vcs_info(struct adapter *padapter, struct xmit_frame *pxmitframe)
@ -576,8 +576,6 @@ static s32 update_attrib(struct adapter *padapter, struct sk_buff *pkt, struct p
else
pattrib->bswenc = false;
rtw_set_tx_chksum_offload(pkt, pattrib);
update_attrib_phy_info(pattrib, psta);
exit:
@ -683,13 +681,13 @@ static s32 xmitframe_swencrypt(struct adapter *padapter, struct xmit_frame *pxmi
switch (pattrib->encrypt) {
case _WEP40_:
case _WEP104_:
rtw_wep_encrypt(padapter, (u8 *)pxmitframe);
rtw_wep_encrypt(padapter, pxmitframe);
break;
case _TKIP_:
rtw_tkip_encrypt(padapter, (u8 *)pxmitframe);
rtw_tkip_encrypt(padapter, pxmitframe);
break;
case _AES_:
rtw_aes_encrypt(padapter, (u8 *)pxmitframe);
rtw_aes_encrypt(padapter, pxmitframe);
break;
default:
break;
@ -862,24 +860,6 @@ s32 rtw_txframes_sta_ac_pending(struct adapter *padapter, struct pkt_attrib *pat
return 0;
}
/*
* Calculate wlan 802.11 packet MAX size from pkt_attrib
* This function doesn't consider fragment case
*/
u32 rtw_calculate_wlan_pkt_size_by_attribue(struct pkt_attrib *pattrib)
{
u32 len = 0;
len = pattrib->hdrlen + pattrib->iv_len; /* WLAN Header and IV */
len += SNAP_SIZE + sizeof(u16); /* LLC */
len += pattrib->pktlen;
if (pattrib->encrypt == _TKIP_)
len += 8; /* MIC */
len += ((pattrib->bswenc) ? pattrib->icv_len : 0); /* ICV */
return len;
}
/*
This sub-routine will perform all the following:
@ -1572,31 +1552,31 @@ static int rtw_br_client_tx(struct adapter *padapter, struct sk_buff **pskb)
rcu_read_unlock();
spin_lock_bh(&padapter->br_ext_lock);
if (!(skb->data[0] & 1) && br_port &&
memcmp(skb->data + MACADDRLEN, padapter->br_mac, MACADDRLEN) &&
*((__be16 *)(skb->data + MACADDRLEN * 2)) != __constant_htons(ETH_P_8021Q) &&
*((__be16 *)(skb->data + MACADDRLEN * 2)) == __constant_htons(ETH_P_IP) &&
!memcmp(padapter->scdb_mac, skb->data + MACADDRLEN, MACADDRLEN) && padapter->scdb_entry) {
memcpy(skb->data + MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN);
memcmp(skb->data + ETH_ALEN, padapter->br_mac, ETH_ALEN) &&
*((__be16 *)(skb->data + ETH_ALEN * 2)) != __constant_htons(ETH_P_8021Q) &&
*((__be16 *)(skb->data + ETH_ALEN * 2)) == __constant_htons(ETH_P_IP) &&
!memcmp(padapter->scdb_mac, skb->data + ETH_ALEN, ETH_ALEN) && padapter->scdb_entry) {
memcpy(skb->data + ETH_ALEN, GET_MY_HWADDR(padapter), ETH_ALEN);
padapter->scdb_entry->ageing_timer = jiffies;
spin_unlock_bh(&padapter->br_ext_lock);
} else {
if (*((__be16 *)(skb->data + MACADDRLEN * 2)) == __constant_htons(ETH_P_8021Q)) {
if (*((__be16 *)(skb->data + ETH_ALEN * 2)) == __constant_htons(ETH_P_8021Q)) {
is_vlan_tag = 1;
vlan_hdr = *((unsigned short *)(skb->data + MACADDRLEN * 2 + 2));
vlan_hdr = *((unsigned short *)(skb->data + ETH_ALEN * 2 + 2));
for (i = 0; i < 6; i++)
*((unsigned short *)(skb->data + MACADDRLEN * 2 + 2 - i * 2)) = *((unsigned short *)(skb->data + MACADDRLEN * 2 - 2 - i * 2));
*((unsigned short *)(skb->data + ETH_ALEN * 2 + 2 - i * 2)) = *((unsigned short *)(skb->data + ETH_ALEN * 2 - 2 - i * 2));
skb_pull(skb, 4);
}
if (!memcmp(skb->data + MACADDRLEN, padapter->br_mac, MACADDRLEN) &&
(*((__be16 *)(skb->data + MACADDRLEN * 2)) == __constant_htons(ETH_P_IP)))
if (!memcmp(skb->data + ETH_ALEN, padapter->br_mac, ETH_ALEN) &&
(*((__be16 *)(skb->data + ETH_ALEN * 2)) == __constant_htons(ETH_P_IP)))
memcpy(padapter->br_ip, skb->data + WLAN_ETHHDR_LEN + 12, 4);
if (*((__be16 *)(skb->data + MACADDRLEN * 2)) == __constant_htons(ETH_P_IP)) {
if (memcmp(padapter->scdb_mac, skb->data + MACADDRLEN, MACADDRLEN)) {
if (*((__be16 *)(skb->data + ETH_ALEN * 2)) == __constant_htons(ETH_P_IP)) {
if (memcmp(padapter->scdb_mac, skb->data + ETH_ALEN, ETH_ALEN)) {
padapter->scdb_entry = (struct nat25_network_db_entry *)scdb_findEntry(padapter,
skb->data + MACADDRLEN, skb->data + WLAN_ETHHDR_LEN + 12);
skb->data + WLAN_ETHHDR_LEN + 12);
if (padapter->scdb_entry) {
memcpy(padapter->scdb_mac, skb->data + MACADDRLEN, MACADDRLEN);
memcpy(padapter->scdb_mac, skb->data + ETH_ALEN, ETH_ALEN);
memcpy(padapter->scdb_ip, skb->data + WLAN_ETHHDR_LEN + 12, 4);
padapter->scdb_entry->ageing_timer = jiffies;
do_nat25 = 0;
@ -1606,7 +1586,7 @@ static int rtw_br_client_tx(struct adapter *padapter, struct sk_buff **pskb)
padapter->scdb_entry->ageing_timer = jiffies;
do_nat25 = 0;
} else {
memset(padapter->scdb_mac, 0, MACADDRLEN);
memset(padapter->scdb_mac, 0, ETH_ALEN);
memset(padapter->scdb_ip, 0, 4);
}
}
@ -1620,8 +1600,8 @@ static int rtw_br_client_tx(struct adapter *padapter, struct sk_buff **pskb)
skb_push(skb, 4);
for (i = 0; i < 6; i++)
*((unsigned short *)(skb->data + i * 2)) = *((unsigned short *)(skb->data + 4 + i * 2));
*((__be16 *)(skb->data + MACADDRLEN * 2)) = __constant_htons(ETH_P_8021Q);
*((unsigned short *)(skb->data + MACADDRLEN * 2 + 2)) = vlan_hdr;
*((__be16 *)(skb->data + ETH_ALEN * 2)) = __constant_htons(ETH_P_8021Q);
*((unsigned short *)(skb->data + ETH_ALEN * 2 + 2)) = vlan_hdr;
}
newskb = skb_copy(skb, GFP_ATOMIC);
@ -1633,9 +1613,9 @@ static int rtw_br_client_tx(struct adapter *padapter, struct sk_buff **pskb)
*pskb = skb = newskb;
if (is_vlan_tag) {
vlan_hdr = *((unsigned short *)(skb->data + MACADDRLEN * 2 + 2));
vlan_hdr = *((unsigned short *)(skb->data + ETH_ALEN * 2 + 2));
for (i = 0; i < 6; i++)
*((unsigned short *)(skb->data + MACADDRLEN * 2 + 2 - i * 2)) = *((unsigned short *)(skb->data + MACADDRLEN * 2 - 2 - i * 2));
*((unsigned short *)(skb->data + ETH_ALEN * 2 + 2 - i * 2)) = *((unsigned short *)(skb->data + ETH_ALEN * 2 - 2 - i * 2));
skb_pull(skb, 4);
}
}
@ -1659,7 +1639,7 @@ static int rtw_br_client_tx(struct adapter *padapter, struct sk_buff **pskb)
}
}
memcpy(skb->data + MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN);
memcpy(skb->data + ETH_ALEN, GET_MY_HWADDR(padapter), ETH_ALEN);
dhcp_flag_bcast(padapter, skb);
@ -1667,13 +1647,13 @@ static int rtw_br_client_tx(struct adapter *padapter, struct sk_buff **pskb)
skb_push(skb, 4);
for (i = 0; i < 6; i++)
*((unsigned short *)(skb->data + i * 2)) = *((unsigned short *)(skb->data + 4 + i * 2));
*((__be16 *)(skb->data + MACADDRLEN * 2)) = __constant_htons(ETH_P_8021Q);
*((unsigned short *)(skb->data + MACADDRLEN * 2 + 2)) = vlan_hdr;
*((__be16 *)(skb->data + ETH_ALEN * 2)) = __constant_htons(ETH_P_8021Q);
*((unsigned short *)(skb->data + ETH_ALEN * 2 + 2)) = vlan_hdr;
}
}
/* check if SA is equal to our MAC */
if (memcmp(skb->data + MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN)) {
if (memcmp(skb->data + ETH_ALEN, GET_MY_HWADDR(padapter), ETH_ALEN)) {
DEBUG_ERR("TX DROP: untransformed frame SA:%02X%02X%02X%02X%02X%02X!\n",
skb->data[6], skb->data[7], skb->data[8], skb->data[9], skb->data[10], skb->data[11]);
return -1;
@ -1773,23 +1753,19 @@ s32 rtw_xmit(struct adapter *padapter, struct sk_buff **ppkt)
do_queue_select(padapter, &pxmitframe->attrib);
#ifdef CONFIG_88EU_AP_MODE
spin_lock_bh(&pxmitpriv->lock);
if (xmitframe_enqueue_for_sleeping_sta(padapter, pxmitframe)) {
spin_unlock_bh(&pxmitpriv->lock);
return 1;
}
spin_unlock_bh(&pxmitpriv->lock);
#endif
if (!rtw_hal_xmit(padapter, pxmitframe))
if (!rtl8188eu_hal_xmit(padapter, pxmitframe))
return 1;
return 0;
}
#if defined(CONFIG_88EU_AP_MODE)
int xmitframe_enqueue_for_sleeping_sta(struct adapter *padapter, struct xmit_frame *pxmitframe)
{
int ret = false;
@ -2018,7 +1994,7 @@ void wakeup_sta_to_xmit(struct adapter *padapter, struct sta_info *psta)
pxmitframe->attrib.triggered = 1;
spin_unlock_bh(&psta->sleep_q.lock);
if (rtw_hal_xmit(padapter, pxmitframe))
if (rtl8188eu_hal_xmit(padapter, pxmitframe))
rtw_os_xmit_complete(padapter, pxmitframe);
spin_lock_bh(&psta->sleep_q.lock);
}
@ -2068,7 +2044,7 @@ void wakeup_sta_to_xmit(struct adapter *padapter, struct sta_info *psta)
pxmitframe->attrib.triggered = 1;
spin_unlock_bh(&psta_bmc->sleep_q.lock);
if (rtw_hal_xmit(padapter, pxmitframe))
if (rtl8188eu_hal_xmit(padapter, pxmitframe))
rtw_os_xmit_complete(padapter, pxmitframe);
spin_lock_bh(&psta_bmc->sleep_q.lock);
}
@ -2142,7 +2118,7 @@ void xmit_delivery_enabled_frames(struct adapter *padapter, struct sta_info *pst
pxmitframe->attrib.triggered = 1;
if (rtw_hal_xmit(padapter, pxmitframe))
if (rtl8188eu_hal_xmit(padapter, pxmitframe))
rtw_os_xmit_complete(padapter, pxmitframe);
if ((psta->sleepq_ac_len == 0) && (!psta->has_legacy_ac) && (wmmps_ac)) {
@ -2156,8 +2132,6 @@ void xmit_delivery_enabled_frames(struct adapter *padapter, struct sta_info *pst
spin_unlock_bh(&psta->sleep_q.lock);
}
#endif
void rtw_sctx_init(struct submit_ctx *sctx, int timeout_ms)
{
sctx->timeout_ms = timeout_ms;
@ -2213,11 +2187,6 @@ void rtw_sctx_done_err(struct submit_ctx **sctx, int status)
}
}
void rtw_sctx_done(struct submit_ctx **sctx)
{
rtw_sctx_done_err(sctx, RTW_SCTX_DONE_SUCCESS);
}
int rtw_ack_tx_wait(struct xmit_priv *pxmitpriv, u32 timeout_ms)
{
struct submit_ctx *pack_tx_ops = &pxmitpriv->ack_tx_ops;

22
drivers/staging/r8188eu/hal/Hal8188ERateAdaptive.c
View File

@ -471,16 +471,6 @@ odm_RATxRPTTimerSetting(
}
}
void
ODM_RASupport_Init(
struct odm_dm_struct *dm_odm
)
{
/* 2012/02/14 MH Be noticed, the init must be after IC type is recognized!!!!! */
if (dm_odm->SupportICType == ODM_RTL8188E)
dm_odm->RaSupport88E = true;
}
int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u8 macid)
{
struct odm_ra_info *pRaInfo = &dm_odm->RAInfo[macid];
@ -548,7 +538,7 @@ int ODM_RAInfo_Init_all(struct odm_dm_struct *dm_odm)
u8 ODM_RA_GetShortGI_8188E(struct odm_dm_struct *dm_odm, u8 macid)
{
if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
if ((NULL == dm_odm) || (macid >= ODM_ASSOCIATE_ENTRY_NUM))
return 0;
return dm_odm->RAInfo[macid].RateSGI;
}
@ -557,7 +547,7 @@ u8 ODM_RA_GetDecisionRate_8188E(struct odm_dm_struct *dm_odm, u8 macid)
{
u8 DecisionRate = 0;
if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
if ((NULL == dm_odm) || (macid >= ODM_ASSOCIATE_ENTRY_NUM))
return 0;
DecisionRate = (dm_odm->RAInfo[macid].DecisionRate);
return DecisionRate;
@ -567,7 +557,7 @@ u8 ODM_RA_GetHwPwrStatus_8188E(struct odm_dm_struct *dm_odm, u8 macid)
{
u8 PTStage = 5;
if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
if ((NULL == dm_odm) || (macid >= ODM_ASSOCIATE_ENTRY_NUM))
return 0;
PTStage = (dm_odm->RAInfo[macid].PTStage);
return PTStage;
@ -577,7 +567,7 @@ void ODM_RA_UpdateRateInfo_8188E(struct odm_dm_struct *dm_odm, u8 macid, u8 Rate
{
struct odm_ra_info *pRaInfo = NULL;
if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
if ((NULL == dm_odm) || (macid >= ODM_ASSOCIATE_ENTRY_NUM))
return;
pRaInfo = &dm_odm->RAInfo[macid];
@ -591,7 +581,7 @@ void ODM_RA_SetRSSI_8188E(struct odm_dm_struct *dm_odm, u8 macid, u8 Rssi)
{
struct odm_ra_info *pRaInfo = NULL;
if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
if ((NULL == dm_odm) || (macid >= ODM_ASSOCIATE_ENTRY_NUM))
return;
pRaInfo = &dm_odm->RAInfo[macid];
@ -615,7 +605,7 @@ void ODM_RA_TxRPT2Handle_8188E(struct odm_dm_struct *dm_odm, u8 *TxRPT_Buf, u16
pBuffer = TxRPT_Buf;
do {
if (MacId >= ASSOCIATE_ENTRY_NUM)
if (MacId >= ODM_ASSOCIATE_ENTRY_NUM)
valid = 0;
else if (MacId >= 32)
valid = (1 << (MacId - 32)) & macid_entry1;

32
drivers/staging/r8188eu/hal/HalHWImg8188E_BB.c
View File

@ -13,7 +13,6 @@
static bool CheckCondition(const u32 condition, const u32 hex)
{
u32 _board = (hex & 0x000000FF);
u32 _interface = (hex & 0x0000FF00) >> 8;
u32 _platform = (hex & 0x00FF0000) >> 16;
u32 cond = condition;
@ -21,10 +20,6 @@ static bool CheckCondition(const u32 condition, const u32 hex)
if (condition == 0xCDCDCDCD)
return true;
cond = condition & 0x000000FF;
if ((_board == cond) && cond != 0x00)
return false;
cond = condition & 0x0000FF00;
cond = cond >> 8;
if ((_interface & cond) == 0 && cond != 0x07)
@ -176,9 +171,6 @@ enum HAL_STATUS ODM_ReadAndConfig_AGC_TAB_1T_8188E(struct odm_dm_struct *dm_odm)
{
u32 hex = 0;
u32 i = 0;
u8 platform = dm_odm->SupportPlatform;
u8 interfaceValue = dm_odm->SupportInterface;
u8 board = dm_odm->BoardType;
u32 arraylen = sizeof(array_agc_tab_1t_8188e) / sizeof(u32);
u32 *array = array_agc_tab_1t_8188e;
bool biol = false;
@ -187,9 +179,8 @@ enum HAL_STATUS ODM_ReadAndConfig_AGC_TAB_1T_8188E(struct odm_dm_struct *dm_odm)
u8 bndy_cnt = 1;
enum HAL_STATUS rst = HAL_STATUS_SUCCESS;
hex += board;
hex += interfaceValue << 8;
hex += platform << 16;
hex += ODM_ITRF_USB << 8;
hex += ODM_CE << 16;
hex += 0xFF000000;
biol = rtw_IOL_applied(adapter);
@ -246,7 +237,7 @@ enum HAL_STATUS ODM_ReadAndConfig_AGC_TAB_1T_8188E(struct odm_dm_struct *dm_odm)
}
}
if (biol) {
if (!rtw_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) {
if (!rtl8188e_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) {
printk("~~~ %s IOL_exec_cmds Failed !!!\n", __func__);
rst = HAL_STATUS_FAILURE;
}
@ -456,9 +447,6 @@ enum HAL_STATUS ODM_ReadAndConfig_PHY_REG_1T_8188E(struct odm_dm_struct *dm_odm)
{
u32 hex = 0;
u32 i = 0;
u8 platform = dm_odm->SupportPlatform;
u8 interfaceValue = dm_odm->SupportInterface;
u8 board = dm_odm->BoardType;
u32 arraylen = sizeof(array_phy_reg_1t_8188e) / sizeof(u32);
u32 *array = array_phy_reg_1t_8188e;
bool biol = false;
@ -466,9 +454,8 @@ enum HAL_STATUS ODM_ReadAndConfig_PHY_REG_1T_8188E(struct odm_dm_struct *dm_odm)
struct xmit_frame *pxmit_frame = NULL;
u8 bndy_cnt = 1;
enum HAL_STATUS rst = HAL_STATUS_SUCCESS;
hex += board;
hex += interfaceValue << 8;
hex += platform << 16;
hex += ODM_ITRF_USB << 8;
hex += ODM_CE << 16;
hex += 0xFF000000;
biol = rtw_IOL_applied(adapter);
@ -557,7 +544,7 @@ enum HAL_STATUS ODM_ReadAndConfig_PHY_REG_1T_8188E(struct odm_dm_struct *dm_odm)
}
}
if (biol) {
if (!rtw_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) {
if (!rtl8188e_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) {
rst = HAL_STATUS_FAILURE;
pr_info("~~~ IOL Config %s Failed !!!\n", __func__);
}
@ -665,14 +652,11 @@ void ODM_ReadAndConfig_PHY_REG_PG_8188E(struct odm_dm_struct *dm_odm)
{
u32 hex;
u32 i = 0;
u8 platform = dm_odm->SupportPlatform;
u8 interfaceValue = dm_odm->SupportInterface;
u8 board = dm_odm->BoardType;
u32 arraylen = sizeof(array_phy_reg_pg_8188e) / sizeof(u32);
u32 *array = array_phy_reg_pg_8188e;
hex = board + (interfaceValue << 8);
hex += (platform << 16) + 0xFF000000;
hex = ODM_ITRF_USB << 8;
hex += (ODM_CE << 16) + 0xFF000000;
for (i = 0; i < arraylen; i += 3) {
u32 v1 = array[i];

10
drivers/staging/r8188eu/hal/HalHWImg8188E_MAC.c
View File

@ -133,9 +133,6 @@ enum HAL_STATUS ODM_ReadAndConfig_MAC_REG_8188E(struct odm_dm_struct *dm_odm)
u32 hex = 0;
u32 i;
u8 platform = dm_odm->SupportPlatform;
u8 interface_val = dm_odm->SupportInterface;
u8 board = dm_odm->BoardType;
u32 array_len = sizeof(array_MAC_REG_8188E) / sizeof(u32);
u32 *array = array_MAC_REG_8188E;
bool biol = false;
@ -144,9 +141,8 @@ enum HAL_STATUS ODM_ReadAndConfig_MAC_REG_8188E(struct odm_dm_struct *dm_odm)
struct xmit_frame *pxmit_frame = NULL;
u8 bndy_cnt = 1;
enum HAL_STATUS rst = HAL_STATUS_SUCCESS;
hex += board;
hex += interface_val << 8;
hex += platform << 16;
hex += ODM_ITRF_USB << 8;
hex += ODM_CE << 16;
hex += 0xFF000000;
biol = rtw_IOL_applied(adapt);
@ -204,7 +200,7 @@ enum HAL_STATUS ODM_ReadAndConfig_MAC_REG_8188E(struct odm_dm_struct *dm_odm)
}
}
if (biol) {
if (!rtw_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) {
if (!rtl8188e_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) {
pr_info("~~~ MAC IOL_exec_cmds Failed !!!\n");
rst = HAL_STATUS_FAILURE;
}

15
drivers/staging/r8188eu/hal/HalHWImg8188E_RF.c
View File

@ -6,7 +6,6 @@
static bool CheckCondition(const u32 Condition, const u32 Hex)
{
u32 _board = (Hex & 0x000000FF);
u32 _interface = (Hex & 0x0000FF00) >> 8;
u32 _platform = (Hex & 0x00FF0000) >> 16;
u32 cond = Condition;
@ -14,10 +13,6 @@ static bool CheckCondition(const u32 Condition, const u32 Hex)
if (Condition == 0xCDCDCDCD)
return true;
cond = Condition & 0x000000FF;
if ((_board == cond) && cond != 0x00)
return false;
cond = Condition & 0x0000FF00;
cond = cond >> 8;
if ((_interface & cond) == 0 && cond != 0x07)
@ -144,9 +139,6 @@ enum HAL_STATUS ODM_ReadAndConfig_RadioA_1T_8188E(struct odm_dm_struct *pDM_Odm)
u32 hex = 0;
u32 i = 0;
u8 platform = pDM_Odm->SupportPlatform;
u8 interfaceValue = pDM_Odm->SupportInterface;
u8 board = pDM_Odm->BoardType;
u32 ArrayLen = sizeof(Array_RadioA_1T_8188E) / sizeof(u32);
u32 *Array = Array_RadioA_1T_8188E;
bool biol = false;
@ -155,9 +147,8 @@ enum HAL_STATUS ODM_ReadAndConfig_RadioA_1T_8188E(struct odm_dm_struct *pDM_Odm)
u8 bndy_cnt = 1;
enum HAL_STATUS rst = HAL_STATUS_SUCCESS;
hex += board;
hex += interfaceValue << 8;
hex += platform << 16;
hex += ODM_ITRF_USB << 8;
hex += ODM_CE << 16;
hex += 0xFF000000;
biol = rtw_IOL_applied(Adapter);
@ -241,7 +232,7 @@ enum HAL_STATUS ODM_ReadAndConfig_RadioA_1T_8188E(struct odm_dm_struct *pDM_Odm)
}
}
if (biol) {
if (!rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt)) {
if (!rtl8188e_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt)) {
rst = HAL_STATUS_FAILURE;
pr_info("~~~ IOL Config %s Failed !!!\n", __func__);
}

171
drivers/staging/r8188eu/hal/HalPhyRf_8188e.c
View File

@ -110,7 +110,6 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
bool is2t = false;
u8 OFDM_min_index = 6, rf; /* OFDM BB Swing should be less than +3.0dB, which is required by Arthur */
u8 Indexforchannel = 0/*GetRightChnlPlaceforIQK(pHalData->CurrentChannel)*/;
s8 OFDM_index_mapping[2][index_mapping_NUM_88E] = {
{0, 0, 2, 3, 4, 4, /* 2.4G, decrease power */
5, 6, 7, 7, 8, 9,
@ -280,8 +279,8 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
/* Adujst OFDM Ant_A according to IQK result */
ele_D = (OFDMSwingTable[(u8)OFDM_index[0]] & 0xFFC00000) >> 22;
X = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].Value[0][0];
Y = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].Value[0][1];
X = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting.Value[0][0];
Y = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting.Value[0][1];
/* Revse TX power table. */
dm_odm->BbSwingIdxOfdm = (u8)OFDM_index[0];
@ -315,10 +314,10 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
ele_D = (OFDMSwingTable[(u8)OFDM_index[1]] & 0xFFC00000) >> 22;
/* new element A = element D x X */
X = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].Value[0][4];
Y = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].Value[0][5];
X = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting.Value[0][4];
Y = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting.Value[0][5];
if ((X != 0) && (*dm_odm->pBandType == ODM_BAND_2_4G)) {
if (X != 0) {
if ((X & 0x00000200) != 0) /* consider minus */
X = X | 0xFFFFFC00;
ele_A = ((X * ele_D) >> 8) & 0x000003FF;
@ -584,68 +583,12 @@ static void patha_fill_iqk(struct adapter *adapt, bool iqkok, s32 result[][8], u
}
}
static void pathb_fill_iqk(struct adapter *adapt, bool iqkok, s32 result[][8], u8 final_candidate, bool txonly)
{
u32 Oldval_1, X, TX1_A, reg;
s32 Y, TX1_C;
struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);
struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
if (final_candidate == 0xFF) {
return;
} else if (iqkok) {
Oldval_1 = (ODM_GetBBReg(dm_odm, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF;
X = result[final_candidate][4];
if ((X & 0x00000200) != 0)
X = X | 0xFFFFFC00;
TX1_A = (X * Oldval_1) >> 8;
ODM_SetBBReg(dm_odm, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A);
ODM_SetBBReg(dm_odm, rOFDM0_ECCAThreshold, BIT(27), ((X * Oldval_1 >> 7) & 0x1));
Y = result[final_candidate][5];
if ((Y & 0x00000200) != 0)
Y = Y | 0xFFFFFC00;
TX1_C = (Y * Oldval_1) >> 8;
ODM_SetBBReg(dm_odm, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C & 0x3C0) >> 6));
ODM_SetBBReg(dm_odm, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C & 0x3F));
ODM_SetBBReg(dm_odm, rOFDM0_ECCAThreshold, BIT(25), ((Y * Oldval_1 >> 7) & 0x1));
if (txonly)
return;
reg = result[final_candidate][6];
ODM_SetBBReg(dm_odm, rOFDM0_XBRxIQImbalance, 0x3FF, reg);
reg = result[final_candidate][7] & 0x3F;
ODM_SetBBReg(dm_odm, rOFDM0_XBRxIQImbalance, 0xFC00, reg);
reg = (result[final_candidate][7] >> 6) & 0xF;
ODM_SetBBReg(dm_odm, rOFDM0_AGCRSSITable, 0x0000F000, reg);
}
}
/* */
/* 2011/07/26 MH Add an API for testing IQK fail case. */
/* */
/* MP Already declare in odm.c */
static bool ODM_CheckPowerStatus(struct adapter *Adapter)
{
return true;
}
void _PHY_SaveADDARegisters(struct adapter *adapt, u32 *ADDAReg, u32 *ADDABackup, u32 RegisterNum)
{
u32 i;
struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);
struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
if (!ODM_CheckPowerStatus(adapt))
return;
for (i = 0; i < RegisterNum; i++) {
ADDABackup[i] = ODM_GetBBReg(dm_odm, ADDAReg[i], bMaskDWord);
}
@ -772,23 +715,11 @@ static bool phy_SimularityCompare_8188E(
)
{
u32 i, j, diff, sim_bitmap, bound = 0;
struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);
struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
u8 final_candidate[2] = {0xFF, 0xFF}; /* for path A and path B */
bool result = true;
bool is2t;
s32 tmp1 = 0, tmp2 = 0;
if ((dm_odm->RFType == ODM_2T2R) || (dm_odm->RFType == ODM_2T3R) || (dm_odm->RFType == ODM_2T4R))
is2t = true;
else
is2t = false;
if (is2t)
bound = 8;
else
bound = 4;
bound = 4;
sim_bitmap = 0;
for (i = 0; i < bound; i++) {
@ -881,12 +812,7 @@ static void phy_IQCalibrate_8188E(struct adapter *adapt, s32 result[][8], u8 t,
rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE,
rFPGA0_XB_RFInterfaceOE, rFPGA0_RFMOD
};
u32 retryCount = 9;
if (*dm_odm->mp_mode == 1)
retryCount = 9;
else
retryCount = 2;
u32 retryCount = 2;
/* Note: IQ calibration must be performed after loading */
/* PHY_REG.txt , and radio_a, radio_b.txt */
@ -1065,11 +991,10 @@ void PHY_IQCalibrate_8188E(struct adapter *adapt, bool recovery)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);
struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
struct mpt_context *pMptCtx = &adapt->mppriv.MptCtx;
s32 result[4][8]; /* last is final result */
u8 i, final_candidate;
bool pathaok, pathbok;
s32 RegE94, RegE9C, RegEA4, RegEB4, RegEBC, RegEC4;
bool pathaok;
s32 RegE94, RegE9C, RegEA4, RegEB4, RegEBC;
bool is12simular, is13simular, is23simular;
bool singletone = false, carrier_sup = false;
u32 IQK_BB_REG_92C[IQK_BB_REG_NUM] = {
@ -1078,20 +1003,10 @@ void PHY_IQCalibrate_8188E(struct adapter *adapt, bool recovery)
rOFDM0_XATxIQImbalance, rOFDM0_XBTxIQImbalance,
rOFDM0_XCTxAFE, rOFDM0_XDTxAFE,
rOFDM0_RxIQExtAnta};
bool is2t;
is2t = (dm_odm->RFType == ODM_2T2R) ? true : false;
if (!ODM_CheckPowerStatus(adapt))
return;
if (!(dm_odm->SupportAbility & ODM_RF_CALIBRATION))
return;
if (*dm_odm->mp_mode == 1) {
singletone = pMptCtx->bSingleTone;
carrier_sup = pMptCtx->bCarrierSuppression;
}
/* 20120213<Kordan> Turn on when continuous Tx to pass lab testing. (required by Edlu) */
if (singletone || carrier_sup)
return;
@ -1112,13 +1027,12 @@ void PHY_IQCalibrate_8188E(struct adapter *adapt, bool recovery)
}
final_candidate = 0xff;
pathaok = false;
pathbok = false;
is12simular = false;
is23simular = false;
is13simular = false;
for (i = 0; i < 3; i++) {
phy_IQCalibrate_8188E(adapt, result, i, is2t);
phy_IQCalibrate_8188E(adapt, result, i, false);
if (i == 1) {
is12simular = phy_SimularityCompare_8188E(adapt, result, 0, 1);
@ -1150,7 +1064,6 @@ void PHY_IQCalibrate_8188E(struct adapter *adapt, bool recovery)
RegEA4 = result[i][2];
RegEB4 = result[i][4];
RegEBC = result[i][5];
RegEC4 = result[i][6];
}
if (final_candidate != 0xff) {
@ -1163,9 +1076,7 @@ void PHY_IQCalibrate_8188E(struct adapter *adapt, bool recovery)
dm_odm->RFCalibrateInfo.RegE9C = RegE9C;
dm_odm->RFCalibrateInfo.RegEB4 = RegEB4;
dm_odm->RFCalibrateInfo.RegEBC = RegEBC;
RegEC4 = result[final_candidate][6];
pathaok = true;
pathbok = true;
} else {
dm_odm->RFCalibrateInfo.RegE94 = 0x100;
dm_odm->RFCalibrateInfo.RegEB4 = 0x100; /* X default value */
@ -1174,17 +1085,13 @@ void PHY_IQCalibrate_8188E(struct adapter *adapt, bool recovery)
}
if (RegE94 != 0)
patha_fill_iqk(adapt, pathaok, result, final_candidate, (RegEA4 == 0));
if (is2t) {
if (RegEB4 != 0)
pathb_fill_iqk(adapt, pathbok, result, final_candidate, (RegEC4 == 0));
}
/* To Fix BSOD when final_candidate is 0xff */
/* by sherry 20120321 */
if (final_candidate < 4) {
for (i = 0; i < IQK_Matrix_REG_NUM; i++)
dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[0].Value[0][i] = result[final_candidate][i];
dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[0].bIQKDone = true;
dm_odm->RFCalibrateInfo.IQKMatrixRegSetting.Value[0][i] = result[final_candidate][i];
dm_odm->RFCalibrateInfo.IQKMatrixRegSetting.bIQKDone = true;
}
_PHY_SaveADDARegisters(adapt, IQK_BB_REG_92C, dm_odm->RFCalibrateInfo.IQK_BB_backup_recover, 9);
@ -1196,12 +1103,7 @@ void PHY_LCCalibrate_8188E(struct adapter *adapt)
u32 timeout = 2000, timecount = 0;
struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);
struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
struct mpt_context *pMptCtx = &adapt->mppriv.MptCtx;
if (*dm_odm->mp_mode == 1) {
singletone = pMptCtx->bSingleTone;
carrier_sup = pMptCtx->bCarrierSuppression;
}
if (!(dm_odm->SupportAbility & ODM_RF_CALIBRATION))
return;
/* 20120213<Kordan> Turn on when continuous Tx to pass lab testing. (required by Edlu) */
@ -1213,52 +1115,5 @@ void PHY_LCCalibrate_8188E(struct adapter *adapt)
timecount += 50;
}
dm_odm->RFCalibrateInfo.bLCKInProgress = true;
if (dm_odm->RFType == ODM_2T2R) {
phy_LCCalibrate_8188E(adapt, true);
} else {
/* For 88C 1T1R */
phy_LCCalibrate_8188E(adapt, false);
}
dm_odm->RFCalibrateInfo.bLCKInProgress = false;
}
static void phy_setrfpathswitch_8188e(struct adapter *adapt, bool main, bool is2t)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);
struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
if (!adapt->hw_init_completed) {
u8 u1btmp;
u1btmp = ODM_Read1Byte(dm_odm, REG_LEDCFG2) | BIT(7);
ODM_Write1Byte(dm_odm, REG_LEDCFG2, u1btmp);
ODM_SetBBReg(dm_odm, rFPGA0_XAB_RFParameter, BIT(13), 0x01);
}
if (is2t) { /* 92C */
if (main)
ODM_SetBBReg(dm_odm, rFPGA0_XB_RFInterfaceOE, BIT(5) | BIT(6), 0x1); /* 92C_Path_A */
else
ODM_SetBBReg(dm_odm, rFPGA0_XB_RFInterfaceOE, BIT(5) | BIT(6), 0x2); /* BT */
} else { /* 88C */
if (main)
ODM_SetBBReg(dm_odm, rFPGA0_XA_RFInterfaceOE, BIT(8) | BIT(9), 0x2); /* Main */
else
ODM_SetBBReg(dm_odm, rFPGA0_XA_RFInterfaceOE, BIT(8) | BIT(9), 0x1); /* Aux */
}
}
void PHY_SetRFPathSwitch_8188E(struct adapter *adapt, bool main)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);
struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
if (dm_odm->RFType == ODM_2T2R) {
phy_setrfpathswitch_8188e(adapt, main, true);
} else {
/* For 88C 1T1R */
phy_setrfpathswitch_8188e(adapt, main, false);
}
phy_LCCalibrate_8188E(adapt, false);
}

26
drivers/staging/r8188eu/hal/hal_com.c
View File

@ -15,18 +15,7 @@ void dump_chip_info(struct HAL_VERSION chip_vers)
uint cnt = 0;
char buf[128];
if (IS_81XXC(chip_vers)) {
cnt += sprintf((buf + cnt), "Chip Version Info: %s_",
IS_92C_SERIAL(chip_vers) ?
"CHIP_8192C" : "CHIP_8188C");
} else if (IS_92D(chip_vers)) {
cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8192D_");
} else if (IS_8723_SERIES(chip_vers)) {
cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8723A_");
} else if (IS_8188E(chip_vers)) {
cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8188E_");
}
cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8188E_");
cnt += sprintf((buf + cnt), "%s_", IS_NORMAL_CHIP(chip_vers) ?
"Normal_Chip" : "Test_Chip");
cnt += sprintf((buf + cnt), "%s_", IS_CHIP_VENDOR_TSMC(chip_vers) ?
@ -45,15 +34,7 @@ void dump_chip_info(struct HAL_VERSION chip_vers)
cnt += sprintf((buf + cnt), "UNKNOWN_CUT(%d)_",
chip_vers.CUTVersion);
if (IS_1T1R(chip_vers))
cnt += sprintf((buf + cnt), "1T1R_");
else if (IS_1T2R(chip_vers))
cnt += sprintf((buf + cnt), "1T2R_");
else if (IS_2T2R(chip_vers))
cnt += sprintf((buf + cnt), "2T2R_");
else
cnt += sprintf((buf + cnt), "UNKNOWN_RFTYPE(%d)_",
chip_vers.RFType);
cnt += sprintf((buf + cnt), "1T1R_");
cnt += sprintf((buf + cnt), "RomVer(%d)\n", chip_vers.ROMVer);
@ -300,8 +281,7 @@ bool Hal_MappingOutPipe(struct adapter *adapter, u8 numoutpipe)
void hal_init_macaddr(struct adapter *adapter)
{
rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR,
adapter->eeprompriv.mac_addr);
SetHwReg8188EU(adapter, HW_VAR_MAC_ADDR, adapter->eeprompriv.mac_addr);
}
/*

391
drivers/staging/r8188eu/hal/hal_intf.c
View File

@ -6,83 +6,19 @@
#include "../include/drv_types.h"
#include "../include/hal_intf.h"
void rtw_hal_chip_configure(struct adapter *adapt)
{
if (adapt->HalFunc.intf_chip_configure)
adapt->HalFunc.intf_chip_configure(adapt);
}
void rtw_hal_read_chip_info(struct adapter *adapt)
{
if (adapt->HalFunc.read_adapter_info)
adapt->HalFunc.read_adapter_info(adapt);
}
void rtw_hal_read_chip_version(struct adapter *adapt)
{
if (adapt->HalFunc.read_chip_version)
adapt->HalFunc.read_chip_version(adapt);
}
void rtw_hal_def_value_init(struct adapter *adapt)
{
if (adapt->HalFunc.init_default_value)
adapt->HalFunc.init_default_value(adapt);
}
void rtw_hal_free_data(struct adapter *adapt)
{
if (adapt->HalFunc.free_hal_data)
adapt->HalFunc.free_hal_data(adapt);
}
void rtw_hal_dm_init(struct adapter *adapt)
{
if (adapt->HalFunc.dm_init)
adapt->HalFunc.dm_init(adapt);
}
void rtw_hal_dm_deinit(struct adapter *adapt)
{
/* cancel dm timer */
if (adapt->HalFunc.dm_deinit)
adapt->HalFunc.dm_deinit(adapt);
}
void rtw_hal_sw_led_init(struct adapter *adapt)
{
if (adapt->HalFunc.InitSwLeds)
adapt->HalFunc.InitSwLeds(adapt);
}
void rtw_hal_sw_led_deinit(struct adapter *adapt)
{
if (adapt->HalFunc.DeInitSwLeds)
adapt->HalFunc.DeInitSwLeds(adapt);
}
u32 rtw_hal_power_on(struct adapter *adapt)
{
if (adapt->HalFunc.hal_power_on)
return adapt->HalFunc.hal_power_on(adapt);
return _FAIL;
}
uint rtw_hal_init(struct adapter *adapt)
{
uint status = _SUCCESS;
adapt->hw_init_completed = false;
status = adapt->HalFunc.hal_init(adapt);
status = rtl8188eu_hal_init(adapt);
if (status == _SUCCESS) {
adapt->hw_init_completed = true;
if (adapt->registrypriv.notch_filter == 1)
rtw_hal_notch_filter(adapt, 1);
rtw_hal_reset_security_engine(adapt);
hal_notch_filter_8188e(adapt, 1);
} else {
adapt->hw_init_completed = false;
DBG_88E("rtw_hal_init: hal__init fail\n");
@ -95,7 +31,7 @@ uint rtw_hal_deinit(struct adapter *adapt)
{
uint status = _SUCCESS;
status = adapt->HalFunc.hal_deinit(adapt);
status = rtl8188eu_hal_deinit(adapt);
if (status == _SUCCESS)
adapt->hw_init_completed = false;
@ -105,337 +41,18 @@ uint rtw_hal_deinit(struct adapter *adapt)
return status;
}
void rtw_hal_set_hwreg(struct adapter *adapt, u8 variable, u8 *val)
{
if (adapt->HalFunc.SetHwRegHandler)
adapt->HalFunc.SetHwRegHandler(adapt, variable, val);
}
void rtw_hal_get_hwreg(struct adapter *adapt, u8 variable, u8 *val)
{
if (adapt->HalFunc.GetHwRegHandler)
adapt->HalFunc.GetHwRegHandler(adapt, variable, val);
}
u8 rtw_hal_set_def_var(struct adapter *adapt, enum hal_def_variable var,
void *val)
{
if (adapt->HalFunc.SetHalDefVarHandler)
return adapt->HalFunc.SetHalDefVarHandler(adapt, var, val);
return _FAIL;
}
u8 rtw_hal_get_def_var(struct adapter *adapt,
enum hal_def_variable var, void *val)
{
if (adapt->HalFunc.GetHalDefVarHandler)
return adapt->HalFunc.GetHalDefVarHandler(adapt, var, val);
return _FAIL;
}
void rtw_hal_set_odm_var(struct adapter *adapt,
enum hal_odm_variable var, void *val1,
bool set)
{
if (adapt->HalFunc.SetHalODMVarHandler)
adapt->HalFunc.SetHalODMVarHandler(adapt, var,
val1, set);
}
void rtw_hal_get_odm_var(struct adapter *adapt,
enum hal_odm_variable var, void *val1,
bool set)
{
if (adapt->HalFunc.GetHalODMVarHandler)
adapt->HalFunc.GetHalODMVarHandler(adapt, var,
val1, set);
}
void rtw_hal_enable_interrupt(struct adapter *adapt)
{
if (adapt->HalFunc.enable_interrupt)
adapt->HalFunc.enable_interrupt(adapt);
else
DBG_88E("%s: HalFunc.enable_interrupt is NULL!\n", __func__);
}
void rtw_hal_disable_interrupt(struct adapter *adapt)
{
if (adapt->HalFunc.disable_interrupt)
adapt->HalFunc.disable_interrupt(adapt);
else
DBG_88E("%s: HalFunc.disable_interrupt is NULL!\n", __func__);
}
u32 rtw_hal_inirp_init(struct adapter *adapt)
{
u32 rst = _FAIL;
if (adapt->HalFunc.inirp_init)
rst = adapt->HalFunc.inirp_init(adapt);
else
DBG_88E(" %s HalFunc.inirp_init is NULL!!!\n", __func__);
return rst;
}
u32 rtw_hal_inirp_deinit(struct adapter *adapt)
{
if (adapt->HalFunc.inirp_deinit)
return adapt->HalFunc.inirp_deinit(adapt);
return _FAIL;
}
u8 rtw_hal_intf_ps_func(struct adapter *adapt,
enum hal_intf_ps_func efunc_id, u8 *val)
{
if (adapt->HalFunc.interface_ps_func)
return adapt->HalFunc.interface_ps_func(adapt, efunc_id,
val);
return _FAIL;
}
s32 rtw_hal_xmitframe_enqueue(struct adapter *padapter,
struct xmit_frame *pxmitframe)
{
if (padapter->HalFunc.hal_xmitframe_enqueue)
return padapter->HalFunc.hal_xmitframe_enqueue(padapter, pxmitframe);
return false;
}
s32 rtw_hal_xmit(struct adapter *adapt, struct xmit_frame *pxmitframe)
{
if (adapt->HalFunc.hal_xmit)
return adapt->HalFunc.hal_xmit(adapt, pxmitframe);
return false;
}
s32 rtw_hal_mgnt_xmit(struct adapter *adapt, struct xmit_frame *pmgntframe)
{
s32 ret = _FAIL;
if (adapt->HalFunc.mgnt_xmit)
ret = adapt->HalFunc.mgnt_xmit(adapt, pmgntframe);
return ret;
}
s32 rtw_hal_init_xmit_priv(struct adapter *adapt)
{
if (adapt->HalFunc.init_xmit_priv)
return adapt->HalFunc.init_xmit_priv(adapt);
return _FAIL;
}
s32 rtw_hal_init_recv_priv(struct adapter *adapt)
{
if (adapt->HalFunc.init_recv_priv)
return adapt->HalFunc.init_recv_priv(adapt);
return _FAIL;
}
void rtw_hal_free_recv_priv(struct adapter *adapt)
{
if (adapt->HalFunc.free_recv_priv)
adapt->HalFunc.free_recv_priv(adapt);
}
void rtw_hal_update_ra_mask(struct adapter *adapt, u32 mac_id, u8 rssi_level)
{
struct mlme_priv *pmlmepriv = &adapt->mlmepriv;
if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) {
#ifdef CONFIG_88EU_AP_MODE
struct sta_info *psta = NULL;
struct sta_priv *pstapriv = &adapt->stapriv;
if (mac_id >= 2)
psta = pstapriv->sta_aid[(mac_id - 1) - 1];
if (psta)
add_RATid(adapt, psta, 0);/* todo: based on rssi_level*/
#endif
} else {
if (adapt->HalFunc.UpdateRAMaskHandler)
adapt->HalFunc.UpdateRAMaskHandler(adapt, mac_id,
rssi_level);
UpdateHalRAMask8188EUsb(adapt, mac_id, rssi_level);
}
}
void rtw_hal_add_ra_tid(struct adapter *adapt, u32 bitmap, u8 arg,
u8 rssi_level)
{
if (adapt->HalFunc.Add_RateATid)
adapt->HalFunc.Add_RateATid(adapt, bitmap, arg,
rssi_level);
}
/* Start specifical interface thread */
void rtw_hal_start_thread(struct adapter *adapt)
{
if (adapt->HalFunc.run_thread)
adapt->HalFunc.run_thread(adapt);
}
/* Start specifical interface thread */
void rtw_hal_stop_thread(struct adapter *adapt)
{
if (adapt->HalFunc.cancel_thread)
adapt->HalFunc.cancel_thread(adapt);
}
u32 rtw_hal_read_bbreg(struct adapter *adapt, u32 regaddr, u32 bitmask)
{
u32 data = 0;
if (adapt->HalFunc.read_bbreg)
data = adapt->HalFunc.read_bbreg(adapt, regaddr, bitmask);
return data;
}
void rtw_hal_write_bbreg(struct adapter *adapt, u32 regaddr, u32 bitmask,
u32 data)
{
if (adapt->HalFunc.write_bbreg)
adapt->HalFunc.write_bbreg(adapt, regaddr, bitmask, data);
}
u32 rtw_hal_read_rfreg(struct adapter *adapt, enum rf_radio_path rfpath,
u32 regaddr, u32 bitmask)
{
u32 data = 0;
if (adapt->HalFunc.read_rfreg)
data = adapt->HalFunc.read_rfreg(adapt, rfpath, regaddr,
bitmask);
return data;
}
void rtw_hal_write_rfreg(struct adapter *adapt, enum rf_radio_path rfpath,
u32 regaddr, u32 bitmask, u32 data)
{
if (adapt->HalFunc.write_rfreg)
adapt->HalFunc.write_rfreg(adapt, rfpath, regaddr,
bitmask, data);
}
s32 rtw_hal_interrupt_handler(struct adapter *adapt)
{
if (adapt->HalFunc.interrupt_handler)
return adapt->HalFunc.interrupt_handler(adapt);
return _FAIL;
}
void rtw_hal_set_bwmode(struct adapter *adapt,
enum ht_channel_width bandwidth, u8 offset)
{
if (adapt->HalFunc.set_bwmode_handler)
adapt->HalFunc.set_bwmode_handler(adapt, bandwidth,
offset);
}
void rtw_hal_set_chan(struct adapter *adapt, u8 channel)
{
if (adapt->HalFunc.set_channel_handler)
adapt->HalFunc.set_channel_handler(adapt, channel);
}
void rtw_hal_dm_watchdog(struct adapter *adapt)
{
if (adapt->HalFunc.hal_dm_watchdog)
adapt->HalFunc.hal_dm_watchdog(adapt);
}
void rtw_hal_bcn_related_reg_setting(struct adapter *adapt)
{
if (adapt->HalFunc.SetBeaconRelatedRegistersHandler)
adapt->HalFunc.SetBeaconRelatedRegistersHandler(adapt);
}
u8 rtw_hal_antdiv_before_linked(struct adapter *adapt)
{
if (adapt->HalFunc.AntDivBeforeLinkHandler)
return adapt->HalFunc.AntDivBeforeLinkHandler(adapt);
return false;
}
void rtw_hal_antdiv_rssi_compared(struct adapter *adapt,
struct wlan_bssid_ex *dst,
struct wlan_bssid_ex *src)
{
if (adapt->HalFunc.AntDivCompareHandler)
adapt->HalFunc.AntDivCompareHandler(adapt, dst, src);
}
void rtw_hal_sreset_init(struct adapter *adapt)
{
if (adapt->HalFunc.sreset_init_value)
adapt->HalFunc.sreset_init_value(adapt);
}
void rtw_hal_sreset_reset(struct adapter *adapt)
{
if (adapt->HalFunc.silentreset)
adapt->HalFunc.silentreset(adapt);
}
void rtw_hal_sreset_reset_value(struct adapter *adapt)
{
if (adapt->HalFunc.sreset_reset_value)
adapt->HalFunc.sreset_reset_value(adapt);
}
void rtw_hal_sreset_xmit_status_check(struct adapter *adapt)
{
if (adapt->HalFunc.sreset_xmit_status_check)
adapt->HalFunc.sreset_xmit_status_check(adapt);
}
void rtw_hal_sreset_linked_status_check(struct adapter *adapt)
{
if (adapt->HalFunc.sreset_linked_status_check)
adapt->HalFunc.sreset_linked_status_check(adapt);
}
u8 rtw_hal_sreset_get_wifi_status(struct adapter *adapt)
{
u8 status = 0;
if (adapt->HalFunc.sreset_get_wifi_status)
status = adapt->HalFunc.sreset_get_wifi_status(adapt);
return status;
}
int rtw_hal_iol_cmd(struct adapter *adapter, struct xmit_frame *xmit_frame,
u32 max_wating_ms, u32 bndy_cnt)
{
if (adapter->HalFunc.IOL_exec_cmds_sync)
return adapter->HalFunc.IOL_exec_cmds_sync(adapter, xmit_frame,
max_wating_ms,
bndy_cnt);
return _FAIL;
}
void rtw_hal_notch_filter(struct adapter *adapter, bool enable)
{
if (adapter->HalFunc.hal_notch_filter)
adapter->HalFunc.hal_notch_filter(adapter, enable);
}
void rtw_hal_reset_security_engine(struct adapter *adapter)
{
if (adapter->HalFunc.hal_reset_security_engine)
adapter->HalFunc.hal_reset_security_engine(adapter);
}
s32 rtw_hal_c2h_handler(struct adapter *adapter, struct c2h_evt_hdr *c2h_evt)
{
s32 ret = _FAIL;
if (adapter->HalFunc.c2h_handler)
ret = adapter->HalFunc.c2h_handler(adapter, c2h_evt);
return ret;
}
c2h_id_filter rtw_hal_c2h_id_filter_ccx(struct adapter *adapter)
{
return adapter->HalFunc.c2h_id_filter_ccx;
}

1172
drivers/staging/r8188eu/hal/odm.c
View File

File diff suppressed because it is too large Load Diff

389
drivers/staging/r8188eu/hal/odm_HWConfig.c
View File

@ -6,7 +6,6 @@
#define READ_AND_CONFIG READ_AND_CONFIG_MP
#define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig##txt##ic(dm_odm))
#define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC##txt##ic(dm_odm))
static u8 odm_QueryRxPwrPercentage(s8 AntPower)
{
@ -18,63 +17,28 @@ static u8 odm_QueryRxPwrPercentage(s8 AntPower)
return 100 + AntPower;
}
/* 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer. */
/* IF other SW team do not support the feature, remove this section.?? */
static s32 odm_sig_patch_lenove(struct odm_dm_struct *dm_odm, s32 CurrSig)
{
return 0;
}
static s32 odm_sig_patch_netcore(struct odm_dm_struct *dm_odm, s32 CurrSig)
{
return 0;
}
static s32 odm_SignalScaleMapping_92CSeries(struct odm_dm_struct *dm_odm, s32 CurrSig)
static s32 odm_SignalScaleMapping(struct odm_dm_struct *dm_odm, s32 CurrSig)
{
s32 RetSig = 0;
if ((dm_odm->SupportInterface == ODM_ITRF_USB) ||
(dm_odm->SupportInterface == ODM_ITRF_SDIO)) {
if (CurrSig >= 51 && CurrSig <= 100)
RetSig = 100;
else if (CurrSig >= 41 && CurrSig <= 50)
RetSig = 80 + ((CurrSig - 40) * 2);
else if (CurrSig >= 31 && CurrSig <= 40)
RetSig = 66 + (CurrSig - 30);
else if (CurrSig >= 21 && CurrSig <= 30)
RetSig = 54 + (CurrSig - 20);
else if (CurrSig >= 10 && CurrSig <= 20)
RetSig = 42 + (((CurrSig - 10) * 2) / 3);
else if (CurrSig >= 5 && CurrSig <= 9)
RetSig = 22 + (((CurrSig - 5) * 3) / 2);
else if (CurrSig >= 1 && CurrSig <= 4)
RetSig = 6 + (((CurrSig - 1) * 3) / 2);
else
RetSig = CurrSig;
}
return RetSig;
}
static s32 odm_SignalScaleMapping(struct odm_dm_struct *dm_odm, s32 CurrSig)
{
if ((dm_odm->SupportPlatform == ODM_MP) &&
(dm_odm->SupportInterface != ODM_ITRF_PCIE) && /* USB & SDIO */
(dm_odm->PatchID == 10))
return odm_sig_patch_netcore(dm_odm, CurrSig);
else if ((dm_odm->SupportPlatform == ODM_MP) &&
(dm_odm->SupportInterface == ODM_ITRF_PCIE) &&
(dm_odm->PatchID == 19))
return odm_sig_patch_lenove(dm_odm, CurrSig);
if (CurrSig >= 51 && CurrSig <= 100)
RetSig = 100;
else if (CurrSig >= 41 && CurrSig <= 50)
RetSig = 80 + ((CurrSig - 40) * 2);
else if (CurrSig >= 31 && CurrSig <= 40)
RetSig = 66 + (CurrSig - 30);
else if (CurrSig >= 21 && CurrSig <= 30)
RetSig = 54 + (CurrSig - 20);
else if (CurrSig >= 10 && CurrSig <= 20)
RetSig = 42 + (((CurrSig - 10) * 2) / 3);
else if (CurrSig >= 5 && CurrSig <= 9)
RetSig = 22 + (((CurrSig - 5) * 3) / 2);
else if (CurrSig >= 1 && CurrSig <= 4)
RetSig = 6 + (((CurrSig - 1) * 3) / 2);
else
return odm_SignalScaleMapping_92CSeries(dm_odm, CurrSig);
}
RetSig = CurrSig;
/* pMgntInfo->CustomerID == RT_CID_819x_Lenovo */
static u8 odm_SQ_process_patch_RT_CID_819x_Lenovo(struct odm_dm_struct *dm_odm,
u8 isCCKrate, u8 PWDB_ALL, u8 path, u8 RSSI)
{
return 0;
return RetSig;
}
static u8 odm_evm_db_to_percentage(s8 value)
@ -89,15 +53,14 @@ static u8 odm_evm_db_to_percentage(s8 value)
}
static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
struct odm_phy_status_info *pPhyInfo,
struct phy_info *pPhyInfo,
u8 *pPhyStatus,
struct odm_per_pkt_info *pPktinfo,
struct adapter *adapt)
{
struct sw_ant_switch *pDM_SWAT_Table = &dm_odm->DM_SWAT_Table;
u8 i, Max_spatial_stream;
s8 rx_pwr[4], rx_pwr_all = 0;
u8 EVM, PWDB_ALL = 0, PWDB_ALL_BT;
u8 EVM, PWDB_ALL = 0;
u8 RSSI, total_rssi = 0;
u8 isCCKrate = 0;
u8 rf_rx_num = 0;
@ -112,7 +75,6 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
pPhyInfo->RxMIMOSignalQuality[RF_PATH_B] = -1;
if (isCCKrate) {
u8 report;
u8 cck_agc_rpt;
dm_odm->PhyDbgInfo.NumQryPhyStatusCCK++;
@ -126,125 +88,60 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
/* 2011.11.28 LukeLee: 88E use different LNA & VGA gain table */
/* The RSSI formula should be modified according to the gain table */
/* In 88E, cck_highpwr is always set to 1 */
if (dm_odm->SupportICType & (ODM_RTL8188E | ODM_RTL8812)) {
LNA_idx = ((cck_agc_rpt & 0xE0) >> 5);
VGA_idx = (cck_agc_rpt & 0x1F);
switch (LNA_idx) {
case 7:
if (VGA_idx <= 27)
rx_pwr_all = -100 + 2 * (27 - VGA_idx); /* VGA_idx = 27~2 */
else
rx_pwr_all = -100;
break;
case 6:
rx_pwr_all = -48 + 2 * (2 - VGA_idx); /* VGA_idx = 2~0 */
break;
case 5:
rx_pwr_all = -42 + 2 * (7 - VGA_idx); /* VGA_idx = 7~5 */
break;
case 4:
rx_pwr_all = -36 + 2 * (7 - VGA_idx); /* VGA_idx = 7~4 */
break;
case 3:
rx_pwr_all = -24 + 2 * (7 - VGA_idx); /* VGA_idx = 7~0 */
break;
case 2:
if (cck_highpwr)
rx_pwr_all = -12 + 2 * (5 - VGA_idx); /* VGA_idx = 5~0 */
else
rx_pwr_all = -6 + 2 * (5 - VGA_idx);
break;
case 1:
rx_pwr_all = 8 - 2 * VGA_idx;
break;
case 0:
rx_pwr_all = 14 - 2 * VGA_idx;
break;
default:
break;
}
rx_pwr_all += 6;
PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
if (!cck_highpwr) {
if (PWDB_ALL >= 80)
PWDB_ALL = ((PWDB_ALL - 80) << 1) + ((PWDB_ALL - 80) >> 1) + 80;
else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20))
PWDB_ALL += 3;
if (PWDB_ALL > 100)
PWDB_ALL = 100;
}
} else {
if (!cck_highpwr) {
report = (cck_agc_rpt & 0xc0) >> 6;
switch (report) {
/* 03312009 modified by cosa */
/* Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion */
/* Note: different RF with the different RNA gain. */
case 0x3:
rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
break;
case 0x2:
rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
break;
case 0x1:
rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
break;
case 0x0:
rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
break;
}
} else {
report = (cck_agc_rpt & 0x60) >> 5;
switch (report) {
case 0x3:
rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f) << 1);
break;
case 0x2:
rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f) << 1);
break;
case 0x1:
rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f) << 1);
break;
case 0x0:
rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f) << 1);
break;
}
}
PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
/* Modification for ext-LNA board */
if (dm_odm->BoardType == ODM_BOARD_HIGHPWR) {
if ((cck_agc_rpt >> 7) == 0) {
PWDB_ALL = (PWDB_ALL > 94) ? 100 : (PWDB_ALL + 6);
} else {
if (PWDB_ALL > 38)
PWDB_ALL -= 16;
else
PWDB_ALL = (PWDB_ALL <= 16) ? (PWDB_ALL >> 2) : (PWDB_ALL - 12);
}
/* CCK modification */
if (PWDB_ALL > 25 && PWDB_ALL <= 60)
PWDB_ALL += 6;
} else {/* Modification for int-LNA board */
if (PWDB_ALL > 99)
PWDB_ALL -= 8;
else if (PWDB_ALL > 50 && PWDB_ALL <= 68)
PWDB_ALL += 4;
}
LNA_idx = ((cck_agc_rpt & 0xE0) >> 5);
VGA_idx = (cck_agc_rpt & 0x1F);
switch (LNA_idx) {
case 7:
if (VGA_idx <= 27)
rx_pwr_all = -100 + 2 * (27 - VGA_idx); /* VGA_idx = 27~2 */
else
rx_pwr_all = -100;
break;
case 6:
rx_pwr_all = -48 + 2 * (2 - VGA_idx); /* VGA_idx = 2~0 */
break;
case 5:
rx_pwr_all = -42 + 2 * (7 - VGA_idx); /* VGA_idx = 7~5 */
break;
case 4:
rx_pwr_all = -36 + 2 * (7 - VGA_idx); /* VGA_idx = 7~4 */
break;
case 3:
rx_pwr_all = -24 + 2 * (7 - VGA_idx); /* VGA_idx = 7~0 */
break;
case 2:
if (cck_highpwr)
rx_pwr_all = -12 + 2 * (5 - VGA_idx); /* VGA_idx = 5~0 */
else
rx_pwr_all = -6 + 2 * (5 - VGA_idx);
break;
case 1:
rx_pwr_all = 8 - 2 * VGA_idx;
break;
case 0:
rx_pwr_all = 14 - 2 * VGA_idx;
break;
default:
break;
}
rx_pwr_all += 6;
PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
if (!cck_highpwr) {
if (PWDB_ALL >= 80)
PWDB_ALL = ((PWDB_ALL - 80) << 1) + ((PWDB_ALL - 80) >> 1) + 80;
else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20))
PWDB_ALL += 3;
if (PWDB_ALL > 100)
PWDB_ALL = 100;
}
pPhyInfo->RxPWDBAll = PWDB_ALL;
pPhyInfo->BTRxRSSIPercentage = PWDB_ALL;
pPhyInfo->RecvSignalPower = rx_pwr_all;
pPhyInfo->recvpower = rx_pwr_all;
/* (3) Get Signal Quality (EVM) */
if (pPktinfo->bPacketMatchBSSID) {
u8 SQ, SQ_rpt;
if ((dm_odm->SupportPlatform == ODM_MP) && (dm_odm->PatchID == 19)) {
SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(dm_odm, isCCKrate, PWDB_ALL, 0, 0);
} else if (pPhyInfo->RxPWDBAll > 40 && !dm_odm->bInHctTest) {
if (pPhyInfo->RxPWDBAll > 40) {
SQ = 100;
} else {
SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all;
@ -280,62 +177,37 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]);
total_rssi += RSSI;
/* Modification for ext-LNA board */
if (dm_odm->BoardType == ODM_BOARD_HIGHPWR) {
if ((pPhyStaRpt->path_agc[i].trsw) == 1)
RSSI = (RSSI > 94) ? 100 : (RSSI + 6);
else
RSSI = (RSSI <= 16) ? (RSSI >> 3) : (RSSI - 16);
if ((RSSI <= 34) && (RSSI >= 4))
RSSI -= 4;
}
pPhyInfo->RxMIMOSignalStrength[i] = (u8)RSSI;
/* Get Rx snr value in DB */
pPhyInfo->RxSNR[i] = (s32)(pPhyStaRpt->path_rxsnr[i] / 2);
dm_odm->PhyDbgInfo.RxSNRdB[i] = (s32)(pPhyStaRpt->path_rxsnr[i] / 2);
/* Record Signal Strength for next packet */
if (pPktinfo->bPacketMatchBSSID) {
if ((dm_odm->SupportPlatform == ODM_MP) && (dm_odm->PatchID == 19)) {
if (i == RF_PATH_A)
pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(dm_odm, isCCKrate, PWDB_ALL, i, RSSI);
}
}
}
/* (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1) & 0x7f) - 110;
PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
PWDB_ALL_BT = PWDB_ALL;
pPhyInfo->RxPWDBAll = PWDB_ALL;
pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT;
pPhyInfo->RxPower = rx_pwr_all;
pPhyInfo->RecvSignalPower = rx_pwr_all;
pPhyInfo->recvpower = rx_pwr_all;
if ((dm_odm->SupportPlatform == ODM_MP) && (dm_odm->PatchID == 19)) {
/* do nothing */
} else {
/* (3)EVM of HT rate */
if (pPktinfo->Rate >= DESC92C_RATEMCS8 && pPktinfo->Rate <= DESC92C_RATEMCS15)
Max_spatial_stream = 2; /* both spatial stream make sense */
else
Max_spatial_stream = 1; /* only spatial stream 1 makes sense */
/* (3)EVM of HT rate */
if (pPktinfo->Rate >= DESC92C_RATEMCS8 && pPktinfo->Rate <= DESC92C_RATEMCS15)
Max_spatial_stream = 2; /* both spatial stream make sense */
else
Max_spatial_stream = 1; /* only spatial stream 1 makes sense */
for (i = 0; i < Max_spatial_stream; i++) {
/* Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */
/* fill most significant bit to "zero" when doing shifting operation which may change a negative */
/* value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. */
EVM = odm_evm_db_to_percentage((pPhyStaRpt->stream_rxevm[i])); /* dbm */
for (i = 0; i < Max_spatial_stream; i++) {
/* Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */
/* fill most significant bit to "zero" when doing shifting operation which may change a negative */
/* value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. */
EVM = odm_evm_db_to_percentage((pPhyStaRpt->stream_rxevm[i])); /* dbm */
if (pPktinfo->bPacketMatchBSSID) {
if (i == RF_PATH_A) /* Fill value in RFD, Get the first spatial stream only */
pPhyInfo->SignalQuality = (u8)(EVM & 0xff);
pPhyInfo->RxMIMOSignalQuality[i] = (u8)(EVM & 0xff);
}
if (pPktinfo->bPacketMatchBSSID) {
if (i == RF_PATH_A) /* Fill value in RFD, Get the first spatial stream only */
pPhyInfo->SignalQuality = (u8)(EVM & 0xff);
pPhyInfo->RxMIMOSignalQuality[i] = (u8)(EVM & 0xff);
}
}
}
@ -348,20 +220,14 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(dm_odm, total_rssi /= rf_rx_num));
}
/* For 92C/92D HW (Hybrid) Antenna Diversity */
pDM_SWAT_Table->antsel = pPhyStaRpt->ant_sel;
/* For 88E HW Antenna Diversity */
dm_odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->ant_sel;
dm_odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->ant_sel_b;
dm_odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antsel_rx_keep_2;
}
void odm_Init_RSSIForDM(struct odm_dm_struct *dm_odm)
{
}
static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm,
struct odm_phy_status_info *pPhyInfo,
struct phy_info *pPhyInfo,
struct odm_per_pkt_info *pPktinfo)
{
s32 UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK;
@ -371,6 +237,8 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm,
u32 OFDM_pkt = 0;
u32 Weighting = 0;
struct sta_info *pEntry;
u8 antsel_tr_mux;
struct fast_ant_train *pDM_FatTable = &dm_odm->DM_FatTable;
if (pPktinfo->StationID == 0xFF)
return;
@ -383,28 +251,24 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm,
isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M)) ? true : false;
/* Smart Antenna Debug Message------------------ */
if (dm_odm->SupportICType == ODM_RTL8188E) {
u8 antsel_tr_mux;
struct fast_ant_train *pDM_FatTable = &dm_odm->DM_FatTable;
if (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV) {
if (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) {
if (pPktinfo->bPacketToSelf) {
antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2 << 2) |
(pDM_FatTable->antsel_rx_keep_1 << 1) |
pDM_FatTable->antsel_rx_keep_0;
pDM_FatTable->antSumRSSI[antsel_tr_mux] += pPhyInfo->RxPWDBAll;
pDM_FatTable->antRSSIcnt[antsel_tr_mux]++;
}
}
} else if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)) {
if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {
if (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV) {
if (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) {
if (pPktinfo->bPacketToSelf) {
antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2 << 2) |
(pDM_FatTable->antsel_rx_keep_1 << 1) | pDM_FatTable->antsel_rx_keep_0;
ODM_AntselStatistics_88E(dm_odm, antsel_tr_mux, pPktinfo->StationID, pPhyInfo->RxPWDBAll);
(pDM_FatTable->antsel_rx_keep_1 << 1) |
pDM_FatTable->antsel_rx_keep_0;
pDM_FatTable->antSumRSSI[antsel_tr_mux] += pPhyInfo->RxPWDBAll;
pDM_FatTable->antRSSIcnt[antsel_tr_mux]++;
}
}
} else if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)) {
if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {
antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2 << 2) |
(pDM_FatTable->antsel_rx_keep_1 << 1) | pDM_FatTable->antsel_rx_keep_0;
ODM_AntselStatistics_88E(dm_odm, antsel_tr_mux, pPktinfo->StationID, pPhyInfo->RxPWDBAll);
}
}
/* Smart Antenna Debug Message------------------ */
UndecoratedSmoothedCCK = pEntry->rssi_stat.UndecoratedSmoothedCCK;
@ -498,47 +362,24 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm,
}
/* Endianness before calling this API */
static void ODM_PhyStatusQuery_92CSeries(struct odm_dm_struct *dm_odm,
struct odm_phy_status_info *pPhyInfo,
u8 *pPhyStatus,
struct odm_per_pkt_info *pPktinfo,
struct adapter *adapt)
void ODM_PhyStatusQuery(struct odm_dm_struct *dm_odm,
struct phy_info *pPhyInfo,
u8 *pPhyStatus,
struct odm_per_pkt_info *pPktinfo,
struct adapter *adapt)
{
odm_RxPhyStatus92CSeries_Parsing(dm_odm, pPhyInfo, pPhyStatus,
pPktinfo, adapt);
if (dm_odm->RSSI_test) {
/* Select the packets to do RSSI checking for antenna switching. */
if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon)
ODM_SwAntDivChkPerPktRssi(dm_odm, pPktinfo->StationID, pPhyInfo);
} else {
if (!dm_odm->RSSI_test)
odm_Process_RSSIForDM(dm_odm, pPhyInfo, pPktinfo);
}
}
void ODM_PhyStatusQuery(struct odm_dm_struct *dm_odm,
struct odm_phy_status_info *pPhyInfo,
u8 *pPhyStatus, struct odm_per_pkt_info *pPktinfo,
struct adapter *adapt)
{
ODM_PhyStatusQuery_92CSeries(dm_odm, pPhyInfo, pPhyStatus, pPktinfo, adapt);
}
/* For future use. */
void ODM_MacStatusQuery(struct odm_dm_struct *dm_odm, u8 *mac_stat,
u8 macid, bool pkt_match_bssid,
bool pkttoself, bool pkt_beacon)
{
/* 2011/10/19 Driver team will handle in the future. */
}
enum HAL_STATUS ODM_ConfigRFWithHeaderFile(struct odm_dm_struct *dm_odm,
enum rf_radio_path content,
enum rf_radio_path rfpath)
{
if (dm_odm->SupportICType == ODM_RTL8188E) {
if (rfpath == RF_PATH_A)
READ_AND_CONFIG(8188E, _RadioA_1T_);
}
if (rfpath == RF_PATH_A)
READ_AND_CONFIG(8188E, _RadioA_1T_);
return HAL_STATUS_SUCCESS;
}
@ -546,22 +387,20 @@ enum HAL_STATUS ODM_ConfigRFWithHeaderFile(struct odm_dm_struct *dm_odm,
enum HAL_STATUS ODM_ConfigBBWithHeaderFile(struct odm_dm_struct *dm_odm,
enum odm_bb_config_type config_tp)
{
if (dm_odm->SupportICType == ODM_RTL8188E) {
if (config_tp == CONFIG_BB_PHY_REG) {
READ_AND_CONFIG(8188E, _PHY_REG_1T_);
} else if (config_tp == CONFIG_BB_AGC_TAB) {
READ_AND_CONFIG(8188E, _AGC_TAB_1T_);
} else if (config_tp == CONFIG_BB_PHY_REG_PG) {
READ_AND_CONFIG(8188E, _PHY_REG_PG_);
}
if (config_tp == CONFIG_BB_PHY_REG) {
READ_AND_CONFIG(8188E, _PHY_REG_1T_);
} else if (config_tp == CONFIG_BB_AGC_TAB) {
READ_AND_CONFIG(8188E, _AGC_TAB_1T_);
} else if (config_tp == CONFIG_BB_PHY_REG_PG) {
READ_AND_CONFIG(8188E, _PHY_REG_PG_);
}
return HAL_STATUS_SUCCESS;
}
enum HAL_STATUS ODM_ConfigMACWithHeaderFile(struct odm_dm_struct *dm_odm)
{
u8 result = HAL_STATUS_SUCCESS;
if (dm_odm->SupportICType == ODM_RTL8188E)
result = READ_AND_CONFIG(8188E, _MAC_REG_);
result = READ_AND_CONFIG(8188E, _MAC_REG_);
return result;
}

31
drivers/staging/r8188eu/hal/odm_RTL8188E.c
View File

@ -3,26 +3,10 @@
#include "../include/odm_precomp.h"
void ODM_DIG_LowerBound_88E(struct odm_dm_struct *dm_odm)
{
struct rtw_dig *pDM_DigTable = &dm_odm->DM_DigTable;
if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV)
pDM_DigTable->rx_gain_range_min = (u8)pDM_DigTable->AntDiv_RSSI_max;
/* If only one Entry connected */
}
static void odm_RX_HWAntDivInit(struct odm_dm_struct *dm_odm)
{
u32 value32;
if (*dm_odm->mp_mode == 1) {
dm_odm->AntDivType = CGCS_RX_SW_ANTDIV;
ODM_SetBBReg(dm_odm, ODM_REG_IGI_A_11N, BIT(7), 0); /* disable HW AntDiv */
ODM_SetBBReg(dm_odm, ODM_REG_LNA_SWITCH_11N, BIT(31), 1); /* 1:CG, 0:CS */
return;
}
/* MAC Setting */
value32 = ODM_GetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord);
ODM_SetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */
@ -44,13 +28,6 @@ static void odm_TRX_HWAntDivInit(struct odm_dm_struct *dm_odm)
{
u32 value32;
if (*dm_odm->mp_mode == 1) {
dm_odm->AntDivType = CGCS_RX_SW_ANTDIV;
ODM_SetBBReg(dm_odm, ODM_REG_IGI_A_11N, BIT(7), 0); /* disable HW AntDiv */
ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT(5) | BIT(4) | BIT(3), 0); /* Default RX (0/1) */
return;
}
/* MAC Setting */
value32 = ODM_GetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord);
ODM_SetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */
@ -83,9 +60,6 @@ static void odm_FastAntTrainingInit(struct odm_dm_struct *dm_odm)
struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
u32 AntCombination = 2;
if (*dm_odm->mp_mode == 1)
return;
for (i = 0; i < 6; i++) {
dm_fat_tbl->Bssid[i] = 0;
dm_fat_tbl->antSumRSSI[i] = 0;
@ -155,9 +129,6 @@ static void odm_FastAntTrainingInit(struct odm_dm_struct *dm_odm)
void ODM_AntennaDiversityInit_88E(struct odm_dm_struct *dm_odm)
{
if (dm_odm->SupportICType != ODM_RTL8188E)
return;
if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)
odm_RX_HWAntDivInit(dm_odm);
else if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV)
@ -296,7 +267,7 @@ static void odm_HWAntDiv(struct odm_dm_struct *dm_odm)
void ODM_AntennaDiversity_88E(struct odm_dm_struct *dm_odm)
{
struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
if ((dm_odm->SupportICType != ODM_RTL8188E) || (!(dm_odm->SupportAbility & ODM_BB_ANT_DIV)))
if (!(dm_odm->SupportAbility & ODM_BB_ANT_DIV))
return;
if (!dm_odm->bLinked) {
if (dm_fat_tbl->bBecomeLinked) {

8
drivers/staging/r8188eu/hal/odm_RegConfig8188E.c
View File

@ -34,14 +34,6 @@ void odm_ConfigRF_RadioA_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Data
odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, RF_PATH_A, Addr | maskforPhySet);
}
void odm_ConfigRF_RadioB_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Data)
{
u32 content = 0x1001; /* RF_Content: radiob_txt */
u32 maskforPhySet = (u32)(content & 0xE000);
odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, RF_PATH_B, Addr | maskforPhySet);
}
void odm_ConfigMAC_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u8 Data)
{
ODM_Write1Byte(pDM_Odm, Addr, Data);

85
drivers/staging/r8188eu/hal/odm_interface.c
View File

@ -10,12 +10,6 @@ u8 ODM_Read1Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr)
return rtw_read8(Adapter, RegAddr);
}
u16 ODM_Read2Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr)
{
struct adapter *Adapter = pDM_Odm->Adapter;
return rtw_read16(Adapter, RegAddr);
}
u32 ODM_Read4Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr)
{
struct adapter *Adapter = pDM_Odm->Adapter;
@ -77,64 +71,12 @@ u32 ODM_GetRFReg(struct odm_dm_struct *pDM_Odm, enum rf_radio_path eRFPath, u32
}
/* ODM Memory relative API. */
void ODM_AllocateMemory(struct odm_dm_struct *pDM_Odm, void **pPtr, u32 length)
{
*pPtr = vzalloc(length);
}
/* length could be ignored, used to detect memory leakage. */
void ODM_FreeMemory(struct odm_dm_struct *pDM_Odm, void *pPtr, u32 length)
{
vfree(pPtr);
}
s32 ODM_CompareMemory(struct odm_dm_struct *pDM_Odm, void *pBuf1, void *pBuf2, u32 length)
{
return !memcmp(pBuf1, pBuf2, length);
}
/* ODM MISC relative API. */
void ODM_AcquireSpinLock(struct odm_dm_struct *pDM_Odm, enum RT_SPINLOCK_TYPE type)
{
}
void ODM_ReleaseSpinLock(struct odm_dm_struct *pDM_Odm, enum RT_SPINLOCK_TYPE type)
{
}
/* Work item relative API. FOr MP driver only~! */
void ODM_InitializeWorkItem(struct odm_dm_struct *pDM_Odm, void *pRtWorkItem,
RT_WORKITEM_CALL_BACK RtWorkItemCallback,
void *pContext, const char *szID)
{
}
void ODM_StartWorkItem(void *pRtWorkItem)
{
}
void ODM_StopWorkItem(void *pRtWorkItem)
{
}
void ODM_FreeWorkItem(void *pRtWorkItem)
{
}
void ODM_ScheduleWorkItem(void *pRtWorkItem)
{
}
void ODM_IsWorkItemScheduled(void *pRtWorkItem)
{
}
/* ODM Timer relative API. */
void ODM_StallExecution(u32 usDelay)
{
udelay(usDelay);
}
void ODM_delay_ms(u32 ms)
{
mdelay(ms);
@ -149,30 +91,3 @@ void ODM_sleep_ms(u32 ms)
{
msleep(ms);
}
void ODM_sleep_us(u32 us)
{
rtw_usleep_os(us);
}
void ODM_SetTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer, u32 msDelay)
{
_set_timer(pTimer, msDelay); /* ms */
}
void ODM_CancelTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer)
{
_cancel_timer_ex(pTimer);
}
void ODM_ReleaseTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer)
{
}
/* ODM FW relative API. */
u32 ODM_FillH2CCmd(u8 *pH2CBuffer, u32 H2CBufferLen, u32 CmdNum,
u32 *pElementID, u32 *pCmdLen,
u8 **pCmbBuffer, u8 *CmdStartSeq)
{
return true;
}

48
drivers/staging/r8188eu/hal/rtl8188e_cmd.c
View File

@ -53,19 +53,14 @@ static s32 FillH2CCmd_88E(struct adapter *adapt, u8 ElementID, u32 CmdLen, u8 *p
u8 cmd_idx, ext_cmd_len;
u32 h2c_cmd = 0;
u32 h2c_cmd_ex = 0;
s32 ret = _FAIL;
if (!adapt->bFWReady) {
DBG_88E("FillH2CCmd_88E(): return H2C cmd because fw is not ready\n");
return ret;
return _FAIL;
}
if (!pCmdBuffer)
goto exit;
if (CmdLen > RTL88E_MAX_CMD_LEN)
goto exit;
if (adapt->bSurpriseRemoved)
goto exit;
if (!pCmdBuffer || CmdLen > RTL88E_MAX_CMD_LEN || adapt->bSurpriseRemoved)
return _FAIL;
/* pay attention to if race condition happened in H2C cmd setting. */
do {
@ -73,7 +68,7 @@ static s32 FillH2CCmd_88E(struct adapter *adapt, u8 ElementID, u32 CmdLen, u8 *p
if (!_is_fw_read_cmd_down(adapt, h2c_box_num)) {
DBG_88E(" fw read cmd failed...\n");
goto exit;
return _FAIL;
}
*(u8 *)(&h2c_cmd) = ElementID;
@ -102,26 +97,7 @@ static s32 FillH2CCmd_88E(struct adapter *adapt, u8 ElementID, u32 CmdLen, u8 *p
} while ((!bcmd_down) && (retry_cnts--));
ret = _SUCCESS;
exit:
return ret;
}
u8 rtl8188e_set_rssi_cmd(struct adapter *adapt, u8 *param)
{
u8 res = _SUCCESS;
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
if (haldata->fw_ractrl) {
;
} else {
DBG_88E("==>%s fw dont support RA\n", __func__);
res = _FAIL;
}
return res;
return _SUCCESS;
}
u8 rtl8188e_set_raid_cmd(struct adapter *adapt, u32 mask)
@ -241,14 +217,13 @@ static void ConstructBeacon(struct adapter *adapt, u8 *pframe, u32 *pLength)
struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct wlan_bssid_ex *cur_network = &pmlmeinfo->network;
u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
fctrl = &pwlanhdr->frame_ctl;
*(fctrl) = 0;
memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN);
eth_broadcast_addr(pwlanhdr->addr1);
memcpy(pwlanhdr->addr2, myid(&adapt->eeprompriv), ETH_ALEN);
memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN);
@ -561,7 +536,7 @@ static void SetFwRsvdPagePkt(struct adapter *adapt, bool bDLFinished)
pattrib->pktlen = pattrib->last_txcmdsz;
memcpy(pmgntframe->buf_addr, ReservedPagePacket, TotalPacketLen);
rtw_hal_mgnt_xmit(adapt, pmgntframe);
rtl8188eu_mgnt_xmit(adapt, pmgntframe);
DBG_88E("%s: Set RSVD page location to Fw\n", __func__);
FillH2CCmd_88E(adapt, H2C_COM_RSVD_PAGE, sizeof(RsvdPageLoc), (u8 *)&RsvdPageLoc);
@ -608,7 +583,7 @@ void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus)
haldata->RegFwHwTxQCtrl &= (~BIT(6));
/* Clear beacon valid check bit. */
rtw_hal_set_hwreg(adapt, HW_VAR_BCN_VALID, NULL);
SetHwReg8188EU(adapt, HW_VAR_BCN_VALID, NULL);
DLBcnCount = 0;
poll = 0;
do {
@ -619,7 +594,7 @@ void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus)
yield();
/* mdelay(10); */
/* check rsvd page download OK. */
rtw_hal_get_hwreg(adapt, HW_VAR_BCN_VALID, (u8 *)(&bcn_valid));
GetHwReg8188EU(adapt, HW_VAR_BCN_VALID, (u8 *)(&bcn_valid));
poll++;
} while (!bcn_valid && (poll % 10) != 0 && !adapt->bSurpriseRemoved && !adapt->bDriverStopped);
} while (!bcn_valid && DLBcnCount <= 100 && !adapt->bSurpriseRemoved && !adapt->bDriverStopped);
@ -653,7 +628,7 @@ void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus)
/* Update RSVD page location H2C to Fw. */
if (bcn_valid) {
rtw_hal_set_hwreg(adapt, HW_VAR_BCN_VALID, NULL);
SetHwReg8188EU(adapt, HW_VAR_BCN_VALID, NULL);
DBG_88E("Set RSVD page location to Fw.\n");
}
@ -667,7 +642,6 @@ void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus)
void rtl8188e_set_p2p_ps_offload_cmd(struct adapter *adapt, u8 p2p_ps_state)
{
#ifdef CONFIG_88EU_P2P
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
struct wifidirect_info *pwdinfo = &adapt->wdinfo;
struct P2P_PS_Offload_t *p2p_ps_offload = &haldata->p2p_ps_offload;
@ -732,6 +706,4 @@ void rtl8188e_set_p2p_ps_offload_cmd(struct adapter *adapt, u8 p2p_ps_state)
}
FillH2CCmd_88E(adapt, H2C_PS_P2P_OFFLOAD, 1, (u8 *)p2p_ps_offload);
#endif
}

93
drivers/staging/r8188eu/hal/rtl8188e_dm.c
View File

@ -8,10 +8,6 @@
#include "../include/drv_types.h"
#include "../include/rtl8188e_hal.h"
static void dm_CheckStatistics(struct adapter *Adapter)
{
}
/* Initialize GPIO setting registers */
static void dm_InitGPIOSetting(struct adapter *Adapter)
{
@ -31,40 +27,14 @@ static void Init_ODM_ComInfo_88E(struct adapter *Adapter)
struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &hal_data->dmpriv;
struct odm_dm_struct *dm_odm = &hal_data->odmpriv;
u8 cut_ver, fab_ver;
/* Init Value */
memset(dm_odm, 0, sizeof(*dm_odm));
dm_odm->Adapter = Adapter;
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_PLATFORM, ODM_CE);
if (Adapter->interface_type == RTW_GSPI)
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_INTERFACE, ODM_ITRF_SDIO);
else
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_INTERFACE, Adapter->interface_type);/* RTL871X_HCI_TYPE */
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_IC_TYPE, ODM_RTL8188E);
fab_ver = ODM_TSMC;
cut_ver = ODM_CUT_A;
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_FAB_VER, fab_ver);
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_CUT_VER, cut_ver);
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_MP_TEST_CHIP, IS_NORMAL_CHIP(hal_data->VersionID));
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_PATCH_ID, hal_data->CustomerID);
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_BWIFI_TEST, Adapter->registrypriv.wifi_spec);
if (hal_data->rf_type == RF_1T1R)
ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_RF_TYPE, ODM_1T1R);
else if (hal_data->rf_type == RF_2T2R)
ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_RF_TYPE, ODM_2T2R);
else if (hal_data->rf_type == RF_1T2R)
ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_RF_TYPE, ODM_1T2R);
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_RF_ANTENNA_TYPE, hal_data->TRxAntDivType);
pdmpriv->InitODMFlag = ODM_RF_CALIBRATION |
@ -96,11 +66,6 @@ static void Update_ODM_ComInfo_88E(struct adapter *Adapter)
if (hal_data->AntDivCfg)
pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV;
if (Adapter->registrypriv.mp_mode == 1) {
pdmpriv->InitODMFlag = ODM_RF_CALIBRATION |
ODM_RF_TX_PWR_TRACK;
}
ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_ABILITY, pdmpriv->InitODMFlag);
ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_TX_UNI, &Adapter->xmitpriv.tx_bytes);
@ -111,24 +76,20 @@ static void Update_ODM_ComInfo_88E(struct adapter *Adapter)
ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_BW, &hal_data->CurrentChannelBW);
ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_CHNL, &hal_data->CurrentChannel);
ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_NET_CLOSED, &Adapter->net_closed);
ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_MP_MODE, &Adapter->registrypriv.mp_mode);
ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_SCAN, &pmlmepriv->bScanInProcess);
ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_POWER_SAVING, &pwrctrlpriv->bpower_saving);
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_RF_ANTENNA_TYPE, hal_data->TRxAntDivType);
for (i = 0; i < NUM_STA; i++)
ODM_CmnInfoPtrArrayHook(dm_odm, ODM_CMNINFO_STA_STATUS, i, NULL);
dm_odm->pODM_StaInfo[i] = NULL;
}
void rtl8188e_InitHalDm(struct adapter *Adapter)
{
struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &hal_data->dmpriv;
struct odm_dm_struct *dm_odm = &hal_data->odmpriv;
dm_InitGPIOSetting(Adapter);
pdmpriv->DM_Type = DM_Type_ByDriver;
pdmpriv->DMFlag = DYNAMIC_FUNC_DISABLE;
Update_ODM_ComInfo_88E(Adapter);
ODM_DMInit(dm_odm);
Adapter->fix_rate = 0xFF;
@ -136,49 +97,25 @@ void rtl8188e_InitHalDm(struct adapter *Adapter)
void rtl8188e_HalDmWatchDog(struct adapter *Adapter)
{
bool fw_cur_in_ps = false;
bool fw_ps_awake = true;
u8 hw_init_completed = false;
u8 hw_init_completed = Adapter->hw_init_completed;
struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter);
hw_init_completed = Adapter->hw_init_completed;
struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
u8 bLinked = false;
if (!hw_init_completed)
return;
fw_cur_in_ps = Adapter->pwrctrlpriv.bFwCurrentInPSMode;
rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&fw_ps_awake));
/* Fw is under p2p powersaving mode, driver should stop dynamic mechanism. */
/* modifed by thomas. 2011.06.11. */
if (Adapter->wdinfo.p2p_ps_mode)
fw_ps_awake = false;
if (hw_init_completed && ((!fw_cur_in_ps) && fw_ps_awake)) {
/* Calculate Tx/Rx statistics. */
dm_CheckStatistics(Adapter);
if ((check_fwstate(pmlmepriv, WIFI_AP_STATE)) ||
(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE))) {
if (Adapter->stapriv.asoc_sta_count > 2)
bLinked = true;
} else {/* Station mode */
if (check_fwstate(pmlmepriv, _FW_LINKED))
bLinked = true;
}
/* ODM */
if (hw_init_completed) {
struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
u8 bLinked = false;
if ((check_fwstate(pmlmepriv, WIFI_AP_STATE)) ||
(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE))) {
if (Adapter->stapriv.asoc_sta_count > 2)
bLinked = true;
} else {/* Station mode */
if (check_fwstate(pmlmepriv, _FW_LINKED))
bLinked = true;
}
ODM_CmnInfoUpdate(&hal_data->odmpriv, ODM_CMNINFO_LINK, bLinked);
ODM_DMWatchdog(&hal_data->odmpriv);
}
ODM_CmnInfoUpdate(&hal_data->odmpriv, ODM_CMNINFO_LINK, bLinked);
ODM_DMWatchdog(&hal_data->odmpriv);
}
void rtl8188e_init_dm_priv(struct adapter *Adapter)
@ -190,10 +127,6 @@ void rtl8188e_init_dm_priv(struct adapter *Adapter)
Init_ODM_ComInfo_88E(Adapter);
}
void rtl8188e_deinit_dm_priv(struct adapter *Adapter)
{
}
/* Add new function to reset the state of antenna diversity before link. */
/* Compare RSSI for deciding antenna */
void AntDivCompare8188E(struct adapter *Adapter, struct wlan_bssid_ex *dst, struct wlan_bssid_ex *src)

310
drivers/staging/r8188eu/hal/rtl8188e_hal_init.c
View File

@ -306,7 +306,7 @@ static s32 iol_ioconfig(struct adapter *padapter, u8 iocfg_bndy)
return rst;
}
static int rtl8188e_IOL_exec_cmds_sync(struct adapter *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt)
int rtl8188e_IOL_exec_cmds_sync(struct adapter *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt)
{
struct pkt_attrib *pattrib = &xmit_frame->attrib;
u8 i;
@ -336,38 +336,6 @@ exit:
return ret;
}
void rtw_IOL_cmd_tx_pkt_buf_dump(struct adapter *Adapter, int data_len)
{
u32 fifo_data, reg_140;
u32 addr, rstatus, loop = 0;
u16 data_cnts = (data_len / 8) + 1;
u8 *pbuf = vzalloc(data_len + 10);
DBG_88E("###### %s ######\n", __func__);
rtw_write8(Adapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT);
if (pbuf) {
for (addr = 0; addr < data_cnts; addr++) {
rtw_write32(Adapter, 0x140, addr);
rtw_usleep_os(2);
loop = 0;
do {
rstatus = (reg_140 = rtw_read32(Adapter, REG_PKTBUF_DBG_CTRL) & BIT(24));
if (rstatus) {
fifo_data = rtw_read32(Adapter, REG_PKTBUF_DBG_DATA_L);
memcpy(pbuf + (addr * 8), &fifo_data, 4);
fifo_data = rtw_read32(Adapter, REG_PKTBUF_DBG_DATA_H);
memcpy(pbuf + (addr * 8 + 4), &fifo_data, 4);
}
rtw_usleep_os(2);
} while (!rstatus && (loop++ < 10));
}
rtw_IOL_cmd_buf_dump(Adapter, data_len, pbuf);
vfree(pbuf);
}
DBG_88E("###### %s ######\n", __func__);
}
static void _FWDownloadEnable(struct adapter *padapter, bool enable)
{
u8 tmp;
@ -669,12 +637,10 @@ void rtl8188e_InitializeFirmwareVars(struct adapter *padapter)
pHalData->LastHMEBoxNum = 0;
}
static void rtl8188e_free_hal_data(struct adapter *padapter)
void rtl8188e_free_hal_data(struct adapter *padapter)
{
kfree(padapter->HalData);
padapter->HalData = NULL;
}
/* */
@ -707,11 +673,7 @@ hal_EfusePgPacketWriteData(
struct pgpkt *pTargetPkt,
bool bPseudoTest);
static void
hal_EfusePowerSwitch_RTL8188E(
struct adapter *pAdapter,
u8 bWrite,
u8 PwrState)
void rtl8188e_EfusePowerSwitch(struct adapter *pAdapter, u8 bWrite, u8 PwrState)
{
u8 tempval;
u16 tmpV16;
@ -757,15 +719,6 @@ hal_EfusePowerSwitch_RTL8188E(
}
}
static void
rtl8188e_EfusePowerSwitch(
struct adapter *pAdapter,
u8 bWrite,
u8 PwrState)
{
hal_EfusePowerSwitch_RTL8188E(pAdapter, bWrite, PwrState);
}
static void Hal_EfuseReadEFuse88E(struct adapter *Adapter,
u16 _offset,
u16 _size_byte,
@ -892,7 +845,7 @@ static void Hal_EfuseReadEFuse88E(struct adapter *Adapter,
pbuf[i] = efuseTbl[_offset + i];
/* 5. Calculate Efuse utilization. */
rtw_hal_set_hwreg(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&eFuse_Addr);
SetHwReg8188EU(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&eFuse_Addr);
exit:
kfree(efuseTbl);
@ -904,7 +857,7 @@ static void ReadEFuseByIC(struct adapter *Adapter, u8 efuseType, u16 _offset, u1
if (!bPseudoTest) {
int ret = _FAIL;
if (rtw_IOL_applied(Adapter)) {
rtw_hal_power_on(Adapter);
rtl8188eu_InitPowerOn(Adapter);
iol_mode_enable(Adapter, 1);
ret = iol_read_efuse(Adapter, 0, _offset, _size_byte, pbuf);
@ -925,9 +878,9 @@ static void ReadEFuse_Pseudo(struct adapter *Adapter, u8 efuseType, u16 _offset,
Hal_EfuseReadEFuse88E(Adapter, _offset, _size_byte, pbuf, bPseudoTest);
}
static void rtl8188e_ReadEFuse(struct adapter *Adapter, u8 efuseType,
u16 _offset, u16 _size_byte, u8 *pbuf,
bool bPseudoTest)
void rtl8188e_ReadEFuse(struct adapter *Adapter, u8 efuseType,
u16 _offset, u16 _size_byte, u8 *pbuf,
bool bPseudoTest)
{
if (bPseudoTest)
ReadEFuse_Pseudo(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest);
@ -1060,7 +1013,7 @@ static void Hal_EFUSEGetEfuseDefinition_Pseudo88E(struct adapter *pAdapter, u8 e
}
}
static void rtl8188e_EFUSE_GetEfuseDefinition(struct adapter *pAdapter, u8 efuseType, u8 type, void *pOut, bool bPseudoTest)
void rtl8188e_EFUSE_GetEfuseDefinition(struct adapter *pAdapter, u8 efuseType, u8 type, void *pOut, bool bPseudoTest)
{
if (bPseudoTest)
Hal_EFUSEGetEfuseDefinition_Pseudo88E(pAdapter, efuseType, type, pOut);
@ -1143,31 +1096,28 @@ static u16 hal_EfuseGetCurrentSize_8188e(struct adapter *pAdapter, bool bPseudoT
{
int bContinual = true;
u16 efuse_addr = 0;
u8 hoffset = 0, hworden = 0;
u8 hworden = 0;
u8 efuse_data, word_cnts = 0;
if (bPseudoTest)
efuse_addr = (u16)(fakeEfuseUsedBytes);
else
rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr);
GetHwReg8188EU(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr);
while (bContinual &&
efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data, bPseudoTest) &&
AVAILABLE_EFUSE_ADDR(efuse_addr)) {
if (efuse_data != 0xFF) {
if ((efuse_data & 0x1F) == 0x0F) { /* extended header */
hoffset = efuse_data;
efuse_addr++;
efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data, bPseudoTest);
if ((efuse_data & 0x0F) == 0x0F) {
efuse_addr++;
continue;
} else {
hoffset = ((hoffset & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1);
hworden = efuse_data & 0x0F;
}
} else {
hoffset = (efuse_data >> 4) & 0x0F;
hworden = efuse_data & 0x0F;
}
word_cnts = Efuse_CalculateWordCnts(hworden);
@ -1181,7 +1131,7 @@ static u16 hal_EfuseGetCurrentSize_8188e(struct adapter *pAdapter, bool bPseudoT
if (bPseudoTest)
fakeEfuseUsedBytes = efuse_addr;
else
rtw_hal_set_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr);
SetHwReg8188EU(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr);
return efuse_addr;
}
@ -1194,7 +1144,7 @@ static u16 Hal_EfuseGetCurrentSize_Pseudo(struct adapter *pAdapter, bool bPseudo
return ret;
}
static u16 rtl8188e_EfuseGetCurrentSize(struct adapter *pAdapter, u8 efuseType, bool bPseudoTest)
u16 rtl8188e_EfuseGetCurrentSize(struct adapter *pAdapter, u8 efuseType, bool bPseudoTest)
{
u16 ret = 0;
@ -1218,7 +1168,7 @@ static int hal_EfusePgPacketRead_8188e(struct adapter *pAdapter, u8 offset, u8 *
u8 max_section = 0;
u8 tmp_header = 0;
EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAX_SECTION, (void *)&max_section, bPseudoTest);
rtl8188e_EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAX_SECTION, (void *)&max_section, bPseudoTest);
if (!data)
return false;
@ -1307,7 +1257,7 @@ static int Hal_EfusePgPacketRead_Pseudo(struct adapter *pAdapter, u8 offset, u8
return ret;
}
static int rtl8188e_Efuse_PgPacketRead(struct adapter *pAdapter, u8 offset, u8 *data, bool bPseudoTest)
int rtl8188e_Efuse_PgPacketRead(struct adapter *pAdapter, u8 offset, u8 *data, bool bPseudoTest)
{
int ret;
@ -1326,17 +1276,17 @@ static bool hal_EfuseFixHeaderProcess(struct adapter *pAdapter, u8 efuseType, st
memset((void *)originaldata, 0xff, 8);
if (Efuse_PgPacketRead(pAdapter, pFixPkt->offset, originaldata, bPseudoTest)) {
if (rtl8188e_Efuse_PgPacketRead(pAdapter, pFixPkt->offset, originaldata, bPseudoTest)) {
/* check if data exist */
badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr + 1, pFixPkt->word_en, originaldata, bPseudoTest);
badworden = rtl8188e_Efuse_WordEnableDataWrite(pAdapter, efuse_addr + 1, pFixPkt->word_en, originaldata, bPseudoTest);
if (badworden != 0xf) { /* write fail */
PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pFixPkt->offset, badworden, originaldata, bPseudoTest);
PgWriteSuccess = rtl8188e_Efuse_PgPacketWrite(pAdapter, pFixPkt->offset, badworden, originaldata, bPseudoTest);
if (!PgWriteSuccess)
return false;
else
efuse_addr = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest);
efuse_addr = rtl8188e_EfuseGetCurrentSize(pAdapter, efuseType, bPseudoTest);
} else {
efuse_addr = efuse_addr + (pFixPkt->word_cnts * 2) + 1;
}
@ -1354,7 +1304,7 @@ static bool hal_EfusePgPacketWrite2ByteHeader(struct adapter *pAdapter, u8 efuse
u8 pg_header = 0, tmp_header = 0, pg_header_temp = 0;
u8 repeatcnt = 0;
EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (void *)&efuse_max_available_len, bPseudoTest);
rtl8188e_EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (void *)&efuse_max_available_len, bPseudoTest);
while (efuse_addr < efuse_max_available_len) {
pg_header = ((pTargetPkt->offset & 0x07) << 5) | 0x0F;
@ -1451,17 +1401,16 @@ static bool hal_EfusePgPacketWrite1ByteHeader(struct adapter *pAdapter, u8 efuse
static bool hal_EfusePgPacketWriteData(struct adapter *pAdapter, u8 efuseType, u16 *pAddr, struct pgpkt *pTargetPkt, bool bPseudoTest)
{
u16 efuse_addr = *pAddr;
u8 badworden = 0;
u8 badworden;
u32 PgWriteSuccess = 0;
badworden = 0x0f;
badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr + 1, pTargetPkt->word_en, pTargetPkt->data, bPseudoTest);
badworden = rtl8188e_Efuse_WordEnableDataWrite(pAdapter, efuse_addr + 1, pTargetPkt->word_en, pTargetPkt->data, bPseudoTest);
if (badworden == 0x0F) {
/* write ok */
return true;
} else {
/* reorganize other pg packet */
PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest);
PgWriteSuccess = rtl8188e_Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest);
if (!PgWriteSuccess)
return false;
else
@ -1534,14 +1483,14 @@ static bool hal_EfusePartialWriteCheck(struct adapter *pAdapter, u8 efuseType, u
u16 startAddr = 0, efuse_max_available_len = 0, efuse_max = 0;
struct pgpkt curPkt;
EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (void *)&efuse_max_available_len, bPseudoTest);
EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_REAL_CONTENT_LEN, (void *)&efuse_max, bPseudoTest);
rtl8188e_EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (void *)&efuse_max_available_len, bPseudoTest);
rtl8188e_EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_REAL_CONTENT_LEN, (void *)&efuse_max, bPseudoTest);
if (efuseType == EFUSE_WIFI) {
if (bPseudoTest) {
startAddr = (u16)(fakeEfuseUsedBytes % EFUSE_REAL_CONTENT_LEN);
} else {
rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&startAddr);
GetHwReg8188EU(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&startAddr);
startAddr %= EFUSE_REAL_CONTENT_LEN;
}
} else {
@ -1582,12 +1531,12 @@ static bool hal_EfusePartialWriteCheck(struct adapter *pAdapter, u8 efuseType, u
(!hal_EfuseCheckIfDatafollowed(pAdapter, curPkt.word_cnts, startAddr + 1, bPseudoTest)) &&
wordEnMatched(pTargetPkt, &curPkt, &matched_wden)) {
/* Here to write partial data */
badworden = Efuse_WordEnableDataWrite(pAdapter, startAddr + 1, matched_wden, pTargetPkt->data, bPseudoTest);
badworden = rtl8188e_Efuse_WordEnableDataWrite(pAdapter, startAddr + 1, matched_wden, pTargetPkt->data, bPseudoTest);
if (badworden != 0x0F) {
u32 PgWriteSuccess = 0;
/* if write fail on some words, write these bad words again */
PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest);
PgWriteSuccess = rtl8188e_Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest);
if (!PgWriteSuccess) {
bRet = false; /* write fail, return */
@ -1623,9 +1572,9 @@ hal_EfusePgCheckAvailableAddr(
u16 efuse_max_available_len = 0;
/* Change to check TYPE_EFUSE_MAP_LEN , because 8188E raw 256, logic map over 256. */
EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&efuse_max_available_len, false);
rtl8188e_EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&efuse_max_available_len, false);
if (Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest) >= efuse_max_available_len)
if (rtl8188e_EfuseGetCurrentSize(pAdapter, efuseType, bPseudoTest) >= efuse_max_available_len)
return false;
return true;
}
@ -1678,7 +1627,7 @@ static int Hal_EfusePgPacketWrite(struct adapter *pAdapter, u8 offset, u8 word_e
return ret;
}
static int rtl8188e_Efuse_PgPacketWrite(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *data, bool bPseudoTest)
int rtl8188e_Efuse_PgPacketWrite(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *data, bool bPseudoTest)
{
int ret;
@ -1689,7 +1638,7 @@ static int rtl8188e_Efuse_PgPacketWrite(struct adapter *pAdapter, u8 offset, u8
return ret;
}
static struct HAL_VERSION ReadChipVersion8188E(struct adapter *padapter)
void rtl8188e_read_chip_version(struct adapter *padapter)
{
u32 value32;
struct HAL_VERSION ChipVersion;
@ -1698,49 +1647,23 @@ static struct HAL_VERSION ReadChipVersion8188E(struct adapter *padapter)
pHalData = GET_HAL_DATA(padapter);
value32 = rtw_read32(padapter, REG_SYS_CFG);
ChipVersion.ICType = CHIP_8188E;
ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP);
ChipVersion.RFType = RF_TYPE_1T1R;
ChipVersion.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC);
ChipVersion.CUTVersion = (value32 & CHIP_VER_RTL_MASK) >> CHIP_VER_RTL_SHIFT; /* IC version (CUT) */
/* For regulator mode. by tynli. 2011.01.14 */
pHalData->RegulatorMode = ((value32 & TRP_BT_EN) ? RT_LDO_REGULATOR : RT_SWITCHING_REGULATOR);
ChipVersion.ROMVer = 0; /* ROM code version. */
pHalData->MultiFunc = RT_MULTI_FUNC_NONE;
dump_chip_info(ChipVersion);
pHalData->VersionID = ChipVersion;
if (IS_1T2R(ChipVersion)) {
pHalData->rf_type = RF_1T2R;
pHalData->NumTotalRFPath = 2;
} else if (IS_2T2R(ChipVersion)) {
pHalData->rf_type = RF_2T2R;
pHalData->NumTotalRFPath = 2;
} else {
pHalData->rf_type = RF_1T1R;
pHalData->NumTotalRFPath = 1;
}
pHalData->rf_type = RF_1T1R;
MSG_88E("RF_Type is %x!!\n", pHalData->rf_type);
return ChipVersion;
}
static void rtl8188e_read_chip_version(struct adapter *padapter)
{
ReadChipVersion8188E(padapter);
}
static void rtl8188e_GetHalODMVar(struct adapter *Adapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet)
{
}
static void rtl8188e_SetHalODMVar(struct adapter *Adapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet)
void rtl8188e_SetHalODMVar(struct adapter *Adapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
struct odm_dm_struct *podmpriv = &pHalData->odmpriv;
@ -1748,13 +1671,14 @@ static void rtl8188e_SetHalODMVar(struct adapter *Adapter, enum hal_odm_variable
case HAL_ODM_STA_INFO:
{
struct sta_info *psta = (struct sta_info *)pValue1;
if (bSet) {
DBG_88E("### Set STA_(%d) info\n", psta->mac_id);
ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, psta);
podmpriv->pODM_StaInfo[psta->mac_id] = psta;
ODM_RAInfo_Init(podmpriv, psta->mac_id);
} else {
DBG_88E("### Clean STA_(%d) info\n", psta->mac_id);
ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, NULL);
podmpriv->pODM_StaInfo[psta->mac_id] = NULL;
}
}
break;
@ -1769,20 +1693,7 @@ static void rtl8188e_SetHalODMVar(struct adapter *Adapter, enum hal_odm_variable
}
}
void rtl8188e_clone_haldata(struct adapter *dst_adapter, struct adapter *src_adapter)
{
memcpy(dst_adapter->HalData, src_adapter->HalData, dst_adapter->hal_data_sz);
}
void rtl8188e_start_thread(struct adapter *padapter)
{
}
void rtl8188e_stop_thread(struct adapter *padapter)
{
}
static void hal_notch_filter_8188e(struct adapter *adapter, bool enable)
void hal_notch_filter_8188e(struct adapter *adapter, bool enable)
{
if (enable) {
DBG_88E("Enable notch filter\n");
@ -1792,54 +1703,6 @@ static void hal_notch_filter_8188e(struct adapter *adapter, bool enable)
rtw_write8(adapter, rOFDM0_RxDSP + 1, rtw_read8(adapter, rOFDM0_RxDSP + 1) & ~BIT(1));
}
}
void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc)
{
pHalFunc->free_hal_data = &rtl8188e_free_hal_data;
pHalFunc->dm_init = &rtl8188e_init_dm_priv;
pHalFunc->dm_deinit = &rtl8188e_deinit_dm_priv;
pHalFunc->read_chip_version = &rtl8188e_read_chip_version;
pHalFunc->set_bwmode_handler = &PHY_SetBWMode8188E;
pHalFunc->set_channel_handler = &PHY_SwChnl8188E;
pHalFunc->hal_dm_watchdog = &rtl8188e_HalDmWatchDog;
pHalFunc->Add_RateATid = &rtl8188e_Add_RateATid;
pHalFunc->run_thread = &rtl8188e_start_thread;
pHalFunc->cancel_thread = &rtl8188e_stop_thread;
pHalFunc->AntDivBeforeLinkHandler = &AntDivBeforeLink8188E;
pHalFunc->AntDivCompareHandler = &AntDivCompare8188E;
pHalFunc->read_bbreg = &rtl8188e_PHY_QueryBBReg;
pHalFunc->write_bbreg = &rtl8188e_PHY_SetBBReg;
pHalFunc->read_rfreg = &rtl8188e_PHY_QueryRFReg;
pHalFunc->write_rfreg = &rtl8188e_PHY_SetRFReg;
/* Efuse related function */
pHalFunc->EfusePowerSwitch = &rtl8188e_EfusePowerSwitch;
pHalFunc->ReadEFuse = &rtl8188e_ReadEFuse;
pHalFunc->EFUSEGetEfuseDefinition = &rtl8188e_EFUSE_GetEfuseDefinition;
pHalFunc->EfuseGetCurrentSize = &rtl8188e_EfuseGetCurrentSize;
pHalFunc->Efuse_PgPacketRead = &rtl8188e_Efuse_PgPacketRead;
pHalFunc->Efuse_PgPacketWrite = &rtl8188e_Efuse_PgPacketWrite;
pHalFunc->Efuse_WordEnableDataWrite = &rtl8188e_Efuse_WordEnableDataWrite;
pHalFunc->sreset_init_value = &sreset_init_value;
pHalFunc->sreset_reset_value = &sreset_reset_value;
pHalFunc->silentreset = &rtl8188e_silentreset_for_specific_platform;
pHalFunc->sreset_xmit_status_check = &rtl8188e_sreset_xmit_status_check;
pHalFunc->sreset_linked_status_check = &rtl8188e_sreset_linked_status_check;
pHalFunc->sreset_get_wifi_status = &sreset_get_wifi_status;
pHalFunc->GetHalODMVarHandler = &rtl8188e_GetHalODMVar;
pHalFunc->SetHalODMVarHandler = &rtl8188e_SetHalODMVar;
pHalFunc->IOL_exec_cmds_sync = &rtl8188e_IOL_exec_cmds_sync;
pHalFunc->hal_notch_filter = &hal_notch_filter_8188e;
}
u8 GetEEPROMSize8188E(struct adapter *padapter)
{
@ -1926,7 +1789,7 @@ s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy)
void
Hal_InitPGData88E(struct adapter *padapter)
{
struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
struct eeprom_priv *pEEPROM = &padapter->eeprompriv;
if (!pEEPROM->bautoload_fail_flag) { /* autoload OK. */
if (!is_boot_from_eeprom(padapter)) {
@ -1946,7 +1809,7 @@ Hal_EfuseParseIDCode88E(
u8 *hwinfo
)
{
struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
struct eeprom_priv *pEEPROM = &padapter->eeprompriv;
u16 EEPROMId;
/* Check 0x8129 again for making sure autoload status!! */
@ -2093,8 +1956,8 @@ void Hal_ReadPowerSavingMode88E(struct adapter *padapter, u8 *hwinfo, bool AutoL
/* if hw supported, 8051 (SIE) will generate WeakUP signal(D+/D- toggle) when autoresume */
padapter->pwrctrlpriv.bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0] & BIT(1)) ? true : false;
DBG_88E("%s...bHWPwrPindetect(%x)-bHWPowerdown(%x) , bSupportRemoteWakeup(%x)\n", __func__,
padapter->pwrctrlpriv.bHWPwrPindetect, padapter->pwrctrlpriv.bHWPowerdown, padapter->pwrctrlpriv.bSupportRemoteWakeup);
DBG_88E("%s...bHWPowerdown(%x) , bSupportRemoteWakeup(%x)\n", __func__,
padapter->pwrctrlpriv.bHWPowerdown, padapter->pwrctrlpriv.bSupportRemoteWakeup);
DBG_88E("### PS params => power_mgnt(%x), usbss_enable(%x) ###\n", padapter->registrypriv.power_mgnt, padapter->registrypriv.usbss_enable);
}
@ -2104,7 +1967,8 @@ void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *PROMContent, bool Auto
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
struct txpowerinfo24g pwrInfo24G;
u8 rfPath, ch, group;
u8 rfPath = 0;
u8 ch, group;
u8 TxCount;
Hal_ReadPowerValueFromPROM_8188E(&pwrInfo24G, PROMContent, AutoLoadFail);
@ -2112,31 +1976,29 @@ void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *PROMContent, bool Auto
if (!AutoLoadFail)
pHalData->bTXPowerDataReadFromEEPORM = true;
for (rfPath = 0; rfPath < pHalData->NumTotalRFPath; rfPath++) {
for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) {
hal_get_chnl_group_88e(ch, &group);
for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) {
hal_get_chnl_group_88e(ch, &group);
pHalData->Index24G_CCK_Base[rfPath][ch] = pwrInfo24G.IndexCCK_Base[rfPath][group];
if (ch == 14)
pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][4];
else
pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][group];
pHalData->Index24G_CCK_Base[rfPath][ch] = pwrInfo24G.IndexCCK_Base[rfPath][group];
if (ch == 14)
pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][4];
else
pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][group];
DBG_88E("======= Path %d, Channel %d =======\n", rfPath, ch);
DBG_88E("Index24G_CCK_Base[%d][%d] = 0x%x\n", rfPath, ch, pHalData->Index24G_CCK_Base[rfPath][ch]);
DBG_88E("Index24G_BW40_Base[%d][%d] = 0x%x\n", rfPath, ch, pHalData->Index24G_BW40_Base[rfPath][ch]);
}
for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
pHalData->CCK_24G_Diff[rfPath][TxCount] = pwrInfo24G.CCK_Diff[rfPath][TxCount];
pHalData->OFDM_24G_Diff[rfPath][TxCount] = pwrInfo24G.OFDM_Diff[rfPath][TxCount];
pHalData->BW20_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW20_Diff[rfPath][TxCount];
pHalData->BW40_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW40_Diff[rfPath][TxCount];
DBG_88E("======= TxCount %d =======\n", TxCount);
DBG_88E("CCK_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->CCK_24G_Diff[rfPath][TxCount]);
DBG_88E("OFDM_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->OFDM_24G_Diff[rfPath][TxCount]);
DBG_88E("BW20_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->BW20_24G_Diff[rfPath][TxCount]);
DBG_88E("BW40_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->BW40_24G_Diff[rfPath][TxCount]);
}
DBG_88E("======= Path %d, Channel %d =======\n", rfPath, ch);
DBG_88E("Index24G_CCK_Base[%d][%d] = 0x%x\n", rfPath, ch, pHalData->Index24G_CCK_Base[rfPath][ch]);
DBG_88E("Index24G_BW40_Base[%d][%d] = 0x%x\n", rfPath, ch, pHalData->Index24G_BW40_Base[rfPath][ch]);
}
for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
pHalData->CCK_24G_Diff[rfPath][TxCount] = pwrInfo24G.CCK_Diff[rfPath][TxCount];
pHalData->OFDM_24G_Diff[rfPath][TxCount] = pwrInfo24G.OFDM_Diff[rfPath][TxCount];
pHalData->BW20_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW20_Diff[rfPath][TxCount];
pHalData->BW40_24G_Diff[rfPath][TxCount] = pwrInfo24G.BW40_Diff[rfPath][TxCount];
DBG_88E("======= TxCount %d =======\n", TxCount);
DBG_88E("CCK_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->CCK_24G_Diff[rfPath][TxCount]);
DBG_88E("OFDM_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->OFDM_24G_Diff[rfPath][TxCount]);
DBG_88E("BW20_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->BW20_24G_Diff[rfPath][TxCount]);
DBG_88E("BW40_24G_Diff[%d][%d] = %d\n", rfPath, TxCount, pHalData->BW40_24G_Diff[rfPath][TxCount]);
}
/* 2010/10/19 MH Add Regulator recognize for CU. */
@ -2240,7 +2102,6 @@ void Hal_ReadAntennaDiversity88E(struct adapter *pAdapter, u8 *PROMContent, bool
pHalData->AntDivCfg = 1; /* 0xC1[3] is ignored. */
} else {
pHalData->AntDivCfg = 0;
pHalData->TRxAntDivType = pHalData->TRxAntDivType; /* The value in the driver setting of device manager. */
}
DBG_88E("EEPROM : AntDivCfg = %x, TRxAntDivType = %x\n", pHalData->AntDivCfg, pHalData->TRxAntDivType);
}
@ -2261,44 +2122,3 @@ void Hal_ReadThermalMeter_88E(struct adapter *Adapter, u8 *PROMContent, bool Aut
}
DBG_88E("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter);
}
void Hal_InitChannelPlan(struct adapter *padapter)
{
}
bool HalDetectPwrDownMode88E(struct adapter *Adapter)
{
u8 tmpvalue = 0;
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
struct pwrctrl_priv *pwrctrlpriv = &Adapter->pwrctrlpriv;
EFUSE_ShadowRead(Adapter, 1, EEPROM_RF_FEATURE_OPTION_88E, (u32 *)&tmpvalue);
/* 2010/08/25 MH INF priority > PDN Efuse value. */
if (tmpvalue & BIT(4) && pwrctrlpriv->reg_pdnmode)
pHalData->pwrdown = true;
else
pHalData->pwrdown = false;
DBG_88E("HalDetectPwrDownMode(): PDN =%d\n", pHalData->pwrdown);
return pHalData->pwrdown;
} /* HalDetectPwrDownMode */
/* This function is used only for 92C to set REG_BCN_CTRL(0x550) register. */
/* We just reserve the value of the register in variable pHalData->RegBcnCtrlVal and then operate */
/* the value of the register via atomic operation. */
/* This prevents from race condition when setting this register. */
/* The value of pHalData->RegBcnCtrlVal is initialized in HwConfigureRTL8192CE() function. */
void SetBcnCtrlReg(struct adapter *padapter, u8 SetBits, u8 ClearBits)
{
struct hal_data_8188e *pHalData;
pHalData = GET_HAL_DATA(padapter);
pHalData->RegBcnCtrlVal |= SetBits;
pHalData->RegBcnCtrlVal &= ~ClearBits;
rtw_write8(padapter, REG_BCN_CTRL, (u8)pHalData->RegBcnCtrlVal);
}

798
drivers/staging/r8188eu/hal/rtl8188e_mp.c
View File

@ -1,798 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#define _RTL8188E_MP_C_
#include "../include/drv_types.h"
#include "../include/rtw_mp.h"
#include "../include/rtl8188e_hal.h"
#include "../include/rtl8188e_dm.h"
s32 Hal_SetPowerTracking(struct adapter *padapter, u8 enable)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
struct odm_dm_struct *pDM_Odm = &pHalData->odmpriv;
if (!netif_running(padapter->pnetdev))
return _FAIL;
if (!check_fwstate(&padapter->mlmepriv, WIFI_MP_STATE))
return _FAIL;
if (enable)
pDM_Odm->RFCalibrateInfo.bTXPowerTracking = true;
else
pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = false;
return _SUCCESS;
}
void Hal_GetPowerTracking(struct adapter *padapter, u8 *enable)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
struct odm_dm_struct *pDM_Odm = &pHalData->odmpriv;
*enable = pDM_Odm->RFCalibrateInfo.TxPowerTrackControl;
}
/*-----------------------------------------------------------------------------
* Function: mpt_SwitchRfSetting
*
* Overview: Change RF Setting when we siwthc channel/rate/BW for MP.
*
* Input: struct adapter * pAdapter
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 01/08/2009 MHC Suggestion from SD3 Willis for 92S series.
* 01/09/2009 MHC Add CCK modification for 40MHZ. Suggestion from SD3.
*
*---------------------------------------------------------------------------*/
void Hal_mpt_SwitchRfSetting(struct adapter *pAdapter)
{
struct mp_priv *pmp = &pAdapter->mppriv;
/* <20120525, Kordan> Dynamic mechanism for APK, asked by Dennis. */
pmp->MptCtx.backup0x52_RF_A = (u8)PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0);
pmp->MptCtx.backup0x52_RF_B = (u8)PHY_QueryRFReg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0);
PHY_SetRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0, 0xD);
PHY_SetRFReg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0, 0xD);
}
/*---------------------------hal\rtl8192c\MPT_Phy.c---------------------------*/
/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/
void Hal_MPT_CCKTxPowerAdjust(struct adapter *Adapter, bool bInCH14)
{
u32 TempVal = 0, TempVal2 = 0, TempVal3 = 0;
u32 CurrCCKSwingVal = 0, CCKSwingIndex = 12;
u8 i;
/* get current cck swing value and check 0xa22 & 0xa23 later to match the table. */
CurrCCKSwingVal = read_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord);
if (!bInCH14) {
/* Readback the current bb cck swing value and compare with the table to */
/* get the current swing index */
for (i = 0; i < CCK_TABLE_SIZE; i++) {
if (((CurrCCKSwingVal & 0xff) == (u32)CCKSwingTable_Ch1_Ch13[i][0]) &&
(((CurrCCKSwingVal & 0xff00) >> 8) == (u32)CCKSwingTable_Ch1_Ch13[i][1])) {
CCKSwingIndex = i;
break;
}
}
/* Write 0xa22 0xa23 */
TempVal = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][0] +
(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][1] << 8);
/* Write 0xa24 ~ 0xa27 */
TempVal2 = 0;
TempVal2 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][2] +
(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][3] << 8) +
(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][4] << 16) +
(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][5] << 24);
/* Write 0xa28 0xa29 */
TempVal3 = 0;
TempVal3 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][6] +
(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][7] << 8);
} else {
for (i = 0; i < CCK_TABLE_SIZE; i++) {
if (((CurrCCKSwingVal & 0xff) == (u32)CCKSwingTable_Ch14[i][0]) &&
(((CurrCCKSwingVal & 0xff00) >> 8) == (u32)CCKSwingTable_Ch14[i][1])) {
CCKSwingIndex = i;
break;
}
}
/* Write 0xa22 0xa23 */
TempVal = CCKSwingTable_Ch14[CCKSwingIndex][0] +
(CCKSwingTable_Ch14[CCKSwingIndex][1] << 8);
/* Write 0xa24 ~ 0xa27 */
TempVal2 = 0;
TempVal2 = CCKSwingTable_Ch14[CCKSwingIndex][2] +
(CCKSwingTable_Ch14[CCKSwingIndex][3] << 8) +
(CCKSwingTable_Ch14[CCKSwingIndex][4] << 16) +
(CCKSwingTable_Ch14[CCKSwingIndex][5] << 24);
/* Write 0xa28 0xa29 */
TempVal3 = 0;
TempVal3 = CCKSwingTable_Ch14[CCKSwingIndex][6] +
(CCKSwingTable_Ch14[CCKSwingIndex][7] << 8);
}
write_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord, TempVal);
write_bbreg(Adapter, rCCK0_TxFilter2, bMaskDWord, TempVal2);
write_bbreg(Adapter, rCCK0_DebugPort, bMaskLWord, TempVal3);
}
void Hal_MPT_CCKTxPowerAdjustbyIndex(struct adapter *pAdapter, bool beven)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
struct mpt_context *pMptCtx = &pAdapter->mppriv.MptCtx;
struct odm_dm_struct *pDM_Odm = &pHalData->odmpriv;
s32 TempCCk;
u8 CCK_index, CCK_index_old = 0;
u8 Action = 0; /* 0: no action, 1: even->odd, 2:odd->even */
s32 i = 0;
if (!IS_92C_SERIAL(pHalData->VersionID))
return;
if (beven && !pMptCtx->bMptIndexEven) {
/* odd->even */
Action = 2;
pMptCtx->bMptIndexEven = true;
} else if (!beven && pMptCtx->bMptIndexEven) {
/* even->odd */
Action = 1;
pMptCtx->bMptIndexEven = false;
}
if (Action != 0) {
/* Query CCK default setting From 0xa24 */
TempCCk = read_bbreg(pAdapter, rCCK0_TxFilter2, bMaskDWord) & bMaskCCK;
for (i = 0; i < CCK_TABLE_SIZE; i++) {
if (pDM_Odm->RFCalibrateInfo.bCCKinCH14) {
if (!memcmp((void *)&TempCCk, (void *)&CCKSwingTable_Ch14[i][2], 4)) {
CCK_index_old = (u8)i;
break;
}
} else {
if (!memcmp((void *)&TempCCk, (void *)&CCKSwingTable_Ch1_Ch13[i][2], 4)) {
CCK_index_old = (u8)i;
break;
}
}
}
if (Action == 1)
CCK_index = CCK_index_old - 1;
else
CCK_index = CCK_index_old + 1;
/* Adjust CCK according to gain index */
if (!pDM_Odm->RFCalibrateInfo.bCCKinCH14) {
rtw_write8(pAdapter, 0xa22, CCKSwingTable_Ch1_Ch13[CCK_index][0]);
rtw_write8(pAdapter, 0xa23, CCKSwingTable_Ch1_Ch13[CCK_index][1]);
rtw_write8(pAdapter, 0xa24, CCKSwingTable_Ch1_Ch13[CCK_index][2]);
rtw_write8(pAdapter, 0xa25, CCKSwingTable_Ch1_Ch13[CCK_index][3]);
rtw_write8(pAdapter, 0xa26, CCKSwingTable_Ch1_Ch13[CCK_index][4]);
rtw_write8(pAdapter, 0xa27, CCKSwingTable_Ch1_Ch13[CCK_index][5]);
rtw_write8(pAdapter, 0xa28, CCKSwingTable_Ch1_Ch13[CCK_index][6]);
rtw_write8(pAdapter, 0xa29, CCKSwingTable_Ch1_Ch13[CCK_index][7]);
} else {
rtw_write8(pAdapter, 0xa22, CCKSwingTable_Ch14[CCK_index][0]);
rtw_write8(pAdapter, 0xa23, CCKSwingTable_Ch14[CCK_index][1]);
rtw_write8(pAdapter, 0xa24, CCKSwingTable_Ch14[CCK_index][2]);
rtw_write8(pAdapter, 0xa25, CCKSwingTable_Ch14[CCK_index][3]);
rtw_write8(pAdapter, 0xa26, CCKSwingTable_Ch14[CCK_index][4]);
rtw_write8(pAdapter, 0xa27, CCKSwingTable_Ch14[CCK_index][5]);
rtw_write8(pAdapter, 0xa28, CCKSwingTable_Ch14[CCK_index][6]);
rtw_write8(pAdapter, 0xa29, CCKSwingTable_Ch14[CCK_index][7]);
}
}
}
/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/
/*
* SetChannel
* Description
* Use H2C command to change channel,
* not only modify rf register, but also other setting need to be done.
*/
void Hal_SetChannel(struct adapter *pAdapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
struct mp_priv *pmp = &pAdapter->mppriv;
struct odm_dm_struct *pDM_Odm = &pHalData->odmpriv;
u8 eRFPath;
u8 channel = pmp->channel;
/* set RF channel register */
for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++)
_write_rfreg(pAdapter, eRFPath, ODM_CHANNEL, 0x3FF, channel);
Hal_mpt_SwitchRfSetting(pAdapter);
SelectChannel(pAdapter, channel);
if (pHalData->CurrentChannel == 14 && !pDM_Odm->RFCalibrateInfo.bCCKinCH14) {
pDM_Odm->RFCalibrateInfo.bCCKinCH14 = true;
Hal_MPT_CCKTxPowerAdjust(pAdapter, pDM_Odm->RFCalibrateInfo.bCCKinCH14);
} else if (pHalData->CurrentChannel != 14 && pDM_Odm->RFCalibrateInfo.bCCKinCH14) {
pDM_Odm->RFCalibrateInfo.bCCKinCH14 = false;
Hal_MPT_CCKTxPowerAdjust(pAdapter, pDM_Odm->RFCalibrateInfo.bCCKinCH14);
}
}
/*
* Notice
* Switch bandwitdth may change center frequency(channel)
*/
void Hal_SetBandwidth(struct adapter *pAdapter)
{
struct mp_priv *pmp = &pAdapter->mppriv;
SetBWMode(pAdapter, pmp->bandwidth, pmp->prime_channel_offset);
Hal_mpt_SwitchRfSetting(pAdapter);
}
void Hal_SetCCKTxPower(struct adapter *pAdapter, u8 *TxPower)
{
u32 tmpval = 0;
/* rf-A cck tx power */
write_bbreg(pAdapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, TxPower[RF_PATH_A]);
tmpval = (TxPower[RF_PATH_A] << 16) | (TxPower[RF_PATH_A] << 8) | TxPower[RF_PATH_A];
write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval);
/* rf-B cck tx power */
write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, TxPower[RF_PATH_B]);
tmpval = (TxPower[RF_PATH_B] << 16) | (TxPower[RF_PATH_B] << 8) | TxPower[RF_PATH_B];
write_bbreg(pAdapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval);
}
void Hal_SetOFDMTxPower(struct adapter *pAdapter, u8 *TxPower)
{
u32 TxAGC = 0;
u8 tmpval = 0;
/* HT Tx-rf(A) */
tmpval = TxPower[RF_PATH_A];
TxAGC = (tmpval << 24) | (tmpval << 16) | (tmpval << 8) | tmpval;
write_bbreg(pAdapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_A_Mcs07_Mcs04, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_A_Mcs11_Mcs08, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC);
/* HT Tx-rf(B) */
tmpval = TxPower[RF_PATH_B];
TxAGC = (tmpval << 24) | (tmpval << 16) | (tmpval << 8) | tmpval;
write_bbreg(pAdapter, rTxAGC_B_Rate18_06, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_B_Rate54_24, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_B_Mcs03_Mcs00, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_B_Mcs07_Mcs04, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_B_Mcs11_Mcs08, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_B_Mcs15_Mcs12, bMaskDWord, TxAGC);
}
void Hal_SetAntennaPathPower(struct adapter *pAdapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
u8 TxPowerLevel[RF_PATH_MAX];
u8 rfPath;
TxPowerLevel[RF_PATH_A] = pAdapter->mppriv.txpoweridx;
TxPowerLevel[RF_PATH_B] = pAdapter->mppriv.txpoweridx_b;
switch (pAdapter->mppriv.antenna_tx) {
case ANTENNA_A:
default:
rfPath = RF_PATH_A;
break;
case ANTENNA_B:
rfPath = RF_PATH_B;
break;
case ANTENNA_C:
rfPath = RF_PATH_C;
break;
}
switch (pHalData->rf_chip) {
case RF_8225:
case RF_8256:
case RF_6052:
Hal_SetCCKTxPower(pAdapter, TxPowerLevel);
if (pAdapter->mppriv.rateidx < MPT_RATE_6M) /* CCK rate */
Hal_MPT_CCKTxPowerAdjustbyIndex(pAdapter, TxPowerLevel[rfPath] % 2 == 0);
Hal_SetOFDMTxPower(pAdapter, TxPowerLevel);
break;
default:
break;
}
}
void Hal_SetTxPower(struct adapter *pAdapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
u8 TxPower = pAdapter->mppriv.txpoweridx;
u8 TxPowerLevel[RF_PATH_MAX];
u8 rf, rfPath;
for (rf = 0; rf < RF_PATH_MAX; rf++)
TxPowerLevel[rf] = TxPower;
switch (pAdapter->mppriv.antenna_tx) {
case ANTENNA_A:
default:
rfPath = RF_PATH_A;
break;
case ANTENNA_B:
rfPath = RF_PATH_B;
break;
case ANTENNA_C:
rfPath = RF_PATH_C;
break;
}
switch (pHalData->rf_chip) {
/* 2008/09/12 MH Test only !! We enable the TX power tracking for MP!!!!! */
/* We should call normal driver API later!! */
case RF_8225:
case RF_8256:
case RF_6052:
Hal_SetCCKTxPower(pAdapter, TxPowerLevel);
if (pAdapter->mppriv.rateidx < MPT_RATE_6M) /* CCK rate */
Hal_MPT_CCKTxPowerAdjustbyIndex(pAdapter, TxPowerLevel[rfPath] % 2 == 0);
Hal_SetOFDMTxPower(pAdapter, TxPowerLevel);
break;
default:
break;
}
}
void Hal_SetDataRate(struct adapter *pAdapter)
{
Hal_mpt_SwitchRfSetting(pAdapter);
}
void Hal_SetAntenna(struct adapter *pAdapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
struct ant_sel_ofdm *p_ofdm_tx; /* OFDM Tx register */
struct ant_sel_cck *p_cck_txrx;
u8 r_rx_antenna_ofdm = 0, r_ant_select_cck_val = 0;
u8 chgTx = 0, chgRx = 0;
u32 r_ant_select_ofdm_val = 0, r_ofdm_tx_en_val = 0;
p_ofdm_tx = (struct ant_sel_ofdm *)&r_ant_select_ofdm_val;
p_cck_txrx = (struct ant_sel_cck *)&r_ant_select_cck_val;
p_ofdm_tx->r_ant_ht1 = 0x1;
p_ofdm_tx->r_ant_ht2 = 0x2; /* Second TX RF path is A */
p_ofdm_tx->r_ant_non_ht = 0x3; /* 0x1+0x2=0x3 */
switch (pAdapter->mppriv.antenna_tx) {
case ANTENNA_A:
p_ofdm_tx->r_tx_antenna = 0x1;
r_ofdm_tx_en_val = 0x1;
p_ofdm_tx->r_ant_l = 0x1;
p_ofdm_tx->r_ant_ht_s1 = 0x1;
p_ofdm_tx->r_ant_non_ht_s1 = 0x1;
p_cck_txrx->r_ccktx_enable = 0x8;
chgTx = 1;
/* From SD3 Willis suggestion !!! Set RF A=TX and B as standby */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 1);
r_ofdm_tx_en_val = 0x3;
/* Power save */
/* We need to close RFB by SW control */
if (pHalData->rf_type == RF_2T2R) {
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT(10), 0);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT(26), 1);
PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT(10), 0);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT(1), 1);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT(17), 0);
}
break;
case ANTENNA_B:
p_ofdm_tx->r_tx_antenna = 0x2;
r_ofdm_tx_en_val = 0x2;
p_ofdm_tx->r_ant_l = 0x2;
p_ofdm_tx->r_ant_ht_s1 = 0x2;
p_ofdm_tx->r_ant_non_ht_s1 = 0x2;
p_cck_txrx->r_ccktx_enable = 0x4;
chgTx = 1;
/* From SD3 Willis suggestion !!! Set RF A as standby */
PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 1);
PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2);
/* Power save */
/* cosa r_ant_select_ofdm_val = 0x22222222; */
/* 2008/10/31 MH From SD3 Willi's suggestion. We must read RF 1T table. */
/* 2009/01/08 MH From Sd3 Willis. We need to close RFA by SW control */
if (pHalData->rf_type == RF_2T2R || pHalData->rf_type == RF_1T2R) {
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT(10), 1);
PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT(10), 0);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT(26), 0);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT(1), 0);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT(17), 1);
}
break;
case ANTENNA_AB: /* For 8192S */
p_ofdm_tx->r_tx_antenna = 0x3;
r_ofdm_tx_en_val = 0x3;
p_ofdm_tx->r_ant_l = 0x3;
p_ofdm_tx->r_ant_ht_s1 = 0x3;
p_ofdm_tx->r_ant_non_ht_s1 = 0x3;
p_cck_txrx->r_ccktx_enable = 0xC;
chgTx = 1;
/* From SD3 Willis suggestion !!! Set RF B as standby */
PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2);
PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2);
/* Disable Power save */
/* cosa r_ant_select_ofdm_val = 0x3321333; */
/* 2009/01/08 MH From Sd3 Willis. We need to enable RFA/B by SW control */
if (pHalData->rf_type == RF_2T2R) {
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT(10), 0);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT(26), 0);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT(1), 1);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT(17), 1);
}
break;
default:
break;
}
/* r_rx_antenna_ofdm, bit0=A, bit1=B, bit2=C, bit3=D */
/* r_cckrx_enable : CCK default, 0=A, 1=B, 2=C, 3=D */
/* r_cckrx_enable_2 : CCK option, 0=A, 1=B, 2=C, 3=D */
switch (pAdapter->mppriv.antenna_rx) {
case ANTENNA_A:
r_rx_antenna_ofdm = 0x1; /* A */
p_cck_txrx->r_cckrx_enable = 0x0; /* default: A */
p_cck_txrx->r_cckrx_enable_2 = 0x0; /* option: A */
chgRx = 1;
break;
case ANTENNA_B:
r_rx_antenna_ofdm = 0x2; /* B */
p_cck_txrx->r_cckrx_enable = 0x1; /* default: B */
p_cck_txrx->r_cckrx_enable_2 = 0x1; /* option: B */
chgRx = 1;
break;
case ANTENNA_AB:
r_rx_antenna_ofdm = 0x3; /* AB */
p_cck_txrx->r_cckrx_enable = 0x0; /* default:A */
p_cck_txrx->r_cckrx_enable_2 = 0x1; /* option:B */
chgRx = 1;
break;
default:
break;
}
if (chgTx && chgRx) {
switch (pHalData->rf_chip) {
case RF_8225:
case RF_8256:
case RF_6052:
/* r_ant_sel_cck_val = r_ant_select_cck_val; */
PHY_SetBBReg(pAdapter, rFPGA1_TxInfo, 0x7fffffff, r_ant_select_ofdm_val); /* OFDM Tx */
PHY_SetBBReg(pAdapter, rFPGA0_TxInfo, 0x0000000f, r_ofdm_tx_en_val); /* OFDM Tx */
PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); /* OFDM Rx */
PHY_SetBBReg(pAdapter, rOFDM1_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); /* OFDM Rx */
PHY_SetBBReg(pAdapter, rCCK0_AFESetting, bMaskByte3, r_ant_select_cck_val); /* CCK TxRx */
break;
default:
break;
}
}
}
s32 Hal_SetThermalMeter(struct adapter *pAdapter, u8 target_ther)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
if (!netif_running(pAdapter->pnetdev))
return _FAIL;
if (!check_fwstate(&pAdapter->mlmepriv, WIFI_MP_STATE))
return _FAIL;
target_ther &= 0xff;
if (target_ther < 0x07)
target_ther = 0x07;
else if (target_ther > 0x1d)
target_ther = 0x1d;
pHalData->EEPROMThermalMeter = target_ther;
return _SUCCESS;
}
void Hal_TriggerRFThermalMeter(struct adapter *pAdapter)
{
_write_rfreg(pAdapter, RF_PATH_A, RF_T_METER_88E, BIT(17) | BIT(16), 0x03);
}
u8 Hal_ReadRFThermalMeter(struct adapter *pAdapter)
{
u32 ThermalValue = 0;
ThermalValue = _read_rfreg(pAdapter, RF_PATH_A, RF_T_METER_88E, 0xfc00);
return (u8)ThermalValue;
}
void Hal_GetThermalMeter(struct adapter *pAdapter, u8 *value)
{
Hal_TriggerRFThermalMeter(pAdapter);
msleep(1000);
*value = Hal_ReadRFThermalMeter(pAdapter);
}
void Hal_SetSingleCarrierTx(struct adapter *pAdapter, u8 bStart)
{
pAdapter->mppriv.MptCtx.bSingleCarrier = bStart;
if (bStart) {
/* Start Single Carrier. */
/* 1. if OFDM block on? */
if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn))
write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);/* set OFDM block on */
/* 2. set CCK test mode off, set to CCK normal mode */
write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, bDisable);
/* 3. turn on scramble setting */
write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable);
/* 4. Turn On Single Carrier Tx and turn off the other test modes. */
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bEnable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
/* for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500);
} else {
/* Stop Single Carrier. */
/* Turn off all test modes. */
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
msleep(10);
/* BB Reset */
write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0);
write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1);
/* Stop for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100);
}
}
void Hal_SetSingleToneTx(struct adapter *pAdapter, u8 bStart)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
bool is92C = IS_92C_SERIAL(pHalData->VersionID);
u8 rfPath;
u32 reg58 = 0x0;
switch (pAdapter->mppriv.antenna_tx) {
case ANTENNA_A:
default:
rfPath = RF_PATH_A;
break;
case ANTENNA_B:
rfPath = RF_PATH_B;
break;
case ANTENNA_C:
rfPath = RF_PATH_C;
break;
}
pAdapter->mppriv.MptCtx.bSingleTone = bStart;
if (bStart) {
/* Start Single Tone. */
/* <20120326, Kordan> To amplify the power of tone for Xtal calibration. (asked by Edlu) */
if (IS_HARDWARE_TYPE_8188E(pAdapter)) {
reg58 = PHY_QueryRFReg(pAdapter, RF_PATH_A, LNA_Low_Gain_3, bRFRegOffsetMask);
reg58 &= 0xFFFFFFF0;
reg58 += 2;
PHY_SetRFReg(pAdapter, RF_PATH_A, LNA_Low_Gain_3, bRFRegOffsetMask, reg58);
}
PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x0);
PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x0);
if (is92C) {
_write_rfreg(pAdapter, RF_PATH_A, 0x21, BIT(19), 0x01);
rtw_usleep_os(100);
if (rfPath == RF_PATH_A)
write_rfreg(pAdapter, RF_PATH_B, 0x00, 0x10000); /* PAD all on. */
else if (rfPath == RF_PATH_B)
write_rfreg(pAdapter, RF_PATH_A, 0x00, 0x10000); /* PAD all on. */
write_rfreg(pAdapter, rfPath, 0x00, 0x2001f); /* PAD all on. */
rtw_usleep_os(100);
} else {
write_rfreg(pAdapter, rfPath, 0x21, 0xd4000);
rtw_usleep_os(100);
write_rfreg(pAdapter, rfPath, 0x00, 0x2001f); /* PAD all on. */
rtw_usleep_os(100);
}
/* for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500);
} else {
/* Stop Single Tone. */
/* <20120326, Kordan> To amplify the power of tone for Xtal calibration. (asked by Edlu) */
/* <20120326, Kordan> Only in single tone mode. (asked by Edlu) */
if (IS_HARDWARE_TYPE_8188E(pAdapter)) {
reg58 = PHY_QueryRFReg(pAdapter, RF_PATH_A, LNA_Low_Gain_3, bRFRegOffsetMask);
reg58 &= 0xFFFFFFF0;
PHY_SetRFReg(pAdapter, RF_PATH_A, LNA_Low_Gain_3, bRFRegOffsetMask, reg58);
}
write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x1);
write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x1);
if (is92C) {
_write_rfreg(pAdapter, RF_PATH_A, 0x21, BIT(19), 0x00);
rtw_usleep_os(100);
write_rfreg(pAdapter, RF_PATH_A, 0x00, 0x32d75); /* PAD all on. */
write_rfreg(pAdapter, RF_PATH_B, 0x00, 0x32d75); /* PAD all on. */
rtw_usleep_os(100);
} else {
write_rfreg(pAdapter, rfPath, 0x21, 0x54000);
rtw_usleep_os(100);
write_rfreg(pAdapter, rfPath, 0x00, 0x30000); /* PAD all on. */
rtw_usleep_os(100);
}
/* Stop for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100);
}
}
void Hal_SetCarrierSuppressionTx(struct adapter *pAdapter, u8 bStart)
{
pAdapter->mppriv.MptCtx.bCarrierSuppression = bStart;
if (bStart) {
/* Start Carrier Suppression. */
if (pAdapter->mppriv.rateidx <= MPT_RATE_11M) {
/* 1. if CCK block on? */
if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn))
write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);/* set CCK block on */
/* Turn Off All Test Mode */
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); /* transmit mode */
write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x0); /* turn off scramble setting */
/* Set CCK Tx Test Rate */
write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, 0x0); /* Set FTxRate to 1Mbps */
}
/* for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500);
} else {
/* Stop Carrier Suppression. */
if (pAdapter->mppriv.rateidx <= MPT_RATE_11M) {
write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); /* normal mode */
write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x1); /* turn on scramble setting */
/* BB Reset */
write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0);
write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1);
}
/* Stop for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100);
}
}
void Hal_SetCCKContinuousTx(struct adapter *pAdapter, u8 bStart)
{
u32 cckrate;
if (bStart) {
/* 1. if CCK block on? */
if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn))
write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);/* set CCK block on */
/* Turn Off All Test Mode */
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
/* Set CCK Tx Test Rate */
cckrate = pAdapter->mppriv.rateidx;
write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, cckrate);
write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); /* transmit mode */
write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); /* turn on scramble setting */
/* for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500);
} else {
write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); /* normal mode */
write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); /* turn on scramble setting */
/* BB Reset */
write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0);
write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1);
/* Stop for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100);
}
pAdapter->mppriv.MptCtx.bCckContTx = bStart;
pAdapter->mppriv.MptCtx.bOfdmContTx = false;
} /* mpt_StartCckContTx */
void Hal_SetOFDMContinuousTx(struct adapter *pAdapter, u8 bStart)
{
if (bStart) {
/* 1. if OFDM block on? */
if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn))
write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);/* set OFDM block on */
/* 2. set CCK test mode off, set to CCK normal mode */
write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, bDisable);
/* 3. turn on scramble setting */
write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable);
/* 4. Turn On Continue Tx and turn off the other test modes. */
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bEnable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
/* for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500);
} else {
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
/* Delay 10 ms */
msleep(10);
/* BB Reset */
write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0);
write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1);
/* Stop for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100);
}
pAdapter->mppriv.MptCtx.bCckContTx = false;
pAdapter->mppriv.MptCtx.bOfdmContTx = bStart;
} /* mpt_StartOfdmContTx */
void Hal_SetContinuousTx(struct adapter *pAdapter, u8 bStart)
{
pAdapter->mppriv.MptCtx.bStartContTx = bStart;
if (pAdapter->mppriv.rateidx <= MPT_RATE_11M)
Hal_SetCCKContinuousTx(pAdapter, bStart);
else if ((pAdapter->mppriv.rateidx >= MPT_RATE_6M) &&
(pAdapter->mppriv.rateidx <= MPT_RATE_MCS15))
Hal_SetOFDMContinuousTx(pAdapter, bStart);
}

215
drivers/staging/r8188eu/hal/rtl8188e_phycfg.c
View File

@ -532,7 +532,7 @@ void storePwrIndexDiffRateOffset(struct adapter *Adapter, u32 RegAddr, u32 BitMa
static int phy_BB8188E_Config_ParaFile(struct adapter *Adapter)
{
struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter);
struct eeprom_priv *pEEPROM = &Adapter->eeprompriv;
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
int rtStatus = _SUCCESS;
@ -609,166 +609,6 @@ int PHY_RFConfig8188E(struct adapter *Adapter)
return rtStatus;
}
/*-----------------------------------------------------------------------------
* Function: PHY_ConfigRFWithParaFile()
*
* Overview: This function read RF parameters from general file format, and do RF 3-wire
*
* Input: struct adapter *Adapter
* ps8 pFileName
* enum rf_radio_path eRFPath
*
* Output: NONE
*
* Return: RT_STATUS_SUCCESS: configuration file exist
*
* Note: Delay may be required for RF configuration
*---------------------------------------------------------------------------*/
int rtl8188e_PHY_ConfigRFWithParaFile(struct adapter *Adapter, u8 *pFileName, enum rf_radio_path eRFPath)
{
return _SUCCESS;
}
void
rtl8192c_PHY_GetHWRegOriginalValue(
struct adapter *Adapter
)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
/* read rx initial gain */
pHalData->DefaultInitialGain[0] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XAAGCCore1, bMaskByte0);
pHalData->DefaultInitialGain[1] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XBAGCCore1, bMaskByte0);
pHalData->DefaultInitialGain[2] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XCAGCCore1, bMaskByte0);
pHalData->DefaultInitialGain[3] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XDAGCCore1, bMaskByte0);
/* read framesync */
pHalData->framesync = (u8)PHY_QueryBBReg(Adapter, rOFDM0_RxDetector3, bMaskByte0);
pHalData->framesyncC34 = PHY_QueryBBReg(Adapter, rOFDM0_RxDetector2, bMaskDWord);
}
/* */
/* Description: */
/* Map dBm into Tx power index according to */
/* current HW model, for example, RF and PA, and */
/* current wireless mode. */
/* By Bruce, 2008-01-29. */
/* */
static u8 phy_DbmToTxPwrIdx(struct adapter *Adapter, enum wireless_mode WirelessMode, int PowerInDbm)
{
u8 TxPwrIdx = 0;
int Offset = 0;
/* */
/* Tested by MP, we found that CCK Index 0 equals to 8dbm, OFDM legacy equals to */
/* 3dbm, and OFDM HT equals to 0dbm respectively. */
/* Note: */
/* The mapping may be different by different NICs. Do not use this formula for what needs accurate result. */
/* By Bruce, 2008-01-29. */
/* */
switch (WirelessMode) {
case WIRELESS_MODE_B:
Offset = -7;
break;
case WIRELESS_MODE_G:
case WIRELESS_MODE_N_24G:
default:
Offset = -8;
break;
}
if ((PowerInDbm - Offset) > 0)
TxPwrIdx = (u8)((PowerInDbm - Offset) * 2);
else
TxPwrIdx = 0;
/* Tx Power Index is too large. */
if (TxPwrIdx > MAX_TXPWR_IDX_NMODE_92S)
TxPwrIdx = MAX_TXPWR_IDX_NMODE_92S;
return TxPwrIdx;
}
/* */
/* Description: */
/* Map Tx power index into dBm according to */
/* current HW model, for example, RF and PA, and */
/* current wireless mode. */
/* By Bruce, 2008-01-29. */
/* */
static int phy_TxPwrIdxToDbm(struct adapter *Adapter, enum wireless_mode WirelessMode, u8 TxPwrIdx)
{
int Offset = 0;
int PwrOutDbm = 0;
/* */
/* Tested by MP, we found that CCK Index 0 equals to -7dbm, OFDM legacy equals to -8dbm. */
/* Note: */
/* The mapping may be different by different NICs. Do not use this formula for what needs accurate result. */
/* By Bruce, 2008-01-29. */
/* */
switch (WirelessMode) {
case WIRELESS_MODE_B:
Offset = -7;
break;
case WIRELESS_MODE_G:
case WIRELESS_MODE_N_24G:
default:
Offset = -8;
break;
}
PwrOutDbm = TxPwrIdx / 2 + Offset; /* Discard the decimal part. */
return PwrOutDbm;
}
/*-----------------------------------------------------------------------------
* Function: GetTxPowerLevel8190()
*
* Overview: This function is export to "common" moudule
*
* Input: struct adapter *Adapter
* psByte Power Level
*
* Output: NONE
*
* Return: NONE
*
*---------------------------------------------------------------------------*/
void PHY_GetTxPowerLevel8188E(struct adapter *Adapter, u32 *powerlevel)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
u8 TxPwrLevel = 0;
int TxPwrDbm;
/* */
/* Because the Tx power indexes are different, we report the maximum of them to */
/* meet the CCX TPC request. By Bruce, 2008-01-31. */
/* */
/* CCK */
TxPwrLevel = pHalData->CurrentCckTxPwrIdx;
TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_B, TxPwrLevel);
/* Legacy OFDM */
TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx + pHalData->LegacyHTTxPowerDiff;
/* Compare with Legacy OFDM Tx power. */
if (phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel) > TxPwrDbm)
TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel);
/* HT OFDM */
TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx;
/* Compare with HT OFDM Tx power. */
if (phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel) > TxPwrDbm)
TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel);
*powerlevel = TxPwrDbm;
}
static void getTxPowerIndex88E(struct adapter *Adapter, u8 channel, u8 *cckPowerLevel,
u8 *ofdmPowerLevel, u8 *BW20PowerLevel,
u8 *BW40PowerLevel)
@ -892,51 +732,6 @@ PHY_SetTxPowerLevel8188E(
rtl8188e_PHY_RF6052SetOFDMTxPower(Adapter, &ofdmPowerLevel[0], &BW20PowerLevel[0], &BW40PowerLevel[0], channel);
}
/* */
/* Description: */
/* Update transmit power level of all channel supported. */
/* */
/* TODO: */
/* A mode. */
/* By Bruce, 2008-02-04. */
/* */
bool
PHY_UpdateTxPowerDbm8188E(
struct adapter *Adapter,
int powerInDbm
)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
u8 idx;
u8 rf_path;
/* TODO: A mode Tx power. */
u8 CckTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_B, powerInDbm);
u8 OfdmTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_N_24G, powerInDbm);
if (OfdmTxPwrIdx - pHalData->LegacyHTTxPowerDiff > 0)
OfdmTxPwrIdx -= pHalData->LegacyHTTxPowerDiff;
else
OfdmTxPwrIdx = 0;
for (idx = 0; idx < 14; idx++) {
for (rf_path = 0; rf_path < 2; rf_path++) {
pHalData->TxPwrLevelCck[rf_path][idx] = CckTxPwrIdx;
pHalData->TxPwrLevelHT40_1S[rf_path][idx] =
pHalData->TxPwrLevelHT40_2S[rf_path][idx] = OfdmTxPwrIdx;
}
}
return true;
}
void
PHY_ScanOperationBackup8188E(
struct adapter *Adapter,
u8 Operation
)
{
}
/*-----------------------------------------------------------------------------
* Function: PHY_SetBWModeCallback8192C()
*
@ -1068,7 +863,7 @@ void PHY_SetBWMode8188E(struct adapter *Adapter, enum ht_channel_width Bandwidth
static void _PHY_SwChnl8192C(struct adapter *Adapter, u8 channel)
{
u8 eRFPath;
u8 eRFPath = 0;
u32 param1, param2;
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
@ -1081,10 +876,8 @@ static void _PHY_SwChnl8192C(struct adapter *Adapter, u8 channel)
/* s2. RF dependent command - CmdID_RF_WriteReg, param1=RF_CHNLBW, param2=channel */
param1 = RF_CHNLBW;
param2 = channel;
for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) {
pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | param2);
PHY_SetRFReg(Adapter, (enum rf_radio_path)eRFPath, param1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]);
}
pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | param2);
PHY_SetRFReg(Adapter, (enum rf_radio_path)eRFPath, param1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]);
}
void PHY_SwChnl8188E(struct adapter *Adapter, u8 channel)

212
drivers/staging/r8188eu/hal/rtl8188e_rf6052.c
View File

@ -29,49 +29,6 @@
#include "../include/drv_types.h"
#include "../include/rtl8188e_hal.h"
/*---------------------------Define Local Constant---------------------------*/
/* Define local structure for debug!!!!! */
struct rf_shadow {
/* Shadow register value */
u32 Value;
/* Compare or not flag */
u8 Compare;
/* Record If it had ever modified unpredicted */
u8 ErrorOrNot;
/* Recorver Flag */
u8 Recorver;
/* */
u8 Driver_Write;
};
/*---------------------------Define Local Constant---------------------------*/
/*------------------------Define global variable-----------------------------*/
/*------------------------Define local variable------------------------------*/
/*-----------------------------------------------------------------------------
* Function: RF_ChangeTxPath
*
* Overview: For RL6052, we must change some RF settign for 1T or 2T.
*
* Input: u16 DataRate 0x80-8f, 0x90-9f
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 09/25/2008 MHC Create Version 0.
* Firmwaer support the utility later.
*
*---------------------------------------------------------------------------*/
void rtl8188e_RF_ChangeTxPath(struct adapter *Adapter, u16 DataRate)
{
/* We do not support gain table change inACUT now !!!! Delete later !!! */
} /* RF_ChangeTxPath */
/*-----------------------------------------------------------------------------
* Function: PHY_RF6052SetBandwidth()
*
@ -128,7 +85,6 @@ rtl8188e_PHY_RF6052SetCckTxPower(
u8 *pPowerlevel)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
u32 TxAGC[2] = {0, 0}, tmpval = 0, pwrtrac_value;
bool TurboScanOff = false;
@ -155,34 +111,19 @@ rtl8188e_PHY_RF6052SetCckTxPower(
}
}
} else {
/* Driver dynamic Tx power shall not affect Tx power.
* It shall be determined by power training mechanism.
i * Currently, we cannot fully disable driver dynamic
* tx power mechanism because it is referenced by BT
* coexist mechanism.
* In the future, two mechanism shall be separated from
* each other and maintained independently. */
if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) {
TxAGC[RF_PATH_A] = 0x10101010;
TxAGC[RF_PATH_B] = 0x10101010;
} else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) {
TxAGC[RF_PATH_A] = 0x00000000;
TxAGC[RF_PATH_B] = 0x00000000;
} else {
for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
TxAGC[idx1] =
pPowerlevel[idx1] | (pPowerlevel[idx1] << 8) |
(pPowerlevel[idx1] << 16) | (pPowerlevel[idx1] << 24);
}
if (pHalData->EEPROMRegulatory == 0) {
tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][6]) +
(pHalData->MCSTxPowerLevelOriginalOffset[0][7] << 8);
TxAGC[RF_PATH_A] += tmpval;
for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
TxAGC[idx1] =
pPowerlevel[idx1] | (pPowerlevel[idx1] << 8) |
(pPowerlevel[idx1] << 16) | (pPowerlevel[idx1] << 24);
}
if (pHalData->EEPROMRegulatory == 0) {
tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][6]) +
(pHalData->MCSTxPowerLevelOriginalOffset[0][7] << 8);
TxAGC[RF_PATH_A] += tmpval;
tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][14]) +
(pHalData->MCSTxPowerLevelOriginalOffset[0][15] << 24);
TxAGC[RF_PATH_B] += tmpval;
}
tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][14]) +
(pHalData->MCSTxPowerLevelOriginalOffset[0][15] << 24);
TxAGC[RF_PATH_B] += tmpval;
}
}
for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
@ -227,7 +168,7 @@ static void getpowerbase88e(struct adapter *Adapter, u8 *pPowerLevelOFDM,
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
u32 powerBase0, powerBase1;
u8 i, powerlevel[2];
u8 i;
for (i = 0; i < 2; i++) {
powerBase0 = pPowerLevelOFDM[i];
@ -235,23 +176,21 @@ static void getpowerbase88e(struct adapter *Adapter, u8 *pPowerLevelOFDM,
powerBase0 = (powerBase0 << 24) | (powerBase0 << 16) | (powerBase0 << 8) | powerBase0;
*(OfdmBase + i) = powerBase0;
}
for (i = 0; i < pHalData->NumTotalRFPath; i++) {
/* Check HT20 to HT40 diff */
if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
powerlevel[i] = pPowerLevelBW20[i];
else
powerlevel[i] = pPowerLevelBW40[i];
powerBase1 = powerlevel[i];
powerBase1 = (powerBase1 << 24) | (powerBase1 << 16) | (powerBase1 << 8) | powerBase1;
*(MCSBase + i) = powerBase1;
}
/* Check HT20 to HT40 diff */
if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
powerBase1 = pPowerLevelBW20[0];
else
powerBase1 = pPowerLevelBW40[0];
powerBase1 = (powerBase1 << 24) | (powerBase1 << 16) | (powerBase1 << 8) | powerBase1;
*MCSBase = powerBase1;
}
static void get_rx_power_val_by_reg(struct adapter *Adapter, u8 Channel,
u8 index, u32 *powerBase0, u32 *powerBase1,
u32 *pOutWriteVal)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
u8 i, chnlGroup = 0, pwr_diff_limit[4], customer_pwr_limit;
s8 pwr_diff = 0;
u32 writeVal, customer_limit, rf;
@ -327,19 +266,7 @@ static void get_rx_power_val_by_reg(struct adapter *Adapter, u8 Channel,
((index < 2) ? powerBase0[rf] : powerBase1[rf]);
break;
}
/* 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. */
/* Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism. */
/* In the future, two mechanism shall be separated from each other and maintained independently. Thanks for Lanhsin's reminder. */
/* 92d do not need this */
if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
writeVal = 0x14141414;
else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
writeVal = 0x00000000;
/* 20100628 Joseph: High power mode for BT-Coexist mechanism. */
/* This mechanism is only applied when Driver-Highpower-Mechanism is OFF. */
if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT1)
writeVal = writeVal - 0x06060606;
*(pOutWriteVal + rf) = writeVal;
}
}
@ -458,70 +385,41 @@ static int phy_RF6052_Config_ParaFile(struct adapter *Adapter)
struct bb_reg_def *pPhyReg;
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
u32 u4RegValue = 0;
u8 eRFPath;
u8 eRFPath = 0;
int rtStatus = _SUCCESS;
/* 3----------------------------------------------------------------- */
/* 3 <2> Initialize RF */
/* 3----------------------------------------------------------------- */
for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) {
pPhyReg = &pHalData->PHYRegDef[eRFPath];
/* Initialize RF */
/*----Store original RFENV control type----*/
switch (eRFPath) {
case RF_PATH_A:
case RF_PATH_C:
u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV);
break;
case RF_PATH_B:
case RF_PATH_D:
u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV << 16);
break;
}
/*----Set RF_ENV enable----*/
PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV << 16, 0x1);
udelay(1);/* PlatformStallExecution(1); */
pPhyReg = &pHalData->PHYRegDef[eRFPath];
/*----Set RF_ENV output high----*/
PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
udelay(1);/* PlatformStallExecution(1); */
/*----Store original RFENV control type----*/
u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV);
/* Set bit number of Address and Data for RF register */
PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 1 to 4 bits for 8255 */
udelay(1);/* PlatformStallExecution(1); */
/*----Set RF_ENV enable----*/
PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV << 16, 0x1);
udelay(1);/* PlatformStallExecution(1); */
PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for 8255 */
udelay(1);/* PlatformStallExecution(1); */
/*----Set RF_ENV output high----*/
PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
udelay(1);/* PlatformStallExecution(1); */
/* Set bit number of Address and Data for RF register */
PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 1 to 4 bits for 8255 */
udelay(1);/* PlatformStallExecution(1); */
PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for 8255 */
udelay(1);/* PlatformStallExecution(1); */
/*----Initialize RF fom connfiguration file----*/
if (HAL_STATUS_FAILURE == ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv, (enum rf_radio_path)eRFPath, (enum rf_radio_path)eRFPath))
rtStatus = _FAIL;
/*----Restore RFENV control type----*/;
PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
if (rtStatus != _SUCCESS)
goto phy_RF6052_Config_ParaFile_Fail;
/*----Initialize RF fom connfiguration file----*/
switch (eRFPath) {
case RF_PATH_A:
if (HAL_STATUS_FAILURE == ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv, (enum rf_radio_path)eRFPath, (enum rf_radio_path)eRFPath))
rtStatus = _FAIL;
break;
case RF_PATH_B:
if (HAL_STATUS_FAILURE == ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv, (enum rf_radio_path)eRFPath, (enum rf_radio_path)eRFPath))
rtStatus = _FAIL;
break;
case RF_PATH_C:
break;
case RF_PATH_D:
break;
}
/*----Restore RFENV control type----*/;
switch (eRFPath) {
case RF_PATH_A:
case RF_PATH_C:
PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
break;
case RF_PATH_B:
case RF_PATH_D:
PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV << 16, u4RegValue);
break;
}
if (rtStatus != _SUCCESS)
goto phy_RF6052_Config_ParaFile_Fail;
}
return rtStatus;
phy_RF6052_Config_ParaFile_Fail:
@ -530,18 +428,8 @@ phy_RF6052_Config_ParaFile_Fail:
int PHY_RF6052_Config8188E(struct adapter *Adapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
int rtStatus = _SUCCESS;
/* */
/* Initialize general global value */
/* */
/* TODO: Extend RF_PATH_C and RF_PATH_D in the future */
if (pHalData->rf_type == RF_1T1R)
pHalData->NumTotalRFPath = 1;
else
pHalData->NumTotalRFPath = 2;
/* */
/* Config BB and RF */
/* */

2
drivers/staging/r8188eu/hal/rtl8188e_rxdesc.c
View File

@ -127,7 +127,7 @@ void update_recvframe_phyinfo_88e(struct recv_frame *precvframe, struct phy_stat
struct adapter *padapter = precvframe->adapter;
struct rx_pkt_attrib *pattrib = &precvframe->attrib;
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
struct odm_phy_status_info *pPHYInfo = (struct odm_phy_status_info *)(&pattrib->phy_info);
struct phy_info *pPHYInfo = &pattrib->phy_info;
u8 *wlanhdr;
struct odm_per_pkt_info pkt_info;
u8 *sa = NULL;

27
drivers/staging/r8188eu/hal/rtl8188e_sreset.c
View File

@ -6,43 +6,16 @@
#include "../include/rtl8188e_sreset.h"
#include "../include/rtl8188e_hal.h"
void rtl8188e_silentreset_for_specific_platform(struct adapter *padapter)
{
}
void rtl8188e_sreset_xmit_status_check(struct adapter *padapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
unsigned long current_time;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
unsigned int diff_time;
u32 txdma_status;
txdma_status = rtw_read32(padapter, REG_TXDMA_STATUS);
if (txdma_status != 0x00) {
DBG_88E("%s REG_TXDMA_STATUS:0x%08x\n", __func__, txdma_status);
rtw_write32(padapter, REG_TXDMA_STATUS, txdma_status);
rtl8188e_silentreset_for_specific_platform(padapter);
}
/* total xmit irp = 4 */
current_time = jiffies;
if (0 == pxmitpriv->free_xmitbuf_cnt) {
diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_time);
if (diff_time > 2000) {
if (psrtpriv->last_tx_complete_time == 0) {
psrtpriv->last_tx_complete_time = current_time;
} else {
diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_complete_time);
if (diff_time > 4000) {
DBG_88E("%s tx hang\n", __func__);
rtl8188e_silentreset_for_specific_platform(padapter);
}
}
}
}
}
void rtl8188e_sreset_linked_status_check(struct adapter *padapter)

4
drivers/staging/r8188eu/hal/rtl8188eu_recv.c
View File

@ -12,7 +12,7 @@
#include "../include/rtl8188e_hal.h"
void rtl8188eu_init_recvbuf(struct adapter *padapter, struct recv_buf *precvbuf)
void rtl8188eu_init_recvbuf(struct recv_buf *precvbuf)
{
precvbuf->transfer_len = 0;
@ -39,7 +39,7 @@ int rtl8188eu_init_recv_priv(struct adapter *padapter)
(unsigned long)padapter);
/* init recv_buf */
_rtw_init_queue(&precvpriv->free_recv_buf_queue);
rtw_init_queue(&precvpriv->free_recv_buf_queue);
precvpriv->pallocated_recv_buf = kzalloc(NR_RECVBUFF * sizeof(struct recv_buf) + 4,
GFP_KERNEL);

60
drivers/staging/r8188eu/hal/rtl8188eu_xmit.c
View File

@ -19,15 +19,6 @@ s32 rtl8188eu_init_xmit_priv(struct adapter *adapt)
return _SUCCESS;
}
static u8 urb_zero_packet_chk(struct adapter *adapt, int sz)
{
u8 set_tx_desc_offset;
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
set_tx_desc_offset = (((sz + TXDESC_SIZE) % haldata->UsbBulkOutSize) == 0) ? 1 : 0;
return set_tx_desc_offset;
}
static void rtl8188eu_cal_txdesc_chksum(struct tx_desc *ptxdesc)
{
u16 *usptr = (u16 *)ptxdesc;
@ -168,13 +159,6 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bag
struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
if (adapt->registrypriv.mp_mode == 0) {
if ((!bagg_pkt) && (urb_zero_packet_chk(adapt, sz) == 0)) {
ptxdesc = (struct tx_desc *)(pmem + PACKET_OFFSET_SZ);
pull = 1;
}
}
memset(ptxdesc, 0, sizeof(struct tx_desc));
/* 4 offset 0 */
@ -188,13 +172,6 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bag
if (is_multicast_ether_addr(pattrib->ra))
ptxdesc->txdw0 |= cpu_to_le32(BMC);
if (adapt->registrypriv.mp_mode == 0) {
if (!bagg_pkt) {
if ((pull) && (pxmitframe->pkt_offset > 0))
pxmitframe->pkt_offset = pxmitframe->pkt_offset - 1;
}
}
/* pkt_offset, unit:8 bytes padding */
if (pxmitframe->pkt_offset > 0)
ptxdesc->txdw1 |= cpu_to_le32((pxmitframe->pkt_offset << 26) & 0x7c000000);
@ -289,9 +266,6 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bag
ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate));
} else if ((pxmitframe->frame_tag & 0x0f) == TXAGG_FRAMETAG) {
DBG_88E("pxmitframe->frame_tag == TXAGG_FRAMETAG\n");
} else if (((pxmitframe->frame_tag & 0x0f) == MP_FRAMETAG) &&
(adapt->registrypriv.mp_mode == 1)) {
fill_txdesc_for_mp(adapt, ptxdesc);
} else {
DBG_88E("pxmitframe->frame_tag = %d\n", pxmitframe->frame_tag);
@ -437,30 +411,26 @@ s32 rtl8188eu_xmitframe_complete(struct adapter *adapt, struct xmit_priv *pxmitp
}
/* 3 1. pick up first frame */
do {
rtw_free_xmitframe(pxmitpriv, pxmitframe);
rtw_free_xmitframe(pxmitpriv, pxmitframe);
pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry);
if (!pxmitframe) {
/* no more xmit frame, release xmit buffer */
rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
return false;
}
pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry);
if (!pxmitframe) {
/* no more xmit frame, release xmit buffer */
rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
return false;
}
pxmitframe->pxmitbuf = pxmitbuf;
pxmitframe->buf_addr = pxmitbuf->pbuf;
pxmitbuf->priv_data = pxmitframe;
pxmitframe->pxmitbuf = pxmitbuf;
pxmitframe->buf_addr = pxmitbuf->pbuf;
pxmitbuf->priv_data = pxmitframe;
pxmitframe->agg_num = 1; /* alloc xmitframe should assign to 1. */
pxmitframe->pkt_offset = 1; /* first frame of aggregation, reserve offset */
pxmitframe->agg_num = 1; /* alloc xmitframe should assign to 1. */
pxmitframe->pkt_offset = 1; /* first frame of aggregation, reserve offset */
rtw_xmitframe_coalesce(adapt, pxmitframe->pkt, pxmitframe);
rtw_xmitframe_coalesce(adapt, pxmitframe->pkt, pxmitframe);
/* always return ndis_packet after rtw_xmitframe_coalesce */
rtw_os_xmit_complete(adapt, pxmitframe);
break;
} while (1);
/* always return ndis_packet after rtw_xmitframe_coalesce */
rtw_os_xmit_complete(adapt, pxmitframe);
/* 3 2. aggregate same priority and same DA(AP or STA) frames */
pfirstframe = pxmitframe;

324
drivers/staging/r8188eu/hal/usb_halinit.c
View File

@ -60,7 +60,7 @@ static bool HalUsbSetQueuePipeMapping8188EUsb(struct adapter *adapt, u8 NumInPip
return result;
}
static void rtl8188eu_interface_configure(struct adapter *adapt)
void rtl8188eu_interface_configure(struct adapter *adapt)
{
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(adapt);
@ -85,7 +85,7 @@ static void rtl8188eu_interface_configure(struct adapter *adapt)
pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes);
}
static u32 rtl8188eu_InitPowerOn(struct adapter *adapt)
u32 rtl8188eu_InitPowerOn(struct adapter *adapt)
{
u16 value16;
/* HW Power on sequence */
@ -119,18 +119,15 @@ static void _InitInterrupt(struct adapter *Adapter)
{
u32 imr, imr_ex;
u8 usb_opt;
struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
/* HISR write one to clear */
rtw_write32(Adapter, REG_HISR_88E, 0xFFFFFFFF);
/* HIMR - */
imr = IMR_PSTIMEOUT_88E | IMR_TBDER_88E | IMR_CPWM_88E | IMR_CPWM2_88E;
rtw_write32(Adapter, REG_HIMR_88E, imr);
haldata->IntrMask[0] = imr;
imr_ex = IMR_TXERR_88E | IMR_RXERR_88E | IMR_TXFOVW_88E | IMR_RXFOVW_88E;
rtw_write32(Adapter, REG_HIMRE_88E, imr_ex);
haldata->IntrMask[1] = imr_ex;
/* REG_USB_SPECIAL_OPTION - BIT(4) */
/* 0; Use interrupt endpoint to upload interrupt pkt */
@ -403,22 +400,6 @@ static void _InitEDCA(struct adapter *Adapter)
rtw_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226);
}
static void _InitBeaconMaxError(struct adapter *Adapter, bool InfraMode)
{
}
static void _InitHWLed(struct adapter *Adapter)
{
struct led_priv *pledpriv = &Adapter->ledpriv;
if (pledpriv->LedStrategy != HW_LED)
return;
/* HW led control */
/* to do .... */
/* must consider cases of antenna diversity/ commbo card/solo card/mini card */
}
static void _InitRDGSetting(struct adapter *Adapter)
{
rtw_write8(Adapter, REG_RD_CTRL, 0xFF);
@ -426,12 +407,6 @@ static void _InitRDGSetting(struct adapter *Adapter)
rtw_write8(Adapter, REG_RD_RESP_PKT_TH, 0x05);
}
static void _InitRxSetting(struct adapter *Adapter)
{
rtw_write32(Adapter, REG_MACID, 0x87654321);
rtw_write32(Adapter, 0x0700, 0x87654321);
}
static void _InitRetryFunction(struct adapter *Adapter)
{
u8 value8;
@ -546,26 +521,6 @@ usb_AggSettingRxUpdate(
/* TODO: */
break;
}
switch (PBP_128) {
case PBP_128:
haldata->HwRxPageSize = 128;
break;
case PBP_64:
haldata->HwRxPageSize = 64;
break;
case PBP_256:
haldata->HwRxPageSize = 256;
break;
case PBP_512:
haldata->HwRxPageSize = 512;
break;
case PBP_1024:
haldata->HwRxPageSize = 1024;
break;
default:
break;
}
} /* usb_AggSettingRxUpdate */
static void InitUsbAggregationSetting(struct adapter *Adapter)
@ -601,8 +556,6 @@ static void _InitBeaconParameters(struct adapter *Adapter)
/* beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 */
rtw_write16(Adapter, REG_BCNTCFG, 0x660F);
haldata->RegBcnCtrlVal = rtw_read8(Adapter, REG_BCN_CTRL);
haldata->RegTxPause = rtw_read8(Adapter, REG_TXPAUSE);
haldata->RegFwHwTxQCtrl = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL + 2);
haldata->RegReg542 = rtw_read8(Adapter, REG_TBTT_PROHIBIT + 2);
haldata->RegCR_1 = rtw_read8(Adapter, REG_CR + 1);
@ -646,40 +599,7 @@ static void _InitAntenna_Selection(struct adapter *Adapter)
DBG_88E("%s,Cur_ant:(%x)%s\n", __func__, haldata->CurAntenna, (haldata->CurAntenna == Antenna_A) ? "Antenna_A" : "Antenna_B");
}
/*-----------------------------------------------------------------------------
* Function: HwSuspendModeEnable92Cu()
*
* Overview: HW suspend mode switch.
*
* Input: NONE
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 08/23/2010 MHC HW suspend mode switch test..
*---------------------------------------------------------------------------*/
enum rt_rf_power_state RfOnOffDetect(struct adapter *adapt)
{
u8 val8;
enum rt_rf_power_state rfpowerstate = rf_off;
if (adapt->pwrctrlpriv.bHWPowerdown) {
val8 = rtw_read8(adapt, REG_HSISR);
DBG_88E("pwrdown, 0x5c(BIT(7))=%02x\n", val8);
rfpowerstate = (val8 & BIT(7)) ? rf_off : rf_on;
} else { /* rf on/off */
rtw_write8(adapt, REG_MAC_PINMUX_CFG, rtw_read8(adapt, REG_MAC_PINMUX_CFG) & ~(BIT(3)));
val8 = rtw_read8(adapt, REG_GPIO_IO_SEL);
DBG_88E("GPIO_IN=%02x\n", val8);
rfpowerstate = (val8 & BIT(3)) ? rf_on : rf_off;
}
return rfpowerstate;
} /* HalDetectPwrDownMode */
static u32 rtl8188eu_hal_init(struct adapter *Adapter)
u32 rtl8188eu_hal_init(struct adapter *Adapter)
{
u8 value8 = 0;
u16 value16;
@ -742,22 +662,16 @@ static u32 rtl8188eu_hal_init(struct adapter *Adapter)
_InitTxBufferBoundary(Adapter, 0);
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW);
if (Adapter->registrypriv.mp_mode == 1) {
_InitRxSetting(Adapter);
status = rtl8188e_FirmwareDownload(Adapter);
if (status != _SUCCESS) {
DBG_88E("%s: Download Firmware failed!!\n", __func__);
Adapter->bFWReady = false;
haldata->fw_ractrl = false;
return status;
} else {
status = rtl8188e_FirmwareDownload(Adapter);
if (status != _SUCCESS) {
DBG_88E("%s: Download Firmware failed!!\n", __func__);
Adapter->bFWReady = false;
haldata->fw_ractrl = false;
return status;
} else {
Adapter->bFWReady = true;
haldata->fw_ractrl = false;
}
Adapter->bFWReady = true;
haldata->fw_ractrl = false;
}
rtl8188e_InitializeFirmwareVars(Adapter);
@ -819,7 +733,6 @@ static u32 rtl8188eu_hal_init(struct adapter *Adapter)
InitUsbAggregationSetting(Adapter);
_InitOperationMode(Adapter);/* todo */
_InitBeaconParameters(Adapter);
_InitBeaconMaxError(Adapter, true);
/* */
/* Init CR MACTXEN, MACRXEN after setting RxFF boundary REG_TRXFF_BNDY to patch */
@ -847,8 +760,6 @@ static u32 rtl8188eu_hal_init(struct adapter *Adapter)
rtw_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400); /* unit: 256us. 256ms */
rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400); /* unit: 256us. 256ms */
_InitHWLed(Adapter);
/* Keep RfRegChnlVal for later use. */
haldata->RfRegChnlVal[0] = PHY_QueryRFReg(Adapter, (enum rf_radio_path)0, RF_CHNLBW, bRFRegOffsetMask);
haldata->RfRegChnlVal[1] = PHY_QueryRFReg(Adapter, (enum rf_radio_path)1, RF_CHNLBW, bRFRegOffsetMask);
@ -887,48 +798,43 @@ static u32 rtl8188eu_hal_init(struct adapter *Adapter)
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM);
rtl8188e_InitHalDm(Adapter);
if (Adapter->registrypriv.mp_mode == 1) {
Adapter->mppriv.channel = haldata->CurrentChannel;
MPT_InitializeAdapter(Adapter, Adapter->mppriv.channel);
} else {
/* 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status */
/* and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not */
/* call initstruct adapter. May cause some problem?? */
/* Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed */
/* in MgntActSet_RF_State() after wake up, because the value of haldata->eRFPowerState */
/* is the same as eRfOff, we should change it to eRfOn after we config RF parameters. */
/* Added by tynli. 2010.03.30. */
pwrctrlpriv->rf_pwrstate = rf_on;
/* 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status */
/* and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not */
/* call initstruct adapter. May cause some problem?? */
/* Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed */
/* in MgntActSet_RF_State() after wake up, because the value of haldata->eRFPowerState */
/* is the same as eRfOff, we should change it to eRfOn after we config RF parameters. */
/* Added by tynli. 2010.03.30. */
pwrctrlpriv->rf_pwrstate = rf_on;
/* enable Tx report. */
rtw_write8(Adapter, REG_FWHW_TXQ_CTRL + 1, 0x0F);
/* enable Tx report. */
rtw_write8(Adapter, REG_FWHW_TXQ_CTRL + 1, 0x0F);
/* Suggested by SD1 pisa. Added by tynli. 2011.10.21. */
rtw_write8(Adapter, REG_EARLY_MODE_CONTROL + 3, 0x01);/* Pretx_en, for WEP/TKIP SEC */
/* Suggested by SD1 pisa. Added by tynli. 2011.10.21. */
rtw_write8(Adapter, REG_EARLY_MODE_CONTROL + 3, 0x01);/* Pretx_en, for WEP/TKIP SEC */
/* tynli_test_tx_report. */
rtw_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0);
/* tynli_test_tx_report. */
rtw_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0);
/* enable tx DMA to drop the redundate data of packet */
rtw_write16(Adapter, REG_TXDMA_OFFSET_CHK, (rtw_read16(Adapter, REG_TXDMA_OFFSET_CHK) | DROP_DATA_EN));
/* enable tx DMA to drop the redundate data of packet */
rtw_write16(Adapter, REG_TXDMA_OFFSET_CHK, (rtw_read16(Adapter, REG_TXDMA_OFFSET_CHK) | DROP_DATA_EN));
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK);
/* 2010/08/26 MH Merge from 8192CE. */
if (pwrctrlpriv->rf_pwrstate == rf_on) {
if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) {
PHY_IQCalibrate_8188E(Adapter, true);
} else {
PHY_IQCalibrate_8188E(Adapter, false);
haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true;
}
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK);
ODM_TXPowerTrackingCheck(&haldata->odmpriv);
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK);
PHY_LCCalibrate_8188E(Adapter);
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK);
/* 2010/08/26 MH Merge from 8192CE. */
if (pwrctrlpriv->rf_pwrstate == rf_on) {
if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) {
PHY_IQCalibrate_8188E(Adapter, true);
} else {
PHY_IQCalibrate_8188E(Adapter, false);
haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true;
}
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK);
ODM_TXPowerTrackingCheck(&haldata->odmpriv);
HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK);
PHY_LCCalibrate_8188E(Adapter);
}
/* HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PABIAS); */
@ -1013,17 +919,8 @@ static void CardDisableRTL8188EU(struct adapter *Adapter)
haldata->bMacPwrCtrlOn = false;
Adapter->bFWReady = false;
}
static void rtl8192cu_hw_power_down(struct adapter *adapt)
{
/* 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. */
/* Then enable power down control bit of register 0x04 BIT(4) and BIT(15) as 1. */
/* Enable register area 0x0-0xc. */
rtw_write8(adapt, REG_RSV_CTRL, 0x0);
rtw_write16(adapt, REG_APS_FSMCO, 0x8812);
}
static u32 rtl8188eu_hal_deinit(struct adapter *Adapter)
u32 rtl8188eu_hal_deinit(struct adapter *Adapter)
{
DBG_88E("==> %s\n", __func__);
@ -1034,29 +931,20 @@ static u32 rtl8188eu_hal_deinit(struct adapter *Adapter)
DBG_88E("bkeepfwalive(%x)\n", Adapter->pwrctrlpriv.bkeepfwalive);
if (Adapter->pwrctrlpriv.bkeepfwalive) {
_ps_close_RF(Adapter);
if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown))
rtl8192cu_hw_power_down(Adapter);
} else {
if (Adapter->hw_init_completed) {
CardDisableRTL8188EU(Adapter);
if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown))
rtl8192cu_hw_power_down(Adapter);
}
}
return _SUCCESS;
}
static unsigned int rtl8188eu_inirp_init(struct adapter *Adapter)
unsigned int rtl8188eu_inirp_init(struct adapter *Adapter)
{
u8 i;
struct recv_buf *precvbuf;
uint status;
struct intf_hdl *pintfhdl = &Adapter->iopriv.intf;
struct recv_priv *precvpriv = &Adapter->recvpriv;
u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
_read_port = pintfhdl->io_ops._read_port;
status = _SUCCESS;
@ -1065,7 +953,7 @@ static unsigned int rtl8188eu_inirp_init(struct adapter *Adapter)
/* issue Rx irp to receive data */
precvbuf = (struct recv_buf *)precvpriv->precv_buf;
for (i = 0; i < NR_RECVBUFF; i++) {
if (!_read_port(pintfhdl, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf)) {
if (!rtw_read_port(Adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf)) {
status = _FAIL;
goto exit;
}
@ -1078,13 +966,6 @@ exit:
return status;
}
static unsigned int rtl8188eu_inirp_deinit(struct adapter *Adapter)
{
rtw_read_port_cancel(Adapter);
return _SUCCESS;
}
/* */
/* */
/* EEPROM/EFUSE Content Parsing */
@ -1096,7 +977,6 @@ static void _ReadLEDSetting(struct adapter *Adapter, u8 *PROMContent, bool Autol
struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
pledpriv->bRegUseLed = true;
pledpriv->LedStrategy = SW_LED_MODE1;
haldata->bLedOpenDrain = true;/* Support Open-drain arrangement for controlling the LED. */
}
@ -1129,7 +1009,7 @@ static void Hal_EfuseParseMACAddr_8188EU(struct adapter *adapt, u8 *hwinfo, bool
{
u16 i;
u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x88, 0x02};
struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt);
struct eeprom_priv *eeprom = &adapt->eeprompriv;
if (AutoLoadFail) {
for (i = 0; i < 6; i++)
@ -1140,16 +1020,12 @@ static void Hal_EfuseParseMACAddr_8188EU(struct adapter *adapt, u8 *hwinfo, bool
}
}
static void Hal_CustomizeByCustomerID_8188EU(struct adapter *adapt)
{
}
static void
readAdapterInfo_8188EU(
struct adapter *adapt
)
{
struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt);
struct eeprom_priv *eeprom = &adapt->eeprompriv;
/* parse the eeprom/efuse content */
Hal_EfuseParseIDCode88E(adapt, eeprom->efuse_eeprom_data);
@ -1166,12 +1042,6 @@ readAdapterInfo_8188EU(
Hal_EfuseParseBoardType88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
Hal_ReadThermalMeter_88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
/* */
/* The following part initialize some vars by PG info. */
/* */
Hal_InitChannelPlan(adapt);
Hal_CustomizeByCustomerID_8188EU(adapt);
_ReadLEDSetting(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
}
@ -1179,7 +1049,7 @@ static void _ReadPROMContent(
struct adapter *Adapter
)
{
struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(Adapter);
struct eeprom_priv *eeprom = &Adapter->eeprompriv;
u8 eeValue;
/* check system boot selection */
@ -1203,19 +1073,13 @@ static void _ReadRFType(struct adapter *Adapter)
static int _ReadAdapterInfo8188EU(struct adapter *Adapter)
{
u32 start = jiffies;
MSG_88E("====> %s\n", __func__);
_ReadRFType(Adapter);/* rf_chip -> _InitRFType() */
_ReadPROMContent(Adapter);
MSG_88E("<==== %s in %d ms\n", __func__, rtw_get_passing_time_ms(start));
return _SUCCESS;
}
static void ReadAdapterInfo8188EU(struct adapter *Adapter)
void ReadAdapterInfo8188EU(struct adapter *Adapter)
{
/* Read EEPROM size before call any EEPROM function */
Adapter->EepromAddressSize = GetEEPROMSize8188E(Adapter);
@ -1223,11 +1087,6 @@ static void ReadAdapterInfo8188EU(struct adapter *Adapter)
_ReadAdapterInfo8188EU(Adapter);
}
#define GPIO_DEBUG_PORT_NUM 0
static void rtl8192cu_trigger_gpio_0(struct adapter *adapt)
{
}
static void ResumeTxBeacon(struct adapter *adapt)
{
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
@ -1349,7 +1208,7 @@ static void hw_var_set_bcn_func(struct adapter *Adapter, u8 variable, u8 *val)
rtw_write8(Adapter, bcn_ctrl_reg, rtw_read8(Adapter, bcn_ctrl_reg) & (~(EN_BCN_FUNCTION | EN_TXBCN_RPT)));
}
static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
{
struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &haldata->dmpriv;
@ -1532,7 +1391,7 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
}
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE))
RetryLimit = (haldata->CustomerID == RT_CID_CCX) ? 7 : 48;
RetryLimit = 48;
else /* Ad-hoc Mode */
RetryLimit = 0x7;
} else if (type == 1) {
@ -1610,7 +1469,6 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
break;
case HW_VAR_DM_FUNC_SET:
if (*((u32 *)val) == DYNAMIC_ALL_FUNC_ENABLE) {
pdmpriv->DMFlag = pdmpriv->InitDMFlag;
podmpriv->SupportAbility = pdmpriv->InitODMFlag;
} else {
podmpriv->SupportAbility |= *((u32 *)val);
@ -1757,15 +1615,13 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold);
}
break;
case HW_VAR_SET_RPWM:
break;
case HW_VAR_H2C_FW_PWRMODE:
{
u8 psmode = (*(u8 *)val);
/* Forece leave RF low power mode for 1T1R to prevent conficting setting in Fw power */
/* saving sequence. 2010.06.07. Added by tynli. Suggested by SD3 yschang. */
if ((psmode != PS_MODE_ACTIVE) && (!IS_92C_SERIAL(haldata->VersionID)))
if (psmode != PS_MODE_ACTIVE)
ODM_RF_Saving(podmpriv, true);
rtl8188e_set_FwPwrMode_cmd(Adapter, psmode);
}
@ -1776,14 +1632,12 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
rtl8188e_set_FwJoinBssReport_cmd(Adapter, mstatus);
}
break;
#ifdef CONFIG_88EU_P2P
case HW_VAR_H2C_FW_P2P_PS_OFFLOAD:
{
u8 p2p_ps_state = (*(u8 *)val);
rtl8188e_set_p2p_ps_offload_cmd(Adapter, p2p_ps_state);
}
break;
#endif
case HW_VAR_INITIAL_GAIN:
{
struct rtw_dig *pDigTable = &podmpriv->DM_DigTable;
@ -1797,9 +1651,6 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
}
}
break;
case HW_VAR_TRIGGER_GPIO_0:
rtl8192cu_trigger_gpio_0(Adapter);
break;
case HW_VAR_RPT_TIMER_SETTING:
{
u16 min_rpt_time = (*(u16 *)val);
@ -1850,8 +1701,6 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
}
}
break;
case HW_VAR_CHECK_TXBUF:
break;
case HW_VAR_APFM_ON_MAC:
haldata->bMacPwrCtrlOn = *val;
DBG_88E("%s: bMacPwrCtrlOn=%d\n", __func__, haldata->bMacPwrCtrlOn);
@ -1876,7 +1725,7 @@ static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
}
static void GetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
void GetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
{
struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
struct odm_dm_struct *podmpriv = &haldata->odmpriv;
@ -1934,16 +1783,8 @@ static void GetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
}
/* */
/* Description: */
/* Query setting of specified variable. */
/* */
static u8
GetHalDefVar8188EUsb(
struct adapter *Adapter,
enum hal_def_variable eVariable,
void *pValue
)
/* Query setting of specified variable. */
u8 GetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue)
{
struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
u8 bResult = _SUCCESS;
@ -2027,11 +1868,8 @@ GetHalDefVar8188EUsb(
return bResult;
}
/* */
/* Description: */
/* Change default setting of specified variable. */
/* */
static u8 SetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue)
/* Change default setting of specified variable. */
u8 SetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue)
{
struct hal_data_8188e *haldata = GET_HAL_DATA(Adapter);
u8 bResult = _SUCCESS;
@ -2079,7 +1917,7 @@ static u8 SetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eV
return bResult;
}
static void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level)
void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level)
{
u8 init_rate = 0;
u8 networkType, raid;
@ -2162,7 +2000,7 @@ static void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_l
psta->init_rate = init_rate;
}
static void SetBeaconRelatedRegisters8188EUsb(struct adapter *adapt)
void SetBeaconRelatedRegisters8188EUsb(struct adapter *adapt)
{
u32 value32;
struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
@ -2196,7 +2034,7 @@ static void SetBeaconRelatedRegisters8188EUsb(struct adapter *adapt)
rtw_write8(adapt, bcn_ctrl_reg, rtw_read8(adapt, bcn_ctrl_reg) | BIT(1));
}
static void rtl8188eu_init_default_value(struct adapter *adapt)
void rtl8188eu_init_default_value(struct adapter *adapt)
{
struct hal_data_8188e *haldata;
struct pwrctrl_priv *pwrctrlpriv;
@ -2220,52 +2058,10 @@ static void rtl8188eu_init_default_value(struct adapter *adapt)
haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP[i] = 0;
}
static u8 rtl8188eu_ps_func(struct adapter *Adapter, enum hal_intf_ps_func efunc_id, u8 *val)
void rtl8188eu_alloc_haldata(struct adapter *adapt)
{
u8 bResult = true;
return bResult;
}
void rtl8188eu_set_hal_ops(struct adapter *adapt)
{
struct hal_ops *halfunc = &adapt->HalFunc;
adapt->HalData = kzalloc(sizeof(struct hal_data_8188e), GFP_KERNEL);
if (!adapt->HalData)
DBG_88E("cant not alloc memory for HAL DATA\n");
adapt->hal_data_sz = sizeof(struct hal_data_8188e);
halfunc->hal_power_on = rtl8188eu_InitPowerOn;
halfunc->hal_init = &rtl8188eu_hal_init;
halfunc->hal_deinit = &rtl8188eu_hal_deinit;
halfunc->inirp_init = &rtl8188eu_inirp_init;
halfunc->inirp_deinit = &rtl8188eu_inirp_deinit;
halfunc->init_xmit_priv = &rtl8188eu_init_xmit_priv;
halfunc->init_recv_priv = &rtl8188eu_init_recv_priv;
halfunc->free_recv_priv = &rtl8188eu_free_recv_priv;
halfunc->InitSwLeds = &rtl8188eu_InitSwLeds;
halfunc->DeInitSwLeds = &rtl8188eu_DeInitSwLeds;
halfunc->init_default_value = &rtl8188eu_init_default_value;
halfunc->intf_chip_configure = &rtl8188eu_interface_configure;
halfunc->read_adapter_info = &ReadAdapterInfo8188EU;
halfunc->SetHwRegHandler = &SetHwReg8188EU;
halfunc->GetHwRegHandler = &GetHwReg8188EU;
halfunc->GetHalDefVarHandler = &GetHalDefVar8188EUsb;
halfunc->SetHalDefVarHandler = &SetHalDefVar8188EUsb;
halfunc->UpdateRAMaskHandler = &UpdateHalRAMask8188EUsb;
halfunc->SetBeaconRelatedRegistersHandler = &SetBeaconRelatedRegisters8188EUsb;
halfunc->hal_xmit = &rtl8188eu_hal_xmit;
halfunc->mgnt_xmit = &rtl8188eu_mgnt_xmit;
halfunc->interface_ps_func = &rtl8188eu_ps_func;
rtl8188e_set_hal_ops(halfunc);
}

266
drivers/staging/r8188eu/hal/usb_ops_linux.c
View File

@ -8,159 +8,179 @@
#include "../include/recv_osdep.h"
#include "../include/rtl8188e_hal.h"
static int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u16 value, void *pdata, u16 len, u8 requesttype)
static int usb_read(struct intf_hdl *intf, u16 value, void *data, u8 size)
{
struct adapter *adapt = pintfhdl->padapter;
struct dvobj_priv *dvobjpriv = adapter_to_dvobj(adapt);
struct adapter *adapt = intf->padapter;
struct dvobj_priv *dvobjpriv = adapter_to_dvobj(adapt);
struct usb_device *udev = dvobjpriv->pusbdev;
unsigned int pipe;
int status = 0;
u8 *pIo_buf;
int vendorreq_times = 0;
int status;
u8 io_buf[4];
if ((adapt->bSurpriseRemoved) || (adapt->pwrctrlpriv.pnp_bstop_trx)) {
status = -EPERM;
goto exit;
if (adapt->bSurpriseRemoved || adapt->pwrctrlpriv.pnp_bstop_trx)
return -EPERM;
status = usb_control_msg_recv(udev, 0, REALTEK_USB_VENQT_CMD_REQ,
REALTEK_USB_VENQT_READ, value,
REALTEK_USB_VENQT_CMD_IDX, io_buf,
size, RTW_USB_CONTROL_MSG_TIMEOUT,
GFP_KERNEL);
if (status == -ESHUTDOWN ||
status == -ENODEV ||
status == -ENOENT) {
/*
* device or controller has been disabled due to
* some problem that could not be worked around,
* device or bus doesn’t exist, endpoint does not
* exist or is not enabled.
*/
adapt->bSurpriseRemoved = true;
return status;
}
if (len > MAX_VENDOR_REQ_CMD_SIZE) {
DBG_88E("[%s] Buffer len error ,vendor request failed\n", __func__);
status = -EINVAL;
goto exit;
if (status < 0) {
if (rtw_inc_and_chk_continual_urb_error(dvobjpriv))
adapt->bSurpriseRemoved = true;
return status;
}
_enter_critical_mutex(&dvobjpriv->usb_vendor_req_mutex, NULL);
rtw_reset_continual_urb_error(dvobjpriv);
memcpy(data, io_buf, size);
/* Acquire IO memory for vendorreq */
pIo_buf = dvobjpriv->usb_vendor_req_buf;
if (!pIo_buf) {
DBG_88E("[%s] pIo_buf == NULL\n", __func__);
status = -ENOMEM;
goto release_mutex;
}
if (requesttype == REALTEK_USB_VENQT_READ)
pipe = usb_rcvctrlpipe(udev, 0);/* read_in */
else
pipe = usb_sndctrlpipe(udev, 0);/* write_out */
while (++vendorreq_times <= MAX_USBCTRL_VENDORREQ_TIMES) {
if (requesttype == REALTEK_USB_VENQT_READ)
memset(pIo_buf, 0, len);
else
memcpy(pIo_buf, pdata, len);
status = usb_control_msg(udev, pipe, REALTEK_USB_VENQT_CMD_REQ,
requesttype, value, REALTEK_USB_VENQT_CMD_IDX,
pIo_buf, len, RTW_USB_CONTROL_MSG_TIMEOUT);
if (status == len) { /* Success this control transfer. */
rtw_reset_continual_urb_error(dvobjpriv);
if (requesttype == REALTEK_USB_VENQT_READ)
memcpy(pdata, pIo_buf, len);
} else { /* error cases */
DBG_88E("reg 0x%x, usb %s %u fail, status:%d value=0x%x, vendorreq_times:%d\n",
value, (requesttype == REALTEK_USB_VENQT_READ) ? "read" : "write",
len, status, *(u32 *)pdata, vendorreq_times);
if (status < 0) {
if (status == (-ESHUTDOWN) || status == -ENODEV) {
adapt->bSurpriseRemoved = true;
} else {
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
haldata->srestpriv.wifi_error_status = USB_VEN_REQ_CMD_FAIL;
}
} else { /* status != len && status >= 0 */
if (status > 0) {
if (requesttype == REALTEK_USB_VENQT_READ) {
/* For Control read transfer, we have to copy the read data from pIo_buf to pdata. */
memcpy(pdata, pIo_buf, len);
}
}
}
if (rtw_inc_and_chk_continual_urb_error(dvobjpriv)) {
adapt->bSurpriseRemoved = true;
break;
}
}
/* firmware download is checksumed, don't retry */
if ((value >= FW_8188E_START_ADDRESS && value <= FW_8188E_END_ADDRESS) || status == len)
break;
}
release_mutex:
_exit_critical_mutex(&dvobjpriv->usb_vendor_req_mutex, NULL);
exit:
return status;
}
static u8 usb_read8(struct intf_hdl *pintfhdl, u32 addr)
static int usb_write(struct intf_hdl *intf, u16 value, void *data, u8 size)
{
u16 wvalue = (u16)(addr & 0x0000ffff);
struct adapter *adapt = intf->padapter;
struct dvobj_priv *dvobjpriv = adapter_to_dvobj(adapt);
struct usb_device *udev = dvobjpriv->pusbdev;
int status;
u8 io_buf[VENDOR_CMD_MAX_DATA_LEN];
if (adapt->bSurpriseRemoved || adapt->pwrctrlpriv.pnp_bstop_trx)
return -EPERM;
memcpy(io_buf, data, size);
status = usb_control_msg_send(udev, 0, REALTEK_USB_VENQT_CMD_REQ,
REALTEK_USB_VENQT_WRITE, value,
REALTEK_USB_VENQT_CMD_IDX, io_buf,
size, RTW_USB_CONTROL_MSG_TIMEOUT,
GFP_KERNEL);
if (status == -ESHUTDOWN ||
status == -ENODEV ||
status == -ENOENT) {
/*
* device or controller has been disabled due to
* some problem that could not be worked around,
* device or bus doesn’t exist, endpoint does not
* exist or is not enabled.
*/
adapt->bSurpriseRemoved = true;
return status;
}
if (status < 0) {
if (rtw_inc_and_chk_continual_urb_error(dvobjpriv))
adapt->bSurpriseRemoved = true;
return status;
}
rtw_reset_continual_urb_error(dvobjpriv);
return status;
}
u8 rtw_read8(struct adapter *adapter, u32 addr)
{
struct io_priv *io_priv = &adapter->iopriv;
struct intf_hdl *intf = &io_priv->intf;
u16 value = addr & 0xffff;
u8 data;
usbctrl_vendorreq(pintfhdl, wvalue, &data, 1, REALTEK_USB_VENQT_READ);
usb_read(intf, value, &data, 1);
return data;
}
static u16 usb_read16(struct intf_hdl *pintfhdl, u32 addr)
u16 rtw_read16(struct adapter *adapter, u32 addr)
{
u16 wvalue = (u16)(addr & 0x0000ffff);
__le32 data;
struct io_priv *io_priv = &adapter->iopriv;
struct intf_hdl *intf = &io_priv->intf;
u16 value = addr & 0xffff;
__le16 data;
usbctrl_vendorreq(pintfhdl, wvalue, &data, 2, REALTEK_USB_VENQT_READ);
usb_read(intf, value, &data, 2);
return (u16)(le32_to_cpu(data) & 0xffff);
return le16_to_cpu(data);
}
static u32 usb_read32(struct intf_hdl *pintfhdl, u32 addr)
u32 rtw_read32(struct adapter *adapter, u32 addr)
{
u16 wvalue = (u16)(addr & 0x0000ffff);
struct io_priv *io_priv = &adapter->iopriv;
struct intf_hdl *intf = &io_priv->intf;
u16 value = addr & 0xffff;
__le32 data;
usbctrl_vendorreq(pintfhdl, wvalue, &data, 4, REALTEK_USB_VENQT_READ);
usb_read(intf, value, &data, 4);
return le32_to_cpu(data);
}
static int usb_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val)
int rtw_write8(struct adapter *adapter, u32 addr, u8 val)
{
u16 wvalue = (u16)(addr & 0x0000ffff);
struct io_priv *io_priv = &adapter->iopriv;
struct intf_hdl *intf = &io_priv->intf;
u16 value = addr & 0xffff;
int ret;
return usbctrl_vendorreq(pintfhdl, wvalue, &val, 1, REALTEK_USB_VENQT_WRITE);
ret = usb_write(intf, value, &val, 1);
return RTW_STATUS_CODE(ret);
}
static int usb_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val)
int rtw_write16(struct adapter *adapter, u32 addr, u16 val)
{
u16 wvalue = (u16)(addr & 0x0000ffff);
__le32 data = cpu_to_le32(val & 0x0000ffff);
struct io_priv *io_priv = &adapter->iopriv;
struct intf_hdl *intf = &io_priv->intf;
u16 value = addr & 0xffff;
__le16 data = cpu_to_le16(val);
int ret;
return usbctrl_vendorreq(pintfhdl, wvalue, &data, 2, REALTEK_USB_VENQT_WRITE);
ret = usb_write(intf, value, &data, 2);
return RTW_STATUS_CODE(ret);
}
static int usb_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val)
int rtw_write32(struct adapter *adapter, u32 addr, u32 val)
{
u16 wvalue = (u16)(addr & 0x0000ffff);
struct io_priv *io_priv = &adapter->iopriv;
struct intf_hdl *intf = &io_priv->intf;
u16 value = addr & 0xffff;
__le32 data = cpu_to_le32(val);
int ret;
return usbctrl_vendorreq(pintfhdl, wvalue, &data, 4, REALTEK_USB_VENQT_WRITE);
ret = usb_write(intf, value, &data, 4);
return RTW_STATUS_CODE(ret);
}
static int usb_writeN(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata)
int rtw_writeN(struct adapter *adapter, u32 addr, u32 length, u8 *data)
{
u16 wvalue = (u16)(addr & 0x0000ffff);
u8 buf[VENDOR_CMD_MAX_DATA_LEN] = {0};
struct io_priv *io_priv = &adapter->iopriv;
struct intf_hdl *intf = &io_priv->intf;
u16 value = addr & 0xffff;
int ret;
if (length > VENDOR_CMD_MAX_DATA_LEN)
return -EINVAL;
return _FAIL;
memcpy(buf, pdata, length);
ret = usb_write(intf, value, data, length);
return usbctrl_vendorreq(pintfhdl, wvalue, buf, (length & 0xffff), REALTEK_USB_VENQT_WRITE);
return RTW_STATUS_CODE(ret);
}
static void interrupt_handler_8188eu(struct adapter *adapt, u16 pkt_len, u8 *pbuf)
@ -415,10 +435,6 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
break;
case -EPROTO:
case -EOVERFLOW:
{
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
haldata->srestpriv.wifi_error_status = USB_READ_PORT_FAIL;
}
precvbuf->reuse = true;
rtw_read_port(adapt, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
break;
@ -431,11 +447,10 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
}
}
static u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
u32 rtw_read_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *rmem)
{
struct urb *purb = NULL;
struct recv_buf *precvbuf = (struct recv_buf *)rmem;
struct adapter *adapter = pintfhdl->padapter;
struct dvobj_priv *pdvobj = adapter_to_dvobj(adapter);
struct recv_priv *precvpriv = &adapter->recvpriv;
struct usb_device *pusbd = pdvobj->pusbdev;
@ -458,7 +473,7 @@ static u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
precvbuf->reuse = true;
}
rtl8188eu_init_recvbuf(adapter, precvbuf);
rtl8188eu_init_recvbuf(precvbuf);
/* re-assign for linux based on skb */
if (!precvbuf->reuse || !precvbuf->pskb) {
@ -533,30 +548,3 @@ void rtl8188eu_xmit_tasklet(unsigned long priv)
break;
}
}
void rtl8188eu_set_intf_ops(struct _io_ops *pops)
{
memset((u8 *)pops, 0, sizeof(struct _io_ops));
pops->_read8 = &usb_read8;
pops->_read16 = &usb_read16;
pops->_read32 = &usb_read32;
pops->_read_mem = &usb_read_mem;
pops->_read_port = &usb_read_port;
pops->_write8 = &usb_write8;
pops->_write16 = &usb_write16;
pops->_write32 = &usb_write32;
pops->_writeN = &usb_writeN;
pops->_write_mem = &usb_write_mem;
pops->_write_port = &usb_write_port;
pops->_read_port_cancel = &usb_read_port_cancel;
pops->_write_port_cancel = &usb_write_port_cancel;
}
void rtl8188eu_set_hw_type(struct adapter *adapt)
{
adapt->chip_type = RTL8188E;
adapt->HardwareType = HARDWARE_TYPE_RTL8188EU;
DBG_88E("CHIP TYPE: RTL8188E\n");
}

91
drivers/staging/r8188eu/include/Hal8188EPhyCfg.h
View File

@ -21,23 +21,6 @@
/*--------------------------Define Parameters-------------------------------*/
/*------------------------------Define structure----------------------------*/
enum sw_chnl_cmd_id {
CmdID_End,
CmdID_SetTxPowerLevel,
CmdID_BBRegWrite10,
CmdID_WritePortUlong,
CmdID_WritePortUshort,
CmdID_WritePortUchar,
CmdID_RF_WriteReg,
};
/* 1. Switch channel related */
struct sw_chnl_cmd {
enum sw_chnl_cmd_id CmdID;
u32 Para1;
u32 Para2;
u32 msDelay;
};
enum hw90_block {
HW90_BLOCK_MAC = 0,
@ -65,24 +48,6 @@ enum rf_radio_path {
* total three groups */
#define CHANNEL_GROUP_MAX_88E 6
enum wireless_mode {
WIRELESS_MODE_UNKNOWN = 0x00,
WIRELESS_MODE_B = BIT(0),
WIRELESS_MODE_G = BIT(1),
WIRELESS_MODE_AUTO = BIT(5),
WIRELESS_MODE_N_24G = BIT(3),
};
enum phy_rate_tx_offset_area {
RA_OFFSET_LEGACY_OFDM1,
RA_OFFSET_LEGACY_OFDM2,
RA_OFFSET_HT_OFDM1,
RA_OFFSET_HT_OFDM2,
RA_OFFSET_HT_OFDM3,
RA_OFFSET_HT_OFDM4,
RA_OFFSET_HT_CCK,
};
/* BB/RF related */
enum RF_TYPE_8190P {
RF_TYPE_MIN, /* 0 */
@ -141,24 +106,6 @@ struct bb_reg_def {
* Path A and B */
};
struct ant_sel_ofdm {
u32 r_tx_antenna:4;
u32 r_ant_l:4;
u32 r_ant_non_ht:4;
u32 r_ant_ht1:4;
u32 r_ant_ht2:4;
u32 r_ant_ht_s1:4;
u32 r_ant_non_ht_s1:4;
u32 OFDM_TXSC:2;
u32 reserved:2;
};
struct ant_sel_cck {
u8 r_cckrx_enable_2:2;
u8 r_cckrx_enable:2;
u8 r_ccktx_enable:4;
};
/*------------------------------Define structure----------------------------*/
/*------------------------Export global variable----------------------------*/
@ -185,21 +132,8 @@ int PHY_MACConfig8188E(struct adapter *adapter);
int PHY_BBConfig8188E(struct adapter *adapter);
int PHY_RFConfig8188E(struct adapter *adapter);
/* RF config */
int rtl8188e_PHY_ConfigRFWithParaFile(struct adapter *adapter, u8 *filename,
enum rf_radio_path rfpath);
int rtl8188e_PHY_ConfigRFWithHeaderFile(struct adapter *adapter,
enum rf_radio_path rfpath);
/* Read initi reg value for tx power setting. */
void rtl8192c_PHY_GetHWRegOriginalValue(struct adapter *adapter);
/* BB TX Power R/W */
void PHY_GetTxPowerLevel8188E(struct adapter *adapter, u32 *powerlevel);
void PHY_SetTxPowerLevel8188E(struct adapter *adapter, u8 channel);
bool PHY_UpdateTxPowerDbm8188E(struct adapter *adapter, int power);
void PHY_ScanOperationBackup8188E(struct adapter *Adapter, u8 Operation);
/* Switch bandwidth for 8192S */
void PHY_SetBWMode8188E(struct adapter *adapter,
@ -207,17 +141,6 @@ void PHY_SetBWMode8188E(struct adapter *adapter,
/* channel switch related funciton */
void PHY_SwChnl8188E(struct adapter *adapter, u8 channel);
/* Call after initialization */
void ChkFwCmdIoDone(struct adapter *adapter);
/* BB/MAC/RF other monitor API */
void PHY_SetRFPathSwitch_8188E(struct adapter *adapter, bool main);
void PHY_SwitchEphyParameter(struct adapter *adapter);
void PHY_EnableHostClkReq(struct adapter *adapter);
bool SetAntennaConfig92C(struct adapter *adapter, u8 defaultant);
void storePwrIndexDiffRateOffset(struct adapter *adapter, u32 regaddr,
u32 mask, u32 data);
@ -232,18 +155,4 @@ void storePwrIndexDiffRateOffset(struct adapter *adapter, u32 regaddr,
#define PHY_SetRFReg(adapt, rfpath, regaddr, bitmask, data) \
rtl8188e_PHY_SetRFReg((adapt), (rfpath), (regaddr), (bitmask), (data))
#define PHY_SetMacReg PHY_SetBBReg
#define SIC_HW_SUPPORT 0
#define SIC_MAX_POLL_CNT 5
#define SIC_CMD_READY 0
#define SIC_CMD_WRITE 1
#define SIC_CMD_READ 2
#define SIC_CMD_REG 0x1EB /* 1byte */
#define SIC_ADDR_REG 0x1E8 /* 1b9~1ba, 2 bytes */
#define SIC_DATA_REG 0x1EC /* 1bc~1bf */
#endif /* __INC_HAL8192CPHYCFG_H */

2
drivers/staging/r8188eu/include/Hal8188ERateAdaptive.h
View File

@ -37,8 +37,6 @@
LE_BITS_TO_1BYTE(__paddr + 6, 0, 8)
/* End rate adaptive define */
void ODM_RASupport_Init(struct odm_dm_struct *dm_odm);
int ODM_RAInfo_Init_all(struct odm_dm_struct *dm_odm);
int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u8 MacID);

16
drivers/staging/r8188eu/include/HalHWImg8188E_FW.h
View File

@ -1,16 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __INC_FW_8188E_HW_IMG_H
#define __INC_FW_8188E_HW_IMG_H
/******************************************************************************
* FW_AP.TXT
******************************************************************************/
/******************************************************************************
* FW_WoWLAN.TXT
******************************************************************************/
#define ArrayLength_8188E_FW_WoWLAN 15764
extern const u8 Array_8188E_FW_WoWLAN[ArrayLength_8188E_FW_WoWLAN];
#endif

70
drivers/staging/r8188eu/include/HalVerDef.h
View File

@ -3,20 +3,6 @@
#ifndef __HAL_VERSION_DEF_H__
#define __HAL_VERSION_DEF_H__
enum HAL_IC_TYPE {
CHIP_8192S = 0,
CHIP_8188C = 1,
CHIP_8192C = 2,
CHIP_8192D = 3,
CHIP_8723A = 4,
CHIP_8188E = 5,
CHIP_8881A = 6,
CHIP_8812A = 7,
CHIP_8821A = 8,
CHIP_8723B = 9,
CHIP_8192E = 10,
};
enum HAL_CHIP_TYPE {
TEST_CHIP = 0,
NORMAL_CHIP = 1,
@ -50,7 +36,6 @@ enum HAL_RF_TYPE {
};
struct HAL_VERSION {
enum HAL_IC_TYPE ICType;
enum HAL_CHIP_TYPE ChipType;
enum HAL_CUT_VERSION CUTVersion;
enum HAL_VENDOR VendorType;
@ -59,9 +44,7 @@ struct HAL_VERSION {
};
/* Get element */
#define GET_CVID_IC_TYPE(version) (((version).ICType))
#define GET_CVID_CHIP_TYPE(version) (((version).ChipType))
#define GET_CVID_RF_TYPE(version) (((version).RFType))
#define GET_CVID_MANUFACTUER(version) (((version).VendorType))
#define GET_CVID_CUT_VERSION(version) (((version).CUTVersion))
#define GET_CVID_ROM_VERSION(version) (((version).ROMVer) & ROM_VERSION_MASK)
@ -69,17 +52,6 @@ struct HAL_VERSION {
/* Common Macro. -- */
/* HAL_VERSION VersionID */
/* HAL_IC_TYPE_E */
#define IS_81XXC(version) \
(((GET_CVID_IC_TYPE(version) == CHIP_8192C) || \
(GET_CVID_IC_TYPE(version) == CHIP_8188C)) ? true : false)
#define IS_8723_SERIES(version) \
((GET_CVID_IC_TYPE(version) == CHIP_8723A) ? true : false)
#define IS_92D(version) \
((GET_CVID_IC_TYPE(version) == CHIP_8192D) ? true : false)
#define IS_8188E(version) \
((GET_CVID_IC_TYPE(version) == CHIP_8188E) ? true : false)
/* HAL_CHIP_TYPE_E */
#define IS_TEST_CHIP(version) \
((GET_CVID_CHIP_TYPE(version) == TEST_CHIP) ? true : false)
@ -104,46 +76,4 @@ struct HAL_VERSION {
#define IS_CHIP_VENDOR_UMC(version) \
((GET_CVID_MANUFACTUER(version) == CHIP_VENDOR_UMC) ? true : false)
/* HAL_RF_TYPE_E */
#define IS_1T1R(version) \
((GET_CVID_RF_TYPE(version) == RF_TYPE_1T1R) ? true : false)
#define IS_1T2R(version) \
((GET_CVID_RF_TYPE(version) == RF_TYPE_1T2R) ? true : false)
#define IS_2T2R(version) \
((GET_CVID_RF_TYPE(version) == RF_TYPE_2T2R) ? true : false)
/* Chip version Macro. -- */
#define IS_81XXC_TEST_CHIP(version) \
((IS_81XXC(version) && (!IS_NORMAL_CHIP(version))) ? true : false)
#define IS_92C_SERIAL(version) \
((IS_81XXC(version) && IS_2T2R(version)) ? true : false)
#define IS_81xxC_VENDOR_UMC_A_CUT(version) \
(IS_81XXC(version) ? (IS_CHIP_VENDOR_UMC(version) ? \
(IS_A_CUT(version) ? true : false) : false) : false)
#define IS_81xxC_VENDOR_UMC_B_CUT(version) \
(IS_81XXC(version) ? (IS_CHIP_VENDOR_UMC(version) ? \
(IS_B_CUT(version) ? true : false) : false) : false)
#define IS_81xxC_VENDOR_UMC_C_CUT(version) \
(IS_81XXC(version) ? (IS_CHIP_VENDOR_UMC(version) ? \
(IS_C_CUT(version) ? true : false) : false) : false)
#define IS_NORMAL_CHIP92D(version) \
((IS_92D(version)) ? \
((GET_CVID_CHIP_TYPE(version) == NORMAL_CHIP) ? true : false) : false)
#define IS_92D_SINGLEPHY(version) \
((IS_92D(version)) ? (IS_2T2R(version) ? true : false) : false)
#define IS_92D_C_CUT(version) \
((IS_92D(version)) ? (IS_C_CUT(version) ? true : false) : false)
#define IS_92D_D_CUT(version) \
((IS_92D(version)) ? (IS_D_CUT(version) ? true : false) : false)
#define IS_92D_E_CUT(version) \
((IS_92D(version)) ? (IS_E_CUT(version) ? true : false) : false)
#define IS_8723A_A_CUT(version) \
((IS_8723_SERIES(version)) ? (IS_A_CUT(version) ? true : false) : false)
#define IS_8723A_B_CUT(version) \
((IS_8723_SERIES(version)) ? (IS_B_CUT(version) ? true : false) : false)
#endif

37
drivers/staging/r8188eu/include/drv_types.h
View File

@ -11,8 +11,6 @@
#define __DRV_TYPES_H__
#define DRV_NAME "r8188eu"
#define CONFIG_88EU_AP_MODE 1
#define CONFIG_88EU_P2P 1
#include "osdep_service.h"
#include "wlan_bssdef.h"
@ -35,24 +33,10 @@
#include "rtw_mlme_ext.h"
#include "rtw_p2p.h"
#include "rtw_ap.h"
#include "rtw_mp.h"
#include "rtw_br_ext.h"
#define DRIVERVERSION "v4.1.4_6773.20130222"
#define SPEC_DEV_ID_NONE BIT(0)
#define SPEC_DEV_ID_DISABLE_HT BIT(1)
#define SPEC_DEV_ID_ENABLE_PS BIT(2)
#define SPEC_DEV_ID_RF_CONFIG_1T1R BIT(3)
#define SPEC_DEV_ID_RF_CONFIG_2T2R BIT(4)
#define SPEC_DEV_ID_ASSIGN_IFNAME BIT(5)
struct specific_device_id {
u32 flags;
u16 idVendor;
u16 idProduct;
};
struct registry_priv {
u8 chip_version;
u8 rfintfs;
@ -78,7 +62,6 @@ struct registry_priv {
u8 short_retry_lmt;
u16 busy_thresh;
u8 ack_policy;
u8 mp_mode;
u8 software_encrypt;
u8 software_decrypt;
u8 acm_method;
@ -172,9 +155,6 @@ struct dvobj_priv {
struct semaphore usb_suspend_sema;
struct mutex usb_vendor_req_mutex;
u8 *usb_alloc_vendor_req_buf;
u8 *usb_vendor_req_buf;
struct usb_interface *pusbintf;
struct usb_device *pusbdev;
@ -212,9 +192,6 @@ struct adapter {
* replace module. */
int pid[3];/* process id from UI, 0:wps, 1:hostapd, 2:dhcpcd */
int bDongle;/* build-in module or external dongle */
u16 chip_type;
u16 HardwareType;
u16 interface_type;/* USB,SDIO,SPI,PCI */
struct dvobj_priv *dvobj;
struct mlme_priv mlmepriv;
@ -230,17 +207,11 @@ struct adapter {
struct pwrctrl_priv pwrctrlpriv;
struct eeprom_priv eeprompriv;
struct led_priv ledpriv;
struct mp_priv mppriv;
#ifdef CONFIG_88EU_AP_MODE
struct hostapd_priv *phostapdpriv;
#endif
struct wifidirect_info wdinfo;
void *HalData;
u32 hal_data_sz;
struct hal_ops HalFunc;
s32 bDriverStopped;
s32 bSurpriseRemoved;
@ -286,11 +257,9 @@ struct adapter {
/* The driver will show up the desired channel number
* when this flag is 1. */
u8 bNotifyChannelChange;
#ifdef CONFIG_88EU_P2P
/* The driver will show the current P2P status when the
* upper application reads it. */
u8 bShowGetP2PState;
#endif
struct adapter *pbuddy_adapter;
struct mutex *hw_init_mutex;
@ -298,11 +267,11 @@ struct adapter {
spinlock_t br_ext_lock;
struct nat25_network_db_entry *nethash[NAT25_HASH_SIZE];
int pppoe_connection_in_progress;
unsigned char pppoe_addr[MACADDRLEN];
unsigned char scdb_mac[MACADDRLEN];
unsigned char pppoe_addr[ETH_ALEN];
unsigned char scdb_mac[ETH_ALEN];
unsigned char scdb_ip[4];
struct nat25_network_db_entry *scdb_entry;
unsigned char br_mac[MACADDRLEN];
unsigned char br_mac[ETH_ALEN];
unsigned char br_ip[4];
struct br_ext_info ethBrExtInfo;

316
drivers/staging/r8188eu/include/hal_intf.h
View File

@ -8,23 +8,6 @@
#include "drv_types.h"
#include "Hal8188EPhyCfg.h"
enum RTL871X_HCI_TYPE {
RTW_PCIE = BIT(0),
RTW_USB = BIT(1),
RTW_SDIO = BIT(2),
RTW_GSPI = BIT(3),
};
enum _CHIP_TYPE {
NULL_CHIP_TYPE,
RTL8712_8188S_8191S_8192S,
RTL8188C_8192C,
RTL8192D,
RTL8723A,
RTL8188E,
MAX_CHIP_TYPE
};
enum hw_variables {
HW_VAR_MEDIA_STATUS,
HW_VAR_MEDIA_STATUS1,
@ -63,7 +46,6 @@ enum hw_variables {
HW_VAR_AMPDU_MIN_SPACE,
HW_VAR_AMPDU_FACTOR,
HW_VAR_RXDMA_AGG_PG_TH,
HW_VAR_SET_RPWM,
HW_VAR_H2C_FW_PWRMODE,
HW_VAR_H2C_FW_JOINBSSRPT,
HW_VAR_FWLPS_RF_ON,
@ -73,7 +55,6 @@ enum hw_variables {
HW_VAR_TDLS_RS_RCR,
HW_VAR_TDLS_DONE_CH_SEN,
HW_VAR_INITIAL_GAIN,
HW_VAR_TRIGGER_GPIO_0,
HW_VAR_BT_SET_COEXIST,
HW_VAR_BT_ISSUE_DELBA,
HW_VAR_CURRENT_ANTENNA,
@ -85,7 +66,6 @@ enum hw_variables {
HW_VAR_EFUSE_BT_USAGE,
HW_VAR_EFUSE_BT_BYTES,
HW_VAR_FIFO_CLEARN_UP,
HW_VAR_CHECK_TXBUF,
HW_VAR_APFM_ON_MAC, /* Auto FSM to Turn On, include clock, isolation,
* power control for MAC only */
/* The valid upper nav range for the HW updating, if the true value is
@ -121,290 +101,62 @@ enum hal_odm_variable {
HAL_ODM_WIFI_DISPLAY_STATE,
};
enum hal_intf_ps_func {
HAL_USB_SELECT_SUSPEND,
HAL_MAX_ID,
};
typedef s32 (*c2h_id_filter)(u8 id);
struct hal_ops {
u32 (*hal_power_on)(struct adapter *padapter);
u32 (*hal_init)(struct adapter *padapter);
u32 (*hal_deinit)(struct adapter *padapter);
void (*free_hal_data)(struct adapter *padapter);
u32 (*inirp_init)(struct adapter *padapter);
u32 (*inirp_deinit)(struct adapter *padapter);
s32 (*init_xmit_priv)(struct adapter *padapter);
s32 (*init_recv_priv)(struct adapter *padapter);
void (*free_recv_priv)(struct adapter *padapter);
void (*InitSwLeds)(struct adapter *padapter);
void (*DeInitSwLeds)(struct adapter *padapter);
void (*dm_init)(struct adapter *padapter);
void (*dm_deinit)(struct adapter *padapter);
void (*read_chip_version)(struct adapter *padapter);
void (*init_default_value)(struct adapter *padapter);
void (*intf_chip_configure)(struct adapter *padapter);
void (*read_adapter_info)(struct adapter *padapter);
void (*enable_interrupt)(struct adapter *padapter);
void (*disable_interrupt)(struct adapter *padapter);
s32 (*interrupt_handler)(struct adapter *padapter);
void (*set_bwmode_handler)(struct adapter *padapter,
enum ht_channel_width Bandwidth,
u8 Offset);
void (*set_channel_handler)(struct adapter *padapter, u8 channel);
void (*hal_dm_watchdog)(struct adapter *padapter);
void (*SetHwRegHandler)(struct adapter *padapter, u8 variable,
u8 *val);
void (*GetHwRegHandler)(struct adapter *padapter, u8 variable,
u8 *val);
u8 (*GetHalDefVarHandler)(struct adapter *padapter,
enum hal_def_variable eVariable,
void *pValue);
u8 (*SetHalDefVarHandler)(struct adapter *padapter,
enum hal_def_variable eVariable,
void *pValue);
void (*GetHalODMVarHandler)(struct adapter *padapter,
enum hal_odm_variable eVariable,
void *pValue1, bool bSet);
void (*SetHalODMVarHandler)(struct adapter *padapter,
enum hal_odm_variable eVariable,
void *pValue1, bool bSet);
void (*UpdateRAMaskHandler)(struct adapter *padapter,
u32 mac_id, u8 rssi_level);
void (*SetBeaconRelatedRegistersHandler)(struct adapter *padapter);
void (*Add_RateATid)(struct adapter *adapter, u32 bitmap, u8 arg,
u8 rssi_level);
void (*run_thread)(struct adapter *adapter);
void (*cancel_thread)(struct adapter *adapter);
u8 (*AntDivBeforeLinkHandler)(struct adapter *adapter);
void (*AntDivCompareHandler)(struct adapter *adapter,
struct wlan_bssid_ex *dst,
struct wlan_bssid_ex *src);
u8 (*interface_ps_func)(struct adapter *padapter,
enum hal_intf_ps_func efunc_id, u8 *val);
s32 (*hal_xmit)(struct adapter *padapter,
struct xmit_frame *pxmitframe);
s32 (*mgnt_xmit)(struct adapter *padapter,
struct xmit_frame *pmgntframe);
s32 (*hal_xmitframe_enqueue)(struct adapter *padapter,
struct xmit_frame *pxmitframe);
u32 (*read_bbreg)(struct adapter *padapter, u32 RegAddr,
u32 BitMask);
void (*write_bbreg)(struct adapter *padapter, u32 RegAddr,
u32 BitMask, u32 Data);
u32 (*read_rfreg)(struct adapter *padapter,
enum rf_radio_path eRFPath, u32 RegAddr,
u32 BitMask);
void (*write_rfreg)(struct adapter *padapter,
enum rf_radio_path eRFPath, u32 RegAddr,
u32 BitMask, u32 Data);
void (*EfusePowerSwitch)(struct adapter *padapter, u8 bWrite,
u8 PwrState);
void (*ReadEFuse)(struct adapter *padapter, u8 efuseType, u16 _offset,
u16 _size_byte, u8 *pbuf, bool bPseudoTest);
void (*EFUSEGetEfuseDefinition)(struct adapter *padapter, u8 efuseType,
u8 type, void *pOut, bool bPseudoTest);
u16 (*EfuseGetCurrentSize)(struct adapter *padapter, u8 efuseType,
bool bPseudoTest);
int (*Efuse_PgPacketRead)(struct adapter *adapter, u8 offset,
u8 *data, bool bPseudoTest);
int (*Efuse_PgPacketWrite)(struct adapter *padapter, u8 offset,
u8 word_en, u8 *data, bool bPseudoTest);
u8 (*Efuse_WordEnableDataWrite)(struct adapter *padapter,
u16 efuse_addr, u8 word_en,
u8 *data, bool bPseudoTest);
bool (*Efuse_PgPacketWrite_BT)(struct adapter *padapter, u8 offset,
u8 word_en, u8 *data, bool test);
void (*sreset_init_value)(struct adapter *padapter);
void (*sreset_reset_value)(struct adapter *padapter);
void (*silentreset)(struct adapter *padapter);
void (*sreset_xmit_status_check)(struct adapter *padapter);
void (*sreset_linked_status_check) (struct adapter *padapter);
u8 (*sreset_get_wifi_status)(struct adapter *padapter);
int (*IOL_exec_cmds_sync)(struct adapter *padapter,
struct xmit_frame *frame, u32 max_wait,
u32 bndy_cnt);
void (*hal_notch_filter)(struct adapter *adapter, bool enable);
void (*hal_reset_security_engine)(struct adapter *adapter);
s32 (*c2h_handler)(struct adapter *padapter,
struct c2h_evt_hdr *c2h_evt);
c2h_id_filter c2h_id_filter_ccx;
};
enum rt_eeprom_type {
EEPROM_93C46,
EEPROM_93C56,
EEPROM_BOOT_EFUSE,
};
#define RF_CHANGE_BY_INIT 0
#define RF_CHANGE_BY_IPS BIT(28)
#define RF_CHANGE_BY_PS BIT(29)
#define RF_CHANGE_BY_HW BIT(30)
#define RF_CHANGE_BY_SW BIT(31)
enum hardware_type {
HARDWARE_TYPE_RTL8180,
HARDWARE_TYPE_RTL8185,
HARDWARE_TYPE_RTL8187,
HARDWARE_TYPE_RTL8188,
HARDWARE_TYPE_RTL8190P,
HARDWARE_TYPE_RTL8192E,
HARDWARE_TYPE_RTL819xU,
HARDWARE_TYPE_RTL8192SE,
HARDWARE_TYPE_RTL8192SU,
HARDWARE_TYPE_RTL8192CE,
HARDWARE_TYPE_RTL8192CU,
HARDWARE_TYPE_RTL8192DE,
HARDWARE_TYPE_RTL8192DU,
HARDWARE_TYPE_RTL8723AE,
HARDWARE_TYPE_RTL8723AU,
HARDWARE_TYPE_RTL8723AS,
HARDWARE_TYPE_RTL8188EE,
HARDWARE_TYPE_RTL8188EU,
HARDWARE_TYPE_RTL8188ES,
HARDWARE_TYPE_MAX,
};
/* RTL8188E Series */
#define IS_HARDWARE_TYPE_8188EE(_Adapter) \
(((struct adapter *)_Adapter)->HardwareType == HARDWARE_TYPE_RTL8188EE)
#define IS_HARDWARE_TYPE_8188EU(_Adapter) \
(((struct adapter *)_Adapter)->HardwareType == HARDWARE_TYPE_RTL8188EU)
#define IS_HARDWARE_TYPE_8188ES(_Adapter) \
(((struct adapter *)_Adapter)->HardwareType == HARDWARE_TYPE_RTL8188ES)
#define IS_HARDWARE_TYPE_8188E(_Adapter) \
(IS_HARDWARE_TYPE_8188EE(_Adapter) || IS_HARDWARE_TYPE_8188EU(_Adapter) || \
IS_HARDWARE_TYPE_8188ES(_Adapter))
#define GET_EEPROM_EFUSE_PRIV(adapter) (&adapter->eeprompriv)
#define is_boot_from_eeprom(adapter) (adapter->eeprompriv.EepromOrEfuse)
void rtl8188eu_set_hal_ops(struct adapter *padapter);
void rtw_hal_def_value_init(struct adapter *padapter);
void rtl8188eu_alloc_haldata(struct adapter *adapt);
void rtw_hal_free_data(struct adapter *padapter);
void rtl8188eu_interface_configure(struct adapter *adapt);
void ReadAdapterInfo8188EU(struct adapter *Adapter);
void rtl8188eu_init_default_value(struct adapter *adapt);
void rtl8188e_SetHalODMVar(struct adapter *Adapter,
enum hal_odm_variable eVariable, void *pValue1, bool bSet);
u32 rtl8188eu_InitPowerOn(struct adapter *adapt);
void rtl8188e_free_hal_data(struct adapter *padapter);
void rtl8188e_EfusePowerSwitch(struct adapter *pAdapter, u8 bWrite, u8 PwrState);
void rtl8188e_ReadEFuse(struct adapter *Adapter, u8 efuseType,
u16 _offset, u16 _size_byte, u8 *pbuf,
bool bPseudoTest);
void rtl8188e_EFUSE_GetEfuseDefinition(struct adapter *pAdapter, u8 efuseType,
u8 type, void *pOut, bool bPseudoTest);
u16 rtl8188e_EfuseGetCurrentSize(struct adapter *pAdapter, u8 efuseType, bool bPseudoTest);
int rtl8188e_Efuse_PgPacketRead(struct adapter *pAdapter, u8 offset, u8 *data, bool bPseudoTest);
int rtl8188e_Efuse_PgPacketWrite(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *data, bool bPseudoTest);
void rtw_hal_dm_init(struct adapter *padapter);
void rtw_hal_dm_deinit(struct adapter *padapter);
void rtw_hal_sw_led_init(struct adapter *padapter);
void rtw_hal_sw_led_deinit(struct adapter *padapter);
void hal_notch_filter_8188e(struct adapter *adapter, bool enable);
void SetBeaconRelatedRegisters8188EUsb(struct adapter *adapt);
void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level);
int rtl8188e_IOL_exec_cmds_sync(struct adapter *adapter,
struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt);
u8 SetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue);
u8 GetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue);
unsigned int rtl8188eu_inirp_init(struct adapter *Adapter);
void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val);
void GetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val);
u32 rtw_hal_power_on(struct adapter *padapter);
uint rtw_hal_init(struct adapter *padapter);
uint rtw_hal_deinit(struct adapter *padapter);
void rtw_hal_stop(struct adapter *padapter);
void rtw_hal_set_hwreg(struct adapter *padapter, u8 variable, u8 *val);
void rtw_hal_get_hwreg(struct adapter *padapter, u8 variable, u8 *val);
void rtw_hal_chip_configure(struct adapter *padapter);
void rtw_hal_read_chip_info(struct adapter *padapter);
void rtw_hal_read_chip_version(struct adapter *padapter);
u8 rtw_hal_set_def_var(struct adapter *padapter,
enum hal_def_variable eVariable, void *pValue);
u8 rtw_hal_get_def_var(struct adapter *padapter,
enum hal_def_variable eVariable, void *pValue);
void rtw_hal_set_odm_var(struct adapter *padapter,
enum hal_odm_variable eVariable, void *pValue1,
bool bSet);
void rtw_hal_get_odm_var(struct adapter *padapter,
enum hal_odm_variable eVariable,
void *pValue1, bool bSet);
void rtw_hal_enable_interrupt(struct adapter *padapter);
void rtw_hal_disable_interrupt(struct adapter *padapter);
u32 rtw_hal_inirp_init(struct adapter *padapter);
u32 rtw_hal_inirp_deinit(struct adapter *padapter);
u8 rtw_hal_intf_ps_func(struct adapter *padapter,
enum hal_intf_ps_func efunc_id, u8 *val);
s32 rtw_hal_xmitframe_enqueue(struct adapter *padapter,
struct xmit_frame *pxmitframe);
s32 rtw_hal_xmit(struct adapter *padapter, struct xmit_frame *pxmitframe);
s32 rtw_hal_mgnt_xmit(struct adapter *padapter,
struct xmit_frame *pmgntframe);
s32 rtw_hal_init_xmit_priv(struct adapter *padapter);
s32 rtw_hal_init_recv_priv(struct adapter *padapter);
void rtw_hal_free_recv_priv(struct adapter *padapter);
u32 rtl8188eu_hal_init(struct adapter *Adapter);
u32 rtl8188eu_hal_deinit(struct adapter *Adapter);
void rtw_hal_update_ra_mask(struct adapter *padapter, u32 mac_id, u8 level);
void rtw_hal_add_ra_tid(struct adapter *adapt, u32 bitmap, u8 arg, u8 level);
void rtw_hal_clone_data(struct adapter *dst_adapt,
struct adapter *src_adapt);
void rtw_hal_start_thread(struct adapter *padapter);
void rtw_hal_stop_thread(struct adapter *padapter);
void rtw_hal_bcn_related_reg_setting(struct adapter *padapter);
u32 rtw_hal_read_bbreg(struct adapter *padapter, u32 RegAddr, u32 BitMask);
void rtw_hal_write_bbreg(struct adapter *padapter, u32 RegAddr, u32 BitMask,
u32 Data);
u32 rtw_hal_read_rfreg(struct adapter *padapter, enum rf_radio_path eRFPath,
u32 RegAddr, u32 BitMask);
void rtw_hal_write_rfreg(struct adapter *padapter,
enum rf_radio_path eRFPath, u32 RegAddr,
u32 BitMask, u32 Data);
s32 rtw_hal_interrupt_handler(struct adapter *padapter);
void rtw_hal_set_bwmode(struct adapter *padapter,
enum ht_channel_width Bandwidth, u8 Offset);
void rtw_hal_set_chan(struct adapter *padapter, u8 channel);
void rtw_hal_dm_watchdog(struct adapter *padapter);
u8 rtw_hal_antdiv_before_linked(struct adapter *padapter);
void rtw_hal_antdiv_rssi_compared(struct adapter *padapter,
struct wlan_bssid_ex *dst,
struct wlan_bssid_ex *src);
void rtw_hal_sreset_init(struct adapter *padapter);
void rtw_hal_sreset_reset(struct adapter *padapter);
void rtw_hal_sreset_reset_value(struct adapter *padapter);
void rtw_hal_sreset_xmit_status_check(struct adapter *padapter);
void rtw_hal_sreset_linked_status_check(struct adapter *padapter);
u8 rtw_hal_sreset_get_wifi_status(struct adapter *padapter);
int rtw_hal_iol_cmd(struct adapter *adapter, struct xmit_frame *xmit_frame,
u32 max_wating_ms, u32 bndy_cnt);
void rtw_hal_notch_filter(struct adapter *adapter, bool enable);
void rtw_hal_reset_security_engine(struct adapter *adapter);
s32 rtw_hal_c2h_handler(struct adapter *adapter,
struct c2h_evt_hdr *c2h_evt);
c2h_id_filter rtw_hal_c2h_id_filter_ccx(struct adapter *adapter);
void indicate_wx_scan_complete_event(struct adapter *padapter);
u8 rtw_do_join(struct adapter *padapter);

71
drivers/staging/r8188eu/include/ieee80211.h
View File

@ -15,38 +15,8 @@
#define ETH_TYPE_LEN 2
#define PAYLOAD_TYPE_LEN 1
#ifdef CONFIG_88EU_AP_MODE
#define RTL_IOCTL_HOSTAPD (SIOCIWFIRSTPRIV + 28)
/* RTL871X_IOCTL_HOSTAPD ioctl() cmd: */
enum {
RTL871X_HOSTAPD_FLUSH = 1,
RTL871X_HOSTAPD_ADD_STA = 2,
RTL871X_HOSTAPD_REMOVE_STA = 3,
RTL871X_HOSTAPD_GET_INFO_STA = 4,
/* REMOVED: PRISM2_HOSTAPD_RESET_TXEXC_STA = 5, */
RTL871X_HOSTAPD_GET_WPAIE_STA = 5,
RTL871X_SET_ENCRYPTION = 6,
RTL871X_GET_ENCRYPTION = 7,
RTL871X_HOSTAPD_SET_FLAGS_STA = 8,
RTL871X_HOSTAPD_GET_RID = 9,
RTL871X_HOSTAPD_SET_RID = 10,
RTL871X_HOSTAPD_SET_ASSOC_AP_ADDR = 11,
RTL871X_HOSTAPD_SET_GENERIC_ELEMENT = 12,
RTL871X_HOSTAPD_MLME = 13,
RTL871X_HOSTAPD_SCAN_REQ = 14,
RTL871X_HOSTAPD_STA_CLEAR_STATS = 15,
RTL871X_HOSTAPD_SET_BEACON = 16,
RTL871X_HOSTAPD_SET_WPS_BEACON = 17,
RTL871X_HOSTAPD_SET_WPS_PROBE_RESP = 18,
RTL871X_HOSTAPD_SET_WPS_ASSOC_RESP = 19,
RTL871X_HOSTAPD_SET_HIDDEN_SSID = 20,
RTL871X_HOSTAPD_SET_MACADDR_ACL = 21,
RTL871X_HOSTAPD_ACL_ADD_STA = 22,
RTL871X_HOSTAPD_ACL_REMOVE_STA = 23,
};
/* STA flags */
#define WLAN_STA_AUTH BIT(0)
#define WLAN_STA_ASSOC BIT(1)
@ -64,8 +34,6 @@ enum {
#define WLAN_STA_MAYBE_WPS BIT(13)
#define WLAN_STA_NONERP BIT(31)
#endif
#define IEEE_CMD_SET_WPA_PARAM 1
#define IEEE_CMD_SET_WPA_IE 2
#define IEEE_CMD_SET_ENCRYPTION 3
@ -200,7 +168,6 @@ struct ieee_param {
u16 key_len;
u8 key[];
} crypt;
#ifdef CONFIG_88EU_AP_MODE
struct {
u16 aid;
u16 capability;
@ -212,12 +179,9 @@ struct ieee_param {
u8 reserved[2];/* for set max_num_sta */
u8 buf[];
} bcn_ie;
#endif
} u;
};
#ifdef CONFIG_88EU_AP_MODE
struct ieee_param_ex {
u32 cmd;
u8 sta_addr[ETH_ALEN];
@ -239,7 +203,6 @@ struct sta_data {
u64 tx_bytes;
u64 tx_drops;
};
#endif
#define IEEE80211_DATA_LEN 2304
/* Maximum size for the MA-UNITDATA primitive, 802.11 standard section
@ -925,10 +888,6 @@ struct tx_pending {
#define IEEE_G (1<<2)
#define IEEE_MODE_MASK (IEEE_A|IEEE_B|IEEE_G)
/* Baron move to ieee80211.c */
int ieee80211_is_empty_essid(const char *essid, int essid_len);
int ieee80211_get_hdrlen(u16 fc);
/* Action category code */
enum rtw_ieee80211_category {
RTW_WLAN_CATEGORY_SPECTRUM_MGMT = 0,
@ -1130,26 +1089,7 @@ enum parse_res rtw_ieee802_11_parse_elems(u8 *start, uint len,
u8 *rtw_set_fixed_ie(unsigned char *pbuf, unsigned int len,
unsigned char *source, unsigned int *frlen);
u8 *rtw_set_ie(u8 *pbuf, int index, uint len, u8 *source, uint *frlen);
enum secondary_ch_offset {
SCN = 0, /* no secondary channel */
SCA = 1, /* secondary channel above */
SCB = 3, /* secondary channel below */
};
u8 secondary_ch_offset_to_hal_ch_offset(u8 ch_offset);
u8 hal_ch_offset_to_secondary_ch_offset(u8 ch_offset);
u8 *rtw_set_ie_ch_switch(u8 *buf, u32 *buf_len, u8 ch_switch_mode,
u8 new_ch, u8 ch_switch_cnt);
u8 *rtw_set_ie_secondary_ch_offset(u8 *buf, u32 *buf_len,
u8 secondary_ch_offset);
u8 *rtw_set_ie_mesh_ch_switch_parm(u8 *buf, u32 *buf_len, u8 ttl,
u8 flags, u16 reason, u16 precedence);
u8 *rtw_get_ie(u8 *pbuf, int index, int *len, int limit);
u8 *rtw_get_ie_ex(u8 *in_ie, uint in_len, u8 eid, u8 *oui,
u8 oui_len, u8 *ie, uint *ielen);
int rtw_ies_remove_ie(u8 *ies, uint *ies_len, uint offset,
u8 eid, u8 *oui, u8 oui_len);
void rtw_set_supported_rate(u8 *SupportedRates, uint mode);
@ -1183,11 +1123,6 @@ u8 *rtw_get_wps_attr_content(u8 *wps_ie, uint wps_ielen, u16 target_attr_id,
for (ie = (void *)buf; (((u8 *)ie) - ((u8 *)buf) + 1) < buf_len; \
ie = (void *)(((u8 *)ie) + *(((u8 *)ie)+1) + 2))
void dump_ies(u8 *buf, u32 buf_len);
void dump_wps_ie(u8 *ie, u32 ie_len);
#ifdef CONFIG_88EU_P2P
void dump_p2p_ie(u8 *ie, u32 ie_len);
u8 *rtw_get_p2p_ie(u8 *in_ie, int in_len, u8 *p2p_ie, uint *p2p_ielen);
u8 *rtw_get_p2p_attr(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id,
u8 *buf_attr, u32 *len_attr);
@ -1197,8 +1132,6 @@ u32 rtw_set_p2p_attr_content(u8 *pbuf, u8 attr_id, u16 attr_len,
u8 *pdata_attr);
void rtw_wlan_bssid_ex_remove_p2p_attr(struct wlan_bssid_ex *bss_ex,
u8 attr_id);
#endif
uint rtw_get_rateset_len(u8 *rateset);
struct registry_priv;
@ -1219,8 +1152,4 @@ void rtw_macaddr_cfg(u8 *mac_addr);
u16 rtw_mcs_rate(u8 rf_type, u8 bw_40MHz, u8 short_GI_20, u8 short_GI_40,
unsigned char *MCS_rate);
int rtw_action_frame_parse(const u8 *frame, u32 frame_len, u8 *category,
u8 *action);
const char *action_public_str(u8 action);
#endif /* IEEE80211_H */

2
drivers/staging/r8188eu/include/ioctl_cfg80211.h
View File

@ -61,13 +61,11 @@ void rtw_cfg80211_indicate_disconnect(struct adapter *padapter);
void rtw_cfg80211_indicate_scan_done(struct rtw_wdev_priv *pwdev_priv,
bool aborted);
#ifdef CONFIG_88EU_AP_MODE
void rtw_cfg80211_indicate_sta_assoc(struct adapter *padapter,
u8 *pmgmt_frame, uint frame_len);
void rtw_cfg80211_indicate_sta_disassoc(struct adapter *padapter,
unsigned char *da,
unsigned short reason);
#endif /* CONFIG_88EU_AP_MODE */
void rtw_cfg80211_issue_p2p_provision_request(struct adapter *padapter,
const u8 *buf, size_t len);

333
drivers/staging/r8188eu/include/mp_custom_oid.h
View File

@ -1,333 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __CUSTOM_OID_H
#define __CUSTOM_OID_H
/* by Owen */
/* 0xFF818000 - 0xFF81802F RTL8180 Mass Production Kit */
/* 0xFF818500 - 0xFF81850F RTL8185 Setup Utility */
/* 0xFF818580 - 0xFF81858F RTL8185 Phy Status Utility */
/* */
/* by Owen for Production Kit */
/* For Production Kit with Agilent Equipments */
/* in order to make our custom oids hopefully somewhat unique */
/* we will use 0xFF (indicating implementation specific OID) */
/* 81(first byte of non zero Realtek unique identifier) */
/* 80 (second byte of non zero Realtek unique identifier) */
/* XX (the custom OID number - providing 255 possible custom oids) */
#define OID_RT_PRO_RESET_DUT 0xFF818000
#define OID_RT_PRO_SET_DATA_RATE 0xFF818001
#define OID_RT_PRO_START_TEST 0xFF818002
#define OID_RT_PRO_STOP_TEST 0xFF818003
#define OID_RT_PRO_SET_PREAMBLE 0xFF818004
#define OID_RT_PRO_SET_SCRAMBLER 0xFF818005
#define OID_RT_PRO_SET_FILTER_BB 0xFF818006
#define OID_RT_PRO_SET_MANUAL_DIVERSITY_BB 0xFF818007
#define OID_RT_PRO_SET_CHANNEL_DIRECT_CALL 0xFF818008
#define OID_RT_PRO_SET_SLEEP_MODE_DIRECT_CALL 0xFF818009
#define OID_RT_PRO_SET_WAKE_MODE_DIRECT_CALL 0xFF81800A
#define OID_RT_PRO_SET_TX_ANTENNA_BB 0xFF81800D
#define OID_RT_PRO_SET_ANTENNA_BB 0xFF81800E
#define OID_RT_PRO_SET_CR_SCRAMBLER 0xFF81800F
#define OID_RT_PRO_SET_CR_NEW_FILTER 0xFF818010
#define OID_RT_PRO_SET_TX_POWER_CONTROL 0xFF818011
#define OID_RT_PRO_SET_CR_TX_CONFIG 0xFF818012
#define OID_RT_PRO_GET_TX_POWER_CONTROL 0xFF818013
#define OID_RT_PRO_GET_CR_SIGNAL_QUALITY 0xFF818014
#define OID_RT_PRO_SET_CR_SETPOINT 0xFF818015
#define OID_RT_PRO_SET_INTEGRATOR 0xFF818016
#define OID_RT_PRO_SET_SIGNAL_QUALITY 0xFF818017
#define OID_RT_PRO_GET_INTEGRATOR 0xFF818018
#define OID_RT_PRO_GET_SIGNAL_QUALITY 0xFF818019
#define OID_RT_PRO_QUERY_EEPROM_TYPE 0xFF81801A
#define OID_RT_PRO_WRITE_MAC_ADDRESS 0xFF81801B
#define OID_RT_PRO_READ_MAC_ADDRESS 0xFF81801C
#define OID_RT_PRO_WRITE_CIS_DATA 0xFF81801D
#define OID_RT_PRO_READ_CIS_DATA 0xFF81801E
#define OID_RT_PRO_WRITE_POWER_CONTROL 0xFF81801F
#define OID_RT_PRO_READ_POWER_CONTROL 0xFF818020
#define OID_RT_PRO_WRITE_EEPROM 0xFF818021
#define OID_RT_PRO_READ_EEPROM 0xFF818022
#define OID_RT_PRO_RESET_TX_PACKET_SENT 0xFF818023
#define OID_RT_PRO_QUERY_TX_PACKET_SENT 0xFF818024
#define OID_RT_PRO_RESET_RX_PACKET_RECEIVED 0xFF818025
#define OID_RT_PRO_QUERY_RX_PACKET_RECEIVED 0xFF818026
#define OID_RT_PRO_QUERY_RX_PACKET_CRC32_ERROR 0xFF818027
#define OID_RT_PRO_QUERY_CURRENT_ADDRESS 0xFF818028
#define OID_RT_PRO_QUERY_PERMANENT_ADDRESS 0xFF818029
#define OID_RT_PRO_SET_PHILIPS_RF_PARAMETERS 0xFF81802A
#define OID_RT_PRO_RECEIVE_PACKET 0xFF81802C
/* added by Owen on 04/08/03 for Cameo's request */
#define OID_RT_PRO_WRITE_EEPROM_BYTE 0xFF81802D
#define OID_RT_PRO_READ_EEPROM_BYTE 0xFF81802E
#define OID_RT_PRO_SET_MODULATION 0xFF81802F
/* */
/* Sean */
#define OID_RT_DRIVER_OPTION 0xFF818080
#define OID_RT_RF_OFF 0xFF818081
#define OID_RT_AUTH_STATUS 0xFF818082
/* */
#define OID_RT_PRO_SET_CONTINUOUS_TX 0xFF81800B
#define OID_RT_PRO_SET_SINGLE_CARRIER_TX 0xFF81800C
#define OID_RT_PRO_SET_CARRIER_SUPPRESSION_TX 0xFF81802B
#define OID_RT_PRO_SET_SINGLE_TONE_TX 0xFF818043
/* */
/* by Owen for RTL8185 Phy Status Report Utility */
#define OID_RT_UTILITY_false_ALARM_COUNTERS 0xFF818580
#define OID_RT_UTILITY_SELECT_DEBUG_MODE 0xFF818581
#define OID_RT_UTILITY_SELECT_SUBCARRIER_NUMBER 0xFF818582
#define OID_RT_UTILITY_GET_RSSI_STATUS 0xFF818583
#define OID_RT_UTILITY_GET_FRAME_DETECTION_STATUS 0xFF818584
#define OID_RT_UTILITY_GET_AGC_AND_FREQUENCY_OFFSET_ESTIMATION_STATUS \
0xFF818585
#define OID_RT_UTILITY_GET_CHANNEL_ESTIMATION_STATUS 0xFF818586
/* */
/* by Owen on 03/09/19-03/09/22 for RTL8185 */
#define OID_RT_WIRELESS_MODE 0xFF818500
#define OID_RT_SUPPORTED_RATES 0xFF818501
#define OID_RT_DESIRED_RATES 0xFF818502
#define OID_RT_WIRELESS_MODE_STARTING_ADHOC 0xFF818503
/* */
#define OID_RT_GET_CONNECT_STATE 0xFF030001
#define OID_RT_RESCAN 0xFF030002
#define OID_RT_SET_KEY_LENGTH 0xFF030003
#define OID_RT_SET_DEFAULT_KEY_ID 0xFF030004
#define OID_RT_SET_CHANNEL 0xFF010182
#define OID_RT_SET_SNIFFER_MODE 0xFF010183
#define OID_RT_GET_SIGNAL_QUALITY 0xFF010184
#define OID_RT_GET_SMALL_PACKET_CRC 0xFF010185
#define OID_RT_GET_MIDDLE_PACKET_CRC 0xFF010186
#define OID_RT_GET_LARGE_PACKET_CRC 0xFF010187
#define OID_RT_GET_TX_RETRY 0xFF010188
#define OID_RT_GET_RX_RETRY 0xFF010189
#define OID_RT_PRO_SET_FW_DIG_STATE 0xFF01018A/* S */
#define OID_RT_PRO_SET_FW_RA_STATE 0xFF01018B/* S */
#define OID_RT_GET_RX_TOTAL_PACKET 0xFF010190
#define OID_RT_GET_TX_BEACON_OK 0xFF010191
#define OID_RT_GET_TX_BEACON_ERR 0xFF010192
#define OID_RT_GET_RX_ICV_ERR 0xFF010193
#define OID_RT_SET_ENCRYPTION_ALGORITHM 0xFF010194
#define OID_RT_SET_NO_AUTO_RESCAN 0xFF010195
#define OID_RT_GET_PREAMBLE_MODE 0xFF010196
#define OID_RT_GET_DRIVER_UP_DELTA_TIME 0xFF010197
#define OID_RT_GET_AP_IP 0xFF010198
#define OID_RT_GET_CHANNELPLAN 0xFF010199
#define OID_RT_SET_PREAMBLE_MODE 0xFF01019A
#define OID_RT_SET_BCN_INTVL 0xFF01019B
#define OID_RT_GET_RF_VENDER 0xFF01019C
#define OID_RT_DEDICATE_PROBE 0xFF01019D
#define OID_RT_PRO_RX_FILTER_PATTERN 0xFF01019E
#define OID_RT_GET_DCST_CURRENT_THRESHOLD 0xFF01019F
#define OID_RT_GET_CCA_ERR 0xFF0101A0
#define OID_RT_GET_CCA_UPGRADE_THRESHOLD 0xFF0101A1
#define OID_RT_GET_CCA_FALLBACK_THRESHOLD 0xFF0101A2
#define OID_RT_GET_CCA_UPGRADE_EVALUATE_TIMES 0xFF0101A3
#define OID_RT_GET_CCA_FALLBACK_EVALUATE_TIMES 0xFF0101A4
/* by Owen on 03/31/03 for Cameo's request */
#define OID_RT_SET_RATE_ADAPTIVE 0xFF0101A5
/* */
#define OID_RT_GET_DCST_EVALUATE_PERIOD 0xFF0101A5
#define OID_RT_GET_DCST_TIME_UNIT_INDEX 0xFF0101A6
#define OID_RT_GET_TOTAL_TX_BYTES 0xFF0101A7
#define OID_RT_GET_TOTAL_RX_BYTES 0xFF0101A8
#define OID_RT_CURRENT_TX_POWER_LEVEL 0xFF0101A9
#define OID_RT_GET_ENC_KEY_MISMATCH_COUNT 0xFF0101AA
#define OID_RT_GET_ENC_KEY_MATCH_COUNT 0xFF0101AB
#define OID_RT_GET_CHANNEL 0xFF0101AC
#define OID_RT_SET_CHANNELPLAN 0xFF0101AD
#define OID_RT_GET_HARDWARE_RADIO_OFF 0xFF0101AE
#define OID_RT_CHANNELPLAN_BY_COUNTRY 0xFF0101AF
#define OID_RT_SCAN_AVAILABLE_BSSID 0xFF0101B0
#define OID_RT_GET_HARDWARE_VERSION 0xFF0101B1
#define OID_RT_GET_IS_ROAMING 0xFF0101B2
#define OID_RT_GET_IS_PRIVACY 0xFF0101B3
#define OID_RT_GET_KEY_MISMATCH 0xFF0101B4
#define OID_RT_SET_RSSI_ROAM_TRAFFIC_TH 0xFF0101B5
#define OID_RT_SET_RSSI_ROAM_SIGNAL_TH 0xFF0101B6
#define OID_RT_RESET_LOG 0xFF0101B7
#define OID_RT_GET_LOG 0xFF0101B8
#define OID_RT_SET_INDICATE_HIDDEN_AP 0xFF0101B9
#define OID_RT_GET_HEADER_FAIL 0xFF0101BA
#define OID_RT_SUPPORTED_WIRELESS_MODE 0xFF0101BB
#define OID_RT_GET_CHANNEL_LIST 0xFF0101BC
#define OID_RT_GET_SCAN_IN_PROGRESS 0xFF0101BD
#define OID_RT_GET_TX_INFO 0xFF0101BE
#define OID_RT_RF_READ_WRITE_OFFSET 0xFF0101BF
#define OID_RT_RF_READ_WRITE 0xFF0101C0
/* For Netgear request. 2005.01.13, by rcnjko. */
#define OID_RT_FORCED_DATA_RATE 0xFF0101C1
#define OID_RT_WIRELESS_MODE_FOR_SCAN_LIST 0xFF0101C2
/* For Netgear request. 2005.02.17, by rcnjko. */
#define OID_RT_GET_BSS_WIRELESS_MODE 0xFF0101C3
/* For AZ project. 2005.06.27, by rcnjko. */
#define OID_RT_SCAN_WITH_MAGIC_PACKET 0xFF0101C4
/* Vincent 8185MP */
#define OID_RT_PRO_RX_FILTER 0xFF0111C0
#define OID_CE_USB_WRITE_REGISTRY 0xFF0111C1
#define OID_CE_USB_READ_REGISTRY 0xFF0111C2
#define OID_RT_PRO_SET_INITIAL_GA 0xFF0111C3
#define OID_RT_PRO_SET_BB_RF_STANDBY_MODE 0xFF0111C4
#define OID_RT_PRO_SET_BB_RF_SHUTDOWN_MODE 0xFF0111C5
#define OID_RT_PRO_SET_TX_CHARGE_PUMP 0xFF0111C6
#define OID_RT_PRO_SET_RX_CHARGE_PUMP 0xFF0111C7
#define OID_RT_PRO_RF_WRITE_REGISTRY 0xFF0111C8
#define OID_RT_PRO_RF_READ_REGISTRY 0xFF0111C9
#define OID_RT_PRO_QUERY_RF_TYPE 0xFF0111CA
/* AP OID */
#define OID_RT_AP_GET_ASSOCIATED_STATION_LIST 0xFF010300
#define OID_RT_AP_GET_CURRENT_TIME_STAMP 0xFF010301
#define OID_RT_AP_SWITCH_INTO_AP_MODE 0xFF010302
#define OID_RT_AP_SET_DTIM_PERIOD 0xFF010303
/* Determine if driver supports AP mode. */
#define OID_RT_AP_SUPPORTED 0xFF010304
/* Set WPA-PSK passphrase into authenticator. */
#define OID_RT_AP_SET_PASSPHRASE 0xFF010305
/* 8187MP. 2004.09.06, by rcnjko. */
#define OID_RT_PRO8187_WI_POLL 0xFF818780
#define OID_RT_PRO_WRITE_BB_REG 0xFF818781
#define OID_RT_PRO_READ_BB_REG 0xFF818782
#define OID_RT_PRO_WRITE_RF_REG 0xFF818783
#define OID_RT_PRO_READ_RF_REG 0xFF818784
/* Meeting House. added by Annie, 2005-07-20. */
#define OID_RT_MH_VENDER_ID 0xFFEDC100
/* 8711 MP OID added 20051230. */
#define OID_RT_PRO8711_JOIN_BSS 0xFF871100/* S */
#define OID_RT_PRO_READ_REGISTER 0xFF871101 /* Q */
#define OID_RT_PRO_WRITE_REGISTER 0xFF871102 /* S */
#define OID_RT_PRO_BURST_READ_REGISTER 0xFF871103 /* Q */
#define OID_RT_PRO_BURST_WRITE_REGISTER 0xFF871104 /* S */
#define OID_RT_PRO_WRITE_TXCMD 0xFF871105 /* S */
#define OID_RT_PRO_READ16_EEPROM 0xFF871106 /* Q */
#define OID_RT_PRO_WRITE16_EEPROM 0xFF871107 /* S */
#define OID_RT_PRO_H2C_SET_COMMAND 0xFF871108 /* S */
#define OID_RT_PRO_H2C_QUERY_RESULT 0xFF871109 /* Q */
#define OID_RT_PRO8711_WI_POLL 0xFF87110A /* Q */
#define OID_RT_PRO8711_PKT_LOSS 0xFF87110B /* Q */
#define OID_RT_RD_ATTRIB_MEM 0xFF87110C/* Q */
#define OID_RT_WR_ATTRIB_MEM 0xFF87110D/* S */
/* Method 2 for H2C/C2H */
#define OID_RT_PRO_H2C_CMD_MODE 0xFF871110 /* S */
#define OID_RT_PRO_H2C_CMD_RSP_MODE 0xFF871111 /* Q */
#define OID_RT_PRO_H2C_CMD_EVENT_MODE 0xFF871112 /* S */
#define OID_RT_PRO_WAIT_C2H_EVENT 0xFF871113 /* Q */
#define OID_RT_PRO_RW_ACCESS_PROTOCOL_TEST 0xFF871114/* Q */
#define OID_RT_PRO_SCSI_ACCESS_TEST 0xFF871115 /* Q, S */
#define OID_RT_PRO_SCSI_TCPIPOFFLOAD_OUT 0xFF871116 /* S */
#define OID_RT_PRO_SCSI_TCPIPOFFLOAD_IN 0xFF871117 /* Q,S */
#define OID_RT_RRO_RX_PKT_VIA_IOCTRL 0xFF871118 /* Q */
#define OID_RT_RRO_RX_PKTARRAY_VIA_IOCTRL 0xFF871119 /* Q */
#define OID_RT_RPO_SET_PWRMGT_TEST 0xFF87111A /* S */
#define OID_RT_PRO_QRY_PWRMGT_TEST 0XFF87111B /* Q */
#define OID_RT_RPO_ASYNC_RWIO_TEST 0xFF87111C /* S */
#define OID_RT_RPO_ASYNC_RWIO_POLL 0xFF87111D /* Q */
#define OID_RT_PRO_SET_RF_INTFS 0xFF87111E /* S */
#define OID_RT_POLL_RX_STATUS 0xFF87111F /* Q */
#define OID_RT_PRO_CFG_DEBUG_MESSAGE 0xFF871120 /* Q,S */
#define OID_RT_PRO_SET_DATA_RATE_EX 0xFF871121/* S */
#define OID_RT_PRO_SET_BASIC_RATE 0xFF871122/* S */
#define OID_RT_PRO_READ_TSSI 0xFF871123/* S */
#define OID_RT_PRO_SET_POWER_TRACKING 0xFF871124/* S */
#define OID_RT_PRO_QRY_PWRSTATE 0xFF871150 /* Q */
#define OID_RT_PRO_SET_PWRSTATE 0xFF871151 /* S */
/* Method 2 , using workitem */
#define OID_RT_SET_READ_REG 0xFF871181 /* S */
#define OID_RT_SET_WRITE_REG 0xFF871182 /* S */
#define OID_RT_SET_BURST_READ_REG 0xFF871183 /* S */
#define OID_RT_SET_BURST_WRITE_REG 0xFF871184 /* S */
#define OID_RT_SET_WRITE_TXCMD 0xFF871185 /* S */
#define OID_RT_SET_READ16_EEPROM 0xFF871186 /* S */
#define OID_RT_SET_WRITE16_EEPROM 0xFF871187 /* S */
#define OID_RT_QRY_POLL_WKITEM 0xFF871188 /* Q */
/* For SDIO INTERFACE only */
#define OID_RT_PRO_SYNCPAGERW_SRAM 0xFF8711A0 /* Q, S */
#define OID_RT_PRO_871X_DRV_EXT 0xFF8711A1
/* For USB INTERFACE only */
#define OID_RT_PRO_USB_VENDOR_REQ 0xFF8711B0 /* Q, S */
#define OID_RT_PRO_SCSI_AUTO_TEST 0xFF8711B1 /* S */
#define OID_RT_PRO_USB_MAC_AC_FIFO_WRITE 0xFF8711B2 /* S */
#define OID_RT_PRO_USB_MAC_RX_FIFO_READ 0xFF8711B3 /* Q */
#define OID_RT_PRO_USB_MAC_RX_FIFO_POLLING 0xFF8711B4 /* Q */
#define OID_RT_PRO_H2C_SET_RATE_TABLE 0xFF8711FB /* S */
#define OID_RT_PRO_H2C_GET_RATE_TABLE 0xFF8711FC /* S */
#define OID_RT_PRO_H2C_C2H_LBK_TEST 0xFF8711FE
#define OID_RT_PRO_ENCRYPTION_CTRL 0xFF871200 /* Q, S */
#define OID_RT_PRO_ADD_STA_INFO 0xFF871201 /* S */
#define OID_RT_PRO_DELE_STA_INFO 0xFF871202 /* S */
#define OID_RT_PRO_QUERY_DR_VARIABLE 0xFF871203 /* Q */
#define OID_RT_PRO_RX_PACKET_TYPE 0xFF871204 /* Q, S */
#define OID_RT_PRO_READ_EFUSE 0xFF871205 /* Q */
#define OID_RT_PRO_WRITE_EFUSE 0xFF871206 /* S */
#define OID_RT_PRO_RW_EFUSE_PGPKT 0xFF871207 /* Q, S */
#define OID_RT_GET_EFUSE_CURRENT_SIZE 0xFF871208 /* Q */
#define OID_RT_SET_BANDWIDTH 0xFF871209 /* S */
#define OID_RT_SET_CRYSTAL_CAP 0xFF87120A /* S */
#define OID_RT_SET_RX_PACKET_TYPE 0xFF87120B /* S */
#define OID_RT_GET_EFUSE_MAX_SIZE 0xFF87120C /* Q */
#define OID_RT_PRO_SET_TX_AGC_OFFSET 0xFF87120D /* S */
#define OID_RT_PRO_SET_PKT_TEST_MODE 0xFF87120E /* S */
#define OID_RT_PRO_FOR_EVM_TEST_SETTING 0xFF87120F /* S */
#define OID_RT_PRO_GET_THERMAL_METER 0xFF871210 /* Q */
#define OID_RT_RESET_PHY_RX_PACKET_COUNT 0xFF871211 /* S */
#define OID_RT_GET_PHY_RX_PACKET_RECEIVED 0xFF871212 /* Q */
#define OID_RT_GET_PHY_RX_PACKET_CRC32_ERROR 0xFF871213 /* Q */
#define OID_RT_SET_POWER_DOWN 0xFF871214 /* S */
#define OID_RT_GET_POWER_MODE 0xFF871215 /* Q */
#define OID_RT_PRO_EFUSE 0xFF871216 /* Q, S */
#define OID_RT_PRO_EFUSE_MAP 0xFF871217 /* Q, S */
#endif /* ifndef __CUSTOM_OID_H */

455
drivers/staging/r8188eu/include/odm.h
View File

@ -4,75 +4,6 @@
#ifndef __HALDMOUTSRC_H__
#define __HALDMOUTSRC_H__
/* Definition */
/* Define all team support ability. */
/* Define for all teams. Please Define the constant in your precomp header. */
/* define DM_ODM_SUPPORT_AP 0 */
/* define DM_ODM_SUPPORT_ADSL 0 */
/* define DM_ODM_SUPPORT_CE 0 */
/* define DM_ODM_SUPPORT_MP 1 */
/* Define ODM SW team support flag. */
/* Antenna Switch Relative Definition. */
/* Add new function SwAntDivCheck8192C(). */
/* This is the main function of Antenna diversity function before link. */
/* Mainly, it just retains last scan result and scan again. */
/* After that, it compares the scan result to see which one gets better
* RSSI. It selects antenna with better receiving power and returns better
* scan result. */
#define TP_MODE 0
#define RSSI_MODE 1
#define TRAFFIC_LOW 0
#define TRAFFIC_HIGH 1
/* 3 Tx Power Tracking */
/* 3============================================================ */
#define DPK_DELTA_MAPPING_NUM 13
#define index_mapping_HP_NUM 15
/* */
/* 3 PSD Handler */
/* 3============================================================ */
#define AFH_PSD 1 /* 0:normal PSD scan, 1: only do 20 pts PSD */
#define MODE_40M 0 /* 0:20M, 1:40M */
#define PSD_TH2 3
#define PSD_CHM 20 /* Minimum channel number for BT AFH */
#define SIR_STEP_SIZE 3
#define Smooth_Size_1 5
#define Smooth_TH_1 3
#define Smooth_Size_2 10
#define Smooth_TH_2 4
#define Smooth_Size_3 20
#define Smooth_TH_3 4
#define Smooth_Step_Size 5
#define Adaptive_SIR 1
#define PSD_RESCAN 4
#define PSD_SCAN_INTERVAL 700 /* ms */
/* 8723A High Power IGI Setting */
#define DM_DIG_HIGH_PWR_IGI_LOWER_BOUND 0x22
#define DM_DIG_Gmode_HIGH_PWR_IGI_LOWER_BOUND 0x28
#define DM_DIG_HIGH_PWR_THRESHOLD 0x3a
/* LPS define */
#define DM_DIG_FA_TH0_LPS 4 /* 4 in lps */
#define DM_DIG_FA_TH1_LPS 15 /* 15 lps */
#define DM_DIG_FA_TH2_LPS 30 /* 30 lps */
#define RSSI_OFFSET_DIG 0x05;
/* ANT Test */
#define ANTTESTALL 0x00 /* Ant A or B will be Testing */
#define ANTTESTA 0x01 /* Ant A will be Testing */
#define ANTTESTB 0x02 /* Ant B will be testing */
/* structure and define */
/* Add for AP/ADSLpseudo DM structuer requirement. */
/* We need to remove to other position??? */
struct rtl8192cd_priv {
@ -178,23 +109,7 @@ struct rx_hpc {
struct timer_list PSDTimer;
};
#define ASSOCIATE_ENTRY_NUM 32 /* Max size of AsocEntry[]. */
#define ODM_ASSOCIATE_ENTRY_NUM ASSOCIATE_ENTRY_NUM
/* This indicates two different steps. */
/* In SWAW_STEP_PEAK, driver needs to switch antenna and listen to
* the signal on the air. */
/* In SWAW_STEP_DETERMINE, driver just compares the signal captured in
* SWAW_STEP_PEAK with original RSSI to determine if it is necessary to
* switch antenna. */
#define SWAW_STEP_PEAK 0
#define SWAW_STEP_DETERMINE 1
#define TP_MODE 0
#define RSSI_MODE 1
#define TRAFFIC_LOW 0
#define TRAFFIC_HIGH 1
#define ODM_ASSOCIATE_ENTRY_NUM 32 /* Max size of AsocEntry[]. */
struct sw_ant_switch {
u8 try_flag;
@ -210,8 +125,6 @@ struct sw_ant_switch {
/* Before link Antenna Switch check */
u8 SWAS_NoLink_State;
u32 SWAS_NoLink_BK_Reg860;
bool ANTA_ON; /* To indicate Ant A is or not */
bool ANTB_ON; /* To indicate Ant B is on or not */
s32 RSSI_sum_A;
s32 RSSI_sum_B;
@ -225,16 +138,8 @@ struct sw_ant_switch {
u64 RXByteCnt_B;
u8 TrafficLoad;
struct timer_list SwAntennaSwitchTimer;
/* Hybrid Antenna Diversity */
u32 CCK_Ant1_Cnt[ASSOCIATE_ENTRY_NUM];
u32 CCK_Ant2_Cnt[ASSOCIATE_ENTRY_NUM];
u32 OFDM_Ant1_Cnt[ASSOCIATE_ENTRY_NUM];
u32 OFDM_Ant2_Cnt[ASSOCIATE_ENTRY_NUM];
u32 RSSI_Ant1_Sum[ASSOCIATE_ENTRY_NUM];
u32 RSSI_Ant2_Sum[ASSOCIATE_ENTRY_NUM];
u8 TxAnt[ASSOCIATE_ENTRY_NUM];
u8 TxAnt[ODM_ASSOCIATE_ENTRY_NUM];
u8 TargetSTA;
u8 antsel;
u8 RxIdleAnt;
};
@ -245,7 +150,6 @@ struct edca_turbo {
};
struct odm_rate_adapt {
u8 Type; /* DM_Type_ByFW/DM_Type_ByDriver */
u8 HighRSSIThresh; /* if RSSI > HighRSSIThresh => RATRState is DM_RATR_STA_HIGH */
u8 LowRSSIThresh; /* if RSSI <= LowRSSIThresh => RATRState is DM_RATR_STA_LOW */
u8 RATRState; /* Current RSSI level, DM_RATR_STA_HIGH/DM_RATR_STA_MIDDLE/DM_RATR_STA_LOW */
@ -254,33 +158,11 @@ struct odm_rate_adapt {
#define IQK_MAC_REG_NUM 4
#define IQK_ADDA_REG_NUM 16
#define IQK_BB_REG_NUM_MAX 10
#define IQK_BB_REG_NUM 9
#define HP_THERMAL_NUM 8
#define AVG_THERMAL_NUM 8
#define IQK_Matrix_REG_NUM 8
#define IQK_Matrix_Settings_NUM 1+24+21
#define DM_Type_ByFWi 0
#define DM_Type_ByDriver 1
/* Declare for common info */
struct odm_phy_status_info {
u8 RxPWDBAll;
u8 SignalQuality; /* in 0-100 index. */
u8 RxMIMOSignalQuality[MAX_PATH_NUM_92CS]; /* EVM */
u8 RxMIMOSignalStrength[MAX_PATH_NUM_92CS];/* in 0~100 index */
s8 RxPower; /* in dBm Translate from PWdB */
s8 RecvSignalPower;/* Real power in dBm for this packet, no
* beautification and aggregation. Keep this raw
* info to be used for the other procedures. */
u8 BTRxRSSIPercentage;
u8 SignalStrength; /* in 0-100 index. */
u8 RxPwr[MAX_PATH_NUM_92CS];/* per-path's pwdb */
u8 RxSNR[MAX_PATH_NUM_92CS];/* per-path's SNR */
};
struct odm_phy_dbg_info {
/* ODM Write,debug info */
@ -342,48 +224,23 @@ enum odm_common_info_def {
/* Fixed value: */
/* HOOK BEFORE REG INIT----------- */
ODM_CMNINFO_PLATFORM = 0,
ODM_CMNINFO_ABILITY, /* ODM_ABILITY_E */
ODM_CMNINFO_INTERFACE, /* ODM_INTERFACE_E */
ODM_CMNINFO_MP_TEST_CHIP,
ODM_CMNINFO_IC_TYPE, /* ODM_IC_TYPE_E */
ODM_CMNINFO_CUT_VER, /* ODM_CUT_VERSION_E */
ODM_CMNINFO_FAB_VER, /* ODM_FAB_E */
ODM_CMNINFO_RF_TYPE, /* RF_PATH_E or ODM_RF_TYPE_E? */
ODM_CMNINFO_BOARD_TYPE, /* ODM_BOARD_TYPE_E */
ODM_CMNINFO_EXT_LNA, /* true */
ODM_CMNINFO_EXT_PA,
ODM_CMNINFO_EXT_TRSW,
ODM_CMNINFO_PATCH_ID, /* CUSTOMER ID */
ODM_CMNINFO_BINHCT_TEST,
ODM_CMNINFO_BWIFI_TEST,
ODM_CMNINFO_SMART_CONCURRENT,
/* HOOK BEFORE REG INIT----------- */
/* Dynamic value: */
/* POINTER REFERENCE----------- */
ODM_CMNINFO_MAC_PHY_MODE, /* ODM_MAC_PHY_MODE_E */
ODM_CMNINFO_TX_UNI,
ODM_CMNINFO_RX_UNI,
ODM_CMNINFO_WM_MODE, /* ODM_WIRELESS_MODE_E */
ODM_CMNINFO_BAND, /* ODM_BAND_TYPE_E */
ODM_CMNINFO_SEC_CHNL_OFFSET, /* ODM_SEC_CHNL_OFFSET_E */
ODM_CMNINFO_SEC_MODE, /* ODM_SECURITY_E */
ODM_CMNINFO_BW, /* ODM_BW_E */
ODM_CMNINFO_CHNL,
ODM_CMNINFO_DMSP_GET_VALUE,
ODM_CMNINFO_BUDDY_ADAPTOR,
ODM_CMNINFO_DMSP_IS_MASTER,
ODM_CMNINFO_SCAN,
ODM_CMNINFO_POWER_SAVING,
ODM_CMNINFO_ONE_PATH_CCA, /* ODM_CCA_PATH_E */
ODM_CMNINFO_DRV_STOP,
ODM_CMNINFO_PNP_IN,
ODM_CMNINFO_INIT_ON,
ODM_CMNINFO_ANT_TEST,
ODM_CMNINFO_NET_CLOSED,
ODM_CMNINFO_MP_MODE,
/* POINTER REFERENCE----------- */
/* CALL BY VALUE------------- */
@ -391,21 +248,8 @@ enum odm_common_info_def {
ODM_CMNINFO_WIFI_DISPLAY,
ODM_CMNINFO_LINK,
ODM_CMNINFO_RSSI_MIN,
ODM_CMNINFO_RA_THRESHOLD_HIGH, /* u8 */
ODM_CMNINFO_RA_THRESHOLD_LOW, /* u8 */
ODM_CMNINFO_RF_ANTENNA_TYPE, /* u8 */
ODM_CMNINFO_BT_DISABLED,
ODM_CMNINFO_BT_OPERATION,
ODM_CMNINFO_BT_DIG,
ODM_CMNINFO_BT_BUSY, /* Check Bt is using or not */
ODM_CMNINFO_BT_DISABLE_EDCA,
/* CALL BY VALUE-------------*/
/* Dynamic ptr array hook itms. */
ODM_CMNINFO_STA_STATUS,
ODM_CMNINFO_PHY_STATUS,
ODM_CMNINFO_MAC_STATUS,
ODM_CMNINFO_MAX,
};
/* 2011/10/20 MH Define ODM support ability. ODM_CMNINFO_ABILITY */
@ -436,85 +280,7 @@ enum odm_ability_def {
ODM_RF_CALIBRATION = BIT(26),
};
/* ODM_CMNINFO_INTERFACE */
enum odm_interface_def {
ODM_ITRF_PCIE = 0x1,
ODM_ITRF_USB = 0x2,
ODM_ITRF_SDIO = 0x4,
ODM_ITRF_ALL = 0x7,
};
/* ODM_CMNINFO_IC_TYPE */
enum odm_ic_type {
ODM_RTL8192S = BIT(0),
ODM_RTL8192C = BIT(1),
ODM_RTL8192D = BIT(2),
ODM_RTL8723A = BIT(3),
ODM_RTL8188E = BIT(4),
ODM_RTL8812 = BIT(5),
ODM_RTL8821 = BIT(6),
};
#define ODM_IC_11N_SERIES \
(ODM_RTL8192S | ODM_RTL8192C | ODM_RTL8192D | \
ODM_RTL8723A | ODM_RTL8188E)
#define ODM_IC_11AC_SERIES (ODM_RTL8812)
/* ODM_CMNINFO_CUT_VER */
enum odm_cut_version {
ODM_CUT_A = 1,
ODM_CUT_B = 2,
ODM_CUT_C = 3,
ODM_CUT_D = 4,
ODM_CUT_E = 5,
ODM_CUT_F = 6,
ODM_CUT_TEST = 7,
};
/* ODM_CMNINFO_FAB_VER */
enum odm_fab_Version {
ODM_TSMC = 0,
ODM_UMC = 1,
};
/* ODM_CMNINFO_RF_TYPE */
/* For example 1T2R (A+AB = BIT(0)|BIT(4)|BIT(5)) */
enum odm_rf_path {
ODM_RF_TX_A = BIT(0),
ODM_RF_TX_B = BIT(1),
ODM_RF_TX_C = BIT(2),
ODM_RF_TX_D = BIT(3),
ODM_RF_RX_A = BIT(4),
ODM_RF_RX_B = BIT(5),
ODM_RF_RX_C = BIT(6),
ODM_RF_RX_D = BIT(7),
};
enum odm_rf_type {
ODM_1T1R = 0,
ODM_1T2R = 1,
ODM_2T2R = 2,
ODM_2T3R = 3,
ODM_2T4R = 4,
ODM_3T3R = 5,
ODM_3T4R = 6,
ODM_4T4R = 7,
};
/* ODM Dynamic common info value definition */
enum odm_mac_phy_mode {
ODM_SMSP = 0,
ODM_DMSP = 1,
ODM_DMDP = 2,
};
enum odm_bt_coexist {
ODM_BT_BUSY = 1,
ODM_BT_ON = 2,
ODM_BT_OFF = 3,
ODM_BT_NONE = 4,
};
# define ODM_ITRF_USB 0x2
/* ODM_CMNINFO_OP_MODE */
enum odm_operation_mode {
@ -538,52 +304,12 @@ enum odm_wireless_mode {
ODM_WM_AUTO = BIT(5),
};
/* ODM_CMNINFO_BAND */
enum odm_band_type {
ODM_BAND_2_4G = BIT(0),
};
/* ODM_CMNINFO_SEC_CHNL_OFFSET */
enum odm_sec_chnl_offset {
ODM_DONT_CARE = 0,
ODM_BELOW = 1,
ODM_ABOVE = 2
};
/* ODM_CMNINFO_SEC_MODE */
enum odm_security {
ODM_SEC_OPEN = 0,
ODM_SEC_WEP40 = 1,
ODM_SEC_TKIP = 2,
ODM_SEC_RESERVE = 3,
ODM_SEC_AESCCMP = 4,
ODM_SEC_WEP104 = 5,
ODM_WEP_WPA_MIXED = 6, /* WEP + WPA */
ODM_SEC_SMS4 = 7,
};
/* ODM_CMNINFO_BW */
enum odm_bw {
ODM_BW20M = 0,
ODM_BW40M = 1,
};
/* ODM_CMNINFO_BOARD_TYPE */
enum odm_board_type {
ODM_BOARD_NORMAL = 0,
ODM_BOARD_HIGHPWR = 1,
ODM_BOARD_MINICARD = 2,
ODM_BOARD_SLIM = 3,
ODM_BOARD_COMBO = 4,
};
/* ODM_CMNINFO_ONE_PATH_CCA */
enum odm_cca_path {
ODM_CCA_2R = 0,
ODM_CCA_1R_A = 1,
ODM_CCA_1R_B = 2,
};
struct odm_ra_info {
u8 RateID;
u32 RateMask;
@ -664,7 +390,7 @@ struct odm_rf_cal {
u8 ThermalValue_HP[HP_THERMAL_NUM];
u8 ThermalValue_HP_index;
struct ijk_matrix_regs_set IQKMatrixRegSetting[IQK_Matrix_Settings_NUM];
struct ijk_matrix_regs_set IQKMatrixRegSetting;
u8 Delta_IQK;
u8 Delta_LCK;
@ -680,7 +406,6 @@ struct odm_rf_cal {
u32 Reg864;
bool bIQKInitialized;
bool bLCKInProgress;
bool bAntennaDetected;
u32 ADDA_backup[IQK_ADDA_REG_NUM];
u32 IQK_MAC_backup[IQK_MAC_REG_NUM];
@ -730,7 +455,6 @@ enum ant_div_type {
CGCS_RX_HW_ANTDIV = 0x02,
FIXED_HW_ANTDIV = 0x03,
CG_TRX_SMART_ANTDIV = 0x04,
CGCS_RX_SW_ANTDIV = 0x05,
};
/* Copy from SD4 defined structure. We use to support PHY DM integration. */
@ -752,34 +476,9 @@ struct odm_dm_struct {
/* 1 COMMON INFORMATION */
/* Init Value */
/* HOOK BEFORE REG INIT----------- */
/* ODM Platform info AP/ADSL/CE/MP = 1/2/3/4 */
u8 SupportPlatform;
/* ODM Support Ability DIG/RATR/TX_PWR_TRACK/ <20>K<EFBFBD>K = 1/2/3/<2F>K */
u32 SupportAbility;
/* ODM PCIE/USB/SDIO/GSPI = 0/1/2/3 */
u8 SupportInterface;
/* ODM composite or independent. Bit oriented/ 92C+92D+ .... or any
* other type = 1/2/3/... */
u32 SupportICType;
/* Cut Version TestChip/A-cut/B-cut... = 0/1/2/3/... */
u8 CutVersion;
/* Fab Version TSMC/UMC = 0/1 */
u8 FabVersion;
/* RF Type 4T4R/3T3R/2T2R/1T2R/1T1R/... */
u8 RFType;
/* Board Type Normal/HighPower/MiniCard/SLIM/Combo/. = 0/1/2/3/4/. */
u8 BoardType;
/* with external LNA NO/Yes = 0/1 */
u8 ExtLNA;
/* with external PA NO/Yes = 0/1 */
u8 ExtPA;
/* with external TRSW NO/Yes = 0/1 */
u8 ExtTRSW;
u8 PatchID; /* Customer ID */
bool bInHctTest;
bool bWIFITest;
bool bDualMacSmartConcurrent;
u32 BK_SupportAbility;
u8 AntDivType;
/* HOOK BEFORE REG INIT----------- */
@ -791,16 +490,12 @@ struct odm_dm_struct {
bool bool_temp;
struct adapter *adapter_temp;
/* MAC PHY Mode SMSP/DMSP/DMDP = 0/1/2 */
u8 *pMacPhyMode;
/* TX Unicast byte count */
u64 *pNumTxBytesUnicast;
/* RX Unicast byte count */
u64 *pNumRxBytesUnicast;
/* Wireless mode B/G/A/N = BIT(0)/BIT(1)/BIT(2)/BIT(3) */
u8 *pWirelessMode; /* ODM_WIRELESS_MODE_E */
/* Frequence band 2.4G/5G = 0/1 */
u8 *pBandType;
/* Secondary channel offset don't_care/below/above = 0/1/2 */
u8 *pSecChOffset;
/* Security mode Open/WEP/AES/TKIP = 0/1/2/3 */
@ -850,13 +545,6 @@ struct odm_dm_struct {
struct odm_ra_info RAInfo[ODM_ASSOCIATE_ENTRY_NUM]; /* Use MacID as
* array index. STA MacID=0,
* VWiFi Client MacID={1, ODM_ASSOCIATE_ENTRY_NUM-1} */
/* */
/* 2012/02/14 MH Add to share 88E ra with other SW team. */
/* We need to colelct all support abilit to a proper area. */
/* */
bool RaSupport88E;
/* Define ........... */
/* Latest packet phy info (ODM write) */
struct odm_phy_dbg_info PhyDbgInfo;
@ -895,9 +583,6 @@ struct odm_dm_struct {
bool bPSDinProcess;
bool bDMInitialGainEnable;
/* for rate adaptive, in fact, 88c/92c fw will handle this */
u8 bUseRAMask;
struct odm_rate_adapt RateAdaptive;
struct odm_rf_cal RFCalibrateInfo;
@ -911,7 +596,6 @@ struct odm_dm_struct {
u8 BbSwingIdxCckCurrent;
u8 BbSwingIdxCckBase;
bool BbSwingFlagCck;
u8 *mp_mode;
/* ODM system resource. */
/* ODM relative time. */
@ -921,13 +605,6 @@ struct odm_dm_struct {
struct timer_list FastAntTrainingTimer;
}; /* DM_Dynamic_Mechanism_Structure */
enum ODM_RF_CONTENT {
odm_radioa_txt = 0x1000,
odm_radiob_txt = 0x1001,
odm_radioc_txt = 0x1002,
odm_radiod_txt = 0x1003
};
enum odm_bb_config_type {
CONFIG_BB_PHY_REG,
CONFIG_BB_AGC_TAB,
@ -935,38 +612,9 @@ enum odm_bb_config_type {
CONFIG_BB_PHY_REG_PG,
};
/* Status code */
enum rt_status {
RT_STATUS_SUCCESS,
RT_STATUS_FAILURE,
RT_STATUS_PENDING,
RT_STATUS_RESOURCE,
RT_STATUS_INVALID_CONTEXT,
RT_STATUS_INVALID_PARAMETER,
RT_STATUS_NOT_SUPPORT,
RT_STATUS_OS_API_FAILED,
};
/* 3=========================================================== */
/* 3 DIG */
/* 3=========================================================== */
enum dm_dig_op {
RT_TYPE_THRESH_HIGH = 0,
RT_TYPE_THRESH_LOW = 1,
RT_TYPE_BACKOFF = 2,
RT_TYPE_RX_GAIN_MIN = 3,
RT_TYPE_RX_GAIN_MAX = 4,
RT_TYPE_ENABLE = 5,
RT_TYPE_DISABLE = 6,
DIG_OP_TYPE_MAX
};
#define DM_DIG_THRESH_HIGH 40
#define DM_DIG_THRESH_LOW 35
#define DM_SCAN_RSSI_TH 0x14 /* scan return issue for LC */
#define DM_false_ALARM_THRESH_LOW 400
#define DM_false_ALARM_THRESH_HIGH 1000
@ -974,64 +622,17 @@ enum dm_dig_op {
#define DM_DIG_MIN_NIC 0x1e /* 0x22/0x1c */
#define DM_DIG_MAX_AP 0x32
#define DM_DIG_MIN_AP 0x20
#define DM_DIG_MAX_NIC_HP 0x46
#define DM_DIG_MIN_NIC_HP 0x2e
#define DM_DIG_MAX_AP_HP 0x42
#define DM_DIG_MIN_AP_HP 0x30
/* vivi 92c&92d has different definition, 20110504 */
/* this is for 92c */
#define DM_DIG_FA_TH0 0x200/* 0x20 */
#define DM_DIG_FA_TH1 0x300/* 0x100 */
#define DM_DIG_FA_TH2 0x400/* 0x200 */
/* this is for 92d */
#define DM_DIG_FA_TH0_92D 0x100
#define DM_DIG_FA_TH1_92D 0x400
#define DM_DIG_FA_TH2_92D 0x600
#define DM_DIG_BACKOFF_MAX 12
#define DM_DIG_BACKOFF_MIN -4
#define DM_DIG_BACKOFF_DEFAULT 10
/* 3=========================================================== */
/* 3 AGC RX High Power Mode */
/* 3=========================================================== */
#define LNA_Low_Gain_1 0x64
#define LNA_Low_Gain_2 0x5A
#define LNA_Low_Gain_3 0x58
#define FA_RXHP_TH1 5000
#define FA_RXHP_TH2 1500
#define FA_RXHP_TH3 800
#define FA_RXHP_TH4 600
#define FA_RXHP_TH5 500
/* 3=========================================================== */
/* 3 EDCA */
/* 3=========================================================== */
/* 3=========================================================== */
/* 3 Dynamic Tx Power */
/* 3=========================================================== */
/* Dynamic Tx Power Control Threshold */
#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67
#define TX_POWER_NEAR_FIELD_THRESH_AP 0x3F
#define TxHighPwrLevel_Normal 0
#define TxHighPwrLevel_Level1 1
#define TxHighPwrLevel_Level2 2
#define TxHighPwrLevel_BT1 3
#define TxHighPwrLevel_BT2 4
#define TxHighPwrLevel_15 5
#define TxHighPwrLevel_35 6
#define TxHighPwrLevel_50 7
#define TxHighPwrLevel_70 8
#define TxHighPwrLevel_100 9
/* 3=========================================================== */
/* 3 Rate Adaptive */
/* 3=========================================================== */
@ -1065,11 +666,7 @@ enum dm_swas {
Antenna_MAX = 3,
};
/* Maximal number of antenna detection mechanism needs to perform. */
#define MAX_ANTENNA_DETECTION_CNT 10
/* Extern Global Variables. */
#define OFDM_TABLE_SIZE_92C 37
#define OFDM_TABLE_SIZE_92D 43
#define CCK_TABLE_SIZE 33
@ -1079,44 +676,19 @@ extern u8 CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8];
/* check Sta pointer valid or not */
#define IS_STA_VALID(pSta) (pSta)
/* 20100514 Joseph: Add definition for antenna switching test after link. */
/* This indicates two different the steps. */
/* In SWAW_STEP_PEAK, driver needs to switch antenna and listen to the
* signal on the air. */
/* In SWAW_STEP_DETERMINE, driver just compares the signal captured in
* SWAW_STEP_PEAK */
/* with original RSSI to determine if it is necessary to switch antenna. */
#define SWAW_STEP_PEAK 0
#define SWAW_STEP_DETERMINE 1
void ODM_Write_DIG(struct odm_dm_struct *pDM_Odm, u8 CurrentIGI);
void ODM_Write_CCK_CCA_Thres(struct odm_dm_struct *pDM_Odm, u8 CurCCK_CCAThres);
void ODM_SetAntenna(struct odm_dm_struct *pDM_Odm, u8 Antenna);
#define dm_RF_Saving ODM_RF_Saving
void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u8 bForceInNormal);
#define SwAntDivRestAfterLink ODM_SwAntDivRestAfterLink
void ODM_SwAntDivRestAfterLink(struct odm_dm_struct *pDM_Odm);
#define dm_CheckTXPowerTracking ODM_TXPowerTrackingCheck
void ODM_TXPowerTrackingCheck(struct odm_dm_struct *pDM_Odm);
bool ODM_RAStateCheck(struct odm_dm_struct *pDM_Odm, s32 RSSI,
bool bForceUpdate, u8 *pRATRState);
#define dm_SWAW_RSSI_Check ODM_SwAntDivChkPerPktRssi
void ODM_SwAntDivChkPerPktRssi(struct odm_dm_struct *pDM_Odm, u8 StationID,
struct odm_phy_status_info *pPhyInfo);
u32 ConvertTo_dB(u32 Value);
u32 GetPSDData(struct odm_dm_struct *pDM_Odm, unsigned int point,
u8 initial_gain_psd);
void odm_DIGbyRSSI_LPS(struct odm_dm_struct *pDM_Odm);
u32 ODM_Get_Rate_Bitmap(struct odm_dm_struct *pDM_Odm, u32 macid,
u32 ra_mask, u8 rssi_level);
@ -1130,25 +702,6 @@ void ODM_CmnInfoInit(struct odm_dm_struct *pDM_Odm,
void ODM_CmnInfoHook(struct odm_dm_struct *pDM_Odm,
enum odm_common_info_def CmnInfo, void *pValue);
void ODM_CmnInfoPtrArrayHook(struct odm_dm_struct *pDM_Odm,
enum odm_common_info_def CmnInfo,
u16 Index, void *pValue);
void ODM_CmnInfoUpdate(struct odm_dm_struct *pDM_Odm, u32 CmnInfo, u64 Value);
void ODM_InitAllTimers(struct odm_dm_struct *pDM_Odm);
void ODM_CancelAllTimers(struct odm_dm_struct *pDM_Odm);
void ODM_ReleaseAllTimers(struct odm_dm_struct *pDM_Odm);
void ODM_AntselStatistics_88C(struct odm_dm_struct *pDM_Odm, u8 MacId,
u32 PWDBAll, bool isCCKrate);
void ODM_SingleDualAntennaDefaultSetting(struct odm_dm_struct *pDM_Odm);
bool ODM_SingleDualAntennaDetection(struct odm_dm_struct *pDM_Odm, u8 mode);
void odm_dtc(struct odm_dm_struct *pDM_Odm);
#endif

11
drivers/staging/r8188eu/include/odm_HWConfig.h
View File

@ -89,21 +89,12 @@ struct phy_status_rpt {
#endif
};
void odm_Init_RSSIForDM(struct odm_dm_struct *pDM_Odm);
void ODM_PhyStatusQuery(struct odm_dm_struct *pDM_Odm,
struct odm_phy_status_info *pPhyInfo,
struct phy_info *pPhyInfo,
u8 *pPhyStatus,
struct odm_per_pkt_info *pPktinfo,
struct adapter *adapt);
void ODM_MacStatusQuery(struct odm_dm_struct *pDM_Odm,
u8 *pMacStatus,
u8 MacID,
bool bPacketMatchBSSID,
bool bPacketToSelf,
bool bPacketBeacon);
enum HAL_STATUS ODM_ConfigRFWithHeaderFile(struct odm_dm_struct *pDM_Odm,
enum rf_radio_path Content,
enum rf_radio_path eRFPath);

2
drivers/staging/r8188eu/include/odm_RTL8188E.h
View File

@ -11,8 +11,6 @@
#define MAIN_ANT_CGCS_RX 0
#define AUX_ANT_CGCS_RX 1
void ODM_DIG_LowerBound_88E(struct odm_dm_struct *pDM_Odm);
void ODM_AntennaDiversityInit_88E(struct odm_dm_struct *pDM_Odm);
void ODM_AntennaDiversity_88E(struct odm_dm_struct *pDM_Odm);

3
drivers/staging/r8188eu/include/odm_RegConfig8188E.h
View File

@ -10,9 +10,6 @@ void odm_ConfigRFReg_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Data,
void odm_ConfigRF_RadioA_8188E(struct odm_dm_struct *pDM_Odm,
u32 Addr, u32 Data);
void odm_ConfigRF_RadioB_8188E(struct odm_dm_struct *pDM_Odm,
u32 Addr, u32 Data);
void odm_ConfigMAC_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u8 Data);
void odm_ConfigBB_AGC_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr,

29
drivers/staging/r8188eu/include/odm_RegDefine11AC.h
View File

@ -1,29 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __ODM_REGDEFINE11AC_H__
#define __ODM_REGDEFINE11AC_H__
/* 2 RF REG LIST */
/* 2 BB REG LIST */
/* PAGE 8 */
/* PAGE 9 */
#define ODM_REG_OFDM_FA_RST_11AC 0x9A4
/* PAGE A */
#define ODM_REG_CCK_CCA_11AC 0xA0A
#define ODM_REG_CCK_FA_RST_11AC 0xA2C
#define ODM_REG_CCK_FA_11AC 0xA5C
/* PAGE C */
#define ODM_REG_IGI_A_11AC 0xC50
/* PAGE E */
#define ODM_REG_IGI_B_11AC 0xE50
/* PAGE F */
#define ODM_REG_OFDM_FA_11AC 0xF48
/* 2 MAC REG LIST */
/* DIG Related */
#define ODM_BIT_IGI_11AC 0xFFFFFFFF
#endif

112
drivers/staging/r8188eu/include/odm_RegDefine11N.h
View File

@ -4,56 +4,20 @@
#ifndef __ODM_REGDEFINE11N_H__
#define __ODM_REGDEFINE11N_H__
/* 2 RF REG LIST */
#define ODM_REG_RF_MODE_11N 0x00
#define ODM_REG_RF_0B_11N 0x0B
#define ODM_REG_CHNBW_11N 0x18
#define ODM_REG_T_METER_11N 0x24
#define ODM_REG_RF_25_11N 0x25
#define ODM_REG_RF_26_11N 0x26
#define ODM_REG_RF_27_11N 0x27
#define ODM_REG_RF_2B_11N 0x2B
#define ODM_REG_RF_2C_11N 0x2C
#define ODM_REG_RXRF_A3_11N 0x3C
#define ODM_REG_T_METER_92D_11N 0x42
#define ODM_REG_T_METER_88E_11N 0x42
/* 2 BB REG LIST */
/* PAGE 8 */
#define ODM_REG_BB_CTRL_11N 0x800
#define ODM_REG_RF_PIN_11N 0x804
#define ODM_REG_PSD_CTRL_11N 0x808
#define ODM_REG_TX_ANT_CTRL_11N 0x80C
#define ODM_REG_BB_PWR_SAV5_11N 0x818
#define ODM_REG_CCK_RPT_FORMAT_11N 0x824
#define ODM_REG_RX_DEFUALT_A_11N 0x858
#define ODM_REG_RX_DEFUALT_B_11N 0x85A
#define ODM_REG_BB_PWR_SAV3_11N 0x85C
#define ODM_REG_ANTSEL_CTRL_11N 0x860
#define ODM_REG_RX_ANT_CTRL_11N 0x864
#define ODM_REG_PIN_CTRL_11N 0x870
#define ODM_REG_BB_PWR_SAV1_11N 0x874
#define ODM_REG_ANTSEL_PATH_11N 0x878
#define ODM_REG_BB_3WIRE_11N 0x88C
#define ODM_REG_SC_CNT_11N 0x8C4
#define ODM_REG_PSD_DATA_11N 0x8B4
#define ODM_REG_PIN_CTRL_11N 0x870
#define ODM_REG_SC_CNT_11N 0x8C4
/* PAGE 9 */
#define ODM_REG_ANT_MAPPING1_11N 0x914
#define ODM_REG_ANT_MAPPING2_11N 0x918
/* PAGE A */
#define ODM_REG_CCK_ANTDIV_PARA1_11N 0xA00
#define ODM_REG_CCK_CCA_11N 0xA0A
#define ODM_REG_CCK_ANTDIV_PARA2_11N 0xA0C
#define ODM_REG_CCK_ANTDIV_PARA3_11N 0xA10
#define ODM_REG_CCK_ANTDIV_PARA4_11N 0xA14
#define ODM_REG_CCK_FILTER_PARA1_11N 0xA22
#define ODM_REG_CCK_FILTER_PARA2_11N 0xA23
#define ODM_REG_CCK_FILTER_PARA3_11N 0xA24
#define ODM_REG_CCK_FILTER_PARA4_11N 0xA25
#define ODM_REG_CCK_FILTER_PARA5_11N 0xA26
#define ODM_REG_CCK_FILTER_PARA6_11N 0xA27
#define ODM_REG_CCK_FILTER_PARA7_11N 0xA28
#define ODM_REG_CCK_FILTER_PARA8_11N 0xA29
#define ODM_REG_CCK_ANTDIV_PARA1_11N 0xA00
#define ODM_REG_CCK_CCA_11N 0xA0A
#define ODM_REG_CCK_ANTDIV_PARA2_11N 0xA0C
#define ODM_REG_CCK_FA_RST_11N 0xA2C
#define ODM_REG_CCK_FA_MSB_11N 0xA58
#define ODM_REG_CCK_FA_LSB_11N 0xA5C
@ -61,28 +25,10 @@
#define ODM_REG_BB_PWR_SAV4_11N 0xA74
/* PAGE B */
#define ODM_REG_LNA_SWITCH_11N 0xB2C
#define ODM_REG_PATH_SWITCH_11N 0xB30
#define ODM_REG_RSSI_CTRL_11N 0xB38
#define ODM_REG_CONFIG_ANTA_11N 0xB68
#define ODM_REG_RSSI_BT_11N 0xB9C
/* PAGE C */
#define ODM_REG_OFDM_FA_HOLDC_11N 0xC00
#define ODM_REG_RX_PATH_11N 0xC04
#define ODM_REG_TRMUX_11N 0xC08
#define ODM_REG_OFDM_FA_RSTC_11N 0xC0C
#define ODM_REG_RXIQI_MATRIX_11N 0xC14
#define ODM_REG_TXIQK_MATRIX_LSB1_11N 0xC4C
#define ODM_REG_IGI_A_11N 0xC50
#define ODM_REG_ANTDIV_PARA2_11N 0xC54
#define ODM_REG_IGI_B_11N 0xC58
#define ODM_REG_ANTDIV_PARA3_11N 0xC5C
#define ODM_REG_BB_PWR_SAV2_11N 0xC70
#define ODM_REG_RX_OFF_11N 0xC7C
#define ODM_REG_TXIQK_MATRIXA_11N 0xC80
#define ODM_REG_TXIQK_MATRIXB_11N 0xC88
#define ODM_REG_TXIQK_MATRIXA_LSB2_11N 0xC94
#define ODM_REG_TXIQK_MATRIXB_LSB2_11N 0xC9C
#define ODM_REG_RXIQK_MATRIX_LSB_11N 0xCA0
#define ODM_REG_IGI_A_11N 0xC50
#define ODM_REG_ANTDIV_PARA1_11N 0xCA4
#define ODM_REG_OFDM_FA_TYPE1_11N 0xCF0
/* PAGE D */
@ -90,54 +36,12 @@
#define ODM_REG_OFDM_FA_TYPE2_11N 0xDA0
#define ODM_REG_OFDM_FA_TYPE3_11N 0xDA4
#define ODM_REG_OFDM_FA_TYPE4_11N 0xDA8
/* PAGE E */
#define ODM_REG_TXAGC_A_6_18_11N 0xE00
#define ODM_REG_TXAGC_A_24_54_11N 0xE04
#define ODM_REG_TXAGC_A_1_MCS32_11N 0xE08
#define ODM_REG_TXAGC_A_MCS0_3_11N 0xE10
#define ODM_REG_TXAGC_A_MCS4_7_11N 0xE14
#define ODM_REG_TXAGC_A_MCS8_11_11N 0xE18
#define ODM_REG_TXAGC_A_MCS12_15_11N 0xE1C
#define ODM_REG_FPGA0_IQK_11N 0xE28
#define ODM_REG_TXIQK_TONE_A_11N 0xE30
#define ODM_REG_RXIQK_TONE_A_11N 0xE34
#define ODM_REG_TXIQK_PI_A_11N 0xE38
#define ODM_REG_RXIQK_PI_A_11N 0xE3C
#define ODM_REG_TXIQK_11N 0xE40
#define ODM_REG_RXIQK_11N 0xE44
#define ODM_REG_IQK_AGC_PTS_11N 0xE48
#define ODM_REG_IQK_AGC_RSP_11N 0xE4C
#define ODM_REG_BLUETOOTH_11N 0xE6C
#define ODM_REG_RX_WAIT_CCA_11N 0xE70
#define ODM_REG_TX_CCK_RFON_11N 0xE74
#define ODM_REG_TX_CCK_BBON_11N 0xE78
#define ODM_REG_OFDM_RFON_11N 0xE7C
#define ODM_REG_OFDM_BBON_11N 0xE80
#define ODM_REG_TX2RX_11N 0xE84
#define ODM_REG_TX2TX_11N 0xE88
#define ODM_REG_RX_CCK_11N 0xE8C
#define ODM_REG_RX_OFDM_11N 0xED0
#define ODM_REG_RX_WAIT_RIFS_11N 0xED4
#define ODM_REG_RX2RX_11N 0xED8
#define ODM_REG_STANDBY_11N 0xEDC
#define ODM_REG_SLEEP_11N 0xEE0
#define ODM_REG_PMPD_ANAEN_11N 0xEEC
/* 2 MAC REG LIST */
#define ODM_REG_BB_RST_11N 0x02
#define ODM_REG_ANTSEL_PIN_11N 0x4C
#define ODM_REG_EARLY_MODE_11N 0x4D0
#define ODM_REG_RSSI_MONITOR_11N 0x4FE
#define ODM_REG_EDCA_VO_11N 0x500
#define ODM_REG_EDCA_VI_11N 0x504
#define ODM_REG_EDCA_BE_11N 0x508
#define ODM_REG_EDCA_BK_11N 0x50C
#define ODM_REG_TXPAUSE_11N 0x522
#define ODM_REG_RESP_TX_11N 0x6D8
#define ODM_REG_ANT_TRAIN_PARA1_11N 0x7b0
#define ODM_REG_ANT_TRAIN_PARA2_11N 0x7b4
#define ODM_REG_RESP_TX_11N 0x6D8
/* DIG Related */
#define ODM_BIT_IGI_11N 0x0000007F
#define ODM_BIT_IGI_11N 0x0000007F
#endif

88
drivers/staging/r8188eu/include/odm_interface.h
View File

@ -4,47 +4,6 @@
#ifndef __ODM_INTERFACE_H__
#define __ODM_INTERFACE_H__
/* */
/* =========== Constant/Structure/Enum/... Define */
/* */
/* */
/* =========== Macro Define */
/* */
#define _reg_all(_name) ODM_##_name
#define _reg_ic(_name, _ic) ODM_##_name##_ic
#define _bit_all(_name) BIT_##_name
#define _bit_ic(_name, _ic) BIT_##_name##_ic
/* _cat: implemented by Token-Pasting Operator. */
/*===================================
#define ODM_REG_DIG_11N 0xC50
#define ODM_REG_DIG_11AC 0xDDD
ODM_REG(DIG,_pDM_Odm)
=====================================*/
#define _reg_11N(_name) ODM_REG_##_name##_11N
#define _reg_11AC(_name) ODM_REG_##_name##_11AC
#define _bit_11N(_name) ODM_BIT_##_name##_11N
#define _bit_11AC(_name) ODM_BIT_##_name##_11AC
#define _cat(_name, _ic_type, _func) \
( \
((_ic_type) & ODM_IC_11N_SERIES) ? _func##_11N(_name) : \
_func##_11AC(_name) \
)
/* _name: name of register or bit. */
/* Example: "ODM_REG(R_A_AGC_CORE1, pDM_Odm)" */
/* gets "ODM_R_A_AGC_CORE1" or "ODM_R_A_AGC_CORE1_8192C",
* depends on SupportICType. */
#define ODM_REG(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _reg)
#define ODM_BIT(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _bit)
enum odm_h2c_cmd {
ODM_H2C_RSSI_REPORT = 0,
ODM_H2C_PSD_RESULT= 1,
@ -62,8 +21,6 @@ typedef void (*RT_WORKITEM_CALL_BACK)(void *pContext);
u8 ODM_Read1Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr);
u16 ODM_Read2Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr);
u32 ODM_Read4Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr);
void ODM_Write1Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u8 Data);
@ -89,59 +46,14 @@ u32 ODM_GetRFReg(struct odm_dm_struct *pDM_Odm, enum rf_radio_path eRFPath,
u32 RegAddr, u32 BitMask);
/* Memory Relative Function. */
void ODM_AllocateMemory(struct odm_dm_struct *pDM_Odm, void **pPtr, u32 length);
void ODM_FreeMemory(struct odm_dm_struct *pDM_Odm, void *pPtr, u32 length);
s32 ODM_CompareMemory(struct odm_dm_struct *pDM_Odm, void *pBuf1, void *pBuf2,
u32 length);
/* ODM MISC-spin lock relative API. */
void ODM_AcquireSpinLock(struct odm_dm_struct *pDM_Odm,
enum RT_SPINLOCK_TYPE type);
void ODM_ReleaseSpinLock(struct odm_dm_struct *pDM_Odm,
enum RT_SPINLOCK_TYPE type);
/* ODM MISC-workitem relative API. */
void ODM_InitializeWorkItem(struct odm_dm_struct *pDM_Odm, void *pRtWorkItem,
RT_WORKITEM_CALL_BACK RtWorkItemCallback,
void *pContext, const char *szID);
void ODM_StartWorkItem(void *pRtWorkItem);
void ODM_StopWorkItem(void *pRtWorkItem);
void ODM_FreeWorkItem(void *pRtWorkItem);
void ODM_ScheduleWorkItem(void *pRtWorkItem);
void ODM_IsWorkItemScheduled(void *pRtWorkItem);
/* ODM Timer relative API. */
void ODM_StallExecution(u32 usDelay);
void ODM_delay_ms(u32 ms);
void ODM_delay_us(u32 us);
void ODM_sleep_ms(u32 ms);
void ODM_sleep_us(u32 us);
void ODM_SetTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer,
u32 msDelay);
void ODM_InitializeTimer(struct odm_dm_struct *pDM_Odm,
struct timer_list *pTimer, void *CallBackFunc,
void *pContext, const char *szID);
void ODM_CancelTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer);
void ODM_ReleaseTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer);
/* ODM FW relative API. */
u32 ODM_FillH2CCmd(u8 *pH2CBuffer, u32 H2CBufferLen, u32 CmdNum,
u32 *pElementID, u32 *pCmdLen, u8 **pCmbBuffer,
u8 *CmdStartSeq);
#endif /* __ODM_INTERFACE_H__ */

22
drivers/staging/r8188eu/include/odm_precomp.h
View File

@ -18,7 +18,6 @@
#include "odm.h"
#include "odm_HWConfig.h"
#include "odm_RegDefine11AC.h"
#include "odm_RegDefine11N.h"
#include "HalPhyRf_8188e.h"/* for IQK,LCK,Power-tracking */
@ -26,7 +25,6 @@
#include "rtl8188e_hal.h"
#include "odm_interface.h"
#include "odm_reg.h"
#include "HalHWImg8188E_MAC.h"
#include "HalHWImg8188E_RF.h"
@ -38,38 +36,18 @@
void odm_DIGInit(struct odm_dm_struct *pDM_Odm);
void odm_RateAdaptiveMaskInit(struct odm_dm_struct *pDM_Odm);
void odm_DynamicBBPowerSavingInit(struct odm_dm_struct *pDM_Odm);
void odm_DynamicTxPowerInit(struct odm_dm_struct *pDM_Odm);
void odm_TXPowerTrackingInit(struct odm_dm_struct *pDM_Odm);
void ODM_EdcaTurboInit(struct odm_dm_struct *pDM_Odm);
void odm_SwAntDivInit_NIC(struct odm_dm_struct *pDM_Odm);
void odm_GlobalAdapterCheck(void);
void odm_CommonInfoSelfUpdate(struct odm_dm_struct *pDM_Odm);
void odm_FalseAlarmCounterStatistics(struct odm_dm_struct *pDM_Odm);
void odm_DIG(struct odm_dm_struct *pDM_Odm);
void odm_CCKPacketDetectionThresh(struct odm_dm_struct *pDM_Odm);
void odm_RefreshRateAdaptiveMaskMP(struct odm_dm_struct *pDM_Odm);
void odm_DynamicBBPowerSaving(struct odm_dm_struct *pDM_Odm);
void odm_SwAntDivChkAntSwitch(struct odm_dm_struct *pDM_Odm, u8 Step);
void odm_EdcaTurboCheck(struct odm_dm_struct *pDM_Odm);
void odm_DynamicTxPower(struct odm_dm_struct *pDM_Odm);
void odm_CommonInfoSelfInit(struct odm_dm_struct *pDM_Odm);
void odm_SwAntDivInit(struct odm_dm_struct *pDM_Odm);
void odm_RSSIMonitorCheck(struct odm_dm_struct *pDM_Odm);
void odm_RefreshRateAdaptiveMask(struct odm_dm_struct *pDM_Odm);
void odm_1R_CCA(struct odm_dm_struct *pDM_Odm);
void odm_RefreshRateAdaptiveMaskCE(struct odm_dm_struct *pDM_Odm);
void odm_RefreshRateAdaptiveMaskAPADSL(struct odm_dm_struct *pDM_Odm);
void odm_DynamicTxPowerNIC(struct odm_dm_struct *pDM_Odm);
void odm_DynamicTxPowerAP(struct odm_dm_struct *pDM_Odm);
void odm_RSSIMonitorCheckMP(struct odm_dm_struct *pDM_Odm);
void odm_RSSIMonitorCheckCE(struct odm_dm_struct *pDM_Odm);
void odm_RSSIMonitorCheckAP(struct odm_dm_struct *pDM_Odm);
void odm_TXPowerTrackingThermalMeterInit(struct odm_dm_struct *pDM_Odm);
void odm_EdcaTurboCheckCE(struct odm_dm_struct *pDM_Odm);
void odm_TXPowerTrackingCheckCE(struct odm_dm_struct *pDM_Odm);
void odm_TXPowerTrackingCheckMP(struct odm_dm_struct *pDM_Odm);
void odm_TXPowerTrackingCheckAP(struct odm_dm_struct *pDM_Odm);
void odm_SwAntDivChkAntSwitchCallback(struct timer_list *t);
void odm_InitHybridAntDiv(struct odm_dm_struct *pDM_Odm);
void odm_HwAntDiv(struct odm_dm_struct *pDM_Odm);

89
drivers/staging/r8188eu/include/odm_reg.h
View File

@ -1,89 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. i*/
#ifndef __HAL_ODM_REG_H__
#define __HAL_ODM_REG_H__
/* Register Definition */
/* MAC REG */
#define ODM_BB_RESET 0x002
#define ODM_DUMMY 0x4fe
#define ODM_EDCA_VO_PARAM 0x500
#define ODM_EDCA_VI_PARAM 0x504
#define ODM_EDCA_BE_PARAM 0x508
#define ODM_EDCA_BK_PARAM 0x50C
#define ODM_TXPAUSE 0x522
/* BB REG */
#define ODM_FPGA_PHY0_PAGE8 0x800
#define ODM_PSD_SETTING 0x808
#define ODM_AFE_SETTING 0x818
#define ODM_TXAGC_B_6_18 0x830
#define ODM_TXAGC_B_24_54 0x834
#define ODM_TXAGC_B_MCS32_5 0x838
#define ODM_TXAGC_B_MCS0_MCS3 0x83c
#define ODM_TXAGC_B_MCS4_MCS7 0x848
#define ODM_TXAGC_B_MCS8_MCS11 0x84c
#define ODM_ANALOG_REGISTER 0x85c
#define ODM_RF_INTERFACE_OUTPUT 0x860
#define ODM_TXAGC_B_MCS12_MCS15 0x868
#define ODM_TXAGC_B_11_A_2_11 0x86c
#define ODM_AD_DA_LSB_MASK 0x874
#define ODM_ENABLE_3_WIRE 0x88c
#define ODM_PSD_REPORT 0x8b4
#define ODM_R_ANT_SELECT 0x90c
#define ODM_CCK_ANT_SELECT 0xa07
#define ODM_CCK_PD_THRESH 0xa0a
#define ODM_CCK_RF_REG1 0xa11
#define ODM_CCK_MATCH_FILTER 0xa20
#define ODM_CCK_RAKE_MAC 0xa2e
#define ODM_CCK_CNT_RESET 0xa2d
#define ODM_CCK_TX_DIVERSITY 0xa2f
#define ODM_CCK_FA_CNT_MSB 0xa5b
#define ODM_CCK_FA_CNT_LSB 0xa5c
#define ODM_CCK_NEW_FUNCTION 0xa75
#define ODM_OFDM_PHY0_PAGE_C 0xc00
#define ODM_OFDM_RX_ANT 0xc04
#define ODM_R_A_RXIQI 0xc14
#define ODM_R_A_AGC_CORE1 0xc50
#define ODM_R_A_AGC_CORE2 0xc54
#define ODM_R_B_AGC_CORE1 0xc58
#define ODM_R_AGC_PAR 0xc70
#define ODM_R_HTSTF_AGC_PAR 0xc7c
#define ODM_TX_PWR_TRAINING_A 0xc90
#define ODM_TX_PWR_TRAINING_B 0xc98
#define ODM_OFDM_FA_CNT1 0xcf0
#define ODM_OFDM_PHY0_PAGE_D 0xd00
#define ODM_OFDM_FA_CNT2 0xda0
#define ODM_OFDM_FA_CNT3 0xda4
#define ODM_OFDM_FA_CNT4 0xda8
#define ODM_TXAGC_A_6_18 0xe00
#define ODM_TXAGC_A_24_54 0xe04
#define ODM_TXAGC_A_1_MCS32 0xe08
#define ODM_TXAGC_A_MCS0_MCS3 0xe10
#define ODM_TXAGC_A_MCS4_MCS7 0xe14
#define ODM_TXAGC_A_MCS8_MCS11 0xe18
#define ODM_TXAGC_A_MCS12_MCS15 0xe1c
/* RF REG */
#define ODM_GAIN_SETTING 0x00
#define ODM_CHANNEL 0x18
/* Ant Detect Reg */
#define ODM_DPDT 0x300
/* PSD Init */
#define ODM_PSDREG 0x808
/* 92D Path Div */
#define PATHDIV_REG 0xB30
#define PATHDIV_TRI 0xBA0
/* */
/* Bitmap Definition */
/* */
#define BIT_FA_RESET BIT(0)
#endif

24
drivers/staging/r8188eu/include/odm_types.h
View File

@ -4,31 +4,13 @@
#ifndef __ODM_TYPES_H__
#define __ODM_TYPES_H__
/* */
/* Define Different SW team support */
/* */
#define ODM_AP 0x01 /* BIT(0) */
#define ODM_ADSL 0x02 /* BIT(1) */
#define ODM_CE 0x04 /* BIT(2) */
#define ODM_MP 0x08 /* BIT(3) */
#define RT_PCI_INTERFACE 1
#define RT_USB_INTERFACE 2
#define RT_SDIO_INTERFACE 3
enum HAL_STATUS {
HAL_STATUS_SUCCESS,
HAL_STATUS_FAILURE,
};
enum RT_SPINLOCK_TYPE {
RT_TEMP = 1,
};
#include "basic_types.h"
#define DEV_BUS_TYPE RT_USB_INTERFACE
#define SET_TX_DESC_ANTSEL_A_88E(__ptxdesc, __value) \
le32p_replace_bits((__le32 *)(__ptxdesc + 8), __value, BIT(24))
#define SET_TX_DESC_ANTSEL_B_88E(__ptxdesc, __value) \
@ -36,10 +18,4 @@ enum RT_SPINLOCK_TYPE {
#define SET_TX_DESC_ANTSEL_C_88E(__ptxdesc, __value) \
le32p_replace_bits((__le32 *)(__ptxdesc + 28), __value, BIT(29))
/* define useless flag to avoid compile warning */
#define USE_WORKITEM 0
#define FOR_BRAZIL_PRETEST 0
#define BT_30_SUPPORT 0
#define FPGA_TWO_MAC_VERIFICATION 0
#endif /* __ODM_TYPES_H__ */

5
drivers/staging/r8188eu/include/osdep_intf.h
View File

@ -34,7 +34,6 @@ The protection mechanism is through the pending queue.
struct urb *piorw_urb;
u8 io_irp_cnt;
u8 bio_irp_pending;
struct semaphore io_retevt;
struct timer_list io_timer;
u8 bio_irp_timeout;
u8 bio_timer_cancel;
@ -51,14 +50,10 @@ void rtw_cancel_all_timer(struct adapter *padapter);
int rtw_init_netdev_name(struct net_device *pnetdev, const char *ifname);
struct net_device *rtw_init_netdev(struct adapter *padapter);
u16 rtw_recv_select_queue(struct sk_buff *skb);
void rtw_proc_init_one(struct net_device *dev);
void rtw_proc_remove_one(struct net_device *dev);
void rtw_ips_dev_unload(struct adapter *padapter);
int rtw_ips_pwr_up(struct adapter *padapter);
void rtw_ips_pwr_down(struct adapter *padapter);
int rtw_hw_suspend(struct adapter *padapter);
int rtw_hw_resume(struct adapter *padapter);
#endif /* _OSDEP_INTF_H_ */

42
drivers/staging/r8188eu/include/osdep_service.h
View File

@ -56,19 +56,6 @@ static inline struct list_head *get_list_head(struct __queue *queue)
return (&(queue->queue));
}
static inline int _enter_critical_mutex(struct mutex *pmutex, unsigned long *pirqL)
{
int ret;
ret = mutex_lock_interruptible(pmutex);
return ret;
}
static inline void _exit_critical_mutex(struct mutex *pmutex, unsigned long *pirqL)
{
mutex_unlock(pmutex);
}
static inline void rtw_list_delete(struct list_head *plist)
{
list_del_init(plist);
@ -154,11 +141,11 @@ extern unsigned char RSN_TKIP_CIPHER[4];
void *rtw_malloc2d(int h, int w, int size);
u32 _rtw_down_sema(struct semaphore *sema);
void _rtw_mutex_init(struct mutex *pmutex);
void _rtw_mutex_free(struct mutex *pmutex);
void _rtw_init_queue(struct __queue *pqueue);
#define rtw_init_queue(q) \
do { \
INIT_LIST_HEAD(&((q)->queue)); \
spin_lock_init(&((q)->lock)); \
} while (0)
u32 rtw_systime_to_ms(u32 systime);
u32 rtw_ms_to_systime(u32 ms);
@ -166,32 +153,17 @@ s32 rtw_get_passing_time_ms(u32 start);
void rtw_usleep_os(int us);
u32 rtw_atoi(u8 *s);
static inline unsigned char _cancel_timer_ex(struct timer_list *ptimer)
{
return del_timer_sync(ptimer);
}
static __inline void thread_enter(char *name)
{
#ifdef daemonize
daemonize("%s", name);
#endif
allow_signal(SIGTERM);
}
static inline void flush_signals_thread(void)
{
if (signal_pending (current))
flush_signals(current);
}
static inline int res_to_status(int res)
{
return res;
}
#define _RND(sz, r) ((((sz)+((r)-1))/(r))*(r))
#define RND4(x) (((x >> 2) + (((x & 3) == 0) ? 0: 1)) << 2)
@ -302,12 +274,10 @@ struct rtw_cbuf {
u32 write;
u32 read;
u32 size;
void *bufs[0];
void *bufs[];
};
bool rtw_cbuf_full(struct rtw_cbuf *cbuf);
bool rtw_cbuf_empty(struct rtw_cbuf *cbuf);
bool rtw_cbuf_push(struct rtw_cbuf *cbuf, void *buf);
void *rtw_cbuf_pop(struct rtw_cbuf *cbuf);
struct rtw_cbuf *rtw_cbuf_alloc(u32 size);
int wifirate2_ratetbl_inx(unsigned char rate);

2
drivers/staging/r8188eu/include/recv_osdep.h
View File

@ -27,8 +27,6 @@ void rtw_os_recv_resource_free(struct recv_priv *precvpriv);
int rtw_os_recvbuf_resource_alloc(struct adapter *adapt, struct recv_buf *buf);
int rtw_os_recvbuf_resource_free(struct adapter *adapt, struct recv_buf *buf);
void rtw_os_read_port(struct adapter *padapter, struct recv_buf *precvbuf);
void rtw_init_recv_timer(struct recv_reorder_ctrl *preorder_ctrl);
int _netdev_open(struct net_device *pnetdev);
int netdev_open(struct net_device *pnetdev);

16
drivers/staging/r8188eu/include/rtl8188e_cmd.h
View File

@ -27,15 +27,6 @@ enum RTL8188E_H2C_CMD_ID {
/* Class DM */
H2C_DM_MACID_CFG = 0x40,
H2C_DM_TXBF = 0x41,
/* Class BT */
H2C_BT_COEX_MASK = 0x60,
H2C_BT_COEX_GPIO_MODE = 0x61,
H2C_BT_DAC_SWING_VAL = 0x62,
H2C_BT_PSD_RST = 0x63,
/* Class */
H2C_RESET_TSF = 0xc0,
};
struct cmd_msg_parm {
@ -44,10 +35,6 @@ struct cmd_msg_parm {
u8 buf[6];
};
enum {
PWRS
};
struct setpwrmode_parm {
u8 Mode;/* 0:Active,1:LPS,2:WMMPS */
u8 SmartPS_RLBM;/* LPS= 0:PS_Poll,1:PS_Poll,2:NullData,WMM= 0:PS_Poll,1:NullData */
@ -91,14 +78,11 @@ struct P2P_PS_CTWPeriod_t {
/* host message to firmware cmd */
void rtl8188e_set_FwPwrMode_cmd(struct adapter *padapter, u8 Mode);
void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *padapter, u8 mstatus);
u8 rtl8188e_set_rssi_cmd(struct adapter *padapter, u8 *param);
u8 rtl8188e_set_raid_cmd(struct adapter *padapter, u32 mask);
void rtl8188e_Add_RateATid(struct adapter *padapter, u32 bitmap, u8 arg,
u8 rssi_level);
#ifdef CONFIG_88EU_P2P
void rtl8188e_set_p2p_ps_offload_cmd(struct adapter *adapt, u8 p2p_ps_state);
#endif /* CONFIG_88EU_P2P */
void CheckFwRsvdPageContent(struct adapter *adapt);
void rtl8188e_set_FwMediaStatus_cmd(struct adapter *adapt, __le16 mstatus_rpt);

13
drivers/staging/r8188eu/include/rtl8188e_dm.h
View File

@ -15,28 +15,15 @@ enum{
#define HP_THERMAL_NUM 8
/* duplicate code,will move to ODM ######### */
struct dm_priv {
u8 DM_Type;
u8 DMFlag;
u8 InitDMFlag;
u32 InitODMFlag;
/* Upper and Lower Signal threshold for Rate Adaptive*/
int UndecoratedSmoothedPWDB;
int UndecoratedSmoothedCCK;
int EntryMinUndecoratedSmoothedPWDB;
int EntryMaxUndecoratedSmoothedPWDB;
int MinUndecoratedPWDBForDM;
int LastMinUndecoratedPWDBForDM;
/* for High Power */
u8 bDynamicTxPowerEnable;
u8 LastDTPLvl;
u8 DynamicTxHighPowerLvl;/* Tx Power Control for Near/Far Range */
u8 PowerIndex_backup[6];
};
void rtl8188e_init_dm_priv(struct adapter *adapt);
void rtl8188e_deinit_dm_priv(struct adapter *adapt);
void rtl8188e_InitHalDm(struct adapter *adapt);
void rtl8188e_HalDmWatchDog(struct adapter *adapt);

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