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drm/nva3/fbram: restrict training pattern setup to GT218 

It doesn't look like the others have the registers.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2014-03-19 05:23:10 +10:00
parent 8687c5d7b1
commit 5ca929b952
1 changed files with 16 additions and 14 deletions
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2
drivers/gpu/drm/nouveau/core/subdev/fb/ramnva3.c
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@ -335,6 +335,7 @@ nva3_ram_init(struct nouveau_object *object)
/* prepare for ddr link training, and load training patterns */ /* prepare for ddr link training, and load training patterns */
switch (ram->base.type) { switch (ram->base.type) {
case NV_MEM_TYPE_DDR3: { case NV_MEM_TYPE_DDR3: {
if (nv_device(pfb)->chipset == 0xa8) {
static const u32 pattern[16] = { static const u32 pattern[16] = {
0xaaaaaaaa, 0xcccccccc, 0xdddddddd, 0xeeeeeeee, 0xaaaaaaaa, 0xcccccccc, 0xdddddddd, 0xeeeeeeee,
0x00000000, 0x11111111, 0x44444444, 0xdddddddd, 0x00000000, 0x11111111, 0x44444444, 0xdddddddd,
@ -352,6 +353,7 @@ nva3_ram_init(struct nouveau_object *object)
nv_wr32(pfb, 0x10f920, pattern[i % 16]); nv_wr32(pfb, 0x10f920, pattern[i % 16]);
} }
} }
}
break; break;
default: default:
break; break;