drm/amdgpu: refine gfx_v8 pg code.
move en/disable GFX CP/SMU_HS PG to function gfx_v8_0_set_powergating_state Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -4024,17 +4024,6 @@ static void gfx_v8_0_init_pg(struct amdgpu_device *adev)
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WREG32(mmRLC_JUMP_TABLE_RESTORE, adev->gfx.rlc.cp_table_gpu_addr >> 8);
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gfx_v8_0_init_power_gating(adev);
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WREG32(mmRLC_PG_ALWAYS_ON_CU_MASK, adev->gfx.cu_info.ao_cu_mask);
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if (adev->pg_flags & AMD_PG_SUPPORT_RLC_SMU_HS) {
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cz_enable_sck_slow_down_on_power_up(adev, true);
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cz_enable_sck_slow_down_on_power_down(adev, true);
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} else {
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cz_enable_sck_slow_down_on_power_up(adev, false);
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cz_enable_sck_slow_down_on_power_down(adev, false);
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}
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if (adev->pg_flags & AMD_PG_SUPPORT_CP)
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cz_enable_cp_power_gating(adev, true);
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else
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cz_enable_cp_power_gating(adev, false);
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} else if ((adev->asic_type == CHIP_POLARIS11) ||
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(adev->asic_type == CHIP_POLARIS12)) {
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gfx_v8_0_init_csb(adev);
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@ -5360,6 +5349,18 @@ static int gfx_v8_0_set_powergating_state(void *handle,
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case CHIP_CARRIZO:
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case CHIP_STONEY:
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if (adev->pg_flags & AMD_PG_SUPPORT_RLC_SMU_HS) {
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cz_enable_sck_slow_down_on_power_up(adev, true);
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cz_enable_sck_slow_down_on_power_down(adev, true);
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} else {
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cz_enable_sck_slow_down_on_power_up(adev, false);
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cz_enable_sck_slow_down_on_power_down(adev, false);
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}
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if (adev->pg_flags & AMD_PG_SUPPORT_CP)
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cz_enable_cp_power_gating(adev, true);
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else
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cz_enable_cp_power_gating(adev, false);
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cz_update_gfx_cg_power_gating(adev, enable);
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if ((adev->pg_flags & AMD_PG_SUPPORT_GFX_SMG) && enable)
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