[SCSI] Merge up to linux-2.6 head
Conflicts: drivers/scsi/jazz_esp.c Same changes made by both SCSI and SPARC trees: problem with UTF-8 conversion in the copyright. Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
This commit is contained in:
James Bottomley
commit
5bc65793cb
|
|
@ -495,29 +495,40 @@ re-formatting you may want to take a look at the man page. But
|
|||
remember: "indent" is not a fix for bad programming.
|
||||
|
||||
|
||||
Chapter 10: Configuration-files
|
||||
Chapter 10: Kconfig configuration files
|
||||
|
||||
For configuration options (arch/xxx/Kconfig, and all the Kconfig files),
|
||||
somewhat different indentation is used.
|
||||
For all of the Kconfig* configuration files throughout the source tree,
|
||||
the indentation is somewhat different. Lines under a "config" definition
|
||||
are indented with one tab, while help text is indented an additional two
|
||||
spaces. Example:
|
||||
|
||||
Help text is indented with 2 spaces.
|
||||
|
||||
if CONFIG_EXPERIMENTAL
|
||||
tristate CONFIG_BOOM
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||||
default n
|
||||
config AUDIT
|
||||
bool "Auditing support"
|
||||
depends on NET
|
||||
help
|
||||
Apply nitroglycerine inside the keyboard (DANGEROUS)
|
||||
bool CONFIG_CHEER
|
||||
depends on CONFIG_BOOM
|
||||
default y
|
||||
help
|
||||
Output nice messages when you explode
|
||||
endif
|
||||
Enable auditing infrastructure that can be used with another
|
||||
kernel subsystem, such as SELinux (which requires this for
|
||||
logging of avc messages output). Does not do system-call
|
||||
auditing without CONFIG_AUDITSYSCALL.
|
||||
|
||||
Generally, CONFIG_EXPERIMENTAL should surround all options not considered
|
||||
stable. All options that are known to trash data (experimental write-
|
||||
support for file-systems, for instance) should be denoted (DANGEROUS), other
|
||||
experimental options should be denoted (EXPERIMENTAL).
|
||||
Features that might still be considered unstable should be defined as
|
||||
dependent on "EXPERIMENTAL":
|
||||
|
||||
config SLUB
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depends on EXPERIMENTAL && !ARCH_USES_SLAB_PAGE_STRUCT
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||||
bool "SLUB (Unqueued Allocator)"
|
||||
...
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||||
|
||||
while seriously dangerous features (such as write support for certain
|
||||
filesystems) should advertise this prominently in their prompt string:
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|
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config ADFS_FS_RW
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bool "ADFS write support (DANGEROUS)"
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depends on ADFS_FS
|
||||
...
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||||
For full documentation on the configuration files, see the file
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Documentation/kbuild/kconfig-language.txt.
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|
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|
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Chapter 11: Data structures
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|
|
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|
|
@ -52,7 +52,7 @@
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|||
|
||||
<toc></toc>
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||||
|
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<chapter><title>Introduction</title>
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<chapter id="intro"><title>Introduction</title>
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||||
|
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<para>This document presents a Linux-USB "Gadget"
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kernel mode
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||||
|
|
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|
|
@ -551,10 +551,12 @@
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<function>spin_lock_irqsave()</function>, which is a superset
|
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of all other spinlock primitives.
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||||
</para>
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|
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<table>
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<title>Table of Locking Requirements</title>
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||||
<tgroup cols="11">
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||||
<tbody>
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||||
|
||||
<row>
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<entry></entry>
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<entry>IRQ Handler A</entry>
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|
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@ -576,97 +578,128 @@
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|
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<row>
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||||
<entry>IRQ Handler B</entry>
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||||
<entry>spin_lock_irqsave</entry>
|
||||
<entry>SLIS</entry>
|
||||
<entry>None</entry>
|
||||
</row>
|
||||
|
||||
<row>
|
||||
<entry>Softirq A</entry>
|
||||
<entry>spin_lock_irq</entry>
|
||||
<entry>spin_lock_irq</entry>
|
||||
<entry>spin_lock</entry>
|
||||
<entry>SLI</entry>
|
||||
<entry>SLI</entry>
|
||||
<entry>SL</entry>
|
||||
</row>
|
||||
|
||||
<row>
|
||||
<entry>Softirq B</entry>
|
||||
<entry>spin_lock_irq</entry>
|
||||
<entry>spin_lock_irq</entry>
|
||||
<entry>spin_lock</entry>
|
||||
<entry>spin_lock</entry>
|
||||
<entry>SLI</entry>
|
||||
<entry>SLI</entry>
|
||||
<entry>SL</entry>
|
||||
<entry>SL</entry>
|
||||
</row>
|
||||
|
||||
<row>
|
||||
<entry>Tasklet A</entry>
|
||||
<entry>spin_lock_irq</entry>
|
||||
<entry>spin_lock_irq</entry>
|
||||
<entry>spin_lock</entry>
|
||||
<entry>spin_lock</entry>
|
||||
<entry>SLI</entry>
|
||||
<entry>SLI</entry>
|
||||
<entry>SL</entry>
|
||||
<entry>SL</entry>
|
||||
<entry>None</entry>
|
||||
</row>
|
||||
|
||||
<row>
|
||||
<entry>Tasklet B</entry>
|
||||
<entry>spin_lock_irq</entry>
|
||||
<entry>spin_lock_irq</entry>
|
||||
<entry>spin_lock</entry>
|
||||
<entry>spin_lock</entry>
|
||||
<entry>spin_lock</entry>
|
||||
<entry>SLI</entry>
|
||||
<entry>SLI</entry>
|
||||
<entry>SL</entry>
|
||||
<entry>SL</entry>
|
||||
<entry>SL</entry>
|
||||
<entry>None</entry>
|
||||
</row>
|
||||
|
||||
<row>
|
||||
<entry>Timer A</entry>
|
||||
<entry>spin_lock_irq</entry>
|
||||
<entry>spin_lock_irq</entry>
|
||||
<entry>spin_lock</entry>
|
||||
<entry>spin_lock</entry>
|
||||
<entry>spin_lock</entry>
|
||||
<entry>spin_lock</entry>
|
||||
<entry>SLI</entry>
|
||||
<entry>SLI</entry>
|
||||
<entry>SL</entry>
|
||||
<entry>SL</entry>
|
||||
<entry>SL</entry>
|
||||
<entry>SL</entry>
|
||||
<entry>None</entry>
|
||||
</row>
|
||||
|
||||
<row>
|
||||
<entry>Timer B</entry>
|
||||
<entry>spin_lock_irq</entry>
|
||||
<entry>spin_lock_irq</entry>
|
||||
<entry>spin_lock</entry>
|
||||
<entry>spin_lock</entry>
|
||||
<entry>spin_lock</entry>
|
||||
<entry>spin_lock</entry>
|
||||
<entry>spin_lock</entry>
|
||||
<entry>SLI</entry>
|
||||
<entry>SLI</entry>
|
||||
<entry>SL</entry>
|
||||
<entry>SL</entry>
|
||||
<entry>SL</entry>
|
||||
<entry>SL</entry>
|
||||
<entry>SL</entry>
|
||||
<entry>None</entry>
|
||||
</row>
|
||||
|
||||
<row>
|
||||
<entry>User Context A</entry>
|
||||
<entry>spin_lock_irq</entry>
|
||||
<entry>spin_lock_irq</entry>
|
||||
<entry>spin_lock_bh</entry>
|
||||
<entry>spin_lock_bh</entry>
|
||||
<entry>spin_lock_bh</entry>
|
||||
<entry>spin_lock_bh</entry>
|
||||
<entry>spin_lock_bh</entry>
|
||||
<entry>spin_lock_bh</entry>
|
||||
<entry>SLI</entry>
|
||||
<entry>SLI</entry>
|
||||
<entry>SLBH</entry>
|
||||
<entry>SLBH</entry>
|
||||
<entry>SLBH</entry>
|
||||
<entry>SLBH</entry>
|
||||
<entry>SLBH</entry>
|
||||
<entry>SLBH</entry>
|
||||
<entry>None</entry>
|
||||
</row>
|
||||
|
||||
<row>
|
||||
<entry>User Context B</entry>
|
||||
<entry>spin_lock_irq</entry>
|
||||
<entry>spin_lock_irq</entry>
|
||||
<entry>spin_lock_bh</entry>
|
||||
<entry>spin_lock_bh</entry>
|
||||
<entry>spin_lock_bh</entry>
|
||||
<entry>spin_lock_bh</entry>
|
||||
<entry>spin_lock_bh</entry>
|
||||
<entry>spin_lock_bh</entry>
|
||||
<entry>down_interruptible</entry>
|
||||
<entry>SLI</entry>
|
||||
<entry>SLI</entry>
|
||||
<entry>SLBH</entry>
|
||||
<entry>SLBH</entry>
|
||||
<entry>SLBH</entry>
|
||||
<entry>SLBH</entry>
|
||||
<entry>SLBH</entry>
|
||||
<entry>SLBH</entry>
|
||||
<entry>DI</entry>
|
||||
<entry>None</entry>
|
||||
</row>
|
||||
|
||||
</tbody>
|
||||
</tgroup>
|
||||
</table>
|
||||
|
||||
<table>
|
||||
<title>Legend for Locking Requirements Table</title>
|
||||
<tgroup cols="2">
|
||||
<tbody>
|
||||
|
||||
<row>
|
||||
<entry>SLIS</entry>
|
||||
<entry>spin_lock_irqsave</entry>
|
||||
</row>
|
||||
<row>
|
||||
<entry>SLI</entry>
|
||||
<entry>spin_lock_irq</entry>
|
||||
</row>
|
||||
<row>
|
||||
<entry>SL</entry>
|
||||
<entry>spin_lock</entry>
|
||||
</row>
|
||||
<row>
|
||||
<entry>SLBH</entry>
|
||||
<entry>spin_lock_bh</entry>
|
||||
</row>
|
||||
<row>
|
||||
<entry>DI</entry>
|
||||
<entry>down_interruptible</entry>
|
||||
</row>
|
||||
|
||||
</tbody>
|
||||
</tgroup>
|
||||
</table>
|
||||
|
||||
</sect1>
|
||||
</chapter>
|
||||
|
||||
|
|
|
|||
|
|
@ -185,7 +185,7 @@
|
|||
|
||||
</chapter>
|
||||
|
||||
<chapter><title>USB-Standard Types</title>
|
||||
<chapter id="types"><title>USB-Standard Types</title>
|
||||
|
||||
<para>In <filename><linux/usb/ch9.h></filename> you will find
|
||||
the USB data types defined in chapter 9 of the USB specification.
|
||||
|
|
@ -197,7 +197,7 @@
|
|||
|
||||
</chapter>
|
||||
|
||||
<chapter><title>Host-Side Data Types and Macros</title>
|
||||
<chapter id="hostside"><title>Host-Side Data Types and Macros</title>
|
||||
|
||||
<para>The host side API exposes several layers to drivers, some of
|
||||
which are more necessary than others.
|
||||
|
|
@ -211,7 +211,7 @@
|
|||
|
||||
</chapter>
|
||||
|
||||
<chapter><title>USB Core APIs</title>
|
||||
<chapter id="usbcore"><title>USB Core APIs</title>
|
||||
|
||||
<para>There are two basic I/O models in the USB API.
|
||||
The most elemental one is asynchronous: drivers submit requests
|
||||
|
|
@ -248,7 +248,7 @@
|
|||
!Edrivers/usb/core/hub.c
|
||||
</chapter>
|
||||
|
||||
<chapter><title>Host Controller APIs</title>
|
||||
<chapter id="hcd"><title>Host Controller APIs</title>
|
||||
|
||||
<para>These APIs are only for use by host controller drivers,
|
||||
most of which implement standard register interfaces such as
|
||||
|
|
@ -285,7 +285,7 @@
|
|||
!Idrivers/usb/core/buffer.c
|
||||
</chapter>
|
||||
|
||||
<chapter>
|
||||
<chapter id="usbfs">
|
||||
<title>The USB Filesystem (usbfs)</title>
|
||||
|
||||
<para>This chapter presents the Linux <emphasis>usbfs</emphasis>.
|
||||
|
|
@ -317,7 +317,7 @@
|
|||
not it has a kernel driver.
|
||||
</para>
|
||||
|
||||
<sect1>
|
||||
<sect1 id="usbfs-files">
|
||||
<title>What files are in "usbfs"?</title>
|
||||
|
||||
<para>Conventionally mounted at
|
||||
|
|
@ -356,7 +356,7 @@
|
|||
|
||||
</sect1>
|
||||
|
||||
<sect1>
|
||||
<sect1 id="usbfs-fstab">
|
||||
<title>Mounting and Access Control</title>
|
||||
|
||||
<para>There are a number of mount options for usbfs, which will
|
||||
|
|
@ -439,7 +439,7 @@
|
|||
|
||||
</sect1>
|
||||
|
||||
<sect1>
|
||||
<sect1 id="usbfs-devices">
|
||||
<title>/proc/bus/usb/devices</title>
|
||||
|
||||
<para>This file is handy for status viewing tools in user
|
||||
|
|
@ -473,7 +473,7 @@ for (;;) {
|
|||
</para>
|
||||
</sect1>
|
||||
|
||||
<sect1>
|
||||
<sect1 id="usbfs-bbbddd">
|
||||
<title>/proc/bus/usb/BBB/DDD</title>
|
||||
|
||||
<para>Use these files in one of these basic ways:
|
||||
|
|
@ -510,7 +510,7 @@ for (;;) {
|
|||
</sect1>
|
||||
|
||||
|
||||
<sect1>
|
||||
<sect1 id="usbfs-lifecycle">
|
||||
<title>Life Cycle of User Mode Drivers</title>
|
||||
|
||||
<para>Such a driver first needs to find a device file
|
||||
|
|
@ -565,7 +565,7 @@ for (;;) {
|
|||
|
||||
</sect1>
|
||||
|
||||
<sect1><title>The ioctl() Requests</title>
|
||||
<sect1 id="usbfs-ioctl"><title>The ioctl() Requests</title>
|
||||
|
||||
<para>To use these ioctls, you need to include the following
|
||||
headers in your userspace program:
|
||||
|
|
@ -604,7 +604,7 @@ for (;;) {
|
|||
</para>
|
||||
|
||||
|
||||
<sect2>
|
||||
<sect2 id="usbfs-mgmt">
|
||||
<title>Management/Status Requests</title>
|
||||
|
||||
<para>A number of usbfs requests don't deal very directly
|
||||
|
|
@ -736,7 +736,7 @@ usbdev_ioctl (int fd, int ifno, unsigned request, void *param)
|
|||
|
||||
</sect2>
|
||||
|
||||
<sect2>
|
||||
<sect2 id="usbfs-sync">
|
||||
<title>Synchronous I/O Support</title>
|
||||
|
||||
<para>Synchronous requests involve the kernel blocking
|
||||
|
|
@ -865,7 +865,7 @@ usbdev_ioctl (int fd, int ifno, unsigned request, void *param)
|
|||
</variablelist>
|
||||
</sect2>
|
||||
|
||||
<sect2>
|
||||
<sect2 id="usbfs-async">
|
||||
<title>Asynchronous I/O Support</title>
|
||||
|
||||
<para>As mentioned above, there are situations where it may be
|
||||
|
|
|
|||
|
|
@ -396,26 +396,6 @@ bugme-janitor mailing list (every change in the bugzilla is mailed here)
|
|||
|
||||
|
||||
|
||||
Managing bug reports
|
||||
--------------------
|
||||
|
||||
One of the best ways to put into practice your hacking skills is by fixing
|
||||
bugs reported by other people. Not only you will help to make the kernel
|
||||
more stable, you'll learn to fix real world problems and you will improve
|
||||
your skills, and other developers will be aware of your presence. Fixing
|
||||
bugs is one of the best ways to get merits among other developers, because
|
||||
not many people like wasting time fixing other people's bugs.
|
||||
|
||||
To work in the already reported bug reports, go to http://bugzilla.kernel.org.
|
||||
If you want to be advised of the future bug reports, you can subscribe to the
|
||||
bugme-new mailing list (only new bug reports are mailed here) or to the
|
||||
bugme-janitor mailing list (every change in the bugzilla is mailed here)
|
||||
|
||||
http://lists.osdl.org/mailman/listinfo/bugme-new
|
||||
http://lists.osdl.org/mailman/listinfo/bugme-janitors
|
||||
|
||||
|
||||
|
||||
Mailing lists
|
||||
-------------
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,15 @@
|
|||
Generic Block Device Capability
|
||||
===============================================================================
|
||||
This file documents the sysfs file block/<disk>/capability
|
||||
|
||||
capability is a hex word indicating which capabilities a specific disk
|
||||
supports. For more information on bits not listed here, see
|
||||
include/linux/genhd.h
|
||||
|
||||
Capability Value
|
||||
-------------------------------------------------------------------------------
|
||||
GENHD_FL_MEDIA_CHANGE_NOTIFY 4
|
||||
When this bit is set, the disk supports Asynchronous Notification
|
||||
of media change events. These events will be broadcast to user
|
||||
space via kernel uevent.
|
||||
|
||||
|
|
@ -10,10 +10,12 @@
|
|||
*.grp
|
||||
*.gz
|
||||
*.html
|
||||
*.i
|
||||
*.jpeg
|
||||
*.ko
|
||||
*.log
|
||||
*.lst
|
||||
*.moc
|
||||
*.mod.c
|
||||
*.o
|
||||
*.orig
|
||||
|
|
@ -25,6 +27,9 @@
|
|||
*.s
|
||||
*.sgml
|
||||
*.so
|
||||
*.symtypes
|
||||
*.tab.c
|
||||
*.tab.h
|
||||
*.tex
|
||||
*.ver
|
||||
*.xml
|
||||
|
|
@ -32,9 +37,13 @@
|
|||
*_vga16.c
|
||||
*cscope*
|
||||
*~
|
||||
*.9
|
||||
*.9.gz
|
||||
.*
|
||||
.cscope
|
||||
53c700_d.h
|
||||
53c7xx_d.h
|
||||
53c7xx_u.h
|
||||
53c8xx_d.h*
|
||||
BitKeeper
|
||||
COPYING
|
||||
|
|
@ -70,9 +79,11 @@ bzImage*
|
|||
classlist.h*
|
||||
comp*.log
|
||||
compile.h*
|
||||
conf
|
||||
config
|
||||
config-*
|
||||
config_data.h*
|
||||
config_data.gz*
|
||||
conmakehash
|
||||
consolemap_deftbl.c*
|
||||
crc32table.h*
|
||||
|
|
@ -81,18 +92,23 @@ defkeymap.c*
|
|||
devlist.h*
|
||||
docproc
|
||||
dummy_sym.c*
|
||||
elf2ecoff
|
||||
elfconfig.h*
|
||||
filelist
|
||||
fixdep
|
||||
fore200e_mkfirm
|
||||
fore200e_pca_fw.c*
|
||||
gconf
|
||||
gen-devlist
|
||||
gen-kdb_cmds.c*
|
||||
gen_crc32table
|
||||
gen_init_cpio
|
||||
genksyms
|
||||
gentbl
|
||||
*_gray256.c
|
||||
ikconfig.h*
|
||||
initramfs_data.cpio
|
||||
initramfs_data.cpio.gz
|
||||
initramfs_list
|
||||
kallsyms
|
||||
kconfig
|
||||
|
|
@ -100,19 +116,30 @@ kconfig.tk
|
|||
keywords.c*
|
||||
ksym.c*
|
||||
ksym.h*
|
||||
kxgettext
|
||||
lkc_defs.h
|
||||
lex.c*
|
||||
lex.*.c
|
||||
lk201-map.c
|
||||
logo_*.c
|
||||
logo_*_clut224.c
|
||||
logo_*_mono.c
|
||||
lxdialog
|
||||
mach-types
|
||||
mach-types.h
|
||||
machtypes.h
|
||||
make_times_h
|
||||
map
|
||||
maui_boot.h
|
||||
mconf
|
||||
miboot*
|
||||
mk_elfconfig
|
||||
mkboot
|
||||
mkbugboot
|
||||
mkdep
|
||||
mkprep
|
||||
mktables
|
||||
mktree
|
||||
modpost
|
||||
modversions.h*
|
||||
offset.h
|
||||
|
|
@ -120,18 +147,28 @@ offsets.h
|
|||
oui.c*
|
||||
parse.c*
|
||||
parse.h*
|
||||
patches*
|
||||
pca200e.bin
|
||||
pca200e_ecd.bin2
|
||||
piggy.gz
|
||||
piggyback
|
||||
pnmtologo
|
||||
ppc_defs.h*
|
||||
promcon_tbl.c*
|
||||
pss_boot.h
|
||||
qconf
|
||||
raid6altivec*.c
|
||||
raid6int*.c
|
||||
raid6tables.c
|
||||
relocs
|
||||
series
|
||||
setup
|
||||
sim710_d.h*
|
||||
sImage
|
||||
sm_tbl*
|
||||
split-include
|
||||
tags
|
||||
tftpboot.img
|
||||
times.h*
|
||||
tkparse
|
||||
trix_boot.h
|
||||
|
|
@ -139,8 +176,11 @@ utsrelease.h*
|
|||
version.h*
|
||||
vmlinux
|
||||
vmlinux-*
|
||||
vmlinux.aout
|
||||
vmlinux.lds
|
||||
vsyscall.lds
|
||||
wanxlfw.inc
|
||||
uImage
|
||||
zImage
|
||||
unifdef
|
||||
zImage*
|
||||
zconf.hash.c
|
||||
|
|
|
|||
|
|
@ -62,7 +62,7 @@ Who: Dan Dennedy <dan@dennedy.org>, Stefan Richter <stefanr@s5r6.in-berlin.de>
|
|||
What: old NCR53C9x driver
|
||||
When: October 2007
|
||||
Why: Replaced by the much better esp_scsi driver. Actual low-level
|
||||
driver can ported over almost trivially.
|
||||
driver can be ported over almost trivially.
|
||||
Who: David Miller <davem@davemloft.net>
|
||||
Christoph Hellwig <hch@lst.de>
|
||||
|
||||
|
|
@ -328,21 +328,20 @@ Who: Adrian Bunk <bunk@stusta.de>
|
|||
|
||||
---------------------------
|
||||
|
||||
What: libata.spindown_compat module parameter
|
||||
What: libata spindown skipping and warning
|
||||
When: Dec 2008
|
||||
Why: halt(8) synchronizes caches for and spins down libata disks
|
||||
because libata didn't use to spin down disk on system halt
|
||||
(only synchronized caches).
|
||||
Spin down on system halt is now implemented and can be tested
|
||||
using sysfs node /sys/class/scsi_disk/h:c:i:l/manage_start_stop.
|
||||
Why: Some halt(8) implementations synchronize caches for and spin
|
||||
down libata disks because libata didn't use to spin down disk on
|
||||
system halt (only synchronized caches).
|
||||
Spin down on system halt is now implemented. sysfs node
|
||||
/sys/class/scsi_disk/h:c:i:l/manage_start_stop is present if
|
||||
spin down support is available.
|
||||
Because issuing spin down command to an already spun down disk
|
||||
makes some disks spin up just to spin down again, the old
|
||||
behavior needs to be maintained till userspace tool is updated
|
||||
to check the sysfs node and not to spin down disks with the
|
||||
node set to one.
|
||||
This module parameter is to give userspace tool the time to
|
||||
get updated and should be removed after userspace is
|
||||
reasonably updated.
|
||||
makes some disks spin up just to spin down again, libata tracks
|
||||
device spindown status to skip the extra spindown command and
|
||||
warn about it.
|
||||
This is to give userspace tools the time to get updated and will
|
||||
be removed after userspace is reasonably updated.
|
||||
Who: Tejun Heo <htejun@gmail.com>
|
||||
|
||||
---------------------------
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
Locking scheme used for directory operations is based on two
|
||||
kinds of locks - per-inode (->i_sem) and per-filesystem (->s_vfs_rename_sem).
|
||||
kinds of locks - per-inode (->i_mutex) and per-filesystem
|
||||
(->s_vfs_rename_mutex).
|
||||
|
||||
For our purposes all operations fall in 5 classes:
|
||||
|
||||
|
|
@ -63,7 +64,7 @@ objects - A < B iff A is an ancestor of B.
|
|||
attempt to acquire some lock and already holds at least one lock. Let's
|
||||
consider the set of contended locks. First of all, filesystem lock is
|
||||
not contended, since any process blocked on it is not holding any locks.
|
||||
Thus all processes are blocked on ->i_sem.
|
||||
Thus all processes are blocked on ->i_mutex.
|
||||
|
||||
Non-directory objects are not contended due to (3). Thus link
|
||||
creation can't be a part of deadlock - it can't be blocked on source
|
||||
|
|
|
|||
|
|
@ -107,7 +107,7 @@ free to drop it...
|
|||
---
|
||||
[informational]
|
||||
|
||||
->link() callers hold ->i_sem on the object we are linking to. Some of your
|
||||
->link() callers hold ->i_mutex on the object we are linking to. Some of your
|
||||
problems might be over...
|
||||
|
||||
---
|
||||
|
|
@ -130,9 +130,9 @@ went in - and hadn't been documented ;-/). Just remove it from fs_flags
|
|||
---
|
||||
[mandatory]
|
||||
|
||||
->setattr() is called without BKL now. Caller _always_ holds ->i_sem, so
|
||||
watch for ->i_sem-grabbing code that might be used by your ->setattr().
|
||||
Callers of notify_change() need ->i_sem now.
|
||||
->setattr() is called without BKL now. Caller _always_ holds ->i_mutex, so
|
||||
watch for ->i_mutex-grabbing code that might be used by your ->setattr().
|
||||
Callers of notify_change() need ->i_mutex now.
|
||||
|
||||
---
|
||||
[recommended]
|
||||
|
|
|
|||
|
|
@ -111,7 +111,9 @@ setting up a platform_device using the GPIO, is mark its direction:
|
|||
|
||||
The return value is zero for success, else a negative errno. It should
|
||||
be checked, since the get/set calls don't have error returns and since
|
||||
misconfiguration is possible. (These calls could sleep.)
|
||||
misconfiguration is possible. You should normally issue these calls from
|
||||
a task context. However, for spinlock-safe GPIOs it's OK to use them
|
||||
before tasking is enabled, as part of early board setup.
|
||||
|
||||
For output GPIOs, the value provided becomes the initial output value.
|
||||
This helps avoid signal glitching during system startup.
|
||||
|
|
@ -197,7 +199,9 @@ However, many platforms don't currently support this mechanism.
|
|||
|
||||
Passing invalid GPIO numbers to gpio_request() will fail, as will requesting
|
||||
GPIOs that have already been claimed with that call. The return value of
|
||||
gpio_request() must be checked. (These calls could sleep.)
|
||||
gpio_request() must be checked. You should normally issue these calls from
|
||||
a task context. However, for spinlock-safe GPIOs it's OK to request GPIOs
|
||||
before tasking is enabled, as part of early board setup.
|
||||
|
||||
These calls serve two basic purposes. One is marking the signals which
|
||||
are actually in use as GPIOs, for better diagnostics; systems may have
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
----------------------------
|
||||
|
||||
H. Peter Anvin <hpa@zytor.com>
|
||||
Last update 2007-05-07
|
||||
Last update 2007-05-23
|
||||
|
||||
On the i386 platform, the Linux kernel uses a rather complicated boot
|
||||
convention. This has evolved partially due to historical aspects, as
|
||||
|
|
@ -52,7 +52,8 @@ zImage kernels, typically looks like:
|
|||
0A0000 +------------------------+
|
||||
| Reserved for BIOS | Do not use. Reserved for BIOS EBDA.
|
||||
09A000 +------------------------+
|
||||
| Stack/heap/cmdline | For use by the kernel real-mode code.
|
||||
| Command line |
|
||||
| Stack/heap | For use by the kernel real-mode code.
|
||||
098000 +------------------------+
|
||||
| Kernel setup | The kernel real-mode code.
|
||||
090200 +------------------------+
|
||||
|
|
@ -73,10 +74,9 @@ zImage kernels, typically looks like:
|
|||
When using bzImage, the protected-mode kernel was relocated to
|
||||
0x100000 ("high memory"), and the kernel real-mode block (boot sector,
|
||||
setup, and stack/heap) was made relocatable to any address between
|
||||
0x10000 and end of low memory. Unfortunately, in protocols 2.00 and
|
||||
2.01 the command line is still required to live in the 0x9XXXX memory
|
||||
range, and that memory range is still overwritten by the early kernel.
|
||||
The 2.02 protocol resolves that problem.
|
||||
0x10000 and end of low memory. Unfortunately, in protocols 2.00 and
|
||||
2.01 the 0x90000+ memory range is still used internally by the kernel;
|
||||
the 2.02 protocol resolves that problem.
|
||||
|
||||
It is desirable to keep the "memory ceiling" -- the highest point in
|
||||
low memory touched by the boot loader -- as low as possible, since
|
||||
|
|
@ -93,6 +93,35 @@ zImage or old bzImage kernels, which need data written into the
|
|||
0x90000 segment, the boot loader should make sure not to use memory
|
||||
above the 0x9A000 point; too many BIOSes will break above that point.
|
||||
|
||||
For a modern bzImage kernel with boot protocol version >= 2.02, a
|
||||
memory layout like the following is suggested:
|
||||
|
||||
~ ~
|
||||
| Protected-mode kernel |
|
||||
100000 +------------------------+
|
||||
| I/O memory hole |
|
||||
0A0000 +------------------------+
|
||||
| Reserved for BIOS | Leave as much as possible unused
|
||||
~ ~
|
||||
| Command line | (Can also be below the X+10000 mark)
|
||||
X+10000 +------------------------+
|
||||
| Stack/heap | For use by the kernel real-mode code.
|
||||
X+08000 +------------------------+
|
||||
| Kernel setup | The kernel real-mode code.
|
||||
| Kernel boot sector | The kernel legacy boot sector.
|
||||
X +------------------------+
|
||||
| Boot loader | <- Boot sector entry point 0000:7C00
|
||||
001000 +------------------------+
|
||||
| Reserved for MBR/BIOS |
|
||||
000800 +------------------------+
|
||||
| Typically used by MBR |
|
||||
000600 +------------------------+
|
||||
| BIOS use only |
|
||||
000000 +------------------------+
|
||||
|
||||
... where the address X is as low as the design of the boot loader
|
||||
permits.
|
||||
|
||||
|
||||
**** THE REAL-MODE KERNEL HEADER
|
||||
|
||||
|
|
@ -160,29 +189,147 @@ e.g. protocol version 2.01 will contain 0x0201 in this field. When
|
|||
setting fields in the header, you must make sure only to set fields
|
||||
supported by the protocol version in use.
|
||||
|
||||
The "kernel_version" field, if set to a nonzero value, contains a
|
||||
pointer to a null-terminated human-readable kernel version number
|
||||
string, less 0x200. This can be used to display the kernel version to
|
||||
the user. This value should be less than (0x200*setup_sects). For
|
||||
example, if this value is set to 0x1c00, the kernel version number
|
||||
string can be found at offset 0x1e00 in the kernel file. This is a
|
||||
valid value if and only if the "setup_sects" field contains the value
|
||||
14 or higher.
|
||||
|
||||
Most boot loaders will simply load the kernel at its target address
|
||||
directly. Such boot loaders do not need to worry about filling in
|
||||
most of the fields in the header. The following fields should be
|
||||
filled out, however:
|
||||
**** DETAILS OF HEADER FIELDS
|
||||
|
||||
vid_mode:
|
||||
Please see the section on SPECIAL COMMAND LINE OPTIONS.
|
||||
For each field, some are information from the kernel to the bootloader
|
||||
("read"), some are expected to be filled out by the bootloader
|
||||
("write"), and some are expected to be read and modified by the
|
||||
bootloader ("modify").
|
||||
|
||||
type_of_loader:
|
||||
If your boot loader has an assigned id (see table below), enter
|
||||
0xTV here, where T is an identifier for the boot loader and V is
|
||||
a version number. Otherwise, enter 0xFF here.
|
||||
All general purpose boot loaders should write the fields marked
|
||||
(obligatory). Boot loaders who want to load the kernel at a
|
||||
nonstandard address should fill in the fields marked (reloc); other
|
||||
boot loaders can ignore those fields.
|
||||
|
||||
Assigned boot loader ids:
|
||||
The byte order of all fields is littleendian (this is x86, after all.)
|
||||
|
||||
Field name: setup_secs
|
||||
Type: read
|
||||
Offset/size: 0x1f1/1
|
||||
Protocol: ALL
|
||||
|
||||
The size of the setup code in 512-byte sectors. If this field is
|
||||
0, the real value is 4. The real-mode code consists of the boot
|
||||
sector (always one 512-byte sector) plus the setup code.
|
||||
|
||||
Field name: root_flags
|
||||
Type: modify (optional)
|
||||
Offset/size: 0x1f2/2
|
||||
Protocol: ALL
|
||||
|
||||
If this field is nonzero, the root defaults to readonly. The use of
|
||||
this field is deprecated; use the "ro" or "rw" options on the
|
||||
command line instead.
|
||||
|
||||
Field name: syssize
|
||||
Type: read
|
||||
Offset/size: 0x1f4/4 (protocol 2.04+) 0x1f4/2 (protocol ALL)
|
||||
Protocol: 2.04+
|
||||
|
||||
The size of the protected-mode code in units of 16-byte paragraphs.
|
||||
For protocol versions older than 2.04 this field is only two bytes
|
||||
wide, and therefore cannot be trusted for the size of a kernel if
|
||||
the LOAD_HIGH flag is set.
|
||||
|
||||
Field name: ram_size
|
||||
Type: kernel internal
|
||||
Offset/size: 0x1f8/2
|
||||
Protocol: ALL
|
||||
|
||||
This field is obsolete.
|
||||
|
||||
Field name: vid_mode
|
||||
Type: modify (obligatory)
|
||||
Offset/size: 0x1fa/2
|
||||
|
||||
Please see the section on SPECIAL COMMAND LINE OPTIONS.
|
||||
|
||||
Field name: root_dev
|
||||
Type: modify (optional)
|
||||
Offset/size: 0x1fc/2
|
||||
Protocol: ALL
|
||||
|
||||
The default root device device number. The use of this field is
|
||||
deprecated, use the "root=" option on the command line instead.
|
||||
|
||||
Field name: boot_flag
|
||||
Type: read
|
||||
Offset/size: 0x1fe/2
|
||||
Protocol: ALL
|
||||
|
||||
Contains 0xAA55. This is the closest thing old Linux kernels have
|
||||
to a magic number.
|
||||
|
||||
Field name: jump
|
||||
Type: read
|
||||
Offset/size: 0x200/2
|
||||
Protocol: 2.00+
|
||||
|
||||
Contains an x86 jump instruction, 0xEB followed by a signed offset
|
||||
relative to byte 0x202. This can be used to determine the size of
|
||||
the header.
|
||||
|
||||
Field name: header
|
||||
Type: read
|
||||
Offset/size: 0x202/4
|
||||
Protocol: 2.00+
|
||||
|
||||
Contains the magic number "HdrS" (0x53726448).
|
||||
|
||||
Field name: version
|
||||
Type: read
|
||||
Offset/size: 0x206/2
|
||||
Protocol: 2.00+
|
||||
|
||||
Contains the boot protocol version, in (major << 8)+minor format,
|
||||
e.g. 0x0204 for version 2.04, and 0x0a11 for a hypothetical version
|
||||
10.17.
|
||||
|
||||
Field name: readmode_swtch
|
||||
Type: modify (optional)
|
||||
Offset/size: 0x208/4
|
||||
Protocol: 2.00+
|
||||
|
||||
Boot loader hook (see ADVANCED BOOT LOADER HOOKS below.)
|
||||
|
||||
Field name: start_sys
|
||||
Type: read
|
||||
Offset/size: 0x20c/4
|
||||
Protocol: 2.00+
|
||||
|
||||
The load low segment (0x1000). Obsolete.
|
||||
|
||||
Field name: kernel_version
|
||||
Type: read
|
||||
Offset/size: 0x20e/2
|
||||
Protocol: 2.00+
|
||||
|
||||
If set to a nonzero value, contains a pointer to a NUL-terminated
|
||||
human-readable kernel version number string, less 0x200. This can
|
||||
be used to display the kernel version to the user. This value
|
||||
should be less than (0x200*setup_sects).
|
||||
|
||||
For example, if this value is set to 0x1c00, the kernel version
|
||||
number string can be found at offset 0x1e00 in the kernel file.
|
||||
This is a valid value if and only if the "setup_sects" field
|
||||
contains the value 15 or higher, as:
|
||||
|
||||
0x1c00 < 15*0x200 (= 0x1e00) but
|
||||
0x1c00 >= 14*0x200 (= 0x1c00)
|
||||
|
||||
0x1c00 >> 9 = 14, so the minimum value for setup_secs is 15.
|
||||
|
||||
Field name: type_of_loader
|
||||
Type: write (obligatory)
|
||||
Offset/size: 0x210/1
|
||||
Protocol: 2.00+
|
||||
|
||||
If your boot loader has an assigned id (see table below), enter
|
||||
0xTV here, where T is an identifier for the boot loader and V is
|
||||
a version number. Otherwise, enter 0xFF here.
|
||||
|
||||
Assigned boot loader ids:
|
||||
0 LILO (0x00 reserved for pre-2.00 bootloader)
|
||||
1 Loadlin
|
||||
2 bootsect-loader (0x20, all other values reserved)
|
||||
|
|
@ -193,60 +340,145 @@ filled out, however:
|
|||
8 U-BOOT
|
||||
9 Xen
|
||||
A Gujin
|
||||
B Qemu
|
||||
|
||||
Please contact <hpa@zytor.com> if you need a bootloader ID
|
||||
value assigned.
|
||||
Please contact <hpa@zytor.com> if you need a bootloader ID
|
||||
value assigned.
|
||||
|
||||
loadflags, heap_end_ptr:
|
||||
If the protocol version is 2.01 or higher, enter the
|
||||
offset limit of the setup heap into heap_end_ptr and set the
|
||||
0x80 bit (CAN_USE_HEAP) of loadflags. heap_end_ptr appears to
|
||||
be relative to the start of setup (offset 0x0200).
|
||||
Field name: loadflags
|
||||
Type: modify (obligatory)
|
||||
Offset/size: 0x211/1
|
||||
Protocol: 2.00+
|
||||
|
||||
setup_move_size:
|
||||
When using protocol 2.00 or 2.01, if the real mode
|
||||
kernel is not loaded at 0x90000, it gets moved there later in
|
||||
the loading sequence. Fill in this field if you want
|
||||
additional data (such as the kernel command line) moved in
|
||||
addition to the real-mode kernel itself.
|
||||
This field is a bitmask.
|
||||
|
||||
The unit is bytes starting with the beginning of the boot
|
||||
sector.
|
||||
Bit 0 (read): LOADED_HIGH
|
||||
- If 0, the protected-mode code is loaded at 0x10000.
|
||||
- If 1, the protected-mode code is loaded at 0x100000.
|
||||
|
||||
ramdisk_image, ramdisk_size:
|
||||
If your boot loader has loaded an initial ramdisk (initrd),
|
||||
set ramdisk_image to the 32-bit pointer to the ramdisk data
|
||||
and the ramdisk_size to the size of the ramdisk data.
|
||||
Bit 7 (write): CAN_USE_HEAP
|
||||
Set this bit to 1 to indicate that the value entered in the
|
||||
heap_end_ptr is valid. If this field is clear, some setup code
|
||||
functionality will be disabled.
|
||||
|
||||
The initrd should typically be located as high in memory as
|
||||
possible, as it may otherwise get overwritten by the early
|
||||
kernel initialization sequence. However, it must never be
|
||||
located above the address specified in the initrd_addr_max
|
||||
field. The initrd should be at least 4K page aligned.
|
||||
Field name: setup_move_size
|
||||
Type: modify (obligatory)
|
||||
Offset/size: 0x212/2
|
||||
Protocol: 2.00-2.01
|
||||
|
||||
cmd_line_ptr:
|
||||
If the protocol version is 2.02 or higher, this is a 32-bit
|
||||
pointer to the kernel command line. The kernel command line
|
||||
can be located anywhere between the end of setup and 0xA0000.
|
||||
Fill in this field even if your boot loader does not support a
|
||||
command line, in which case you can point this to an empty
|
||||
string (or better yet, to the string "auto".) If this field
|
||||
is left at zero, the kernel will assume that your boot loader
|
||||
does not support the 2.02+ protocol.
|
||||
When using protocol 2.00 or 2.01, if the real mode kernel is not
|
||||
loaded at 0x90000, it gets moved there later in the loading
|
||||
sequence. Fill in this field if you want additional data (such as
|
||||
the kernel command line) moved in addition to the real-mode kernel
|
||||
itself.
|
||||
|
||||
ramdisk_max:
|
||||
The maximum address that may be occupied by the initrd
|
||||
contents. For boot protocols 2.02 or earlier, this field is
|
||||
not present, and the maximum address is 0x37FFFFFF. (This
|
||||
address is defined as the address of the highest safe byte, so
|
||||
if your ramdisk is exactly 131072 bytes long and this field is
|
||||
0x37FFFFFF, you can start your ramdisk at 0x37FE0000.)
|
||||
The unit is bytes starting with the beginning of the boot sector.
|
||||
|
||||
This field is can be ignored when the protocol is 2.02 or higher, or
|
||||
if the real-mode code is loaded at 0x90000.
|
||||
|
||||
cmdline_size:
|
||||
The maximum size of the command line without the terminating
|
||||
zero. This means that the command line can contain at most
|
||||
cmdline_size characters. With protocol version 2.05 and
|
||||
earlier, the maximum size was 255.
|
||||
Field name: code32_start
|
||||
Type: modify (optional, reloc)
|
||||
Offset/size: 0x214/4
|
||||
Protocol: 2.00+
|
||||
|
||||
The address to jump to in protected mode. This defaults to the load
|
||||
address of the kernel, and can be used by the boot loader to
|
||||
determine the proper load address.
|
||||
|
||||
This field can be modified for two purposes:
|
||||
|
||||
1. as a boot loader hook (see ADVANCED BOOT LOADER HOOKS below.)
|
||||
|
||||
2. if a bootloader which does not install a hook loads a
|
||||
relocatable kernel at a nonstandard address it will have to modify
|
||||
this field to point to the load address.
|
||||
|
||||
Field name: ramdisk_image
|
||||
Type: write (obligatory)
|
||||
Offset/size: 0x218/4
|
||||
Protocol: 2.00+
|
||||
|
||||
The 32-bit linear address of the initial ramdisk or ramfs. Leave at
|
||||
zero if there is no initial ramdisk/ramfs.
|
||||
|
||||
Field name: ramdisk_size
|
||||
Type: write (obligatory)
|
||||
Offset/size: 0x21c/4
|
||||
Protocol: 2.00+
|
||||
|
||||
Size of the initial ramdisk or ramfs. Leave at zero if there is no
|
||||
initial ramdisk/ramfs.
|
||||
|
||||
Field name: bootsect_kludge
|
||||
Type: kernel internal
|
||||
Offset/size: 0x220/4
|
||||
Protocol: 2.00+
|
||||
|
||||
This field is obsolete.
|
||||
|
||||
Field name: heap_end_ptr
|
||||
Type: write (obligatory)
|
||||
Offset/size: 0x224/2
|
||||
Protocol: 2.01+
|
||||
|
||||
Set this field to the offset (from the beginning of the real-mode
|
||||
code) of the end of the setup stack/heap, minus 0x0200.
|
||||
|
||||
Field name: cmd_line_ptr
|
||||
Type: write (obligatory)
|
||||
Offset/size: 0x228/4
|
||||
Protocol: 2.02+
|
||||
|
||||
Set this field to the linear address of the kernel command line.
|
||||
The kernel command line can be located anywhere between the end of
|
||||
the setup heap and 0xA0000; it does not have to be located in the
|
||||
same 64K segment as the real-mode code itself.
|
||||
|
||||
Fill in this field even if your boot loader does not support a
|
||||
command line, in which case you can point this to an empty string
|
||||
(or better yet, to the string "auto".) If this field is left at
|
||||
zero, the kernel will assume that your boot loader does not support
|
||||
the 2.02+ protocol.
|
||||
|
||||
Field name: initrd_addr_max
|
||||
Type: read
|
||||
Offset/size: 0x22c/4
|
||||
Protocol: 2.03+
|
||||
|
||||
The maximum address that may be occupied by the initial
|
||||
ramdisk/ramfs contents. For boot protocols 2.02 or earlier, this
|
||||
field is not present, and the maximum address is 0x37FFFFFF. (This
|
||||
address is defined as the address of the highest safe byte, so if
|
||||
your ramdisk is exactly 131072 bytes long and this field is
|
||||
0x37FFFFFF, you can start your ramdisk at 0x37FE0000.)
|
||||
|
||||
Field name: kernel_alignment
|
||||
Type: read (reloc)
|
||||
Offset/size: 0x230/4
|
||||
Protocol: 2.05+
|
||||
|
||||
Alignment unit required by the kernel (if relocatable_kernel is true.)
|
||||
|
||||
Field name: relocatable_kernel
|
||||
Type: read (reloc)
|
||||
Offset/size: 0x234/1
|
||||
Protocol: 2.05+
|
||||
|
||||
If this field is nonzero, the protected-mode part of the kernel can
|
||||
be loaded at any address that satisfies the kernel_alignment field.
|
||||
After loading, the boot loader must set the code32_start field to
|
||||
point to the loaded code, or to a boot loader hook.
|
||||
|
||||
Field name: cmdline_size
|
||||
Type: read
|
||||
Offset/size: 0x238/4
|
||||
Protocol: 2.06+
|
||||
|
||||
The maximum size of the command line without the terminating
|
||||
zero. This means that the command line can contain at most
|
||||
cmdline_size characters. With protocol version 2.05 and earlier, the
|
||||
maximum size was 255.
|
||||
|
||||
|
||||
**** THE KERNEL COMMAND LINE
|
||||
|
|
@ -494,7 +726,7 @@ switched off, especially if the loaded kernel has the floppy driver as
|
|||
a demand-loaded module!
|
||||
|
||||
|
||||
**** ADVANCED BOOT TIME HOOKS
|
||||
**** ADVANCED BOOT LOADER HOOKS
|
||||
|
||||
If the boot loader runs in a particularly hostile environment (such as
|
||||
LOADLIN, which runs under DOS) it may be impossible to follow the
|
||||
|
|
@ -519,4 +751,5 @@ IMPORTANT: All the hooks are required to preserve %esp, %ebp, %esi and
|
|||
set them up to BOOT_DS (0x18) yourself.
|
||||
|
||||
After completing your hook, you should jump to the address
|
||||
that was in this field before your boot loader overwrote it.
|
||||
that was in this field before your boot loader overwrote it
|
||||
(relocated, if appropriate.)
|
||||
|
|
|
|||
|
|
@ -27,16 +27,20 @@ When using initrd, the system typically boots as follows:
|
|||
1) the boot loader loads the kernel and the initial RAM disk
|
||||
2) the kernel converts initrd into a "normal" RAM disk and
|
||||
frees the memory used by initrd
|
||||
3) initrd is mounted read-write as root
|
||||
4) /linuxrc is executed (this can be any valid executable, including
|
||||
3) if the root device is not /dev/ram0, the old (deprecated)
|
||||
change_root procedure is followed. see the "Obsolete root change
|
||||
mechanism" section below.
|
||||
4) root device is mounted. if it is /dev/ram0, the initrd image is
|
||||
then mounted as root
|
||||
5) /sbin/init is executed (this can be any valid executable, including
|
||||
shell scripts; it is run with uid 0 and can do basically everything
|
||||
init can do)
|
||||
5) linuxrc mounts the "real" root file system
|
||||
6) linuxrc places the root file system at the root directory using the
|
||||
init can do).
|
||||
6) init mounts the "real" root file system
|
||||
7) init places the root file system at the root directory using the
|
||||
pivot_root system call
|
||||
7) the usual boot sequence (e.g. invocation of /sbin/init) is performed
|
||||
on the root file system
|
||||
8) the initrd file system is removed
|
||||
8) init execs the /sbin/init on the new root filesystem, performing
|
||||
the usual boot sequence
|
||||
9) the initrd file system is removed
|
||||
|
||||
Note that changing the root directory does not involve unmounting it.
|
||||
It is therefore possible to leave processes running on initrd during that
|
||||
|
|
@ -70,7 +74,7 @@ initrd adds the following new options:
|
|||
root=/dev/ram0
|
||||
|
||||
initrd is mounted as root, and the normal boot procedure is followed,
|
||||
with the RAM disk still mounted as root.
|
||||
with the RAM disk mounted as root.
|
||||
|
||||
Compressed cpio images
|
||||
----------------------
|
||||
|
|
@ -137,11 +141,11 @@ We'll describe the loopback device method:
|
|||
# mkdir /mnt/dev
|
||||
# mknod /mnt/dev/console c 5 1
|
||||
5) copy all the files that are needed to properly use the initrd
|
||||
environment. Don't forget the most important file, /linuxrc
|
||||
Note that /linuxrc's permissions must include "x" (execute).
|
||||
environment. Don't forget the most important file, /sbin/init
|
||||
Note that /sbin/init's permissions must include "x" (execute).
|
||||
6) correct operation the initrd environment can frequently be tested
|
||||
even without rebooting with the command
|
||||
# chroot /mnt /linuxrc
|
||||
# chroot /mnt /sbin/init
|
||||
This is of course limited to initrds that do not interfere with the
|
||||
general system state (e.g. by reconfiguring network interfaces,
|
||||
overwriting mounted devices, trying to start already running demons,
|
||||
|
|
@ -154,7 +158,7 @@ We'll describe the loopback device method:
|
|||
# gzip -9 initrd
|
||||
|
||||
For experimenting with initrd, you may want to take a rescue floppy and
|
||||
only add a symbolic link from /linuxrc to /bin/sh. Alternatively, you
|
||||
only add a symbolic link from /sbin/init to /bin/sh. Alternatively, you
|
||||
can try the experimental newlib environment [2] to create a small
|
||||
initrd.
|
||||
|
||||
|
|
@ -163,15 +167,14 @@ boot loaders support initrd. Since the boot process is still compatible
|
|||
with an older mechanism, the following boot command line parameters
|
||||
have to be given:
|
||||
|
||||
root=/dev/ram0 init=/linuxrc rw
|
||||
root=/dev/ram0 rw
|
||||
|
||||
(rw is only necessary if writing to the initrd file system.)
|
||||
|
||||
With LOADLIN, you simply execute
|
||||
|
||||
LOADLIN <kernel> initrd=<disk_image>
|
||||
e.g. LOADLIN C:\LINUX\BZIMAGE initrd=C:\LINUX\INITRD.GZ root=/dev/ram0
|
||||
init=/linuxrc rw
|
||||
e.g. LOADLIN C:\LINUX\BZIMAGE initrd=C:\LINUX\INITRD.GZ root=/dev/ram0 rw
|
||||
|
||||
With LILO, you add the option INITRD=<path> to either the global section
|
||||
or to the section of the respective kernel in /etc/lilo.conf, and pass
|
||||
|
|
@ -179,7 +182,7 @@ the options using APPEND, e.g.
|
|||
|
||||
image = /bzImage
|
||||
initrd = /boot/initrd.gz
|
||||
append = "root=/dev/ram0 init=/linuxrc rw"
|
||||
append = "root=/dev/ram0 rw"
|
||||
|
||||
and run /sbin/lilo
|
||||
|
||||
|
|
@ -191,7 +194,7 @@ Now you can boot and enjoy using initrd.
|
|||
Changing the root device
|
||||
------------------------
|
||||
|
||||
When finished with its duties, linuxrc typically changes the root device
|
||||
When finished with its duties, init typically changes the root device
|
||||
and proceeds with starting the Linux system on the "real" root device.
|
||||
|
||||
The procedure involves the following steps:
|
||||
|
|
@ -217,7 +220,7 @@ must exist before calling pivot_root. Example:
|
|||
# mkdir initrd
|
||||
# pivot_root . initrd
|
||||
|
||||
Now, the linuxrc process may still access the old root via its
|
||||
Now, the init process may still access the old root via its
|
||||
executable, shared libraries, standard input/output/error, and its
|
||||
current root directory. All these references are dropped by the
|
||||
following command:
|
||||
|
|
@ -249,10 +252,6 @@ disk can be freed:
|
|||
It is also possible to use initrd with an NFS-mounted root, see the
|
||||
pivot_root(8) man page for details.
|
||||
|
||||
Note: if linuxrc or any program exec'ed from it terminates for some
|
||||
reason, the old change_root mechanism is invoked (see section "Obsolete
|
||||
root change mechanism").
|
||||
|
||||
|
||||
Usage scenarios
|
||||
---------------
|
||||
|
|
@ -264,15 +263,15 @@ as follows:
|
|||
1) system boots from floppy or other media with a minimal kernel
|
||||
(e.g. support for RAM disks, initrd, a.out, and the Ext2 FS) and
|
||||
loads initrd
|
||||
2) /linuxrc determines what is needed to (1) mount the "real" root FS
|
||||
2) /sbin/init determines what is needed to (1) mount the "real" root FS
|
||||
(i.e. device type, device drivers, file system) and (2) the
|
||||
distribution media (e.g. CD-ROM, network, tape, ...). This can be
|
||||
done by asking the user, by auto-probing, or by using a hybrid
|
||||
approach.
|
||||
3) /linuxrc loads the necessary kernel modules
|
||||
4) /linuxrc creates and populates the root file system (this doesn't
|
||||
3) /sbin/init loads the necessary kernel modules
|
||||
4) /sbin/init creates and populates the root file system (this doesn't
|
||||
have to be a very usable system yet)
|
||||
5) /linuxrc invokes pivot_root to change the root file system and
|
||||
5) /sbin/init invokes pivot_root to change the root file system and
|
||||
execs - via chroot - a program that continues the installation
|
||||
6) the boot loader is installed
|
||||
7) the boot loader is configured to load an initrd with the set of
|
||||
|
|
@ -291,7 +290,7 @@ different hardware configurations in a single administrative domain. In
|
|||
such cases, it is desirable to generate only a small set of kernels
|
||||
(ideally only one) and to keep the system-specific part of configuration
|
||||
information as small as possible. In this case, a common initrd could be
|
||||
generated with all the necessary modules. Then, only /linuxrc or a file
|
||||
generated with all the necessary modules. Then, only /sbin/init or a file
|
||||
read by it would have to be different.
|
||||
|
||||
A third scenario are more convenient recovery disks, because information
|
||||
|
|
@ -337,6 +336,25 @@ This old, deprecated mechanism is commonly called "change_root", while
|
|||
the new, supported mechanism is called "pivot_root".
|
||||
|
||||
|
||||
Mixed change_root and pivot_root mechanism
|
||||
------------------------------------------
|
||||
|
||||
In case you did not want to use root=/dev/ram0 to trig the pivot_root mechanism,
|
||||
you may create both /linuxrc and /sbin/init in your initrd image.
|
||||
|
||||
/linuxrc would contain only the following:
|
||||
|
||||
#! /bin/sh
|
||||
mount -n -t proc proc /proc
|
||||
echo 0x0100 >/proc/sys/kernel/real-root-dev
|
||||
umount -n /proc
|
||||
|
||||
Once linuxrc exited, the kernel would mount again your initrd as root,
|
||||
this time executing /sbin/init. Again, it would be duty of this init
|
||||
to build the right environment (maybe using the root= device passed on
|
||||
the cmdline) before the final execution of the real /sbin/init.
|
||||
|
||||
|
||||
Resources
|
||||
---------
|
||||
|
||||
|
|
|
|||
|
|
@ -396,6 +396,26 @@ and is between 256 and 4096 characters. It is defined in the file
|
|||
clocksource is not available, it defaults to PIT.
|
||||
Format: { pit | tsc | cyclone | pmtmr }
|
||||
|
||||
clocksource= [GENERIC_TIME] Override the default clocksource
|
||||
Format: <string>
|
||||
Override the default clocksource and use the clocksource
|
||||
with the name specified.
|
||||
Some clocksource names to choose from, depending on
|
||||
the platform:
|
||||
[all] jiffies (this is the base, fallback clocksource)
|
||||
[ACPI] acpi_pm
|
||||
[ARM] imx_timer1,OSTS,netx_timer,mpu_timer2,
|
||||
pxa_timer,timer3,32k_counter,timer0_1
|
||||
[AVR32] avr32
|
||||
[IA-32] pit,hpet,tsc,vmi-timer;
|
||||
scx200_hrt on Geode; cyclone on IBM x440
|
||||
[MIPS] MIPS
|
||||
[PARISC] cr16
|
||||
[S390] tod
|
||||
[SH] SuperH
|
||||
[SPARC64] tick
|
||||
[X86-64] hpet,tsc
|
||||
|
||||
code_bytes [IA32] How many bytes of object code to print in an
|
||||
oops report.
|
||||
Range: 0 - 8192
|
||||
|
|
@ -1807,10 +1827,6 @@ and is between 256 and 4096 characters. It is defined in the file
|
|||
|
||||
time Show timing data prefixed to each printk message line
|
||||
|
||||
clocksource= [GENERIC_TIME] Override the default clocksource
|
||||
Override the default clocksource and use the clocksource
|
||||
with the name specified.
|
||||
|
||||
tipar.timeout= [HW,PPT]
|
||||
Set communications timeout in tenths of a second
|
||||
(default 15).
|
||||
|
|
|
|||
|
|
@ -2,10 +2,13 @@
|
|||
LDM - Logical Disk Manager (Dynamic Disks)
|
||||
------------------------------------------
|
||||
|
||||
Originally Written by FlatCap - Richard Russon <ldm@flatcap.org>.
|
||||
Last Updated by Anton Altaparmakov on 30 March 2007 for Windows Vista.
|
||||
|
||||
Overview
|
||||
--------
|
||||
|
||||
Windows 2000 and XP use a new partitioning scheme. It is a complete
|
||||
Windows 2000, XP, and Vista use a new partitioning scheme. It is a complete
|
||||
replacement for the MSDOS style partitions. It stores its information in a
|
||||
1MiB journalled database at the end of the physical disk. The size of
|
||||
partitions is limited only by disk space. The maximum number of partitions is
|
||||
|
|
@ -23,7 +26,11 @@ Once the LDM driver has divided up the disk, you can use the MD driver to
|
|||
assemble any multi-partition volumes, e.g. Stripes, RAID5.
|
||||
|
||||
To prevent legacy applications from repartitioning the disk, the LDM creates a
|
||||
dummy MSDOS partition containing one disk-sized partition.
|
||||
dummy MSDOS partition containing one disk-sized partition. This is what is
|
||||
supported with the Linux LDM driver.
|
||||
|
||||
A newer approach that has been implemented with Vista is to put LDM on top of a
|
||||
GPT label disk. This is not supported by the Linux LDM driver yet.
|
||||
|
||||
|
||||
Example
|
||||
|
|
@ -88,13 +95,13 @@ and cannot boot from a Dynamic Disk.
|
|||
More Documentation
|
||||
------------------
|
||||
|
||||
There is an Overview of the LDM online together with complete Technical
|
||||
Documentation. It can also be downloaded in html.
|
||||
There is an Overview of the LDM together with complete Technical Documentation.
|
||||
It is available for download.
|
||||
|
||||
http://linux-ntfs.sourceforge.net/ldm/index.html
|
||||
http://linux-ntfs.sourceforge.net/downloads.html
|
||||
http://www.linux-ntfs.org/content/view/19/37/
|
||||
|
||||
If you have any LDM questions that aren't answered on the website, email me.
|
||||
If you have any LDM questions that aren't answered in the documentation, email
|
||||
me.
|
||||
|
||||
Cheers,
|
||||
FlatCap - Richard Russon
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@ Contents:
|
|||
(*) Explicit kernel barriers.
|
||||
|
||||
- Compiler barrier.
|
||||
- The CPU memory barriers.
|
||||
- CPU memory barriers.
|
||||
- MMIO write barrier.
|
||||
|
||||
(*) Implicit kernel memory barriers.
|
||||
|
|
@ -265,7 +265,7 @@ Memory barriers are such interventions. They impose a perceived partial
|
|||
ordering over the memory operations on either side of the barrier.
|
||||
|
||||
Such enforcement is important because the CPUs and other devices in a system
|
||||
can use a variety of tricks to improve performance - including reordering,
|
||||
can use a variety of tricks to improve performance, including reordering,
|
||||
deferral and combination of memory operations; speculative loads; speculative
|
||||
branch prediction and various types of caching. Memory barriers are used to
|
||||
override or suppress these tricks, allowing the code to sanely control the
|
||||
|
|
@ -457,7 +457,7 @@ sequence, Q must be either &A or &B, and that:
|
|||
(Q == &A) implies (D == 1)
|
||||
(Q == &B) implies (D == 4)
|
||||
|
||||
But! CPU 2's perception of P may be updated _before_ its perception of B, thus
|
||||
But! CPU 2's perception of P may be updated _before_ its perception of B, thus
|
||||
leading to the following situation:
|
||||
|
||||
(Q == &B) and (D == 2) ????
|
||||
|
|
@ -573,7 +573,7 @@ Basically, the read barrier always has to be there, even though it can be of
|
|||
the "weaker" type.
|
||||
|
||||
[!] Note that the stores before the write barrier would normally be expected to
|
||||
match the loads after the read barrier or data dependency barrier, and vice
|
||||
match the loads after the read barrier or the data dependency barrier, and vice
|
||||
versa:
|
||||
|
||||
CPU 1 CPU 2
|
||||
|
|
@ -588,7 +588,7 @@ versa:
|
|||
EXAMPLES OF MEMORY BARRIER SEQUENCES
|
||||
------------------------------------
|
||||
|
||||
Firstly, write barriers act as a partial orderings on store operations.
|
||||
Firstly, write barriers act as partial orderings on store operations.
|
||||
Consider the following sequence of events:
|
||||
|
||||
CPU 1
|
||||
|
|
@ -608,15 +608,15 @@ STORE B, STORE C } all occurring before the unordered set of { STORE D, STORE E
|
|||
+-------+ : :
|
||||
| | +------+
|
||||
| |------>| C=3 | } /\
|
||||
| | : +------+ }----- \ -----> Events perceptible
|
||||
| | : | A=1 | } \/ to rest of system
|
||||
| | : +------+ }----- \ -----> Events perceptible to
|
||||
| | : | A=1 | } \/ the rest of the system
|
||||
| | : +------+ }
|
||||
| CPU 1 | : | B=2 | }
|
||||
| | +------+ }
|
||||
| | wwwwwwwwwwwwwwww } <--- At this point the write barrier
|
||||
| | +------+ } requires all stores prior to the
|
||||
| | : | E=5 | } barrier to be committed before
|
||||
| | : +------+ } further stores may be take place.
|
||||
| | : +------+ } further stores may take place
|
||||
| |------>| D=4 | }
|
||||
| | +------+
|
||||
+-------+ : :
|
||||
|
|
@ -626,7 +626,7 @@ STORE B, STORE C } all occurring before the unordered set of { STORE D, STORE E
|
|||
V
|
||||
|
||||
|
||||
Secondly, data dependency barriers act as a partial orderings on data-dependent
|
||||
Secondly, data dependency barriers act as partial orderings on data-dependent
|
||||
loads. Consider the following sequence of events:
|
||||
|
||||
CPU 1 CPU 2
|
||||
|
|
@ -975,7 +975,7 @@ compiler from moving the memory accesses either side of it to the other side:
|
|||
|
||||
barrier();
|
||||
|
||||
This a general barrier - lesser varieties of compiler barrier do not exist.
|
||||
This is a general barrier - lesser varieties of compiler barrier do not exist.
|
||||
|
||||
The compiler barrier has no direct effect on the CPU, which may then reorder
|
||||
things however it wishes.
|
||||
|
|
@ -997,7 +997,7 @@ The Linux kernel has eight basic CPU memory barriers:
|
|||
All CPU memory barriers unconditionally imply compiler barriers.
|
||||
|
||||
SMP memory barriers are reduced to compiler barriers on uniprocessor compiled
|
||||
systems because it is assumed that a CPU will be appear to be self-consistent,
|
||||
systems because it is assumed that a CPU will appear to be self-consistent,
|
||||
and will order overlapping accesses correctly with respect to itself.
|
||||
|
||||
[!] Note that SMP memory barriers _must_ be used to control the ordering of
|
||||
|
|
@ -1146,9 +1146,9 @@ for each construct. These operations all imply certain barriers:
|
|||
Therefore, from (1), (2) and (4) an UNLOCK followed by an unconditional LOCK is
|
||||
equivalent to a full barrier, but a LOCK followed by an UNLOCK is not.
|
||||
|
||||
[!] Note: one of the consequence of LOCKs and UNLOCKs being only one-way
|
||||
barriers is that the effects instructions outside of a critical section may
|
||||
seep into the inside of the critical section.
|
||||
[!] Note: one of the consequences of LOCKs and UNLOCKs being only one-way
|
||||
barriers is that the effects of instructions outside of a critical section
|
||||
may seep into the inside of the critical section.
|
||||
|
||||
A LOCK followed by an UNLOCK may not be assumed to be full memory barrier
|
||||
because it is possible for an access preceding the LOCK to happen after the
|
||||
|
|
@ -1239,7 +1239,7 @@ three CPUs; then should the following sequence of events occur:
|
|||
UNLOCK M UNLOCK Q
|
||||
*D = d; *H = h;
|
||||
|
||||
Then there is no guarantee as to what order CPU #3 will see the accesses to *A
|
||||
Then there is no guarantee as to what order CPU 3 will see the accesses to *A
|
||||
through *H occur in, other than the constraints imposed by the separate locks
|
||||
on the separate CPUs. It might, for example, see:
|
||||
|
||||
|
|
@ -1269,12 +1269,12 @@ However, if the following occurs:
|
|||
UNLOCK M [2]
|
||||
*H = h;
|
||||
|
||||
CPU #3 might see:
|
||||
CPU 3 might see:
|
||||
|
||||
*E, LOCK M [1], *C, *B, *A, UNLOCK M [1],
|
||||
LOCK M [2], *H, *F, *G, UNLOCK M [2], *D
|
||||
|
||||
But assuming CPU #1 gets the lock first, it won't see any of:
|
||||
But assuming CPU 1 gets the lock first, CPU 3 won't see any of:
|
||||
|
||||
*B, *C, *D, *F, *G or *H preceding LOCK M [1]
|
||||
*A, *B or *C following UNLOCK M [1]
|
||||
|
|
@ -1327,12 +1327,12 @@ spinlock, for example:
|
|||
mmiowb();
|
||||
spin_unlock(Q);
|
||||
|
||||
this will ensure that the two stores issued on CPU #1 appear at the PCI bridge
|
||||
before either of the stores issued on CPU #2.
|
||||
this will ensure that the two stores issued on CPU 1 appear at the PCI bridge
|
||||
before either of the stores issued on CPU 2.
|
||||
|
||||
|
||||
Furthermore, following a store by a load to the same device obviates the need
|
||||
for an mmiowb(), because the load forces the store to complete before the load
|
||||
Furthermore, following a store by a load from the same device obviates the need
|
||||
for the mmiowb(), because the load forces the store to complete before the load
|
||||
is performed:
|
||||
|
||||
CPU 1 CPU 2
|
||||
|
|
@ -1363,7 +1363,7 @@ circumstances in which reordering definitely _could_ be a problem:
|
|||
|
||||
(*) Atomic operations.
|
||||
|
||||
(*) Accessing devices (I/O).
|
||||
(*) Accessing devices.
|
||||
|
||||
(*) Interrupts.
|
||||
|
||||
|
|
@ -1399,7 +1399,7 @@ To wake up a particular waiter, the up_read() or up_write() functions have to:
|
|||
(1) read the next pointer from this waiter's record to know as to where the
|
||||
next waiter record is;
|
||||
|
||||
(4) read the pointer to the waiter's task structure;
|
||||
(2) read the pointer to the waiter's task structure;
|
||||
|
||||
(3) clear the task pointer to tell the waiter it has been given the semaphore;
|
||||
|
||||
|
|
@ -1407,7 +1407,7 @@ To wake up a particular waiter, the up_read() or up_write() functions have to:
|
|||
|
||||
(5) release the reference held on the waiter's task struct.
|
||||
|
||||
In otherwords, it has to perform this sequence of events:
|
||||
In other words, it has to perform this sequence of events:
|
||||
|
||||
LOAD waiter->list.next;
|
||||
LOAD waiter->task;
|
||||
|
|
@ -1502,7 +1502,7 @@ operations and adjusting reference counters towards object destruction, and as
|
|||
such the implicit memory barrier effects are necessary.
|
||||
|
||||
|
||||
The following operation are potential problems as they do _not_ imply memory
|
||||
The following operations are potential problems as they do _not_ imply memory
|
||||
barriers, but might be used for implementing such things as UNLOCK-class
|
||||
operations:
|
||||
|
||||
|
|
@ -1517,7 +1517,7 @@ With these the appropriate explicit memory barrier should be used if necessary
|
|||
|
||||
The following also do _not_ imply memory barriers, and so may require explicit
|
||||
memory barriers under some circumstances (smp_mb__before_atomic_dec() for
|
||||
instance)):
|
||||
instance):
|
||||
|
||||
atomic_add();
|
||||
atomic_sub();
|
||||
|
|
@ -1641,8 +1641,8 @@ functions:
|
|||
indeed have special I/O space access cycles and instructions, but many
|
||||
CPUs don't have such a concept.
|
||||
|
||||
The PCI bus, amongst others, defines an I/O space concept - which on such
|
||||
CPUs as i386 and x86_64 cpus readily maps to the CPU's concept of I/O
|
||||
The PCI bus, amongst others, defines an I/O space concept which - on such
|
||||
CPUs as i386 and x86_64 - readily maps to the CPU's concept of I/O
|
||||
space. However, it may also be mapped as a virtual I/O space in the CPU's
|
||||
memory map, particularly on those CPUs that don't support alternate I/O
|
||||
spaces.
|
||||
|
|
@ -1664,7 +1664,7 @@ functions:
|
|||
i386 architecture machines, for example, this is controlled by way of the
|
||||
MTRR registers.
|
||||
|
||||
Ordinarily, these will be guaranteed to be fully ordered and uncombined,,
|
||||
Ordinarily, these will be guaranteed to be fully ordered and uncombined,
|
||||
provided they're not accessing a prefetchable device.
|
||||
|
||||
However, intermediary hardware (such as a PCI bridge) may indulge in
|
||||
|
|
@ -1689,7 +1689,7 @@ functions:
|
|||
|
||||
(*) ioreadX(), iowriteX()
|
||||
|
||||
These will perform as appropriate for the type of access they're actually
|
||||
These will perform appropriately for the type of access they're actually
|
||||
doing, be it inX()/outX() or readX()/writeX().
|
||||
|
||||
|
||||
|
|
@ -1705,7 +1705,7 @@ of arch-specific code.
|
|||
|
||||
This means that it must be considered that the CPU will execute its instruction
|
||||
stream in any order it feels like - or even in parallel - provided that if an
|
||||
instruction in the stream depends on the an earlier instruction, then that
|
||||
instruction in the stream depends on an earlier instruction, then that
|
||||
earlier instruction must be sufficiently complete[*] before the later
|
||||
instruction may proceed; in other words: provided that the appearance of
|
||||
causality is maintained.
|
||||
|
|
@ -1795,8 +1795,8 @@ eventually become visible on all CPUs, there's no guarantee that they will
|
|||
become apparent in the same order on those other CPUs.
|
||||
|
||||
|
||||
Consider dealing with a system that has pair of CPUs (1 & 2), each of which has
|
||||
a pair of parallel data caches (CPU 1 has A/B, and CPU 2 has C/D):
|
||||
Consider dealing with a system that has a pair of CPUs (1 & 2), each of which
|
||||
has a pair of parallel data caches (CPU 1 has A/B, and CPU 2 has C/D):
|
||||
|
||||
:
|
||||
: +--------+
|
||||
|
|
@ -1835,7 +1835,7 @@ Imagine the system has the following properties:
|
|||
|
||||
(*) the coherency queue is not flushed by normal loads to lines already
|
||||
present in the cache, even though the contents of the queue may
|
||||
potentially effect those loads.
|
||||
potentially affect those loads.
|
||||
|
||||
Imagine, then, that two writes are made on the first CPU, with a write barrier
|
||||
between them to guarantee that they will appear to reach that CPU's caches in
|
||||
|
|
@ -1845,7 +1845,7 @@ the requisite order:
|
|||
=============== =============== =======================================
|
||||
u == 0, v == 1 and p == &u, q == &u
|
||||
v = 2;
|
||||
smp_wmb(); Make sure change to v visible before
|
||||
smp_wmb(); Make sure change to v is visible before
|
||||
change to p
|
||||
<A:modify v=2> v is now in cache A exclusively
|
||||
p = &v;
|
||||
|
|
@ -1853,7 +1853,7 @@ the requisite order:
|
|||
|
||||
The write memory barrier forces the other CPUs in the system to perceive that
|
||||
the local CPU's caches have apparently been updated in the correct order. But
|
||||
now imagine that the second CPU that wants to read those values:
|
||||
now imagine that the second CPU wants to read those values:
|
||||
|
||||
CPU 1 CPU 2 COMMENT
|
||||
=============== =============== =======================================
|
||||
|
|
@ -1861,7 +1861,7 @@ now imagine that the second CPU that wants to read those values:
|
|||
q = p;
|
||||
x = *q;
|
||||
|
||||
The above pair of reads may then fail to happen in expected order, as the
|
||||
The above pair of reads may then fail to happen in the expected order, as the
|
||||
cacheline holding p may get updated in one of the second CPU's caches whilst
|
||||
the update to the cacheline holding v is delayed in the other of the second
|
||||
CPU's caches by some other cache event:
|
||||
|
|
@ -1916,7 +1916,7 @@ access depends on a read, not all do, so it may not be relied on.
|
|||
|
||||
Other CPUs may also have split caches, but must coordinate between the various
|
||||
cachelets for normal memory accesses. The semantics of the Alpha removes the
|
||||
need for coordination in absence of memory barriers.
|
||||
need for coordination in the absence of memory barriers.
|
||||
|
||||
|
||||
CACHE COHERENCY VS DMA
|
||||
|
|
@ -1931,10 +1931,10 @@ invalidate them as well).
|
|||
|
||||
In addition, the data DMA'd to RAM by a device may be overwritten by dirty
|
||||
cache lines being written back to RAM from a CPU's cache after the device has
|
||||
installed its own data, or cache lines simply present in a CPUs cache may
|
||||
simply obscure the fact that RAM has been updated, until at such time as the
|
||||
cacheline is discarded from the CPU's cache and reloaded. To deal with this,
|
||||
the appropriate part of the kernel must invalidate the overlapping bits of the
|
||||
installed its own data, or cache lines present in the CPU's cache may simply
|
||||
obscure the fact that RAM has been updated, until at such time as the cacheline
|
||||
is discarded from the CPU's cache and reloaded. To deal with this, the
|
||||
appropriate part of the kernel must invalidate the overlapping bits of the
|
||||
cache on each CPU.
|
||||
|
||||
See Documentation/cachetlb.txt for more information on cache management.
|
||||
|
|
@ -1944,7 +1944,7 @@ CACHE COHERENCY VS MMIO
|
|||
-----------------------
|
||||
|
||||
Memory mapped I/O usually takes place through memory locations that are part of
|
||||
a window in the CPU's memory space that have different properties assigned than
|
||||
a window in the CPU's memory space that has different properties assigned than
|
||||
the usual RAM directed window.
|
||||
|
||||
Amongst these properties is usually the fact that such accesses bypass the
|
||||
|
|
@ -1960,7 +1960,7 @@ THE THINGS CPUS GET UP TO
|
|||
=========================
|
||||
|
||||
A programmer might take it for granted that the CPU will perform memory
|
||||
operations in exactly the order specified, so that if a CPU is, for example,
|
||||
operations in exactly the order specified, so that if the CPU is, for example,
|
||||
given the following piece of code to execute:
|
||||
|
||||
a = *A;
|
||||
|
|
@ -1969,7 +1969,7 @@ given the following piece of code to execute:
|
|||
d = *D;
|
||||
*E = e;
|
||||
|
||||
They would then expect that the CPU will complete the memory operation for each
|
||||
they would then expect that the CPU will complete the memory operation for each
|
||||
instruction before moving on to the next one, leading to a definite sequence of
|
||||
operations as seen by external observers in the system:
|
||||
|
||||
|
|
@ -1986,8 +1986,8 @@ assumption doesn't hold because:
|
|||
(*) loads may be done speculatively, and the result discarded should it prove
|
||||
to have been unnecessary;
|
||||
|
||||
(*) loads may be done speculatively, leading to the result having being
|
||||
fetched at the wrong time in the expected sequence of events;
|
||||
(*) loads may be done speculatively, leading to the result having been fetched
|
||||
at the wrong time in the expected sequence of events;
|
||||
|
||||
(*) the order of the memory accesses may be rearranged to promote better use
|
||||
of the CPU buses and caches;
|
||||
|
|
@ -2069,12 +2069,12 @@ AND THEN THERE'S THE ALPHA
|
|||
|
||||
The DEC Alpha CPU is one of the most relaxed CPUs there is. Not only that,
|
||||
some versions of the Alpha CPU have a split data cache, permitting them to have
|
||||
two semantically related cache lines updating at separate times. This is where
|
||||
two semantically-related cache lines updated at separate times. This is where
|
||||
the data dependency barrier really becomes necessary as this synchronises both
|
||||
caches with the memory coherence system, thus making it seem like pointer
|
||||
changes vs new data occur in the right order.
|
||||
|
||||
The Alpha defines the Linux's kernel's memory barrier model.
|
||||
The Alpha defines the Linux kernel's memory barrier model.
|
||||
|
||||
See the subsection on "Cache Coherency" above.
|
||||
|
||||
|
|
|
|||
|
|
@ -49,7 +49,7 @@ dev->hard_start_xmit:
|
|||
for this and return -1 when the spin lock fails.
|
||||
The locking there should also properly protect against
|
||||
set_multicast_list
|
||||
Context: BHs disabled
|
||||
Context: Process with BHs disabled or BH (timer).
|
||||
Notes: netif_queue_stopped() is guaranteed false
|
||||
Interrupts must be enabled when calling hard_start_xmit.
|
||||
(Interrupts must also be enabled when enabling the BH handler.)
|
||||
|
|
|
|||
|
|
@ -51,13 +51,8 @@ The major changes are:
|
|||
* The interrupt handlers must be adapted to use a ccw_device as argument.
|
||||
Moreover, they don't return a devstat, but an irb.
|
||||
* Before initiating an io, the options must be set via ccw_device_set_options().
|
||||
|
||||
read_dev_chars()
|
||||
read device characteristics
|
||||
|
||||
read_conf_data()
|
||||
read_conf_data_lpm()
|
||||
read configuration data.
|
||||
* Instead of calling read_dev_chars()/read_conf_data(), the driver issues
|
||||
the channel program and handles the interrupt itself.
|
||||
|
||||
ccw_device_get_ciw()
|
||||
get commands from extended sense data.
|
||||
|
|
@ -130,11 +125,6 @@ present their hardware status by the same (shared) IRQ, the operating system
|
|||
has to call every single device driver registered on this IRQ in order to
|
||||
determine the device driver owning the device that raised the interrupt.
|
||||
|
||||
In order not to introduce a new I/O concept to the common Linux code,
|
||||
Linux/390 preserves the IRQ concept and semantically maps the ESA/390
|
||||
subchannels to Linux as IRQs. This allows Linux/390 to support up to 64k
|
||||
different IRQs, uniquely representing a single device each.
|
||||
|
||||
Up to kernel 2.4, Linux/390 used to provide interfaces via the IRQ (subchannel).
|
||||
For internal use of the common I/O layer, these are still there. However,
|
||||
device drivers should use the new calling interface via the ccw_device only.
|
||||
|
|
@ -151,9 +141,8 @@ information during their initialization step to recognize the devices they
|
|||
support using the information saved in the struct ccw_device given to them.
|
||||
This methods implies that Linux/390 doesn't require to probe for free (not
|
||||
armed) interrupt request lines (IRQs) to drive its devices with. Where
|
||||
applicable, the device drivers can use the read_dev_chars() to retrieve device
|
||||
characteristics. This can be done without having to request device ownership
|
||||
previously.
|
||||
applicable, the device drivers can use issue the READ DEVICE CHARACTERISTICS
|
||||
ccw to retrieve device characteristics in its online routine.
|
||||
|
||||
In order to allow for easy I/O initiation the CDS layer provides a
|
||||
ccw_device_start() interface that takes a device specific channel program (one
|
||||
|
|
@ -170,69 +159,6 @@ SUBCHANNEL (HSCH) command without having pending I/O requests. This function is
|
|||
also covered by ccw_device_halt().
|
||||
|
||||
|
||||
read_dev_chars() - Read Device Characteristics
|
||||
|
||||
This routine returns the characteristics for the device specified.
|
||||
|
||||
The function is meant to be called with the device already enabled; that is,
|
||||
at earliest during set_online() processing.
|
||||
|
||||
The ccw_device must not be locked prior to calling read_dev_chars().
|
||||
|
||||
The function may be called enabled or disabled.
|
||||
|
||||
int read_dev_chars(struct ccw_device *cdev, void **buffer, int length );
|
||||
|
||||
cdev - the ccw_device the information is requested for.
|
||||
buffer - pointer to a buffer pointer. The buffer pointer itself
|
||||
must contain a valid buffer area.
|
||||
length - length of the buffer provided.
|
||||
|
||||
The read_dev_chars() function returns :
|
||||
|
||||
0 - successful completion
|
||||
-ENODEV - cdev invalid
|
||||
-EINVAL - an invalid parameter was detected, or the function was called early.
|
||||
-EBUSY - an irrecoverable I/O error occurred or the device is not
|
||||
operational.
|
||||
|
||||
|
||||
read_conf_data(), read_conf_data_lpm() - Read Configuration Data
|
||||
|
||||
Retrieve the device dependent configuration data. Please have a look at your
|
||||
device dependent I/O commands for the device specific layout of the node
|
||||
descriptor elements. read_conf_data_lpm() will retrieve the configuration data
|
||||
for a specific path.
|
||||
|
||||
The function is meant to be called with the device already enabled; that is,
|
||||
at earliest during set_online() processing.
|
||||
|
||||
The function may be called enabled or disabled, but the device must not be
|
||||
locked
|
||||
|
||||
int read_conf_data(struct ccw_device, void **buffer, int *length);
|
||||
int read_conf_data_lpm(struct ccw_device, void **buffer, int *length, __u8 lpm);
|
||||
|
||||
cdev - the ccw_device the data is requested for.
|
||||
buffer - Pointer to a buffer pointer. The read_conf_data() routine
|
||||
will allocate a buffer and initialize the buffer pointer
|
||||
accordingly. It's the device driver's responsibility to
|
||||
release the kernel memory if no longer needed.
|
||||
length - Length of the buffer allocated and retrieved.
|
||||
lpm - Logical path mask to be used for retrieving the data. If
|
||||
zero the data is retrieved on the next path available.
|
||||
|
||||
The read_conf_data() function returns :
|
||||
0 - Successful completion
|
||||
-ENODEV - cdev invalid.
|
||||
-EINVAL - An invalid parameter was detected, or the function was called early.
|
||||
-EIO - An irrecoverable I/O error occurred or the device is
|
||||
not operational.
|
||||
-ENOMEM - The read_conf_data() routine couldn't obtain storage.
|
||||
-EOPNOTSUPP - The device doesn't support the read configuration
|
||||
data command.
|
||||
|
||||
|
||||
get_ciw() - get command information word
|
||||
|
||||
This call enables a device driver to get information about supported commands
|
||||
|
|
|
|||
|
|
@ -1,26 +1,30 @@
|
|||
Overview of Linux kernel SPI support
|
||||
====================================
|
||||
|
||||
02-Dec-2005
|
||||
21-May-2007
|
||||
|
||||
What is SPI?
|
||||
------------
|
||||
The "Serial Peripheral Interface" (SPI) is a synchronous four wire serial
|
||||
link used to connect microcontrollers to sensors, memory, and peripherals.
|
||||
It's a simple "de facto" standard, not complicated enough to acquire a
|
||||
standardization body. SPI uses a master/slave configuration.
|
||||
|
||||
The three signal wires hold a clock (SCK, often on the order of 10 MHz),
|
||||
and parallel data lines with "Master Out, Slave In" (MOSI) or "Master In,
|
||||
Slave Out" (MISO) signals. (Other names are also used.) There are four
|
||||
clocking modes through which data is exchanged; mode-0 and mode-3 are most
|
||||
commonly used. Each clock cycle shifts data out and data in; the clock
|
||||
doesn't cycle except when there is data to shift.
|
||||
doesn't cycle except when there is a data bit to shift. Not all data bits
|
||||
are used though; not every protocol uses those full duplex capabilities.
|
||||
|
||||
SPI masters may use a "chip select" line to activate a given SPI slave
|
||||
SPI masters use a fourth "chip select" line to activate a given SPI slave
|
||||
device, so those three signal wires may be connected to several chips
|
||||
in parallel. All SPI slaves support chipselects. Some devices have
|
||||
in parallel. All SPI slaves support chipselects; they are usually active
|
||||
low signals, labeled nCSx for slave 'x' (e.g. nCS0). Some devices have
|
||||
other signals, often including an interrupt to the master.
|
||||
|
||||
Unlike serial busses like USB or SMBUS, even low level protocols for
|
||||
Unlike serial busses like USB or SMBus, even low level protocols for
|
||||
SPI slave functions are usually not interoperable between vendors
|
||||
(except for commodities like SPI memory chips).
|
||||
|
||||
|
|
@ -33,6 +37,11 @@ SPI slave functions are usually not interoperable between vendors
|
|||
- Some devices may use eight bit words. Others may different word
|
||||
lengths, such as streams of 12-bit or 20-bit digital samples.
|
||||
|
||||
- Words are usually sent with their most significant bit (MSB) first,
|
||||
but sometimes the least significant bit (LSB) goes first instead.
|
||||
|
||||
- Sometimes SPI is used to daisy-chain devices, like shift registers.
|
||||
|
||||
In the same way, SPI slaves will only rarely support any kind of automatic
|
||||
discovery/enumeration protocol. The tree of slave devices accessible from
|
||||
a given SPI master will normally be set up manually, with configuration
|
||||
|
|
@ -44,6 +53,14 @@ half-duplex SPI, for request/response protocols), SSP ("Synchronous
|
|||
Serial Protocol"), PSP ("Programmable Serial Protocol"), and other
|
||||
related protocols.
|
||||
|
||||
Some chips eliminate a signal line by combining MOSI and MISO, and
|
||||
limiting themselves to half-duplex at the hardware level. In fact
|
||||
some SPI chips have this signal mode as a strapping option. These
|
||||
can be accessed using the same programming interface as SPI, but of
|
||||
course they won't handle full duplex transfers. You may find such
|
||||
chips described as using "three wire" signaling: SCK, data, nCSx.
|
||||
(That data line is sometimes called MOMI or SISO.)
|
||||
|
||||
Microcontrollers often support both master and slave sides of the SPI
|
||||
protocol. This document (and Linux) currently only supports the master
|
||||
side of SPI interactions.
|
||||
|
|
@ -74,6 +91,32 @@ interfaces with SPI modes. Given SPI support, they could use MMC or SD
|
|||
cards without needing a special purpose MMC/SD/SDIO controller.
|
||||
|
||||
|
||||
I'm confused. What are these four SPI "clock modes"?
|
||||
-----------------------------------------------------
|
||||
It's easy to be confused here, and the vendor documentation you'll
|
||||
find isn't necessarily helpful. The four modes combine two mode bits:
|
||||
|
||||
- CPOL indicates the initial clock polarity. CPOL=0 means the
|
||||
clock starts low, so the first (leading) edge is rising, and
|
||||
the second (trailing) edge is falling. CPOL=1 means the clock
|
||||
starts high, so the first (leading) edge is falling.
|
||||
|
||||
- CPHA indicates the clock phase used to sample data; CPHA=0 says
|
||||
sample on the leading edge, CPHA=1 means the trailing edge.
|
||||
|
||||
Since the signal needs to stablize before it's sampled, CPHA=0
|
||||
implies that its data is written half a clock before the first
|
||||
clock edge. The chipselect may have made it become available.
|
||||
|
||||
Chip specs won't always say "uses SPI mode X" in as many words,
|
||||
but their timing diagrams will make the CPOL and CPHA modes clear.
|
||||
|
||||
In the SPI mode number, CPOL is the high order bit and CPHA is the
|
||||
low order bit. So when a chip's timing diagram shows the clock
|
||||
starting low (CPOL=0) and data stabilized for sampling during the
|
||||
trailing clock edge (CPHA=1), that's SPI mode 1.
|
||||
|
||||
|
||||
How do these driver programming interfaces work?
|
||||
------------------------------------------------
|
||||
The <linux/spi/spi.h> header file includes kerneldoc, as does the
|
||||
|
|
|
|||
|
|
@ -242,6 +242,9 @@ void decode_numa_list(int *numa, char *t)
|
|||
|
||||
memset(numa, 0, MAX_NODES * sizeof(int));
|
||||
|
||||
if (!t)
|
||||
return;
|
||||
|
||||
while (*t == 'N') {
|
||||
t++;
|
||||
node = strtoul(t, &t, 10);
|
||||
|
|
@ -259,11 +262,17 @@ void decode_numa_list(int *numa, char *t)
|
|||
|
||||
void slab_validate(struct slabinfo *s)
|
||||
{
|
||||
if (strcmp(s->name, "*") == 0)
|
||||
return;
|
||||
|
||||
set_obj(s, "validate", 1);
|
||||
}
|
||||
|
||||
void slab_shrink(struct slabinfo *s)
|
||||
{
|
||||
if (strcmp(s->name, "*") == 0)
|
||||
return;
|
||||
|
||||
set_obj(s, "shrink", 1);
|
||||
}
|
||||
|
||||
|
|
@ -386,7 +395,9 @@ void report(struct slabinfo *s)
|
|||
{
|
||||
if (strcmp(s->name, "*") == 0)
|
||||
return;
|
||||
printf("\nSlabcache: %-20s Aliases: %2d Order : %2d\n", s->name, s->aliases, s->order);
|
||||
|
||||
printf("\nSlabcache: %-20s Aliases: %2d Order : %2d Objects: %d\n",
|
||||
s->name, s->aliases, s->order, s->objects);
|
||||
if (s->hwcache_align)
|
||||
printf("** Hardware cacheline aligned\n");
|
||||
if (s->cache_dma)
|
||||
|
|
@ -545,6 +556,9 @@ int slab_empty(struct slabinfo *s)
|
|||
|
||||
void slab_debug(struct slabinfo *s)
|
||||
{
|
||||
if (strcmp(s->name, "*") == 0)
|
||||
return;
|
||||
|
||||
if (sanity && !s->sanity_checks) {
|
||||
set_obj(s, "sanity", 1);
|
||||
}
|
||||
|
|
@ -791,11 +805,11 @@ void totals(void)
|
|||
|
||||
store_size(b1, total_size);store_size(b2, total_waste);
|
||||
store_size(b3, total_waste * 100 / total_used);
|
||||
printf("Memory used: %6s # Loss : %6s MRatio: %6s%%\n", b1, b2, b3);
|
||||
printf("Memory used: %6s # Loss : %6s MRatio:%6s%%\n", b1, b2, b3);
|
||||
|
||||
store_size(b1, total_objects);store_size(b2, total_partobj);
|
||||
store_size(b3, total_partobj * 100 / total_objects);
|
||||
printf("# Objects : %6s # PartObj: %6s ORatio: %6s%%\n", b1, b2, b3);
|
||||
printf("# Objects : %6s # PartObj: %6s ORatio:%6s%%\n", b1, b2, b3);
|
||||
|
||||
printf("\n");
|
||||
printf("Per Cache Average Min Max Total\n");
|
||||
|
|
@ -818,7 +832,7 @@ void totals(void)
|
|||
store_size(b1, avg_ppart);store_size(b2, min_ppart);
|
||||
store_size(b3, max_ppart);
|
||||
store_size(b4, total_partial * 100 / total_slabs);
|
||||
printf("%%PartSlab %10s%% %10s%% %10s%% %10s%%\n",
|
||||
printf("%%PartSlab%10s%% %10s%% %10s%% %10s%%\n",
|
||||
b1, b2, b3, b4);
|
||||
|
||||
store_size(b1, avg_partobj);store_size(b2, min_partobj);
|
||||
|
|
@ -830,7 +844,7 @@ void totals(void)
|
|||
store_size(b1, avg_ppartobj);store_size(b2, min_ppartobj);
|
||||
store_size(b3, max_ppartobj);
|
||||
store_size(b4, total_partobj * 100 / total_objects);
|
||||
printf("%% PartObj %10s%% %10s%% %10s%% %10s%%\n",
|
||||
printf("%% PartObj%10s%% %10s%% %10s%% %10s%%\n",
|
||||
b1, b2, b3, b4);
|
||||
|
||||
store_size(b1, avg_size);store_size(b2, min_size);
|
||||
|
|
@ -1100,6 +1114,8 @@ void output_slabs(void)
|
|||
ops(slab);
|
||||
else if (show_slab)
|
||||
slabcache(slab);
|
||||
else if (show_report)
|
||||
report(slab);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
41
MAINTAINERS
41
MAINTAINERS
|
|
@ -332,6 +332,9 @@ L: linux-usb-devel@lists.sourceforge.net
|
|||
W: http://www.linux-usb.org/SpeedTouch/
|
||||
S: Maintained
|
||||
|
||||
ALCHEMY AU1XX0 MMC DRIVER
|
||||
S: Orphan
|
||||
|
||||
ALI1563 I2C DRIVER
|
||||
P: Rudolf Marek
|
||||
M: r.marek@assembler.cz
|
||||
|
|
@ -418,6 +421,12 @@ P: Ian Molton
|
|||
M: spyro@f2s.com
|
||||
S: Maintained
|
||||
|
||||
ARM PRIMECELL MMCI PL180/1 DRIVER
|
||||
P: Russell King
|
||||
M: rmk@arm.linux.org.uk
|
||||
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
|
||||
S: Maintained
|
||||
|
||||
ARM/ADI ROADRUNNER MACHINE SUPPORT
|
||||
P: Lennert Buytenhek
|
||||
M: kernel@wantstofly.org
|
||||
|
|
@ -649,6 +658,9 @@ L: linux-atm-general@lists.sourceforge.net (subscribers-only)
|
|||
W: http://linux-atm.sourceforge.net
|
||||
S: Maintained
|
||||
|
||||
ATMEL AT91 MCI DRIVER
|
||||
S: Orphan
|
||||
|
||||
ATMEL MACB ETHERNET DRIVER
|
||||
P: Haavard Skinnemoen
|
||||
M: hskinnemoen@atmel.com
|
||||
|
|
@ -2231,11 +2243,11 @@ M: khali@linux-fr.org
|
|||
L: lm-sensors@lm-sensors.org
|
||||
S: Maintained
|
||||
|
||||
LOGICAL DISK MANAGER SUPPORT (LDM, Windows 2000/XP Dynamic Disks)
|
||||
LOGICAL DISK MANAGER SUPPORT (LDM, Windows 2000/XP/Vista Dynamic Disks)
|
||||
P: Richard Russon (FlatCap)
|
||||
M: ldm@flatcap.org
|
||||
L: ldm-devel@lists.sourceforge.net
|
||||
W: http://ldm.sourceforge.net
|
||||
L: linux-ntfs-dev@lists.sourceforge.net
|
||||
W: http://www.linux-ntfs.org/content/view/19/37/
|
||||
S: Maintained
|
||||
|
||||
LSILOGIC MPT FUSION DRIVERS (FC/SAS/SPI)
|
||||
|
|
@ -2322,7 +2334,7 @@ S: Maintained
|
|||
|
||||
MEGARAID SCSI DRIVERS
|
||||
P: Neela Syam Kolli
|
||||
M: Neela.Kolli@engenio.com
|
||||
M: megaraidlinux@lsi.com
|
||||
S: linux-scsi@vger.kernel.org
|
||||
W: http://megaraid.lsilogic.com
|
||||
S: Maintained
|
||||
|
|
@ -2380,6 +2392,13 @@ M: stelian@popies.net
|
|||
W: http://popies.net/meye/
|
||||
S: Maintained
|
||||
|
||||
MOTOROLA IMX MMC/SD HOST CONTROLLER INTERFACE DRIVER
|
||||
P: Pavel Pisa
|
||||
M: ppisa@pikron.com
|
||||
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
|
||||
W: http://mmc.drzeus.cx/wiki/Controllers/Freescale/SDHC
|
||||
S: Maintained
|
||||
|
||||
MOUSE AND MISC DEVICES [GENERAL]
|
||||
P: Alessandro Rubini
|
||||
M: rubini@ipvvis.unipv.it
|
||||
|
|
@ -2689,13 +2708,13 @@ L: i2c@lm-sensors.org
|
|||
S: Maintained
|
||||
|
||||
PARALLEL PORT SUPPORT
|
||||
L: linux-parport@lists.infradead.org
|
||||
L: linux-parport@lists.infradead.org (subscribers-only)
|
||||
S: Orphan
|
||||
|
||||
PARIDE DRIVERS FOR PARALLEL PORT IDE DEVICES
|
||||
P: Tim Waugh
|
||||
M: tim@cyberelk.net
|
||||
L: linux-parport@lists.infradead.org
|
||||
L: linux-parport@lists.infradead.org (subscribers-only)
|
||||
W: http://www.torque.net/linux-pp.html
|
||||
S: Maintained
|
||||
|
||||
|
|
@ -2900,6 +2919,9 @@ M: nico@cam.org
|
|||
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
|
||||
S: Maintained
|
||||
|
||||
PXA MMCI DRIVER
|
||||
S: Orphan
|
||||
|
||||
QLOGIC QLA2XXX FC-SCSI DRIVER
|
||||
P: Andrew Vasquez
|
||||
M: linux-driver@qlogic.com
|
||||
|
|
@ -3416,6 +3438,13 @@ P: Alex Dubov
|
|||
M: oakad@yahoo.com
|
||||
S: Maintained
|
||||
|
||||
TI OMAP MMC INTERFACE DRIVER
|
||||
P: Carlos Aguiar, Anderson Briglia and Syed Khasim
|
||||
M: linux-omap-open-source@linux.omap.com
|
||||
W: http://linux.omap.com
|
||||
W: http://www.muru.com/linux/omap/
|
||||
S: Maintained
|
||||
|
||||
TI OMAP RANDOM NUMBER GENERATOR SUPPORT
|
||||
P: Deepak Saxena
|
||||
M: dsaxena@plexity.net
|
||||
|
|
|
|||
6
Makefile
6
Makefile
|
|
@ -1,8 +1,8 @@
|
|||
VERSION = 2
|
||||
PATCHLEVEL = 6
|
||||
SUBLEVEL = 22
|
||||
EXTRAVERSION = -rc1
|
||||
NAME = Nocturnal Monster Puppy
|
||||
EXTRAVERSION = -rc3
|
||||
NAME = Jeff Thinks I Should Change This, But To What?
|
||||
|
||||
# *DOCUMENTATION*
|
||||
# To see a list of typical targets execute "make help"
|
||||
|
|
@ -491,7 +491,7 @@ endif
|
|||
include $(srctree)/arch/$(ARCH)/Makefile
|
||||
|
||||
ifdef CONFIG_FRAME_POINTER
|
||||
CFLAGS += -fno-omit-frame-pointer -fno-optimize-sibling-calls
|
||||
CFLAGS += -fno-omit-frame-pointer $(call cc-option,-fno-optimize-sibling-calls,)
|
||||
else
|
||||
CFLAGS += -fomit-frame-pointer
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -391,11 +391,10 @@ $work_resched:
|
|||
bne $2, $work_resched
|
||||
|
||||
$work_notifysig:
|
||||
mov $sp, $17
|
||||
mov $sp, $16
|
||||
br $1, do_switch_stack
|
||||
mov $5, $21
|
||||
mov $sp, $18
|
||||
mov $31, $16
|
||||
mov $sp, $17
|
||||
mov $5, $18
|
||||
jsr $26, do_notify_resume
|
||||
bsr $1, undo_switch_stack
|
||||
br restore_all
|
||||
|
|
|
|||
|
|
@ -7,6 +7,7 @@
|
|||
#include <linux/pci.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/bootmem.h>
|
||||
#include <linux/log2.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/hwrpb.h>
|
||||
|
|
@ -53,7 +54,7 @@ size_for_memory(unsigned long max)
|
|||
{
|
||||
unsigned long mem = max_low_pfn << PAGE_SHIFT;
|
||||
if (mem < max)
|
||||
max = 1UL << ceil_log2(mem);
|
||||
max = roundup_pow_of_two(mem);
|
||||
return max;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -43,6 +43,7 @@
|
|||
#include <linux/notifier.h>
|
||||
#include <asm/setup.h>
|
||||
#include <asm/io.h>
|
||||
#include <linux/log2.h>
|
||||
|
||||
extern struct atomic_notifier_head panic_notifier_list;
|
||||
static int alpha_panic_event(struct notifier_block *, unsigned long, void *);
|
||||
|
|
@ -1303,7 +1304,7 @@ external_cache_probe(int minsize, int width)
|
|||
long size = minsize, maxsize = MAX_BCACHE_SIZE * 2;
|
||||
|
||||
if (maxsize > (max_low_pfn + 1) << PAGE_SHIFT)
|
||||
maxsize = 1 << (floor_log2(max_low_pfn + 1) + PAGE_SHIFT);
|
||||
maxsize = 1 << (ilog2(max_low_pfn + 1) + PAGE_SHIFT);
|
||||
|
||||
/* Get the first block cached. */
|
||||
read_mem_block(__va(0), stride, size);
|
||||
|
|
|
|||
|
|
@ -32,8 +32,8 @@
|
|||
#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
|
||||
|
||||
asmlinkage void ret_from_sys_call(void);
|
||||
static int do_signal(sigset_t *, struct pt_regs *, struct switch_stack *,
|
||||
unsigned long, unsigned long);
|
||||
static void do_signal(struct pt_regs *, struct switch_stack *,
|
||||
unsigned long, unsigned long);
|
||||
|
||||
|
||||
/*
|
||||
|
|
@ -146,11 +146,9 @@ sys_rt_sigaction(int sig, const struct sigaction __user *act,
|
|||
asmlinkage int
|
||||
do_sigsuspend(old_sigset_t mask, struct pt_regs *regs, struct switch_stack *sw)
|
||||
{
|
||||
sigset_t oldset;
|
||||
|
||||
mask &= _BLOCKABLE;
|
||||
spin_lock_irq(¤t->sighand->siglock);
|
||||
oldset = current->blocked;
|
||||
current->saved_sigmask = current->blocked;
|
||||
siginitset(¤t->blocked, mask);
|
||||
recalc_sigpending();
|
||||
spin_unlock_irq(¤t->sighand->siglock);
|
||||
|
|
@ -160,19 +158,17 @@ do_sigsuspend(old_sigset_t mask, struct pt_regs *regs, struct switch_stack *sw)
|
|||
regs->r0 = EINTR;
|
||||
regs->r19 = 1;
|
||||
|
||||
while (1) {
|
||||
current->state = TASK_INTERRUPTIBLE;
|
||||
schedule();
|
||||
if (do_signal(&oldset, regs, sw, 0, 0))
|
||||
return -EINTR;
|
||||
}
|
||||
current->state = TASK_INTERRUPTIBLE;
|
||||
schedule();
|
||||
set_thread_flag(TIF_RESTORE_SIGMASK);
|
||||
return -ERESTARTNOHAND;
|
||||
}
|
||||
|
||||
asmlinkage int
|
||||
do_rt_sigsuspend(sigset_t __user *uset, size_t sigsetsize,
|
||||
struct pt_regs *regs, struct switch_stack *sw)
|
||||
{
|
||||
sigset_t oldset, set;
|
||||
sigset_t set;
|
||||
|
||||
/* XXX: Don't preclude handling different sized sigset_t's. */
|
||||
if (sigsetsize != sizeof(sigset_t))
|
||||
|
|
@ -182,7 +178,7 @@ do_rt_sigsuspend(sigset_t __user *uset, size_t sigsetsize,
|
|||
|
||||
sigdelsetmask(&set, ~_BLOCKABLE);
|
||||
spin_lock_irq(¤t->sighand->siglock);
|
||||
oldset = current->blocked;
|
||||
current->saved_sigmask = current->blocked;
|
||||
current->blocked = set;
|
||||
recalc_sigpending();
|
||||
spin_unlock_irq(¤t->sighand->siglock);
|
||||
|
|
@ -192,12 +188,10 @@ do_rt_sigsuspend(sigset_t __user *uset, size_t sigsetsize,
|
|||
regs->r0 = EINTR;
|
||||
regs->r19 = 1;
|
||||
|
||||
while (1) {
|
||||
current->state = TASK_INTERRUPTIBLE;
|
||||
schedule();
|
||||
if (do_signal(&oldset, regs, sw, 0, 0))
|
||||
return -EINTR;
|
||||
}
|
||||
current->state = TASK_INTERRUPTIBLE;
|
||||
schedule();
|
||||
set_thread_flag(TIF_RESTORE_SIGMASK);
|
||||
return -ERESTARTNOHAND;
|
||||
}
|
||||
|
||||
asmlinkage int
|
||||
|
|
@ -436,7 +430,7 @@ setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,
|
|||
return err;
|
||||
}
|
||||
|
||||
static void
|
||||
static int
|
||||
setup_frame(int sig, struct k_sigaction *ka, sigset_t *set,
|
||||
struct pt_regs *regs, struct switch_stack * sw)
|
||||
{
|
||||
|
|
@ -481,13 +475,14 @@ setup_frame(int sig, struct k_sigaction *ka, sigset_t *set,
|
|||
current->comm, current->pid, frame, regs->pc, regs->r26);
|
||||
#endif
|
||||
|
||||
return;
|
||||
return 0;
|
||||
|
||||
give_sigsegv:
|
||||
force_sigsegv(sig, current);
|
||||
return -EFAULT;
|
||||
}
|
||||
|
||||
static void
|
||||
static int
|
||||
setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
|
||||
sigset_t *set, struct pt_regs *regs, struct switch_stack * sw)
|
||||
{
|
||||
|
|
@ -543,34 +538,38 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
|
|||
current->comm, current->pid, frame, regs->pc, regs->r26);
|
||||
#endif
|
||||
|
||||
return;
|
||||
return 0;
|
||||
|
||||
give_sigsegv:
|
||||
force_sigsegv(sig, current);
|
||||
return -EFAULT;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* OK, we're invoking a handler.
|
||||
*/
|
||||
static inline void
|
||||
static inline int
|
||||
handle_signal(int sig, struct k_sigaction *ka, siginfo_t *info,
|
||||
sigset_t *oldset, struct pt_regs * regs, struct switch_stack *sw)
|
||||
{
|
||||
int ret;
|
||||
|
||||
if (ka->sa.sa_flags & SA_SIGINFO)
|
||||
setup_rt_frame(sig, ka, info, oldset, regs, sw);
|
||||
ret = setup_rt_frame(sig, ka, info, oldset, regs, sw);
|
||||
else
|
||||
setup_frame(sig, ka, oldset, regs, sw);
|
||||
ret = setup_frame(sig, ka, oldset, regs, sw);
|
||||
|
||||
if (ka->sa.sa_flags & SA_RESETHAND)
|
||||
ka->sa.sa_handler = SIG_DFL;
|
||||
if (ret == 0) {
|
||||
spin_lock_irq(¤t->sighand->siglock);
|
||||
sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask);
|
||||
if (!(ka->sa.sa_flags & SA_NODEFER))
|
||||
sigaddset(¤t->blocked,sig);
|
||||
recalc_sigpending();
|
||||
spin_unlock_irq(¤t->sighand->siglock);
|
||||
}
|
||||
|
||||
spin_lock_irq(¤t->sighand->siglock);
|
||||
sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask);
|
||||
if (!(ka->sa.sa_flags & SA_NODEFER))
|
||||
sigaddset(¤t->blocked,sig);
|
||||
recalc_sigpending();
|
||||
spin_unlock_irq(¤t->sighand->siglock);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline void
|
||||
|
|
@ -611,30 +610,42 @@ syscall_restart(unsigned long r0, unsigned long r19,
|
|||
* restart. "r0" is also used as an indicator whether we can restart at
|
||||
* all (if we get here from anything but a syscall return, it will be 0)
|
||||
*/
|
||||
static int
|
||||
do_signal(sigset_t *oldset, struct pt_regs * regs, struct switch_stack * sw,
|
||||
static void
|
||||
do_signal(struct pt_regs * regs, struct switch_stack * sw,
|
||||
unsigned long r0, unsigned long r19)
|
||||
{
|
||||
siginfo_t info;
|
||||
int signr;
|
||||
unsigned long single_stepping = ptrace_cancel_bpt(current);
|
||||
struct k_sigaction ka;
|
||||
sigset_t *oldset;
|
||||
|
||||
if (!oldset)
|
||||
if (test_thread_flag(TIF_RESTORE_SIGMASK))
|
||||
oldset = ¤t->saved_sigmask;
|
||||
else
|
||||
oldset = ¤t->blocked;
|
||||
|
||||
/* This lets the debugger run, ... */
|
||||
signr = get_signal_to_deliver(&info, &ka, regs, NULL);
|
||||
|
||||
/* ... so re-check the single stepping. */
|
||||
single_stepping |= ptrace_cancel_bpt(current);
|
||||
|
||||
if (signr > 0) {
|
||||
/* Whee! Actually deliver the signal. */
|
||||
if (r0) syscall_restart(r0, r19, regs, &ka);
|
||||
handle_signal(signr, &ka, &info, oldset, regs, sw);
|
||||
if (r0)
|
||||
syscall_restart(r0, r19, regs, &ka);
|
||||
if (handle_signal(signr, &ka, &info, oldset, regs, sw) == 0) {
|
||||
/* A signal was successfully delivered, and the
|
||||
saved sigmask was stored on the signal frame,
|
||||
and will be restored by sigreturn. So we can
|
||||
simply clear the restore sigmask flag. */
|
||||
if (test_thread_flag(TIF_RESTORE_SIGMASK))
|
||||
clear_thread_flag(TIF_RESTORE_SIGMASK);
|
||||
}
|
||||
if (single_stepping)
|
||||
ptrace_set_bpt(current); /* re-set bpt */
|
||||
return 1;
|
||||
return;
|
||||
}
|
||||
|
||||
if (r0) {
|
||||
|
|
@ -654,17 +665,22 @@ do_signal(sigset_t *oldset, struct pt_regs * regs, struct switch_stack * sw,
|
|||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* If there's no signal to deliver, we just restore the saved mask. */
|
||||
if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
|
||||
clear_thread_flag(TIF_RESTORE_SIGMASK);
|
||||
sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL);
|
||||
}
|
||||
|
||||
if (single_stepping)
|
||||
ptrace_set_bpt(current); /* re-set breakpoint */
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void
|
||||
do_notify_resume(sigset_t *oldset, struct pt_regs *regs,
|
||||
struct switch_stack *sw, unsigned long r0,
|
||||
unsigned long r19, unsigned long thread_info_flags)
|
||||
do_notify_resume(struct pt_regs *regs, struct switch_stack *sw,
|
||||
unsigned long thread_info_flags,
|
||||
unsigned long r0, unsigned long r19)
|
||||
{
|
||||
if (thread_info_flags & _TIF_SIGPENDING)
|
||||
do_signal(oldset, regs, sw, r0, r19);
|
||||
if (thread_info_flags & (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK))
|
||||
do_signal(regs, sw, r0, r19);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -465,6 +465,38 @@ sys_call_table:
|
|||
.quad sys_inotify_init
|
||||
.quad sys_inotify_add_watch /* 445 */
|
||||
.quad sys_inotify_rm_watch
|
||||
.quad sys_fdatasync
|
||||
.quad sys_kexec_load
|
||||
.quad sys_migrate_pages
|
||||
.quad sys_openat /* 450 */
|
||||
.quad sys_mkdirat
|
||||
.quad sys_mknodat
|
||||
.quad sys_fchownat
|
||||
.quad sys_futimesat
|
||||
.quad sys_fstatat64 /* 455 */
|
||||
.quad sys_unlinkat
|
||||
.quad sys_renameat
|
||||
.quad sys_linkat
|
||||
.quad sys_symlinkat
|
||||
.quad sys_readlinkat /* 460 */
|
||||
.quad sys_fchmodat
|
||||
.quad sys_faccessat
|
||||
.quad sys_pselect6
|
||||
.quad sys_ppoll
|
||||
.quad sys_unshare /* 465 */
|
||||
.quad sys_set_robust_list
|
||||
.quad sys_get_robust_list
|
||||
.quad sys_splice
|
||||
.quad sys_sync_file_range
|
||||
.quad sys_tee /* 470 */
|
||||
.quad sys_vmsplice
|
||||
.quad sys_move_pages
|
||||
.quad sys_getcpu
|
||||
.quad sys_epoll_pwait
|
||||
.quad sys_utimensat /* 475 */
|
||||
.quad sys_signalfd
|
||||
.quad sys_timerfd
|
||||
.quad sys_eventfd
|
||||
|
||||
.size sys_call_table, . - sys_call_table
|
||||
.type sys_call_table, @object
|
||||
|
|
|
|||
|
|
@ -15,7 +15,7 @@ SECTIONS
|
|||
|
||||
_text = .; /* Text and read-only data */
|
||||
.text : {
|
||||
*(.text)
|
||||
TEXT_TEXT
|
||||
SCHED_TEXT
|
||||
LOCK_TEXT
|
||||
*(.fixup)
|
||||
|
|
@ -89,7 +89,7 @@ SECTIONS
|
|||
|
||||
_data = .;
|
||||
.data : { /* Data */
|
||||
*(.data)
|
||||
DATA_DATA
|
||||
CONSTRUCTORS
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -37,7 +37,8 @@ lib-y = __divqu.o __remqu.o __divlu.o __remlu.o \
|
|||
$(ev6-y)clear_page.o \
|
||||
$(ev6-y)copy_page.o \
|
||||
fpreg.o \
|
||||
callback_srm.o srm_puts.o srm_printk.o
|
||||
callback_srm.o srm_puts.o srm_printk.o \
|
||||
fls.o
|
||||
|
||||
lib-$(CONFIG_SMP) += dec_and_lock.o
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,38 @@
|
|||
/*
|
||||
* arch/alpha/lib/fls.c
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <asm/bitops.h>
|
||||
|
||||
/* This is fls(x)-1, except zero is held to zero. This allows most
|
||||
efficent input into extbl, plus it allows easy handling of fls(0)=0. */
|
||||
|
||||
const unsigned char __flsm1_tab[256] =
|
||||
{
|
||||
0,
|
||||
0,
|
||||
1, 1,
|
||||
2, 2, 2, 2,
|
||||
3, 3, 3, 3, 3, 3, 3, 3,
|
||||
4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
|
||||
|
||||
5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
|
||||
5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
|
||||
|
||||
6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
|
||||
6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
|
||||
6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
|
||||
6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
|
||||
|
||||
7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
|
||||
7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
|
||||
7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
|
||||
7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
|
||||
7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
|
||||
7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
|
||||
7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
|
||||
7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
|
||||
};
|
||||
|
||||
EXPORT_SYMBOL(__flsm1_tab);
|
||||
|
|
@ -287,6 +287,7 @@ config ARCH_IXP2000
|
|||
config ARCH_IXP4XX
|
||||
bool "IXP4xx-based"
|
||||
depends on MMU
|
||||
select GENERIC_GPIO
|
||||
select GENERIC_TIME
|
||||
select GENERIC_CLOCKEVENTS
|
||||
help
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
* copy data to/from buffers located outside the DMA region. This
|
||||
* only works for systems in which DMA memory is at the bottom of
|
||||
* RAM, the remainder of memory is at the top and the DMA memory
|
||||
* can be marked as ZONE_DMA. Anything beyond that such as discontigous
|
||||
* can be marked as ZONE_DMA. Anything beyond that such as discontiguous
|
||||
* DMA windows will require custom implementations that reserve memory
|
||||
* areas at early bootup.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -72,7 +72,7 @@ static inline unsigned int gic_irq(unsigned int irq)
|
|||
* unmask it, in the same way we need to unmask an interrupt when
|
||||
* we first enable it.
|
||||
*
|
||||
* The GIC has a seperate notion of "end of interrupt" to re-enable
|
||||
* The GIC has a separate notion of "end of interrupt" to re-enable
|
||||
* an interrupt after handling, in order to support hardware
|
||||
* prioritisation.
|
||||
*
|
||||
|
|
@ -125,12 +125,11 @@ static void gic_set_cpu(unsigned int irq, cpumask_t mask_val)
|
|||
}
|
||||
#endif
|
||||
|
||||
static void fastcall gic_handle_cascade_irq(unsigned int irq,
|
||||
struct irq_desc *desc)
|
||||
static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
|
||||
{
|
||||
struct gic_chip_data *chip_data = get_irq_data(irq);
|
||||
struct irq_chip *chip = get_irq_chip(irq);
|
||||
unsigned int cascade_irq;
|
||||
unsigned int cascade_irq, gic_irq;
|
||||
unsigned long status;
|
||||
|
||||
/* primary controller ack'ing */
|
||||
|
|
@ -140,16 +139,15 @@ static void fastcall gic_handle_cascade_irq(unsigned int irq,
|
|||
status = readl(chip_data->cpu_base + GIC_CPU_INTACK);
|
||||
spin_unlock(&irq_controller_lock);
|
||||
|
||||
cascade_irq = (status & 0x3ff);
|
||||
if (cascade_irq > 1020)
|
||||
gic_irq = (status & 0x3ff);
|
||||
if (gic_irq == 1023)
|
||||
goto out;
|
||||
if (cascade_irq < 32 || cascade_irq >= NR_IRQS) {
|
||||
do_bad_IRQ(cascade_irq, desc);
|
||||
goto out;
|
||||
}
|
||||
|
||||
cascade_irq += chip_data->irq_offset;
|
||||
generic_handle_irq(cascade_irq);
|
||||
cascade_irq = gic_irq + chip_data->irq_offset;
|
||||
if (unlikely(gic_irq < 32 || gic_irq > 1020 || cascade_irq >= NR_IRQS))
|
||||
do_bad_IRQ(cascade_irq, desc);
|
||||
else
|
||||
generic_handle_irq(cascade_irq);
|
||||
|
||||
out:
|
||||
/* primary controller unmasking */
|
||||
|
|
|
|||
|
|
@ -20,7 +20,7 @@
|
|||
* typically including LCD parameters are loaded by the bootloader at the
|
||||
* address PARAM_BASE. As the kernel will overwrite them, we need to store
|
||||
* them early in the boot process, then pass them to the appropriate drivers.
|
||||
* Not all devices use all paramaters but the format is common to all.
|
||||
* Not all devices use all parameters but the format is common to all.
|
||||
*/
|
||||
#ifdef CONFIG_ARCH_SA1100
|
||||
#define PARAM_BASE 0xe8ffc000
|
||||
|
|
|
|||
|
|
@ -153,7 +153,7 @@ static void sharpsl_battery_thread(struct work_struct *private_)
|
|||
sharpsl_pm.battstat.mainbat_percent = percent;
|
||||
}
|
||||
|
||||
dev_dbg(sharpsl_pm.dev, "Battery: voltage: %d, status: %d, percentage: %d, time: %d\n", voltage,
|
||||
dev_dbg(sharpsl_pm.dev, "Battery: voltage: %d, status: %d, percentage: %d, time: %ld\n", voltage,
|
||||
sharpsl_pm.battstat.mainbat_status, sharpsl_pm.battstat.mainbat_percent, jiffies);
|
||||
|
||||
/* If battery is low. limit backlight intensity to save power. */
|
||||
|
|
@ -291,7 +291,7 @@ static void sharpsl_chrg_full_timer(unsigned long data)
|
|||
}
|
||||
|
||||
/* Charging Finished Interrupt (Not present on Corgi) */
|
||||
/* Can trigger at the same time as an AC staus change so
|
||||
/* Can trigger at the same time as an AC status change so
|
||||
delay until after that has been processed */
|
||||
irqreturn_t sharpsl_chrg_full_isr(int irq, void *dev_id)
|
||||
{
|
||||
|
|
@ -625,7 +625,7 @@ static int sharpsl_fatal_check(void)
|
|||
}
|
||||
|
||||
temp = get_select_val(buff);
|
||||
dev_dbg(sharpsl_pm.dev, "sharpsl_fatal_check: acin: %d, discharge voltage: %d, no discharge: %d\n", acin, temp, sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT));
|
||||
dev_dbg(sharpsl_pm.dev, "sharpsl_fatal_check: acin: %d, discharge voltage: %d, no discharge: %ld\n", acin, temp, sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT));
|
||||
|
||||
if ((acin && (temp < sharpsl_pm.machinfo->fatal_acin_volt)) ||
|
||||
(!acin && (temp < sharpsl_pm.machinfo->fatal_noacin_volt)))
|
||||
|
|
@ -635,7 +635,7 @@ static int sharpsl_fatal_check(void)
|
|||
|
||||
static int sharpsl_off_charge_error(void)
|
||||
{
|
||||
dev_err(sharpsl_pm.dev, "Offline Charger: Error occured.\n");
|
||||
dev_err(sharpsl_pm.dev, "Offline Charger: Error occurred.\n");
|
||||
sharpsl_pm.machinfo->charge(0);
|
||||
sharpsl_pm_led(SHARPSL_LED_ERROR);
|
||||
sharpsl_pm.charge_mode = CHRG_ERROR;
|
||||
|
|
@ -691,14 +691,14 @@ static int sharpsl_off_charge_battery(void)
|
|||
|
||||
time = RCNR;
|
||||
while(1) {
|
||||
/* Check if any wakeup event had occured */
|
||||
/* Check if any wakeup event had occurred */
|
||||
if (sharpsl_pm.machinfo->charger_wakeup() != 0)
|
||||
return 0;
|
||||
/* Check for timeout */
|
||||
if ((RCNR - time) > SHARPSL_WAIT_CO_TIME)
|
||||
return 1;
|
||||
if (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_CHRGFULL)) {
|
||||
dev_dbg(sharpsl_pm.dev, "Offline Charger: Charge full occured. Retrying to check\n");
|
||||
dev_dbg(sharpsl_pm.dev, "Offline Charger: Charge full occurred. Retrying to check\n");
|
||||
sharpsl_pm.full_count++;
|
||||
sharpsl_pm.machinfo->charge(0);
|
||||
mdelay(SHARPSL_CHARGE_WAIT_TIME);
|
||||
|
|
@ -714,7 +714,7 @@ static int sharpsl_off_charge_battery(void)
|
|||
|
||||
time = RCNR;
|
||||
while(1) {
|
||||
/* Check if any wakeup event had occured */
|
||||
/* Check if any wakeup event had occurred */
|
||||
if (sharpsl_pm.machinfo->charger_wakeup() != 0)
|
||||
return 0;
|
||||
/* Check for timeout */
|
||||
|
|
@ -774,6 +774,8 @@ static struct pm_ops sharpsl_pm_ops = {
|
|||
|
||||
static int __init sharpsl_pm_probe(struct platform_device *pdev)
|
||||
{
|
||||
int ret;
|
||||
|
||||
if (!pdev->dev.platform_data)
|
||||
return -EINVAL;
|
||||
|
||||
|
|
@ -792,8 +794,10 @@ static int __init sharpsl_pm_probe(struct platform_device *pdev)
|
|||
|
||||
sharpsl_pm.machinfo->init();
|
||||
|
||||
device_create_file(&pdev->dev, &dev_attr_battery_percentage);
|
||||
device_create_file(&pdev->dev, &dev_attr_battery_voltage);
|
||||
ret = device_create_file(&pdev->dev, &dev_attr_battery_percentage);
|
||||
ret |= device_create_file(&pdev->dev, &dev_attr_battery_voltage);
|
||||
if (ret != 0)
|
||||
dev_warn(&pdev->dev, "Failed to register attributes (%d)\n", ret);
|
||||
|
||||
apm_get_power_status = sharpsl_apm_get_power_status;
|
||||
|
||||
|
|
|
|||
|
|
@ -57,7 +57,7 @@ extern void fp_enter(void);
|
|||
#define EXPORT_SYMBOL_ALIAS(sym,orig) \
|
||||
EXPORT_CRC_ALIAS(sym) \
|
||||
static const struct kernel_symbol __ksymtab_##sym \
|
||||
__attribute_used__ __attribute__((section("__ksymtab"))) = \
|
||||
__used __attribute__((section("__ksymtab"))) = \
|
||||
{ (unsigned long)&orig, #sym };
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -85,7 +85,7 @@ int main(void)
|
|||
DEFINE(S_OLD_R0, offsetof(struct pt_regs, ARM_ORIG_r0));
|
||||
DEFINE(S_FRAME_SIZE, sizeof(struct pt_regs));
|
||||
BLANK();
|
||||
#if __LINUX_ARM_ARCH__ >= 6
|
||||
#ifdef CONFIG_CPU_HAS_ASID
|
||||
DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id));
|
||||
BLANK();
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -357,6 +357,10 @@
|
|||
/* 345 */ CALL(sys_getcpu)
|
||||
CALL(sys_ni_syscall) /* eventually epoll_pwait */
|
||||
CALL(sys_kexec_load)
|
||||
CALL(sys_utimensat)
|
||||
CALL(sys_signalfd)
|
||||
/* 350 */ CALL(sys_timerfd)
|
||||
CALL(sys_eventfd)
|
||||
#ifndef syscalls_counted
|
||||
.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
|
||||
#define syscalls_counted
|
||||
|
|
|
|||
|
|
@ -918,7 +918,7 @@ static int c_show(struct seq_file *m, void *v)
|
|||
|
||||
if ((processor_id & 0x0008f000) == 0x00000000) {
|
||||
/* pre-ARM7 */
|
||||
seq_printf(m, "CPU part\t\t: %07x\n", processor_id >> 4);
|
||||
seq_printf(m, "CPU part\t: %07x\n", processor_id >> 4);
|
||||
} else {
|
||||
if ((processor_id & 0x0008f000) == 0x00007000) {
|
||||
/* ARM7 */
|
||||
|
|
|
|||
|
|
@ -13,7 +13,7 @@ int walk_stackframe(unsigned long fp, unsigned long low, unsigned long high,
|
|||
/*
|
||||
* Check current frame pointer is within bounds
|
||||
*/
|
||||
if ((fp - 12) < low || fp + 4 >= high)
|
||||
if (fp < (low + 12) || fp + 4 >= high)
|
||||
break;
|
||||
|
||||
frame = (struct stackframe *)(fp - 12);
|
||||
|
|
|
|||
|
|
@ -320,7 +320,7 @@ int kernel_execve(const char *filename, char *const argv[], char *const envp[])
|
|||
EXPORT_SYMBOL(kernel_execve);
|
||||
|
||||
/*
|
||||
* Since loff_t is a 64 bit type we avoid a lot of ABI hastle
|
||||
* Since loff_t is a 64 bit type we avoid a lot of ABI hassle
|
||||
* with a different argument ordering.
|
||||
*/
|
||||
asmlinkage long sys_arm_fadvise64_64(int fd, int advice,
|
||||
|
|
|
|||
|
|
@ -90,7 +90,7 @@ SECTIONS
|
|||
__exception_text_start = .;
|
||||
*(.exception.text)
|
||||
__exception_text_end = .;
|
||||
*(.text)
|
||||
TEXT_TEXT
|
||||
SCHED_TEXT
|
||||
LOCK_TEXT
|
||||
#ifdef CONFIG_MMU
|
||||
|
|
@ -158,7 +158,7 @@ SECTIONS
|
|||
/*
|
||||
* and the usual data section
|
||||
*/
|
||||
*(.data)
|
||||
DATA_DATA
|
||||
CONSTRUCTORS
|
||||
|
||||
_edata = .;
|
||||
|
|
|
|||
|
|
@ -47,7 +47,7 @@
|
|||
* @store: store instruction
|
||||
*
|
||||
* Note: we can trivially conditionalise the store instruction
|
||||
* to avoid dirting the data cache.
|
||||
* to avoid dirtying the data cache.
|
||||
*/
|
||||
.macro testop, instr, store
|
||||
add r1, r1, r0, lsr #3
|
||||
|
|
|
|||
|
|
@ -79,7 +79,7 @@ static struct at91_udc_data __initdata carmeva_udc_data = {
|
|||
.pullup_pin = AT91_PIN_PD9,
|
||||
};
|
||||
|
||||
/* FIXME: user dependend */
|
||||
/* FIXME: user dependant */
|
||||
// static struct at91_cf_data __initdata carmeva_cf_data = {
|
||||
// .det_pin = AT91_PIN_PB0,
|
||||
// .rst_pin = AT91_PIN_PC5,
|
||||
|
|
@ -100,17 +100,17 @@ static struct spi_board_info carmeva_spi_devices[] = {
|
|||
.chip_select = 0,
|
||||
.max_speed_hz = 10 * 1000 * 1000,
|
||||
},
|
||||
{ /* User accessable spi - cs1 (250KHz) */
|
||||
{ /* User accessible spi - cs1 (250KHz) */
|
||||
.modalias = "spi-cs1",
|
||||
.chip_select = 1,
|
||||
.max_speed_hz = 250 * 1000,
|
||||
},
|
||||
{ /* User accessable spi - cs2 (1MHz) */
|
||||
{ /* User accessible spi - cs2 (1MHz) */
|
||||
.modalias = "spi-cs2",
|
||||
.chip_select = 2,
|
||||
.max_speed_hz = 1 * 1000 * 1000,
|
||||
},
|
||||
{ /* User accessable spi - cs3 (10MHz) */
|
||||
{ /* User accessible spi - cs3 (10MHz) */
|
||||
.modalias = "spi-cs3",
|
||||
.chip_select = 3,
|
||||
.max_speed_hz = 10 * 1000 * 1000,
|
||||
|
|
|
|||
|
|
@ -132,7 +132,7 @@ static struct mtd_partition __initdata dk_nand_partition[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct mtd_partition *nand_partitions(int size, int *num_partitions)
|
||||
static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
|
||||
{
|
||||
*num_partitions = ARRAY_SIZE(dk_nand_partition);
|
||||
return dk_nand_partition;
|
||||
|
|
|
|||
|
|
@ -96,7 +96,7 @@ static struct mtd_partition __initdata kb9202_nand_partition[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct mtd_partition *nand_partitions(int size, int *num_partitions)
|
||||
static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
|
||||
{
|
||||
*num_partitions = ARRAY_SIZE(kb9202_nand_partition);
|
||||
return kb9202_nand_partition;
|
||||
|
|
|
|||
|
|
@ -178,7 +178,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct mtd_partition *nand_partitions(int size, int *num_partitions)
|
||||
static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
|
||||
{
|
||||
*num_partitions = ARRAY_SIZE(ek_nand_partition);
|
||||
return ek_nand_partition;
|
||||
|
|
|
|||
|
|
@ -180,7 +180,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct mtd_partition *nand_partitions(int size, int *num_partitions)
|
||||
static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
|
||||
{
|
||||
*num_partitions = ARRAY_SIZE(ek_nand_partition);
|
||||
return ek_nand_partition;
|
||||
|
|
|
|||
|
|
@ -87,7 +87,7 @@ static struct mtd_partition __initdata ek_nand_partition[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct mtd_partition *nand_partitions(int size, int *num_partitions)
|
||||
static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
|
||||
{
|
||||
*num_partitions = ARRAY_SIZE(ek_nand_partition);
|
||||
return ek_nand_partition;
|
||||
|
|
|
|||
|
|
@ -45,7 +45,7 @@ static struct hw_pci cats_pci __initdata = {
|
|||
.postinit = dc21285_postinit,
|
||||
};
|
||||
|
||||
static int cats_pci_init(void)
|
||||
static int __init cats_pci_init(void)
|
||||
{
|
||||
if (machine_is_cats())
|
||||
pci_common_init(&cats_pci);
|
||||
|
|
|
|||
|
|
@ -143,7 +143,7 @@ h7202_timer_interrupt(int irq, void *dev_id)
|
|||
}
|
||||
|
||||
/*
|
||||
* mask multiplexed timer irq's
|
||||
* mask multiplexed timer IRQs
|
||||
*/
|
||||
static void inline mask_timerx_irq (u32 irq)
|
||||
{
|
||||
|
|
@ -153,7 +153,7 @@ static void inline mask_timerx_irq (u32 irq)
|
|||
}
|
||||
|
||||
/*
|
||||
* unmask multiplexed timer irq's
|
||||
* unmask multiplexed timer IRQs
|
||||
*/
|
||||
static void inline unmask_timerx_irq (u32 irq)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -245,7 +245,7 @@ static int imx_set_target(struct cpufreq_policy *policy,
|
|||
if(mpctl0) {
|
||||
CSCR |= CSCR_MPLL_RESTART;
|
||||
|
||||
/* Wait until MPLL is stablized */
|
||||
/* Wait until MPLL is stabilized */
|
||||
while( CSCR & CSCR_MPLL_RESTART );
|
||||
|
||||
imx_set_async_mode();
|
||||
|
|
|
|||
|
|
@ -131,7 +131,7 @@ imx_dma_setup_sg_base(imx_dmach_t dma_ch,
|
|||
* The function setups DMA channel source and destination addresses for transfer
|
||||
* specified by provided parameters. The scatter-gather emulation is disabled,
|
||||
* because linear data block
|
||||
* form the physical address range is transfered.
|
||||
* form the physical address range is transferred.
|
||||
* Return value: if incorrect parameters are provided -%EINVAL.
|
||||
* Zero indicates success.
|
||||
*/
|
||||
|
|
@ -192,7 +192,7 @@ imx_dma_setup_single(imx_dmach_t dma_ch, dma_addr_t dma_address,
|
|||
* @dmamode: DMA transfer mode, %DMA_MODE_READ from the device to the memory
|
||||
* or %DMA_MODE_WRITE from memory to the device
|
||||
*
|
||||
* The function setups DMA channel state and registers to be ready for transfer
|
||||
* The function sets up DMA channel state and registers to be ready for transfer
|
||||
* specified by provided parameters. The scatter-gather emulation is set up
|
||||
* according to the parameters.
|
||||
*
|
||||
|
|
@ -212,7 +212,7 @@ imx_dma_setup_single(imx_dmach_t dma_ch, dma_addr_t dma_address,
|
|||
*
|
||||
* %CCR_SMOD_LINEAR | %CCR_SSIZ_32 | %CCR_DMOD_FIFO | %CCR_DSIZ_x
|
||||
*
|
||||
* Be carefull there and do not mistakenly mix source and target device
|
||||
* Be careful here and do not mistakenly mix source and target device
|
||||
* port sizes constants, they are really different:
|
||||
* %CCR_SSIZ_8, %CCR_SSIZ_16, %CCR_SSIZ_32,
|
||||
* %CCR_DSIZ_8, %CCR_DSIZ_16, %CCR_DSIZ_32
|
||||
|
|
@ -495,7 +495,7 @@ static irqreturn_t dma_err_handler(int irq, void *dev_id)
|
|||
/*
|
||||
* The cleaning of @sg field would be questionable
|
||||
* there, because its value can help to compute
|
||||
* remaining/transfered bytes count in the handler
|
||||
* remaining/transferred bytes count in the handler
|
||||
*/
|
||||
/*imx_dma_channels[i].sg = NULL;*/
|
||||
|
||||
|
|
|
|||
|
|
@ -201,7 +201,6 @@ void __init imx_set_mmc_info(struct imxmmc_platform_data *info)
|
|||
{
|
||||
imx_mmc_device.dev.platform_data = info;
|
||||
}
|
||||
EXPORT_SYMBOL(imx_set_mmc_info);
|
||||
|
||||
static struct imxfb_mach_info imx_fb_info;
|
||||
|
||||
|
|
|
|||
|
|
@ -12,4 +12,3 @@ obj-$(CONFIG_LEDS) += leds.o
|
|||
obj-$(CONFIG_PCI) += pci_v3.o pci.o
|
||||
obj-$(CONFIG_CPU_FREQ_INTEGRATOR) += cpu.o
|
||||
obj-$(CONFIG_INTEGRATOR_IMPD1) += impd1.o
|
||||
obj-$(CONFIG_SMP) += platsmp.o headsmp.o
|
||||
|
|
|
|||
|
|
@ -257,23 +257,7 @@ integrator_timer_interrupt(int irq, void *dev_id)
|
|||
*/
|
||||
writel(1, TIMER1_VA_BASE + TIMER_INTCLR);
|
||||
|
||||
/*
|
||||
* the clock tick routines are only processed on the
|
||||
* primary CPU
|
||||
*/
|
||||
if (hard_smp_processor_id() == 0) {
|
||||
timer_tick();
|
||||
#ifdef CONFIG_SMP
|
||||
smp_send_timer();
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
/*
|
||||
* this is the ARM equivalent of the APIC timer interrupt
|
||||
*/
|
||||
update_process_times(user_mode(get_irq_regs()));
|
||||
#endif /* CONFIG_SMP */
|
||||
timer_tick();
|
||||
|
||||
write_sequnlock(&xtime_lock);
|
||||
|
||||
|
|
|
|||
|
|
@ -1,37 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-integrator/headsmp.S
|
||||
*
|
||||
* Copyright (c) 2003 ARM Limited
|
||||
* All Rights Reserved
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/init.h>
|
||||
|
||||
__INIT
|
||||
|
||||
/*
|
||||
* Integrator specific entry point for secondary CPUs. This provides
|
||||
* a "holding pen" into which all secondary cores are held until we're
|
||||
* ready for them to initialise.
|
||||
*/
|
||||
ENTRY(integrator_secondary_startup)
|
||||
adr r4, 1f
|
||||
ldmia r4, {r5, r6}
|
||||
sub r4, r4, r5
|
||||
ldr r6, [r6, r4]
|
||||
pen: ldr r7, [r6]
|
||||
cmp r7, r0
|
||||
bne pen
|
||||
|
||||
/*
|
||||
* we've been released from the holding pen: secondary_stack
|
||||
* should now contain the SVC stack for this core
|
||||
*/
|
||||
b secondary_startup
|
||||
|
||||
1: .long .
|
||||
.long phys_pen_release
|
||||
|
|
@ -33,6 +33,7 @@
|
|||
#include <asm/irq.h>
|
||||
#include <asm/system.h>
|
||||
#include <asm/mach/pci.h>
|
||||
#include <asm/irq_regs.h>
|
||||
|
||||
#include <asm/hardware/pci_v3.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -1,204 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-cintegrator/platsmp.c
|
||||
*
|
||||
* Copyright (C) 2002 ARM Ltd.
|
||||
* All Rights Reserved
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/mm.h>
|
||||
|
||||
#include <asm/atomic.h>
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/delay.h>
|
||||
#include <asm/mmu_context.h>
|
||||
#include <asm/ptrace.h>
|
||||
#include <asm/smp.h>
|
||||
|
||||
extern void integrator_secondary_startup(void);
|
||||
|
||||
/*
|
||||
* control for which core is the next to come out of the secondary
|
||||
* boot "holding pen"
|
||||
*/
|
||||
volatile int __cpuinitdata pen_release = -1;
|
||||
unsigned long __cpuinitdata phys_pen_release = 0;
|
||||
|
||||
static DEFINE_SPINLOCK(boot_lock);
|
||||
|
||||
void __cpuinit platform_secondary_init(unsigned int cpu)
|
||||
{
|
||||
/*
|
||||
* the primary core may have used a "cross call" soft interrupt
|
||||
* to get this processor out of WFI in the BootMonitor - make
|
||||
* sure that we are no longer being sent this soft interrupt
|
||||
*/
|
||||
smp_cross_call_done(cpumask_of_cpu(cpu));
|
||||
|
||||
/*
|
||||
* if any interrupts are already enabled for the primary
|
||||
* core (e.g. timer irq), then they will not have been enabled
|
||||
* for us: do so
|
||||
*/
|
||||
secondary_scan_irqs();
|
||||
|
||||
/*
|
||||
* let the primary processor know we're out of the
|
||||
* pen, then head off into the C entry point
|
||||
*/
|
||||
pen_release = -1;
|
||||
|
||||
/*
|
||||
* Synchronise with the boot thread.
|
||||
*/
|
||||
spin_lock(&boot_lock);
|
||||
spin_unlock(&boot_lock);
|
||||
}
|
||||
|
||||
int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
|
||||
{
|
||||
unsigned long timeout;
|
||||
|
||||
/*
|
||||
* set synchronisation state between this boot processor
|
||||
* and the secondary one
|
||||
*/
|
||||
spin_lock(&boot_lock);
|
||||
|
||||
/*
|
||||
* The secondary processor is waiting to be released from
|
||||
* the holding pen - release it, then wait for it to flag
|
||||
* that it has been released by resetting pen_release.
|
||||
*
|
||||
* Note that "pen_release" is the hardware CPU ID, whereas
|
||||
* "cpu" is Linux's internal ID.
|
||||
*/
|
||||
pen_release = cpu;
|
||||
flush_cache_all();
|
||||
|
||||
/*
|
||||
* XXX
|
||||
*
|
||||
* This is a later addition to the booting protocol: the
|
||||
* bootMonitor now puts secondary cores into WFI, so
|
||||
* poke_milo() no longer gets the cores moving; we need
|
||||
* to send a soft interrupt to wake the secondary core.
|
||||
* Use smp_cross_call() for this, since there's little
|
||||
* point duplicating the code here
|
||||
*/
|
||||
smp_cross_call(cpumask_of_cpu(cpu));
|
||||
|
||||
timeout = jiffies + (1 * HZ);
|
||||
while (time_before(jiffies, timeout)) {
|
||||
if (pen_release == -1)
|
||||
break;
|
||||
|
||||
udelay(10);
|
||||
}
|
||||
|
||||
/*
|
||||
* now the secondary core is starting up let it run its
|
||||
* calibrations, then wait for it to finish
|
||||
*/
|
||||
spin_unlock(&boot_lock);
|
||||
|
||||
return pen_release != -1 ? -ENOSYS : 0;
|
||||
}
|
||||
|
||||
static void __init poke_milo(void)
|
||||
{
|
||||
extern void secondary_startup(void);
|
||||
|
||||
/* nobody is to be released from the pen yet */
|
||||
pen_release = -1;
|
||||
|
||||
phys_pen_release = virt_to_phys(&pen_release);
|
||||
|
||||
/*
|
||||
* write the address of secondary startup into the system-wide
|
||||
* flags register, then clear the bottom two bits, which is what
|
||||
* BootMonitor is waiting for
|
||||
*/
|
||||
#if 1
|
||||
#define CINTEGRATOR_HDR_FLAGSS_OFFSET 0x30
|
||||
__raw_writel(virt_to_phys(integrator_secondary_startup),
|
||||
(IO_ADDRESS(INTEGRATOR_HDR_BASE) +
|
||||
CINTEGRATOR_HDR_FLAGSS_OFFSET));
|
||||
#define CINTEGRATOR_HDR_FLAGSC_OFFSET 0x34
|
||||
__raw_writel(3,
|
||||
(IO_ADDRESS(INTEGRATOR_HDR_BASE) +
|
||||
CINTEGRATOR_HDR_FLAGSC_OFFSET));
|
||||
#endif
|
||||
|
||||
mb();
|
||||
}
|
||||
|
||||
/*
|
||||
* Initialise the CPU possible map early - this describes the CPUs
|
||||
* which may be present or become present in the system.
|
||||
*/
|
||||
void __init smp_init_cpus(void)
|
||||
{
|
||||
unsigned int i, ncores = get_core_count();
|
||||
|
||||
for (i = 0; i < ncores; i++)
|
||||
cpu_set(i, cpu_possible_map);
|
||||
}
|
||||
|
||||
void __init smp_prepare_cpus(unsigned int max_cpus)
|
||||
{
|
||||
unsigned int ncores = get_core_count();
|
||||
unsigned int cpu = smp_processor_id();
|
||||
int i;
|
||||
|
||||
/* sanity check */
|
||||
if (ncores == 0) {
|
||||
printk(KERN_ERR
|
||||
"Integrator/CP: strange CM count of 0? Default to 1\n");
|
||||
|
||||
ncores = 1;
|
||||
}
|
||||
|
||||
if (ncores > NR_CPUS) {
|
||||
printk(KERN_WARNING
|
||||
"Integrator/CP: no. of cores (%d) greater than configured "
|
||||
"maximum of %d - clipping\n",
|
||||
ncores, NR_CPUS);
|
||||
ncores = NR_CPUS;
|
||||
}
|
||||
|
||||
/*
|
||||
* start with some more config for the Boot CPU, now that
|
||||
* the world is a bit more alive (which was not the case
|
||||
* when smp_prepare_boot_cpu() was called)
|
||||
*/
|
||||
smp_store_cpu_info(cpu);
|
||||
|
||||
/*
|
||||
* are we trying to boot more cores than exist?
|
||||
*/
|
||||
if (max_cpus > ncores)
|
||||
max_cpus = ncores;
|
||||
|
||||
/*
|
||||
* Initialise the present map, which describes the set of CPUs
|
||||
* actually populated at the present time.
|
||||
*/
|
||||
for (i = 0; i < max_cpus; i++)
|
||||
cpu_set(i, cpu_present_map);
|
||||
|
||||
/*
|
||||
* Do we need any more CPUs? If so, then let them know where
|
||||
* to start. Note that, on modern versions of MILO, the "poke"
|
||||
* doesn't actually do anything until each individual core is
|
||||
* sent a soft interrupt to get it out of WFI
|
||||
*/
|
||||
if (max_cpus > 1)
|
||||
poke_milo();
|
||||
}
|
||||
|
|
@ -30,77 +30,65 @@
|
|||
|
||||
/* INTCTL0 CP6 R0 Page 4
|
||||
*/
|
||||
static inline u32 read_intctl_0(void)
|
||||
static u32 read_intctl_0(void)
|
||||
{
|
||||
u32 val;
|
||||
asm volatile("mrc p6, 0, %0, c0, c4, 0":"=r" (val));
|
||||
return val;
|
||||
}
|
||||
static inline void write_intctl_0(u32 val)
|
||||
static void write_intctl_0(u32 val)
|
||||
{
|
||||
asm volatile("mcr p6, 0, %0, c0, c4, 0"::"r" (val));
|
||||
}
|
||||
|
||||
/* INTCTL1 CP6 R1 Page 4
|
||||
*/
|
||||
static inline u32 read_intctl_1(void)
|
||||
static u32 read_intctl_1(void)
|
||||
{
|
||||
u32 val;
|
||||
asm volatile("mrc p6, 0, %0, c1, c4, 0":"=r" (val));
|
||||
return val;
|
||||
}
|
||||
static inline void write_intctl_1(u32 val)
|
||||
static void write_intctl_1(u32 val)
|
||||
{
|
||||
asm volatile("mcr p6, 0, %0, c1, c4, 0"::"r" (val));
|
||||
}
|
||||
|
||||
/* INTCTL2 CP6 R2 Page 4
|
||||
*/
|
||||
static inline u32 read_intctl_2(void)
|
||||
static u32 read_intctl_2(void)
|
||||
{
|
||||
u32 val;
|
||||
asm volatile("mrc p6, 0, %0, c2, c4, 0":"=r" (val));
|
||||
return val;
|
||||
}
|
||||
static inline void write_intctl_2(u32 val)
|
||||
static void write_intctl_2(u32 val)
|
||||
{
|
||||
asm volatile("mcr p6, 0, %0, c2, c4, 0"::"r" (val));
|
||||
}
|
||||
|
||||
/* INTCTL3 CP6 R3 Page 4
|
||||
*/
|
||||
static inline u32 read_intctl_3(void)
|
||||
static u32 read_intctl_3(void)
|
||||
{
|
||||
u32 val;
|
||||
asm volatile("mrc p6, 0, %0, c3, c4, 0":"=r" (val));
|
||||
return val;
|
||||
}
|
||||
static inline void write_intctl_3(u32 val)
|
||||
static void write_intctl_3(u32 val)
|
||||
{
|
||||
asm volatile("mcr p6, 0, %0, c3, c4, 0"::"r" (val));
|
||||
}
|
||||
|
||||
/* INTSTR0 CP6 R0 Page 5
|
||||
*/
|
||||
static inline u32 read_intstr_0(void)
|
||||
{
|
||||
u32 val;
|
||||
asm volatile("mrc p6, 0, %0, c0, c5, 0":"=r" (val));
|
||||
return val;
|
||||
}
|
||||
static inline void write_intstr_0(u32 val)
|
||||
static void write_intstr_0(u32 val)
|
||||
{
|
||||
asm volatile("mcr p6, 0, %0, c0, c5, 0"::"r" (val));
|
||||
}
|
||||
|
||||
/* INTSTR1 CP6 R1 Page 5
|
||||
*/
|
||||
static inline u32 read_intstr_1(void)
|
||||
{
|
||||
u32 val;
|
||||
asm volatile("mrc p6, 0, %0, c1, c5, 0":"=r" (val));
|
||||
return val;
|
||||
}
|
||||
static void write_intstr_1(u32 val)
|
||||
{
|
||||
asm volatile("mcr p6, 0, %0, c1, c5, 0"::"r" (val));
|
||||
|
|
@ -108,12 +96,6 @@ static void write_intstr_1(u32 val)
|
|||
|
||||
/* INTSTR2 CP6 R2 Page 5
|
||||
*/
|
||||
static inline u32 read_intstr_2(void)
|
||||
{
|
||||
u32 val;
|
||||
asm volatile("mrc p6, 0, %0, c2, c5, 0":"=r" (val));
|
||||
return val;
|
||||
}
|
||||
static void write_intstr_2(u32 val)
|
||||
{
|
||||
asm volatile("mcr p6, 0, %0, c2, c5, 0"::"r" (val));
|
||||
|
|
@ -121,12 +103,6 @@ static void write_intstr_2(u32 val)
|
|||
|
||||
/* INTSTR3 CP6 R3 Page 5
|
||||
*/
|
||||
static inline u32 read_intstr_3(void)
|
||||
{
|
||||
u32 val;
|
||||
asm volatile("mrc p6, 0, %0, c3, c5, 0":"=r" (val));
|
||||
return val;
|
||||
}
|
||||
static void write_intstr_3(u32 val)
|
||||
{
|
||||
asm volatile("mcr p6, 0, %0, c3, c5, 0"::"r" (val));
|
||||
|
|
@ -134,12 +110,6 @@ static void write_intstr_3(u32 val)
|
|||
|
||||
/* INTBASE CP6 R0 Page 2
|
||||
*/
|
||||
static inline u32 read_intbase(void)
|
||||
{
|
||||
u32 val;
|
||||
asm volatile("mrc p6, 0, %0, c0, c2, 0":"=r" (val));
|
||||
return val;
|
||||
}
|
||||
static void write_intbase(u32 val)
|
||||
{
|
||||
asm volatile("mcr p6, 0, %0, c0, c2, 0"::"r" (val));
|
||||
|
|
@ -147,12 +117,6 @@ static void write_intbase(u32 val)
|
|||
|
||||
/* INTSIZE CP6 R2 Page 2
|
||||
*/
|
||||
static inline u32 read_intsize(void)
|
||||
{
|
||||
u32 val;
|
||||
asm volatile("mrc p6, 0, %0, c2, c2, 0":"=r" (val));
|
||||
return val;
|
||||
}
|
||||
static void write_intsize(u32 val)
|
||||
{
|
||||
asm volatile("mcr p6, 0, %0, c2, c2, 0"::"r" (val));
|
||||
|
|
|
|||
|
|
@ -30,52 +30,52 @@ static DECLARE_BITMAP(msi_irq_in_use, IOP13XX_NUM_MSI_IRQS);
|
|||
|
||||
/* IMIPR0 CP6 R8 Page 1
|
||||
*/
|
||||
static inline u32 read_imipr_0(void)
|
||||
static u32 read_imipr_0(void)
|
||||
{
|
||||
u32 val;
|
||||
asm volatile("mrc p6, 0, %0, c8, c1, 0":"=r" (val));
|
||||
return val;
|
||||
}
|
||||
static inline void write_imipr_0(u32 val)
|
||||
static void write_imipr_0(u32 val)
|
||||
{
|
||||
asm volatile("mcr p6, 0, %0, c8, c1, 0"::"r" (val));
|
||||
}
|
||||
|
||||
/* IMIPR1 CP6 R9 Page 1
|
||||
*/
|
||||
static inline u32 read_imipr_1(void)
|
||||
static u32 read_imipr_1(void)
|
||||
{
|
||||
u32 val;
|
||||
asm volatile("mrc p6, 0, %0, c9, c1, 0":"=r" (val));
|
||||
return val;
|
||||
}
|
||||
static inline void write_imipr_1(u32 val)
|
||||
static void write_imipr_1(u32 val)
|
||||
{
|
||||
asm volatile("mcr p6, 0, %0, c9, c1, 0"::"r" (val));
|
||||
}
|
||||
|
||||
/* IMIPR2 CP6 R10 Page 1
|
||||
*/
|
||||
static inline u32 read_imipr_2(void)
|
||||
static u32 read_imipr_2(void)
|
||||
{
|
||||
u32 val;
|
||||
asm volatile("mrc p6, 0, %0, c10, c1, 0":"=r" (val));
|
||||
return val;
|
||||
}
|
||||
static inline void write_imipr_2(u32 val)
|
||||
static void write_imipr_2(u32 val)
|
||||
{
|
||||
asm volatile("mcr p6, 0, %0, c10, c1, 0"::"r" (val));
|
||||
}
|
||||
|
||||
/* IMIPR3 CP6 R11 Page 1
|
||||
*/
|
||||
static inline u32 read_imipr_3(void)
|
||||
static u32 read_imipr_3(void)
|
||||
{
|
||||
u32 val;
|
||||
asm volatile("mrc p6, 0, %0, c11, c1, 0":"=r" (val));
|
||||
return val;
|
||||
}
|
||||
static inline void write_imipr_3(u32 val)
|
||||
static void write_imipr_3(u32 val)
|
||||
{
|
||||
asm volatile("mcr p6, 0, %0, c11, c1, 0"::"r" (val));
|
||||
}
|
||||
|
|
@ -190,5 +190,5 @@ int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
|
|||
write_msi_msg(irq, &msg);
|
||||
set_irq_chip_and_handler(irq, &iop13xx_msi_chip, handle_simple_irq);
|
||||
|
||||
return irq;
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -19,10 +19,11 @@
|
|||
|
||||
#include <linux/pci.h>
|
||||
#include <linux/delay.h>
|
||||
|
||||
#include <linux/jiffies.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/hardware.h>
|
||||
#include <asm/sizes.h>
|
||||
#include <asm/signal.h>
|
||||
#include <asm/mach/pci.h>
|
||||
#include <asm/arch/pci.h>
|
||||
|
||||
|
|
@ -144,7 +145,7 @@ void iop13xx_map_pci_memory(void)
|
|||
}
|
||||
}
|
||||
|
||||
static inline int iop13xx_atu_function(int atu)
|
||||
static int iop13xx_atu_function(int atu)
|
||||
{
|
||||
int func = 0;
|
||||
/* the function number depends on the value of the
|
||||
|
|
@ -259,7 +260,7 @@ static int iop13xx_atux_pci_status(int clear)
|
|||
* data. Note that the data dependency on %0 encourages an abort
|
||||
* to be detected before we return.
|
||||
*/
|
||||
static inline u32 iop13xx_atux_read(unsigned long addr)
|
||||
static u32 iop13xx_atux_read(unsigned long addr)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
|
|
@ -387,7 +388,7 @@ static int iop13xx_atue_pci_status(int clear)
|
|||
return err;
|
||||
}
|
||||
|
||||
static inline int __init
|
||||
static int
|
||||
iop13xx_pcie_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
|
||||
{
|
||||
WARN_ON(idsel != 0);
|
||||
|
|
@ -401,7 +402,7 @@ iop13xx_pcie_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
|
|||
}
|
||||
}
|
||||
|
||||
static inline u32 iop13xx_atue_read(unsigned long addr)
|
||||
static u32 iop13xx_atue_read(unsigned long addr)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
|
|
@ -989,7 +990,7 @@ void __init iop13xx_pci_init(void)
|
|||
"imprecise external abort");
|
||||
}
|
||||
|
||||
/* intialize the pci memory space. handle any combination of
|
||||
/* initialize the pci memory space. handle any combination of
|
||||
* atue and atux enabled/disabled
|
||||
*/
|
||||
int iop13xx_pci_setup(int nr, struct pci_sys_data *sys)
|
||||
|
|
|
|||
|
|
@ -75,7 +75,7 @@ void __init glantank_map_io(void)
|
|||
#define INTC IRQ_IOP32X_XINT2
|
||||
#define INTD IRQ_IOP32X_XINT3
|
||||
|
||||
static inline int __init
|
||||
static int __init
|
||||
glantank_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
||||
static int pci_irq_table[][4] = {
|
||||
|
|
|
|||
|
|
@ -104,7 +104,7 @@ void __init iq31244_map_io(void)
|
|||
/*
|
||||
* EP80219/IQ31244 PCI.
|
||||
*/
|
||||
static inline int __init
|
||||
static int __init
|
||||
ep80219_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
||||
int irq;
|
||||
|
|
@ -140,7 +140,7 @@ static struct hw_pci ep80219_pci __initdata = {
|
|||
.map_irq = ep80219_pci_map_irq,
|
||||
};
|
||||
|
||||
static inline int __init
|
||||
static int __init
|
||||
iq31244_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
||||
int irq;
|
||||
|
|
|
|||
|
|
@ -72,7 +72,7 @@ void __init iq80321_map_io(void)
|
|||
/*
|
||||
* IQ80321 PCI.
|
||||
*/
|
||||
static inline int __init
|
||||
static int __init
|
||||
iq80321_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
||||
int irq;
|
||||
|
|
|
|||
|
|
@ -21,12 +21,12 @@
|
|||
|
||||
static u32 iop32x_mask;
|
||||
|
||||
static inline void intctl_write(u32 val)
|
||||
static void intctl_write(u32 val)
|
||||
{
|
||||
asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val));
|
||||
}
|
||||
|
||||
static inline void intstr_write(u32 val)
|
||||
static void intstr_write(u32 val)
|
||||
{
|
||||
asm volatile("mcr p6, 0, %0, c4, c0, 0" : : "r" (val));
|
||||
}
|
||||
|
|
|
|||
|
|
@ -76,7 +76,7 @@ void __init n2100_map_io(void)
|
|||
/*
|
||||
* N2100 PCI.
|
||||
*/
|
||||
static inline int __init
|
||||
static int __init
|
||||
n2100_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
||||
int irq;
|
||||
|
|
|
|||
|
|
@ -55,7 +55,7 @@ static struct sys_timer iq80331_timer = {
|
|||
/*
|
||||
* IQ80331 PCI.
|
||||
*/
|
||||
static inline int __init
|
||||
static int __init
|
||||
iq80331_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
||||
int irq;
|
||||
|
|
|
|||
|
|
@ -55,7 +55,7 @@ static struct sys_timer iq80332_timer = {
|
|||
/*
|
||||
* IQ80332 PCI.
|
||||
*/
|
||||
static inline int __init
|
||||
static int __init
|
||||
iq80332_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
||||
int irq;
|
||||
|
|
|
|||
|
|
@ -22,32 +22,32 @@
|
|||
static u32 iop33x_mask0;
|
||||
static u32 iop33x_mask1;
|
||||
|
||||
static inline void intctl0_write(u32 val)
|
||||
static void intctl0_write(u32 val)
|
||||
{
|
||||
asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val));
|
||||
}
|
||||
|
||||
static inline void intctl1_write(u32 val)
|
||||
static void intctl1_write(u32 val)
|
||||
{
|
||||
asm volatile("mcr p6, 0, %0, c1, c0, 0" : : "r" (val));
|
||||
}
|
||||
|
||||
static inline void intstr0_write(u32 val)
|
||||
static void intstr0_write(u32 val)
|
||||
{
|
||||
asm volatile("mcr p6, 0, %0, c2, c0, 0" : : "r" (val));
|
||||
}
|
||||
|
||||
static inline void intstr1_write(u32 val)
|
||||
static void intstr1_write(u32 val)
|
||||
{
|
||||
asm volatile("mcr p6, 0, %0, c3, c0, 0" : : "r" (val));
|
||||
}
|
||||
|
||||
static inline void intbase_write(u32 val)
|
||||
static void intbase_write(u32 val)
|
||||
{
|
||||
asm volatile("mcr p6, 0, %0, c12, c0, 0" : : "r" (val));
|
||||
}
|
||||
|
||||
static inline void intsize_write(u32 val)
|
||||
static void intsize_write(u32 val)
|
||||
{
|
||||
asm volatile("mcr p6, 0, %0, c13, c0, 0" : : "r" (val));
|
||||
}
|
||||
|
|
|
|||
|
|
@ -198,7 +198,7 @@ subsys_initcall(enp2611_pci_init);
|
|||
|
||||
|
||||
/*************************************************************************
|
||||
* ENP-2611 Machine Intialization
|
||||
* ENP-2611 Machine Initialization
|
||||
*************************************************************************/
|
||||
static struct flash_platform_data enp2611_flash_platform_data = {
|
||||
.map_name = "cfi_probe",
|
||||
|
|
|
|||
|
|
@ -164,7 +164,7 @@ int __init ixdp2400_pci_init(void)
|
|||
|
||||
subsys_initcall(ixdp2400_pci_init);
|
||||
|
||||
void ixdp2400_init_irq(void)
|
||||
void __init ixdp2400_init_irq(void)
|
||||
{
|
||||
ixdp2x00_init_irq(IXDP2400_CPLD_INT_STAT, IXDP2400_CPLD_INT_MASK, IXDP2400_NR_IRQS);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -279,7 +279,7 @@ int __init ixdp2800_pci_init(void)
|
|||
|
||||
subsys_initcall(ixdp2800_pci_init);
|
||||
|
||||
void ixdp2800_init_irq(void)
|
||||
void __init ixdp2800_init_irq(void)
|
||||
{
|
||||
ixdp2x00_init_irq(IXDP2800_CPLD_INT_STAT, IXDP2800_CPLD_INT_MASK, IXDP2800_NR_IRQS);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -145,7 +145,7 @@ static struct irq_chip ixdp2x00_cpld_irq_chip = {
|
|||
.unmask = ixdp2x00_irq_unmask
|
||||
};
|
||||
|
||||
void ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigned long *mask_reg, unsigned long nr_irqs)
|
||||
void __init ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigned long *mask_reg, unsigned long nr_irqs)
|
||||
{
|
||||
unsigned int irq;
|
||||
|
||||
|
|
@ -195,7 +195,7 @@ void __init ixdp2x00_map_io(void)
|
|||
* instances of the kernel. So far so good. Peers on the PCI bus running
|
||||
* Linux is a common design in telecom systems. The problem is that instead
|
||||
* of all the devices being controlled by a single host, different
|
||||
* devices are controlles by different NPUs on the same bus, leading to
|
||||
* devices are controlled by different NPUs on the same bus, leading to
|
||||
* multiple hosts on the bus. The exact bus layout looks like:
|
||||
*
|
||||
* Bus 0
|
||||
|
|
@ -211,7 +211,7 @@ void __init ixdp2x00_map_io(void)
|
|||
* | | | | |
|
||||
* ... Dev PMC Media Eth0 Eth1 ...
|
||||
*
|
||||
* The master controlls all but Eth1, which is controlled by the
|
||||
* The master controls all but Eth1, which is controlled by the
|
||||
* slave. What this means is that the both the master and the slave
|
||||
* have to scan the bus, but only one of them can enumerate the bus.
|
||||
* In addition, after the bus is scanned, each kernel must remove
|
||||
|
|
|
|||
|
|
@ -276,7 +276,7 @@ static int __init ixdp2x01_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
|
|||
/* Device is located after first MB bridge */
|
||||
case 0x0008:
|
||||
if (tmp_bus == dev->bus) {
|
||||
/* Device is located directy after first MB bridge */
|
||||
/* Device is located directly after first MB bridge */
|
||||
switch (devpin) {
|
||||
case DEVPIN(1, 1): /* Onboard 82546 ch 0 */
|
||||
if (machine_is_ixdp2401())
|
||||
|
|
@ -299,7 +299,7 @@ static int __init ixdp2x01_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
|
|||
break;
|
||||
case 0x0010:
|
||||
if (tmp_bus == dev->bus) {
|
||||
/* Device is located directy after second MB bridge */
|
||||
/* Device is located directly after second MB bridge */
|
||||
/* Secondary bus of second bridge */
|
||||
switch (devpin) {
|
||||
case DEVPIN(0, 1): /* DB#0 */
|
||||
|
|
@ -348,7 +348,7 @@ int __init ixdp2x01_pci_init(void)
|
|||
subsys_initcall(ixdp2x01_pci_init);
|
||||
|
||||
/*************************************************************************
|
||||
* IXDP2x01 Machine Intialization
|
||||
* IXDP2x01 Machine Initialization
|
||||
*************************************************************************/
|
||||
static struct flash_platform_data ixdp2x01_flash_platform_data = {
|
||||
.map_name = "cfi_probe",
|
||||
|
|
|
|||
|
|
@ -102,7 +102,7 @@ int ixp2000_pci_read_config(struct pci_bus *bus, unsigned int devfn, int where,
|
|||
}
|
||||
|
||||
/*
|
||||
* We don't do error checks by callling clear_master_aborts() b/c the
|
||||
* We don't do error checks by calling clear_master_aborts() b/c the
|
||||
* assumption is that the caller did a read first to make sure a device
|
||||
* exists.
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -389,7 +389,7 @@ struct sys_timer ixp23xx_timer = {
|
|||
|
||||
|
||||
/*************************************************************************
|
||||
* IXP23xx Platform Initializaion
|
||||
* IXP23xx Platform Initialization
|
||||
*************************************************************************/
|
||||
static struct resource ixp23xx_uart_resources[] = {
|
||||
{
|
||||
|
|
|
|||
|
|
@ -124,7 +124,7 @@ static struct irq_chip ixdp2351_intb_chip = {
|
|||
.unmask = ixdp2351_intb_unmask
|
||||
};
|
||||
|
||||
void ixdp2351_init_irq(void)
|
||||
void __init ixdp2351_init_irq(void)
|
||||
{
|
||||
int irq;
|
||||
|
||||
|
|
|
|||
|
|
@ -284,7 +284,7 @@ int ixp23xx_pci_setup(int nr, struct pci_sys_data *sys)
|
|||
return 1;
|
||||
}
|
||||
|
||||
void ixp23xx_pci_slave_init(void)
|
||||
void __init ixp23xx_pci_slave_init(void)
|
||||
{
|
||||
ixp23xx_pci_common_init();
|
||||
}
|
||||
|
|
|
|||
|
|
@ -110,7 +110,7 @@ static int __init roadrunner_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
|
|||
return NO_IRQ;
|
||||
}
|
||||
|
||||
static void roadrunner_pci_preinit(void)
|
||||
static void __init roadrunner_pci_preinit(void)
|
||||
{
|
||||
set_irq_type(IRQ_ROADRUNNER_PCI_INTC, IRQT_LOW);
|
||||
set_irq_type(IRQ_ROADRUNNER_PCI_INTD, IRQT_LOW);
|
||||
|
|
|
|||
|
|
@ -104,9 +104,6 @@ config MACH_DSMG600
|
|||
DSM-G600 RevA device. For more information on this platform,
|
||||
see http://www.nslu2-linux.org/wiki/DSMG600/HomePage
|
||||
|
||||
#
|
||||
# Avila and IXDP share the same source for now. Will change in future
|
||||
#
|
||||
config ARCH_IXDP4XX
|
||||
bool
|
||||
depends on ARCH_IXDP425 || MACH_IXDP465 || MACH_KIXRP435
|
||||
|
|
|
|||
|
|
@ -283,7 +283,7 @@ static struct irqaction ixp4xx_timer_irq = {
|
|||
.handler = ixp4xx_timer_interrupt,
|
||||
};
|
||||
|
||||
static void __init ixp4xx_timer_init(void)
|
||||
void __init ixp4xx_timer_init(void)
|
||||
{
|
||||
/* Reset/disable counter */
|
||||
*IXP4XX_OSRT1 = 0;
|
||||
|
|
|
|||
|
|
@ -25,10 +25,6 @@
|
|||
|
||||
#include <asm/mach/pci.h>
|
||||
|
||||
extern void ixp4xx_pci_preinit(void);
|
||||
extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
|
||||
extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
|
||||
|
||||
void __init coyote_pci_preinit(void)
|
||||
{
|
||||
set_irq_type(IRQ_COYOTE_PCI_SLOT0, IRQT_LOW);
|
||||
|
|
|
|||
|
|
@ -18,6 +18,7 @@
|
|||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/flash.h>
|
||||
#include <asm/mach/time.h>
|
||||
|
||||
static struct flash_platform_data dsmg600_flash_data = {
|
||||
.map_name = "cfi_probe",
|
||||
|
|
@ -128,6 +129,19 @@ static void dsmg600_power_off(void)
|
|||
gpio_line_set(DSMG600_PO_GPIO, IXP4XX_GPIO_HIGH);
|
||||
}
|
||||
|
||||
static void __init dsmg600_timer_init(void)
|
||||
{
|
||||
/* The xtal on this machine is non-standard. */
|
||||
ixp4xx_timer_freq = DSMG600_FREQ;
|
||||
|
||||
/* Call standard timer_init function. */
|
||||
ixp4xx_timer_init();
|
||||
}
|
||||
|
||||
static struct sys_timer dsmg600_timer = {
|
||||
.init = dsmg600_timer_init,
|
||||
};
|
||||
|
||||
static void __init dsmg600_init(void)
|
||||
{
|
||||
ixp4xx_sys_init();
|
||||
|
|
@ -155,21 +169,13 @@ static void __init dsmg600_init(void)
|
|||
#endif
|
||||
}
|
||||
|
||||
static void __init dsmg600_fixup(struct machine_desc *desc,
|
||||
struct tag *tags, char **cmdline, struct meminfo *mi)
|
||||
{
|
||||
/* The xtal on this machine is non-standard. */
|
||||
ixp4xx_timer_freq = DSMG600_FREQ;
|
||||
}
|
||||
|
||||
MACHINE_START(DSMG600, "D-Link DSM-G600 RevA")
|
||||
/* Maintainer: www.nslu2-linux.org */
|
||||
.phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
|
||||
.io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xFFFC,
|
||||
.boot_params = 0x00000100,
|
||||
.fixup = dsmg600_fixup,
|
||||
.map_io = ixp4xx_map_io,
|
||||
.init_irq = ixp4xx_init_irq,
|
||||
.timer = &ixp4xx_timer,
|
||||
.timer = &dsmg600_timer,
|
||||
.init_machine = dsmg600_init,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* arch/arm/mach-ixp4xx/gtwx5715-setup.c
|
||||
*
|
||||
* Gemtek GTWX5715 (Linksys WRV54G) board settup
|
||||
* Gemtek GTWX5715 (Linksys WRV54G) board setup
|
||||
*
|
||||
* Copyright (C) 2004 George T. Joseph
|
||||
* Derived from Coyote
|
||||
|
|
|
|||
|
|
@ -23,10 +23,6 @@
|
|||
|
||||
#include <asm/mach/pci.h>
|
||||
|
||||
extern void ixp4xx_pci_preinit(void);
|
||||
extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
|
||||
extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
|
||||
|
||||
void __init ixdpg425_pci_preinit(void)
|
||||
{
|
||||
set_irq_type(IRQ_IXP4XX_GPIO6, IRQT_LOW);
|
||||
|
|
|
|||
|
|
@ -155,7 +155,8 @@ static void __init nas100d_init(void)
|
|||
|
||||
pm_power_off = nas100d_power_off;
|
||||
|
||||
/* This is only useful on a modified machine, but it is valuable
|
||||
/*
|
||||
* This is only useful on a modified machine, but it is valuable
|
||||
* to have it first in order to see debug messages, and so that
|
||||
* it does *not* get removed if platform_add_devices fails!
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -22,6 +22,7 @@
|
|||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/flash.h>
|
||||
#include <asm/mach/time.h>
|
||||
|
||||
static struct flash_platform_data nslu2_flash_data = {
|
||||
.map_name = "cfi_probe",
|
||||
|
|
@ -49,26 +50,26 @@ static struct ixp4xx_i2c_pins nslu2_i2c_gpio_pins = {
|
|||
static struct resource nslu2_led_resources[] = {
|
||||
{
|
||||
.name = "ready", /* green led */
|
||||
.start = NSLU2_LED_GRN,
|
||||
.end = NSLU2_LED_GRN,
|
||||
.start = NSLU2_LED_GRN_GPIO,
|
||||
.end = NSLU2_LED_GRN_GPIO,
|
||||
.flags = IXP4XX_GPIO_HIGH,
|
||||
},
|
||||
{
|
||||
.name = "status", /* red led */
|
||||
.start = NSLU2_LED_RED,
|
||||
.end = NSLU2_LED_RED,
|
||||
.start = NSLU2_LED_RED_GPIO,
|
||||
.end = NSLU2_LED_RED_GPIO,
|
||||
.flags = IXP4XX_GPIO_HIGH,
|
||||
},
|
||||
{
|
||||
.name = "disk-1",
|
||||
.start = NSLU2_LED_DISK1,
|
||||
.end = NSLU2_LED_DISK1,
|
||||
.start = NSLU2_LED_DISK1_GPIO,
|
||||
.end = NSLU2_LED_DISK1_GPIO,
|
||||
.flags = IXP4XX_GPIO_LOW,
|
||||
},
|
||||
{
|
||||
.name = "disk-2",
|
||||
.start = NSLU2_LED_DISK2,
|
||||
.end = NSLU2_LED_DISK2,
|
||||
.start = NSLU2_LED_DISK2_GPIO,
|
||||
.end = NSLU2_LED_DISK2_GPIO,
|
||||
.flags = IXP4XX_GPIO_LOW,
|
||||
},
|
||||
};
|
||||
|
|
@ -157,10 +158,21 @@ static void nslu2_power_off(void)
|
|||
gpio_line_set(NSLU2_PO_GPIO, IXP4XX_GPIO_HIGH);
|
||||
}
|
||||
|
||||
static void __init nslu2_timer_init(void)
|
||||
{
|
||||
/* The xtal on this machine is non-standard. */
|
||||
ixp4xx_timer_freq = NSLU2_FREQ;
|
||||
|
||||
/* Call standard timer_init function. */
|
||||
ixp4xx_timer_init();
|
||||
}
|
||||
|
||||
static struct sys_timer nslu2_timer = {
|
||||
.init = nslu2_timer_init,
|
||||
};
|
||||
|
||||
static void __init nslu2_init(void)
|
||||
{
|
||||
ixp4xx_timer_freq = NSLU2_FREQ;
|
||||
|
||||
ixp4xx_sys_init();
|
||||
|
||||
nslu2_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
|
||||
|
|
@ -169,7 +181,8 @@ static void __init nslu2_init(void)
|
|||
|
||||
pm_power_off = nslu2_power_off;
|
||||
|
||||
/* This is only useful on a modified machine, but it is valuable
|
||||
/*
|
||||
* This is only useful on a modified machine, but it is valuable
|
||||
* to have it first in order to see debug messages, and so that
|
||||
* it does *not* get removed if platform_add_devices fails!
|
||||
*/
|
||||
|
|
@ -185,6 +198,6 @@ MACHINE_START(NSLU2, "Linksys NSLU2")
|
|||
.boot_params = 0x00000100,
|
||||
.map_io = ixp4xx_map_io,
|
||||
.init_irq = ixp4xx_init_irq,
|
||||
.timer = &ixp4xx_timer,
|
||||
.timer = &nslu2_timer,
|
||||
.init_machine = nslu2_init,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -126,7 +126,7 @@ static struct clcd_panel_extra lcd_panel_extra = {
|
|||
|
||||
*/
|
||||
|
||||
/* The full horozontal cycle (Th) is clock/360/400/450. */
|
||||
/* The full horizontal cycle (Th) is clock/360/400/450. */
|
||||
/* The full vertical cycle (Tv) is line/251/262/280. */
|
||||
|
||||
#define PIX_CLOCK_TARGET (6300000) /* -/6.3/7 MHz */
|
||||
|
|
@ -162,7 +162,7 @@ static struct clcd_panel lcd_panel = {
|
|||
/* Logic Product Development LCD 6.4" VGA -10 */
|
||||
/* Sharp PN LQ64D343 */
|
||||
|
||||
/* The full horozontal cycle (Th) is clock/750/800/900. */
|
||||
/* The full horizontal cycle (Th) is clock/750/800/900. */
|
||||
/* The full vertical cycle (Tv) is line/515/525/560. */
|
||||
|
||||
#define PIX_CLOCK_TARGET (28330000)
|
||||
|
|
@ -243,7 +243,7 @@ static struct clcd_panel lcd_panel = {
|
|||
* (fdisk, e2fsck). And, at that speed the display may have a visible
|
||||
* flicker. */
|
||||
|
||||
/* The full horozontal cycle (Th) is clock/832/1056/1395. */
|
||||
/* The full horizontal cycle (Th) is clock/832/1056/1395. */
|
||||
|
||||
#define PIX_CLOCK_TARGET (20000000)
|
||||
#define PIX_CLOCK_DIVIDER CLOCK_TO_DIV (PIX_CLOCK_TARGET, HCLK)
|
||||
|
|
|
|||
|
|
@ -35,7 +35,7 @@ static unsigned long ns9xxx_timer_gettimeoffset(void)
|
|||
{
|
||||
/* return the microseconds which have passed since the last interrupt
|
||||
* was _serviced_. That is, if an interrupt is pending or the counter
|
||||
* reloads, return one periode more. */
|
||||
* reloads, return one period more. */
|
||||
|
||||
u32 counter1 = SYS_TR(0);
|
||||
int pending = SYS_ISR & (1 << IRQ_TIMER0);
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@ config MACH_OMAP_H2
|
|||
config MACH_OMAP_H3
|
||||
bool "TI H3 Support"
|
||||
depends on ARCH_OMAP1 && ARCH_OMAP16XX
|
||||
select GPIOEXPANDER_OMAP
|
||||
# select GPIOEXPANDER_OMAP
|
||||
help
|
||||
TI OMAP 1710 H3 board support. Say Y here if you have such
|
||||
a board.
|
||||
|
|
|
|||
|
|
@ -385,7 +385,7 @@ static void __init osk_init(void)
|
|||
/* Workaround for wrong CS3 (NOR flash) timing
|
||||
* There are some U-Boot versions out there which configure
|
||||
* wrong CS3 memory timings. This mainly leads to CRC
|
||||
* or similiar errors if you use NOR flash (e.g. with JFFS2)
|
||||
* or similar errors if you use NOR flash (e.g. with JFFS2)
|
||||
*/
|
||||
if (EMIFS_CCS(3) != EMIFS_CS3_VAL)
|
||||
EMIFS_CCS(3) = EMIFS_CS3_VAL;
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
*
|
||||
* Original version : Laurent Gonzalez
|
||||
*
|
||||
* Maintainters : http://palmtelinux.sf.net
|
||||
* Maintainers : http://palmtelinux.sf.net
|
||||
* palmtelinux-developpers@lists.sf.net
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
|
|
|
|||
|
|
@ -438,7 +438,7 @@ void omap_pm_suspend(void)
|
|||
omap_writew(0, ULPD_SOFT_DISABLE_REQ_REG);
|
||||
|
||||
/*
|
||||
* Reenable interrupts
|
||||
* Re-enable interrupts
|
||||
*/
|
||||
|
||||
local_irq_enable();
|
||||
|
|
|
|||
|
|
@ -443,7 +443,7 @@ static long omap2_clk_round_rate(struct clk *clk, unsigned long rate)
|
|||
|
||||
/*
|
||||
* Check the DLL lock state, and return tue if running in unlock mode.
|
||||
* This is needed to compenste for the shifted DLL value in unlock mode.
|
||||
* This is needed to compensate for the shifted DLL value in unlock mode.
|
||||
*/
|
||||
static u32 omap2_dll_force_needed(void)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -338,7 +338,7 @@ struct prcm_config {
|
|||
/*
|
||||
* These represent optimal values for common parts, it won't work for all.
|
||||
* As long as you scale down, most parameters are still work, they just
|
||||
* become sub-optimal. The RFR value goes in the oppisite direction. If you
|
||||
* become sub-optimal. The RFR value goes in the opposite direction. If you
|
||||
* don't adjust it down as your clock period increases the refresh interval
|
||||
* will not be met. Setting all parameters for complete worst case may work,
|
||||
* but may cut memory performance by 2x. Due to errata the DLLs need to be
|
||||
|
|
@ -384,7 +384,7 @@ struct prcm_config {
|
|||
* Filling in table based on H4 boards and 2430-SDPs variants available.
|
||||
* There are quite a few more rates combinations which could be defined.
|
||||
*
|
||||
* When multiple values are defiend the start up will try and choose the
|
||||
* When multiple values are defined the start up will try and choose the
|
||||
* fastest one. If a 'fast' value is defined, then automatically, the /2
|
||||
* one should be included as it can be used. Generally having more that
|
||||
* one fast set does not make sense, as static timings need to be changed
|
||||
|
|
|
|||
|
|
@ -40,7 +40,7 @@
|
|||
#define PICTRL_ADRS 0x06
|
||||
#define POLCTRL_ADRS 0x07
|
||||
|
||||
/* Resgister Bit Definitions */
|
||||
/* Register Bit Definitions */
|
||||
#define RESCTL_QVGA 0x01
|
||||
#define RESCTL_VGA 0x00
|
||||
|
||||
|
|
@ -55,11 +55,11 @@
|
|||
#define POWER0_COM_DCLK 0x01 /* COM Voltage DC Bias DAC Serial Data Clock */
|
||||
#define POWER0_COM_DOUT 0x02 /* COM Voltage DC Bias DAC Serial Data Out */
|
||||
#define POWER0_DAC_ON 0x04 /* DAC Power Supply ON */
|
||||
#define POWER0_COM_ON 0x08 /* COM Powewr Supply ON */
|
||||
#define POWER0_COM_ON 0x08 /* COM Power Supply ON */
|
||||
#define POWER0_VCC5_ON 0x10 /* VCC5 Power Supply ON */
|
||||
|
||||
#define POWER0_DAC_OFF 0x00 /* DAC Power Supply OFF */
|
||||
#define POWER0_COM_OFF 0x00 /* COM Powewr Supply OFF */
|
||||
#define POWER0_COM_OFF 0x00 /* COM Power Supply OFF */
|
||||
#define POWER0_VCC5_OFF 0x00 /* VCC5 Power Supply OFF */
|
||||
|
||||
#define PICTRL_INIT_STATE 0x01
|
||||
|
|
@ -145,7 +145,7 @@ static void lcdtg_set_common_voltage(u8 base_data, u8 data)
|
|||
lcdtg_i2c_send_stop(base_data);
|
||||
}
|
||||
|
||||
/* Set Phase Adjuct */
|
||||
/* Set Phase Adjust */
|
||||
static void lcdtg_set_phadadj(int mode)
|
||||
{
|
||||
int adj;
|
||||
|
|
@ -226,7 +226,7 @@ static void lcdtg_hw_init(int mode)
|
|||
/* Signals output enable */
|
||||
corgi_ssp_lcdtg_send(PICTRL_ADRS, 0);
|
||||
|
||||
/* Set Phase Adjuct */
|
||||
/* Set Phase Adjust */
|
||||
lcdtg_set_phadadj(mode);
|
||||
|
||||
/* Initialize for Input Signals from ATI */
|
||||
|
|
|
|||
|
|
@ -32,7 +32,7 @@ static struct corgissp_machinfo *ssp_machinfo;
|
|||
* There are three devices connected to the SSP interface:
|
||||
* 1. A touchscreen controller (TI ADS7846 compatible)
|
||||
* 2. An LCD contoller (with some Backlight functionality)
|
||||
* 3. A battery moinitoring IC (Maxim MAX1111)
|
||||
* 3. A battery monitoring IC (Maxim MAX1111)
|
||||
*
|
||||
* Each device uses a different speed/mode of communication.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -30,7 +30,7 @@ static unsigned long mpcore_timer_rate;
|
|||
/*
|
||||
* local_timer_ack: checks for a local timer interrupt.
|
||||
*
|
||||
* If a local timer interrupt has occured, acknowledge and return 1.
|
||||
* If a local timer interrupt has occurred, acknowledge and return 1.
|
||||
* Otherwise, return 0.
|
||||
*/
|
||||
int local_timer_ack(void)
|
||||
|
|
|
|||
|
|
@ -1,2 +0,0 @@
|
|||
/* linux/arch/arm/mach-s3c2410/bast.h
|
||||
extern void bast_init_irq(void);
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue