Blackfin arch: Modify some funtion names to more genernal ones
Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
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@ -90,6 +90,6 @@ extern u_long dpdt_swapcount_table[];
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extern unsigned long reserved_mem_dcache_on;
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extern unsigned long reserved_mem_icache_on;
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extern void generate_cpl_tables(void);
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extern void generate_cplb_tables(void);
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#endif
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@ -36,7 +36,7 @@ struct cplb_entry dcplb_tbl[MAX_CPLBS];
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int first_switched_icplb, first_switched_dcplb;
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int first_mask_dcplb;
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void __init generate_cpl_tables(void)
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void __init generate_cplb_tables(void)
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{
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int i_d, i_i;
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unsigned long addr;
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@ -308,7 +308,7 @@ __fill_data_cplbtab(struct cplb_tab *t, int i, u32 a_start, u32 a_end)
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}
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}
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void __init generate_cpl_tables(void)
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void __init generate_cplb_tables(void)
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{
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u16 i, j, process;
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@ -78,10 +78,10 @@ static struct change_member *change_point[2*BFIN_MEMMAP_MAX] __initdata;
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static struct bfin_memmap_entry *overlap_list[BFIN_MEMMAP_MAX] __initdata;
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static struct bfin_memmap_entry new_map[BFIN_MEMMAP_MAX] __initdata;
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void __init bf53x_cache_init(void)
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void __init bfin_cache_init(void)
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{
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#if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
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generate_cpl_tables();
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generate_cplb_tables();
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#endif
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#ifdef CONFIG_BFIN_ICACHE
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@ -101,7 +101,7 @@ void __init bf53x_cache_init(void)
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#endif
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}
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void __init bf53x_relocate_l1_mem(void)
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void __init bfin_relocate_l1_mem(void)
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{
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unsigned long l1_code_length;
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unsigned long l1_data_a_length;
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@ -860,7 +860,7 @@ void __init setup_arch(char **cmdline_p)
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!= SAFE_USER_INSTRUCTION - FIXED_CODE_START);
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init_exception_vectors();
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bf53x_cache_init();
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bfin_cache_init();
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}
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static int __init topology_init(void)
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@ -141,7 +141,7 @@ ENTRY(__start)
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#endif
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/* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
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call _bf53x_relocate_l1_mem;
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call _bfin_relocate_l1_mem;
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#ifdef CONFIG_BFIN_KERNEL_CLOCK
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call _start_dma_code;
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#endif
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