mlx5-fixes-2018-05-10
-----BEGIN PGP SIGNATURE----- iQEcBAABAgAGBQJa9NFvAAoJEEg/ir3gV/o+vNoIAM/5zfT9f2iu6uNADcrFFfYY bdHY/psg9qDAjqZxmFYezcwdOrPY5GxLn+1VVZPLfwCir/qupTOO2skLRyAKEau0 uKSP45LD6E+M0Sew+15//sEB3J2JzcjJsNd61lzdl+3GKT/Nr/ZGY0K8iFXItdc3 Ye/vsL1IRNaosl4dnAGzOylGeit2VeUkmS/JrFRVqFjVLu78zxEuLHdnIZApt+4W lwpLnsplhUbPk6lwHNNureSuzQq4SXMLWIB+v1uxzHOSSZT8nkrr4/ew/BYHp1oo EteRykl4x3SkDbPcTBeElvpb52nduC6jgn8auVXOY9XZDmqX+rxhfBh3fBVFYB8= =FwjF -----END PGP SIGNATURE----- Merge tag 'mlx5-fixes-2018-05-10' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux Saeed Mahameed says: ==================== Mellanox, mlx5 fixes 2018-05-10 the following series includes some fixes for mlx5 core driver. Please pull and let me know if there's any problem. For -stable v4.5 ("net/mlx5: E-Switch, Include VF RDMA stats in vport statistics") For -stable v4.10 ("net/mlx5e: Err if asked to offload TC match on frag being first") ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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commit
5ae4bbf769
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@ -1261,6 +1261,10 @@ static int __parse_cls_flower(struct mlx5e_priv *priv,
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f->mask);
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addr_type = key->addr_type;
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/* the HW doesn't support frag first/later */
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if (mask->flags & FLOW_DIS_FIRST_FRAG)
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return -EOPNOTSUPP;
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if (mask->flags & FLOW_DIS_IS_FRAGMENT) {
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MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1);
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MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
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@ -34,6 +34,9 @@
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#include <linux/module.h>
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#include <linux/mlx5/driver.h>
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#include <linux/mlx5/cmd.h>
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#ifdef CONFIG_RFS_ACCEL
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#include <linux/cpu_rmap.h>
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#endif
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#include "mlx5_core.h"
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#include "fpga/core.h"
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#include "eswitch.h"
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@ -923,3 +926,28 @@ int mlx5_core_eq_query(struct mlx5_core_dev *dev, struct mlx5_eq *eq,
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MLX5_SET(query_eq_in, in, eq_number, eq->eqn);
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return mlx5_cmd_exec(dev, in, sizeof(in), out, outlen);
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}
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/* This function should only be called after mlx5_cmd_force_teardown_hca */
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void mlx5_core_eq_free_irqs(struct mlx5_core_dev *dev)
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{
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struct mlx5_eq_table *table = &dev->priv.eq_table;
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struct mlx5_eq *eq;
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#ifdef CONFIG_RFS_ACCEL
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if (dev->rmap) {
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free_irq_cpu_rmap(dev->rmap);
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dev->rmap = NULL;
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}
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#endif
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list_for_each_entry(eq, &table->comp_eqs_list, list)
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free_irq(eq->irqn, eq);
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free_irq(table->pages_eq.irqn, &table->pages_eq);
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free_irq(table->async_eq.irqn, &table->async_eq);
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free_irq(table->cmd_eq.irqn, &table->cmd_eq);
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#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
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if (MLX5_CAP_GEN(dev, pg))
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free_irq(table->pfault_eq.irqn, &table->pfault_eq);
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#endif
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pci_free_irq_vectors(dev->pdev);
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}
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@ -2175,26 +2175,35 @@ int mlx5_eswitch_get_vport_stats(struct mlx5_eswitch *esw,
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memset(vf_stats, 0, sizeof(*vf_stats));
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vf_stats->rx_packets =
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MLX5_GET_CTR(out, received_eth_unicast.packets) +
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MLX5_GET_CTR(out, received_ib_unicast.packets) +
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MLX5_GET_CTR(out, received_eth_multicast.packets) +
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MLX5_GET_CTR(out, received_ib_multicast.packets) +
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MLX5_GET_CTR(out, received_eth_broadcast.packets);
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vf_stats->rx_bytes =
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MLX5_GET_CTR(out, received_eth_unicast.octets) +
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MLX5_GET_CTR(out, received_ib_unicast.octets) +
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MLX5_GET_CTR(out, received_eth_multicast.octets) +
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MLX5_GET_CTR(out, received_ib_multicast.octets) +
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MLX5_GET_CTR(out, received_eth_broadcast.octets);
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vf_stats->tx_packets =
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MLX5_GET_CTR(out, transmitted_eth_unicast.packets) +
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MLX5_GET_CTR(out, transmitted_ib_unicast.packets) +
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MLX5_GET_CTR(out, transmitted_eth_multicast.packets) +
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MLX5_GET_CTR(out, transmitted_ib_multicast.packets) +
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MLX5_GET_CTR(out, transmitted_eth_broadcast.packets);
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vf_stats->tx_bytes =
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MLX5_GET_CTR(out, transmitted_eth_unicast.octets) +
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MLX5_GET_CTR(out, transmitted_ib_unicast.octets) +
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MLX5_GET_CTR(out, transmitted_eth_multicast.octets) +
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MLX5_GET_CTR(out, transmitted_ib_multicast.octets) +
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MLX5_GET_CTR(out, transmitted_eth_broadcast.octets);
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vf_stats->multicast =
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MLX5_GET_CTR(out, received_eth_multicast.packets);
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MLX5_GET_CTR(out, received_eth_multicast.packets) +
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MLX5_GET_CTR(out, received_ib_multicast.packets);
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vf_stats->broadcast =
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MLX5_GET_CTR(out, received_eth_broadcast.packets);
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@ -1587,6 +1587,14 @@ static int mlx5_try_fast_unload(struct mlx5_core_dev *dev)
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mlx5_enter_error_state(dev, true);
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/* Some platforms requiring freeing the IRQ's in the shutdown
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* flow. If they aren't freed they can't be allocated after
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* kexec. There is no need to cleanup the mlx5_core software
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* contexts.
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*/
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mlx5_irq_clear_affinity_hints(dev);
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mlx5_core_eq_free_irqs(dev);
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return 0;
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}
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@ -128,6 +128,8 @@ int mlx5_core_eq_query(struct mlx5_core_dev *dev, struct mlx5_eq *eq,
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u32 *out, int outlen);
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int mlx5_start_eqs(struct mlx5_core_dev *dev);
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void mlx5_stop_eqs(struct mlx5_core_dev *dev);
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/* This function should only be called after mlx5_cmd_force_teardown_hca */
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void mlx5_core_eq_free_irqs(struct mlx5_core_dev *dev);
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struct mlx5_eq *mlx5_eqn2eq(struct mlx5_core_dev *dev, int eqn);
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u32 mlx5_eq_poll_irq_disabled(struct mlx5_eq *eq);
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void mlx5_cq_tasklet_cb(unsigned long data);
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