mv643xx_eth: nuke port status register bit defines
None of the port status register bit defines are ever used in the mv643xx_eth driver -- nuke them all. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Dale Farnsworth <dale@farnsworth.org>
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@ -159,20 +159,6 @@ static char mv643xx_driver_version[] = "1.0";
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#define FORCE_LINK_PASS (1 << 1)
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#define SERIAL_PORT_ENABLE (1 << 0)
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/* These macros describe Ethernet Serial Status reg (PSR) bits */
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#define PORT_STATUS_MODE_10_BIT (1 << 0)
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#define PORT_STATUS_LINK_UP (1 << 1)
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#define PORT_STATUS_FULL_DUPLEX (1 << 2)
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#define PORT_STATUS_FLOW_CONTROL (1 << 3)
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#define PORT_STATUS_GMII_1000 (1 << 4)
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#define PORT_STATUS_MII_100 (1 << 5)
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/* PSR bit 6 is undocumented */
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#define PORT_STATUS_TX_IN_PROGRESS (1 << 7)
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#define PORT_STATUS_AUTONEG_BYPASSED (1 << 8)
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#define PORT_STATUS_PARTITION (1 << 9)
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#define PORT_STATUS_TX_FIFO_EMPTY (1 << 10)
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/* PSR bits 11-31 are reserved */
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#define PORT_DEFAULT_TRANSMIT_QUEUE_SIZE 800
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#define PORT_DEFAULT_RECEIVE_QUEUE_SIZE 400
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