Merge branch 'omap_for_2.6.37' of git://dev.omapzoom.org/pub/scm/santosh/kernel-omap4-base into omap-for-linus
This commit is contained in:
commit
5a37e7840f
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@ -298,7 +298,6 @@ static void __init omap4_check_revision(void)
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u32 idcode;
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u16 hawkeye;
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u8 rev;
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char *rev_name = "ES1.0";
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/*
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* The IC rev detection is done with hawkeye and rev.
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@ -309,14 +308,39 @@ static void __init omap4_check_revision(void)
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hawkeye = (idcode >> 12) & 0xffff;
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rev = (idcode >> 28) & 0xff;
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if ((hawkeye == 0xb852) && (rev == 0x0)) {
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omap_revision = OMAP4430_REV_ES1_0;
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omap_chip.oc |= CHIP_IS_OMAP4430ES1;
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pr_info("OMAP%04x %s\n", omap_rev() >> 16, rev_name);
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return;
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/*
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* Few initial ES2.0 samples IDCODE is same as ES1.0
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* Use ARM register to detect the correct ES version
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*/
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if (!rev) {
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idcode = read_cpuid(CPUID_ID);
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rev = (idcode & 0xf) - 1;
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}
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pr_err("Unknown OMAP4 CPU id\n");
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switch (hawkeye) {
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case 0xb852:
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switch (rev) {
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case 0:
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omap_revision = OMAP4430_REV_ES1_0;
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omap_chip.oc |= CHIP_IS_OMAP4430ES1;
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break;
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case 1:
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omap_revision = OMAP4430_REV_ES2_0;
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omap_chip.oc |= CHIP_IS_OMAP4430ES2;
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break;
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default:
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omap_revision = OMAP4430_REV_ES2_0;
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omap_chip.oc |= CHIP_IS_OMAP4430ES2;
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}
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break;
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default:
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/* Unknown default to latest silicon rev as default*/
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omap_revision = OMAP4430_REV_ES2_0;
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omap_chip.oc |= CHIP_IS_OMAP4430ES2;
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}
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pr_info("OMAP%04x ES%d.0\n",
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omap_rev() >> 16, ((omap_rev() >> 12) & 0xf) + 1);
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}
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#define OMAP3_SHOW_FEATURE(feat) \
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@ -61,10 +61,14 @@ static int __init omap_l2_cache_init(void)
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omap_smc1(0x102, 0x1);
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/*
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* 32KB way size, 16-way associativity,
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* parity disabled
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* 16-way associativity, parity disabled
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* Way size - 32KB (es1.0)
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* Way size - 64KB (es2.0 +)
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*/
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l2x0_init(l2cache_base, 0x0e050000, 0xc0000fff);
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if (omap_rev() == OMAP4430_REV_ES1_0)
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l2x0_init(l2cache_base, 0x0e050000, 0xc0000fff);
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else
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l2x0_init(l2cache_base, 0x0e070000, 0xc0000fff);
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return 0;
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}
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@ -581,7 +581,7 @@ int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
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* When the functional clock disappears, too quick writes seem
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* to cause an abort. XXX Is this still necessary?
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*/
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__delay(150000);
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__delay(300000);
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return ret;
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}
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@ -391,6 +391,7 @@ IS_OMAP_TYPE(3517, 0x3517)
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#define OMAP443X_CLASS 0x44300044
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#define OMAP4430_REV_ES1_0 0x44300044
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#define OMAP4430_REV_ES2_0 0x44301044
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/*
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* omap_chip bits
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@ -417,10 +418,12 @@ IS_OMAP_TYPE(3517, 0x3517)
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#define CHIP_IS_OMAP4430ES1 (1 << 8)
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#define CHIP_IS_OMAP3630ES1_1 (1 << 9)
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#define CHIP_IS_OMAP3630ES1_2 (1 << 10)
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#define CHIP_IS_OMAP4430ES2 (1 << 11)
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#define CHIP_IS_OMAP24XX (CHIP_IS_OMAP2420 | CHIP_IS_OMAP2430)
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#define CHIP_IS_OMAP4430 (CHIP_IS_OMAP4430ES1)
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#define CHIP_IS_OMAP4430 (CHIP_IS_OMAP4430ES1 | \
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CHIP_IS_OMAP4430ES2)
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/*
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* "GE" here represents "greater than or equal to" in terms of ES
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@ -153,6 +153,7 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
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/* omap4 based boards using UART3 */
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DEBUG_LL_OMAP4(3, omap_4430sdp);
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DEBUG_LL_OMAP4(3, omap4_panda);
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/* zoom2/3 external uart */
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DEBUG_LL_ZOOM(omap_zoom2);
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@ -53,7 +53,7 @@
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#define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000)
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#define OMAP4_SRAM_PUB_VA (OMAP4_SRAM_VA + 0x4000)
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#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
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#if defined(CONFIG_ARCH_OMAP2PLUS)
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#define SRAM_BOOTLOADER_SZ 0x00
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#else
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#define SRAM_BOOTLOADER_SZ 0x80
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@ -93,16 +93,7 @@ extern unsigned long omapfb_reserve_sram(unsigned long sram_pstart,
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*/
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static int is_sram_locked(void)
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{
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int type = 0;
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if (cpu_is_omap44xx())
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/* Not yet supported */
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return 0;
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if (cpu_is_omap242x())
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type = omap_rev() & OMAP2_DEVICETYPE_MASK;
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if (type == GP_DEVICE) {
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if (OMAP2_DEVICE_TYPE_GP == omap_type()) {
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/* RAMFW: R/W access to all initiators for all qualifier sets */
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if (cpu_is_omap242x()) {
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__raw_writel(0xFF, OMAP24XX_VA_REQINFOPERM0); /* all q-vects */
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