IB/mthca: Fix max_srq_sge returned by ib_query_device for Tavor devices
The driver allocates SRQ WQEs size with a power of 2 size both for Tavor and for memfree. For Tavor, however, the hardware only requires the WQE size to be a multiple of 16, not a power of 2, and the max number of scatter-gather allowed is reported accordingly by the firmware (and this is the value currently returned by ib_query_device() and ibv_query_device()). If the max number of scatter/gather entries reported by the FW is used when creating an SRQ, the creation will fail for Tavor, since the required WQE size will be increased to the next power of 2, which turns out to be larger than the device permitted max WQE size (which is not a power of 2). This patch reduces the reported SRQ max wqe size so that it can be used successfully in creating an SRQ on Tavor HCAs. Signed-off-by: Jack Morgenstein <jackm@mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
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@ -151,6 +151,7 @@ struct mthca_limits {
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int reserved_qps;
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int num_srqs;
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int max_srq_wqes;
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int max_srq_sge;
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int reserved_srqs;
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int num_eecs;
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int reserved_eecs;
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@ -507,6 +508,7 @@ void mthca_free_srq(struct mthca_dev *dev, struct mthca_srq *srq);
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int mthca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
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enum ib_srq_attr_mask attr_mask);
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int mthca_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr);
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int mthca_max_srq_sge(struct mthca_dev *dev);
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void mthca_srq_event(struct mthca_dev *dev, u32 srqn,
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enum ib_event_type event_type);
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void mthca_free_srq_wqe(struct mthca_srq *srq, u32 wqe_addr);
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@ -191,6 +191,7 @@ static int __devinit mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim
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mdev->limits.reserved_srqs = dev_lim->reserved_srqs;
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mdev->limits.reserved_eecs = dev_lim->reserved_eecs;
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mdev->limits.max_desc_sz = dev_lim->max_desc_sz;
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mdev->limits.max_srq_sge = mthca_max_srq_sge(mdev);
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/*
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* Subtract 1 from the limit because we need to allocate a
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* spare CQE so the HCA HW can tell the difference between an
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@ -106,7 +106,7 @@ static int mthca_query_device(struct ib_device *ibdev,
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props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
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props->max_srq = mdev->limits.num_srqs - mdev->limits.reserved_srqs;
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props->max_srq_wr = mdev->limits.max_srq_wqes;
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props->max_srq_sge = mdev->limits.max_sg;
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props->max_srq_sge = mdev->limits.max_srq_sge;
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props->local_ca_ack_delay = mdev->limits.local_ca_ack_delay;
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props->atomic_cap = mdev->limits.flags & DEV_LIM_FLAG_ATOMIC ?
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IB_ATOMIC_HCA : IB_ATOMIC_NONE;
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@ -192,7 +192,7 @@ int mthca_alloc_srq(struct mthca_dev *dev, struct mthca_pd *pd,
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/* Sanity check SRQ size before proceeding */
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if (attr->max_wr > dev->limits.max_srq_wqes ||
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attr->max_sge > dev->limits.max_sg)
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attr->max_sge > dev->limits.max_srq_sge)
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return -EINVAL;
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srq->max = attr->max_wr;
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@ -660,6 +660,31 @@ int mthca_arbel_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
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return err;
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}
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int mthca_max_srq_sge(struct mthca_dev *dev)
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{
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if (mthca_is_memfree(dev))
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return dev->limits.max_sg;
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/*
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* SRQ allocations are based on powers of 2 for Tavor,
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* (although they only need to be multiples of 16 bytes).
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*
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* Therefore, we need to base the max number of sg entries on
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* the largest power of 2 descriptor size that is <= to the
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* actual max WQE descriptor size, rather than return the
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* max_sg value given by the firmware (which is based on WQE
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* sizes as multiples of 16, not powers of 2).
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*
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* If SRQ implementation is changed for Tavor to be based on
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* multiples of 16, the calculation below can be deleted and
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* the FW max_sg value returned.
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*/
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return min_t(int, dev->limits.max_sg,
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((1 << (fls(dev->limits.max_desc_sz) - 1)) -
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sizeof (struct mthca_next_seg)) /
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sizeof (struct mthca_data_seg));
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}
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int __devinit mthca_init_srq_table(struct mthca_dev *dev)
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{
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int err;
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