ARM: mach-bcm dt updates for 3.15
- add BCM4708 dt support - remove bcm11351-brt - bcm281xx common clock support -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJTGBS6AAoJEOfTILNwq7R4aqYQAJmjqh2AcBHintlNEO+D1yCg r7rUJQnmNoSysC15AUk0r1plxYsOzFy6A7NCP+v1cm83rSNgDJN847h84dLX4CnL dJNDKNfWNiAin65uvY2X8LPUsuBTz0jaXtlMibhZ+n+7UQHkLtvhTsGZQ5QnhL6D 8q/tSNRmVTDqnGnndqK4bOcajxwKyRr5Gadgi4gY1b8hCrkIQF7PK/D21Arrq0DE 7iIQS2jzPBXUBAOCz0/QG6KLRzVamGL4wv7jzNUuxAPDZOF2W3dB2oh+fscwZyaK 09Q20Sg6lLzeRsm8Oz7Y7oiG8a8Sx0Kr6Ot1A6D16e/wtvz4a88pasZz2SQhLUDQ 5eDLNaaLtwOtY2s9GaZxs66TRE/6lFUBfgC4ep2rpQBDbbWAxxTQo8V0nYwq2a43 Nfnr72C+l2P9VD7mPZeeJf/YiqORjGnsqg3xK8s1u+8T9jCME+rUEdzPi/Amz1Vc 65ws3O8oZT6sy6f9tHhqKTlgFOL1aFxKmffXH6rdu8vUqzksRYeNy/+71uZ/Ljjw +FQ4xpKbeigOER/T+4sn3ikIJkZlq4Z6iX2LyqoQ+ekVqFaM/oYK2+W9vK019nI4 WRzavecZUnVAEAOcW9xsCV1Ek/TgVmryyIVRSJeLhoS1aNpBLji3jMuV2M40UIUO tmhlBskWVb3BXCLDYGUA =waJa -----END PGP SIGNATURE----- Merge tag 'armsoc/for-3.15/dt' of git://github.com/broadcom/mach-bcm into next/dt Merge "ARM: mach-bcm dt updates for 3.15" from Matt Porter: - add BCM4708 dt support - remove bcm11351-brt - bcm281xx common clock support * tag 'armsoc/for-3.15/dt' of git://github.com/broadcom/mach-bcm: ARM: dts: remove bcm11351-brt.dts ARM: dts: Leave sdio1 as disabled on bcm28155-ap ARM: dts: bcm281xx: define real clocks ARM: BCM5301X: add dts files for BCM4708 SoC Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
59bb376f0e
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@ -47,9 +47,9 @@ dtb-$(CONFIG_ARCH_AT91) += sama5d36ek.dtb
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dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb
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dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
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dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm11351-brt.dtb \
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bcm28155-ap.dtb
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dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm28155-ap.dtb
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dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
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dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb
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dtb-$(CONFIG_ARCH_BERLIN) += \
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berlin2-sony-nsz-gs7.dtb \
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berlin2cd-google-chromecast.dtb
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@ -1,54 +0,0 @@
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/*
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* Copyright (C) 2012 Broadcom Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/dts-v1/;
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#include "bcm11351.dtsi"
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/ {
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model = "BCM11351 BRT board";
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compatible = "brcm,bcm11351-brt", "brcm,bcm11351";
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memory {
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reg = <0x80000000 0x40000000>; /* 1 GB */
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};
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uart@3e000000 {
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status = "okay";
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};
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sdio1: sdio@3f180000 {
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max-frequency = <48000000>;
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status = "okay";
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};
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sdio2: sdio@3f190000 {
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non-removable;
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max-frequency = <48000000>;
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status = "okay";
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};
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sdio4: sdio@3f1b0000 {
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max-frequency = <48000000>;
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cd-gpios = <&gpio 14 0>;
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status = "okay";
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};
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usbotg: usb@3f120000 {
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status = "okay";
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};
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usbphy: usb-phy@3f130000 {
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status = "okay";
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};
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};
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@ -14,6 +14,8 @@
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include "dt-bindings/clock/bcm281xx.h"
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#include "skeleton.dtsi"
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/ {
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@ -43,7 +45,7 @@
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compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
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status = "disabled";
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reg = <0x3e000000 0x1000>;
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clocks = <&uartb_clk>;
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clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB>;
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interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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@ -53,7 +55,7 @@
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compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
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status = "disabled";
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reg = <0x3e001000 0x1000>;
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clocks = <&uartb2_clk>;
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clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB2>;
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interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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@ -63,7 +65,7 @@
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compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
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status = "disabled";
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reg = <0x3e002000 0x1000>;
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clocks = <&uartb3_clk>;
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clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB3>;
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interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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@ -73,7 +75,7 @@
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compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
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status = "disabled";
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reg = <0x3e003000 0x1000>;
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clocks = <&uartb4_clk>;
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clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB4>;
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interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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@ -95,7 +97,7 @@
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compatible = "brcm,kona-timer";
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reg = <0x35006000 0x1000>;
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interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&hub_timer_clk>;
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clocks = <&aon_ccu BCM281XX_AON_CCU_HUB_TIMER>;
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};
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gpio: gpio@35003000 {
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@ -118,7 +120,7 @@
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compatible = "brcm,kona-sdhci";
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reg = <0x3f180000 0x10000>;
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interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&sdio1_clk>;
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clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO1>;
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status = "disabled";
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};
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@ -126,7 +128,7 @@
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compatible = "brcm,kona-sdhci";
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reg = <0x3f190000 0x10000>;
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interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&sdio2_clk>;
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clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO2>;
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status = "disabled";
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};
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@ -134,7 +136,7 @@
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compatible = "brcm,kona-sdhci";
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reg = <0x3f1a0000 0x10000>;
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interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&sdio3_clk>;
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clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO3>;
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status = "disabled";
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};
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@ -142,7 +144,7 @@
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compatible = "brcm,kona-sdhci";
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reg = <0x3f1b0000 0x10000>;
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interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&sdio4_clk>;
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clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO4>;
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status = "disabled";
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};
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@ -157,7 +159,7 @@
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interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&bsc1_clk>;
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clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC1>;
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status = "disabled";
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};
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@ -167,7 +169,7 @@
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interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&bsc2_clk>;
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clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC2>;
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status = "disabled";
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};
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@ -177,7 +179,7 @@
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interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&bsc3_clk>;
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clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC3>;
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status = "disabled";
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};
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@ -187,99 +189,125 @@
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interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&pmu_bsc_clk>;
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clocks = <&aon_ccu BCM281XX_AON_CCU_PMU_BSC>;
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status = "disabled";
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};
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clocks {
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bsc1_clk: bsc1 {
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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#clock-cells = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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root_ccu: root_ccu {
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compatible = "brcm,bcm11351-root-ccu";
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reg = <0x35001000 0x0f00>;
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#clock-cells = <1>;
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clock-output-names = "frac_1m";
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};
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bsc2_clk: bsc2 {
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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#clock-cells = <0>;
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hub_ccu: hub_ccu {
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compatible = "brcm,bcm11351-hub-ccu";
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reg = <0x34000000 0x0f00>;
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#clock-cells = <1>;
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clock-output-names = "tmon_1m";
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};
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bsc3_clk: bsc3 {
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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#clock-cells = <0>;
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aon_ccu: aon_ccu {
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compatible = "brcm,bcm11351-aon-ccu";
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reg = <0x35002000 0x0f00>;
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#clock-cells = <1>;
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clock-output-names = "hub_timer",
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"pmu_bsc",
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"pmu_bsc_var";
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};
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pmu_bsc_clk: pmu_bsc {
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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#clock-cells = <0>;
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master_ccu: master_ccu {
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compatible = "brcm,bcm11351-master-ccu";
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reg = <0x3f001000 0x0f00>;
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#clock-cells = <1>;
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clock-output-names = "sdio1",
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"sdio2",
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"sdio3",
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"sdio4",
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"usb_ic",
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"hsic2_48m",
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"hsic2_12m";
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};
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hub_timer_clk: hub_timer {
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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#clock-cells = <0>;
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slave_ccu: slave_ccu {
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compatible = "brcm,bcm11351-slave-ccu";
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reg = <0x3e011000 0x0f00>;
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#clock-cells = <1>;
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clock-output-names = "uartb",
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"uartb2",
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"uartb3",
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"uartb4",
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"ssp0",
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"ssp2",
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"bsc1",
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"bsc2",
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"bsc3",
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"pwm";
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};
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pwm_clk: pwm {
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compatible = "fixed-clock";
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clock-frequency = <26000000>;
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ref_1m_clk: ref_1m {
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#clock-cells = <0>;
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};
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sdio1_clk: sdio1 {
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compatible = "fixed-clock";
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clock-frequency = <48000000>;
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#clock-cells = <0>;
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};
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sdio2_clk: sdio2 {
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compatible = "fixed-clock";
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clock-frequency = <48000000>;
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#clock-cells = <0>;
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};
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sdio3_clk: sdio3 {
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compatible = "fixed-clock";
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clock-frequency = <48000000>;
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#clock-cells = <0>;
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};
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sdio4_clk: sdio4 {
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compatible = "fixed-clock";
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clock-frequency = <48000000>;
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#clock-cells = <0>;
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};
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tmon_1m_clk: tmon_1m {
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compatible = "fixed-clock";
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clock-frequency = <1000000>;
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#clock-cells = <0>;
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};
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uartb_clk: uartb {
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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ref_32k_clk: ref_32k {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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};
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uartb2_clk: uartb2 {
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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bbl_32k_clk: bbl_32k {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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};
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uartb3_clk: uartb3 {
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ref_13m_clk: ref_13m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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#clock-cells = <0>;
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};
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uartb4_clk: uartb4 {
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var_13m_clk: var_13m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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};
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dft_19_5m_clk: dft_19_5m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <19500000>;
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};
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ref_crystal_clk: ref_crystal {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <26000000>;
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};
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ref_cx40_clk: ref_cx40 {
|
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <40000000>;
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};
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ref_52m_clk: ref_52m {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <52000000>;
|
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};
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var_52m_clk: var_52m {
|
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#clock-cells = <0>;
|
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compatible = "fixed-clock";
|
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clock-frequency = <52000000>;
|
||||
};
|
||||
|
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usb_otg_ahb_clk: usb_otg_ahb {
|
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@ -287,6 +315,66 @@
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clock-frequency = <52000000>;
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
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ref_96m_clk: ref_96m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <96000000>;
|
||||
};
|
||||
|
||||
var_96m_clk: var_96m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <96000000>;
|
||||
};
|
||||
|
||||
ref_104m_clk: ref_104m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <104000000>;
|
||||
};
|
||||
|
||||
var_104m_clk: var_104m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <104000000>;
|
||||
};
|
||||
|
||||
ref_156m_clk: ref_156m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <156000000>;
|
||||
};
|
||||
|
||||
var_156m_clk: var_156m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <156000000>;
|
||||
};
|
||||
|
||||
ref_208m_clk: ref_208m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <208000000>;
|
||||
};
|
||||
|
||||
var_208m_clk: var_208m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <208000000>;
|
||||
};
|
||||
|
||||
ref_312m_clk: ref_312m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <312000000>;
|
||||
};
|
||||
|
||||
var_312m_clk: var_312m {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <312000000>;
|
||||
};
|
||||
};
|
||||
|
||||
usbotg: usb@3f120000 {
|
||||
|
|
|
|||
|
|
@ -49,11 +49,6 @@
|
|||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
sdio1: sdio@3f180000 {
|
||||
max-frequency = <48000000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
sdio2: sdio@3f190000 {
|
||||
non-removable;
|
||||
max-frequency = <48000000>;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,35 @@
|
|||
/*
|
||||
* Broadcom BCM470X / BCM5301X arm platform code.
|
||||
* DTS for Netgear R6250 V1
|
||||
*
|
||||
* Copyright 2013 Hauke Mehrtens <hauke@hauke-m.de>
|
||||
*
|
||||
* Licensed under the GNU/GPL. See COPYING for details.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "bcm4708.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "netgear,r6250v1", "brcm,bcm4708";
|
||||
model = "Netgear R6250 V1 (BCM4708)";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x00000000 0x08000000>;
|
||||
};
|
||||
|
||||
chipcommonA {
|
||||
uart0: serial@0300 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
uart1: serial@0400 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,34 @@
|
|||
/*
|
||||
* Broadcom BCM470X / BCM5301X ARM platform code.
|
||||
* DTS for BCM4708 SoC.
|
||||
*
|
||||
* Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
|
||||
*
|
||||
* Licensed under the GNU/GPL. See COPYING for details.
|
||||
*/
|
||||
|
||||
#include "bcm5301x.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "brcm,bcm4708";
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a9";
|
||||
next-level-cache = <&L2>;
|
||||
reg = <0x0>;
|
||||
};
|
||||
|
||||
cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a9";
|
||||
next-level-cache = <&L2>;
|
||||
reg = <0x1>;
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
|
@ -0,0 +1,95 @@
|
|||
/*
|
||||
* Broadcom BCM470X / BCM5301X ARM platform code.
|
||||
* Generic DTS part for all BCM53010, BCM53011, BCM53012, BCM53014, BCM53015,
|
||||
* BCM53016, BCM53017, BCM53018, BCM4707, BCM4708 and BCM4709 SoCs
|
||||
*
|
||||
* Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
|
||||
*
|
||||
* Licensed under the GNU/GPL. See COPYING for details.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
interrupt-parent = <&gic>;
|
||||
|
||||
chipcommonA {
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x00000000 0x18000000 0x00001000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
uart0: serial@0300 {
|
||||
compatible = "ns16550";
|
||||
reg = <0x0300 0x100>;
|
||||
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-frequency = <100000000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: serial@0400 {
|
||||
compatible = "ns16550";
|
||||
reg = <0x0400 0x100>;
|
||||
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-frequency = <100000000>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
mpcore {
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x00000000 0x19020000 0x00003000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
scu@0000 {
|
||||
compatible = "arm,cortex-a9-scu";
|
||||
reg = <0x0000 0x100>;
|
||||
};
|
||||
|
||||
timer@0200 {
|
||||
compatible = "arm,cortex-a9-global-timer";
|
||||
reg = <0x0200 0x100>;
|
||||
interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk_periph>;
|
||||
};
|
||||
|
||||
local-timer@0600 {
|
||||
compatible = "arm,cortex-a9-twd-timer";
|
||||
reg = <0x0600 0x100>;
|
||||
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk_periph>;
|
||||
};
|
||||
|
||||
gic: interrupt-controller@1000 {
|
||||
compatible = "arm,cortex-a9-gic";
|
||||
#interrupt-cells = <3>;
|
||||
#address-cells = <0>;
|
||||
interrupt-controller;
|
||||
reg = <0x1000 0x1000>,
|
||||
<0x0100 0x100>;
|
||||
};
|
||||
|
||||
L2: cache-controller@2000 {
|
||||
compatible = "arm,pl310-cache";
|
||||
reg = <0x2000 0x1000>;
|
||||
cache-unified;
|
||||
cache-level = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* As long as we do not have a real clock driver us this
|
||||
* fixed clock */
|
||||
clk_periph: periph {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <400000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
Loading…
Reference in New Issue