drm/amd/pp: Add querying current gfx voltage for Vega10
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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drivers/gpu/drm/amd/powerplay
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@ -51,6 +51,9 @@
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#include "pp_overdriver.h"
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#include "pp_thermal.h"
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#include "smuio/smuio_9_0_offset.h"
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#include "smuio/smuio_9_0_sh_mask.h"
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#define VOLTAGE_SCALE 4
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#define VOLTAGE_VID_OFFSET_SCALE1 625
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#define VOLTAGE_VID_OFFSET_SCALE2 100
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@ -3900,6 +3903,7 @@ static int vega10_read_sensor(struct pp_hwmgr *hwmgr, int idx,
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struct vega10_hwmgr *data = (struct vega10_hwmgr *)(hwmgr->backend);
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struct vega10_dpm_table *dpm_table = &data->dpm_table;
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int ret = 0;
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uint32_t reg, val_vid;
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switch (idx) {
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case AMDGPU_PP_SENSOR_GFX_SCLK:
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@ -3946,6 +3950,15 @@ static int vega10_read_sensor(struct pp_hwmgr *hwmgr, int idx,
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ret = vega10_get_gpu_power(hwmgr, (struct pp_gpu_power *)value);
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}
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break;
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case AMDGPU_PP_SENSOR_VDDGFX:
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reg = soc15_get_register_offset(SMUIO_HWID, 0,
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mmSMUSVI0_PLANE0_CURRENTVID_BASE_IDX,
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mmSMUSVI0_PLANE0_CURRENTVID);
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val_vid = (cgs_read_register(hwmgr->device, reg) &
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SMUSVI0_PLANE0_CURRENTVID__CURRENT_SVI0_PLANE0_VID_MASK) >>
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SMUSVI0_PLANE0_CURRENTVID__CURRENT_SVI0_PLANE0_VID__SHIFT;
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*((uint32_t *)value) = (uint32_t)convert_to_vddc((uint8_t)val_vid);
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return 0;
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default:
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ret = -EINVAL;
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break;
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@ -43,7 +43,8 @@ inline static uint32_t soc15_get_register_offset(
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reg = DF_BASE.instance[inst].segment[segment] + offset;
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else if (hw_id == GC_HWID)
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reg = GC_BASE.instance[inst].segment[segment] + offset;
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else if (hw_id == SMUIO_HWID)
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reg = SMUIO_BASE.instance[inst].segment[segment] + offset;
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return reg;
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}
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