hollalinux
/
linux-sg2042
mirror of https://github.com/sophgo/linux-riscv.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

[media] media: rc: nuvoton: clean up initialization of wakeup registers 

The registers defining wakeup sequence handling are set when the
wakeup sequence is set via sysfs. There's no need to initialize them
otherwise.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
This commit is contained in:
Heiner Kallweit 2016-06-24 02:39:04 -03:00 committed by Mauro Carvalho Chehab
parent cb48b3698f
commit 594ccee6f0
1 changed files with 3 additions and 22 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

25
drivers/media/rc/nuvoton-cir.c
View File

@ -564,34 +564,15 @@ static void nvt_cir_regs_init(struct nvt_dev *nvt)
static void nvt_cir_wake_regs_init(struct nvt_dev *nvt)
{
/* set number of bytes needed for wake from s3 (default 65) */
nvt_cir_wake_reg_write(nvt, CIR_WAKE_FIFO_CMP_BYTES,
CIR_WAKE_FIFO_CMP_DEEP);
/* set tolerance/variance allowed per byte during wake compare */
nvt_cir_wake_reg_write(nvt, CIR_WAKE_CMP_TOLERANCE,
CIR_WAKE_FIFO_CMP_TOL);
/* set sample limit count (PE interrupt raised when reached) */
nvt_cir_wake_reg_write(nvt, CIR_RX_LIMIT_COUNT >> 8, CIR_WAKE_SLCH);
nvt_cir_wake_reg_write(nvt, CIR_RX_LIMIT_COUNT & 0xff, CIR_WAKE_SLCL);
/* set cir wake fifo rx trigger level (currently 67) */
nvt_cir_wake_reg_write(nvt, CIR_WAKE_FIFOCON_RX_TRIGGER_LEV,
CIR_WAKE_FIFOCON);
/*
* Enable TX and RX, specific carrier on = low, off = high, and set
* sample period (currently 50us)
* Disable RX, set specific carrier on = low, off = high,
* and sample period (currently 50us)
*/
nvt_cir_wake_reg_write(nvt, CIR_WAKE_IRCON_MODE0 | CIR_WAKE_IRCON_RXEN |
nvt_cir_wake_reg_write(nvt, CIR_WAKE_IRCON_MODE0 |
CIR_WAKE_IRCON_R | CIR_WAKE_IRCON_RXINV |
CIR_WAKE_IRCON_SAMPLE_PERIOD_SEL,
CIR_WAKE_IRCON);
/* clear cir wake rx fifo */
nvt_clear_cir_wake_fifo(nvt);
/* clear any and all stray interrupts */
nvt_cir_wake_reg_write(nvt, 0xff, CIR_WAKE_IRSTS);