iommu/vt-d: Cleanup after converting to dma-iommu ops
Some cleanups after converting the driver to use dma-iommu ops. - Remove nobounce option; - Cleanup and simplify the path in domain mapping. Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Tested-by: Logan Gunthorpe <logang@deltatee.com> Link: https://lore.kernel.org/r/20201124082057.2614359-8-baolu.lu@linux.intel.com Signed-off-by: Will Deacon <will@kernel.org>
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@ -1883,11 +1883,6 @@
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Note that using this option lowers the security
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provided by tboot because it makes the system
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vulnerable to DMA attacks.
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nobounce [Default off]
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Disable bounce buffer for untrusted devices such as
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the Thunderbolt devices. This will treat the untrusted
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devices as the trusted ones, hence might expose security
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risks of DMA attacks.
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intel_idle.max_cstate= [KNL,HW,ACPI,X86]
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0 disables intel_idle and fall back on acpi_idle.
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@ -355,7 +355,6 @@ static int dmar_forcedac;
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static int intel_iommu_strict;
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static int intel_iommu_superpage = 1;
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static int iommu_identity_mapping;
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static int intel_no_bounce;
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static int iommu_skip_te_disable;
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#define IDENTMAP_GFX 2
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@ -457,9 +456,6 @@ static int __init intel_iommu_setup(char *str)
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} else if (!strncmp(str, "tboot_noforce", 13)) {
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pr_info("Intel-IOMMU: not forcing on after tboot. This could expose security risk for tboot\n");
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intel_iommu_tboot_noforce = 1;
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} else if (!strncmp(str, "nobounce", 8)) {
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pr_info("Intel-IOMMU: No bounce buffer. This could expose security risks of DMA attacks\n");
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intel_no_bounce = 1;
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}
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str += strcspn(str, ",");
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@ -2277,15 +2273,14 @@ static inline int hardware_largepage_caps(struct dmar_domain *domain,
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return level;
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}
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static int __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn,
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struct scatterlist *sg, unsigned long phys_pfn,
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unsigned long nr_pages, int prot)
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static int
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__domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn,
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unsigned long phys_pfn, unsigned long nr_pages, int prot)
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{
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struct dma_pte *first_pte = NULL, *pte = NULL;
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phys_addr_t pteval;
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unsigned long sg_res = 0;
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unsigned int largepage_lvl = 0;
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unsigned long lvl_pages = 0;
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phys_addr_t pteval;
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u64 attr;
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BUG_ON(!domain_pfn_supported(domain, iov_pfn + nr_pages - 1));
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@ -2297,26 +2292,14 @@ static int __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn,
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if (domain_use_first_level(domain))
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attr |= DMA_FL_PTE_PRESENT | DMA_FL_PTE_XD | DMA_FL_PTE_US;
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if (!sg) {
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sg_res = nr_pages;
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pteval = ((phys_addr_t)phys_pfn << VTD_PAGE_SHIFT) | attr;
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}
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pteval = ((phys_addr_t)phys_pfn << VTD_PAGE_SHIFT) | attr;
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while (nr_pages > 0) {
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uint64_t tmp;
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if (!sg_res) {
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unsigned int pgoff = sg->offset & ~PAGE_MASK;
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sg_res = aligned_nrpages(sg->offset, sg->length);
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sg->dma_address = ((dma_addr_t)iov_pfn << VTD_PAGE_SHIFT) + pgoff;
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sg->dma_length = sg->length;
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pteval = (sg_phys(sg) - pgoff) | attr;
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phys_pfn = pteval >> VTD_PAGE_SHIFT;
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}
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if (!pte) {
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largepage_lvl = hardware_largepage_caps(domain, iov_pfn, phys_pfn, sg_res);
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largepage_lvl = hardware_largepage_caps(domain, iov_pfn,
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phys_pfn, nr_pages);
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first_pte = pte = pfn_to_dma_pte(domain, iov_pfn, &largepage_lvl);
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if (!pte)
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@ -2328,7 +2311,7 @@ static int __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn,
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pteval |= DMA_PTE_LARGE_PAGE;
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lvl_pages = lvl_to_nr_pages(largepage_lvl);
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nr_superpages = sg_res / lvl_pages;
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nr_superpages = nr_pages / lvl_pages;
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end_pfn = iov_pfn + nr_superpages * lvl_pages - 1;
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/*
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@ -2362,48 +2345,45 @@ static int __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn,
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lvl_pages = lvl_to_nr_pages(largepage_lvl);
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BUG_ON(nr_pages < lvl_pages);
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BUG_ON(sg_res < lvl_pages);
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nr_pages -= lvl_pages;
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iov_pfn += lvl_pages;
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phys_pfn += lvl_pages;
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pteval += lvl_pages * VTD_PAGE_SIZE;
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sg_res -= lvl_pages;
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/* If the next PTE would be the first in a new page, then we
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need to flush the cache on the entries we've just written.
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And then we'll need to recalculate 'pte', so clear it and
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let it get set again in the if (!pte) block above.
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If we're done (!nr_pages) we need to flush the cache too.
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Also if we've been setting superpages, we may need to
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recalculate 'pte' and switch back to smaller pages for the
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end of the mapping, if the trailing size is not enough to
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use another superpage (i.e. sg_res < lvl_pages). */
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* need to flush the cache on the entries we've just written.
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* And then we'll need to recalculate 'pte', so clear it and
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* let it get set again in the if (!pte) block above.
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*
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* If we're done (!nr_pages) we need to flush the cache too.
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*
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* Also if we've been setting superpages, we may need to
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* recalculate 'pte' and switch back to smaller pages for the
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* end of the mapping, if the trailing size is not enough to
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* use another superpage (i.e. nr_pages < lvl_pages).
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*/
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pte++;
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if (!nr_pages || first_pte_in_page(pte) ||
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(largepage_lvl > 1 && sg_res < lvl_pages)) {
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(largepage_lvl > 1 && nr_pages < lvl_pages)) {
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domain_flush_cache(domain, first_pte,
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(void *)pte - (void *)first_pte);
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pte = NULL;
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}
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if (!sg_res && nr_pages)
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sg = sg_next(sg);
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}
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return 0;
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}
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static int domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn,
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struct scatterlist *sg, unsigned long phys_pfn,
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unsigned long nr_pages, int prot)
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static int
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domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn,
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unsigned long phys_pfn, unsigned long nr_pages, int prot)
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{
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int iommu_id, ret;
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struct intel_iommu *iommu;
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/* Do the real mapping first */
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ret = __domain_mapping(domain, iov_pfn, sg, phys_pfn, nr_pages, prot);
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ret = __domain_mapping(domain, iov_pfn, phys_pfn, nr_pages, prot);
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if (ret)
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return ret;
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@ -2415,20 +2395,6 @@ static int domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn,
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return 0;
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}
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static inline int domain_sg_mapping(struct dmar_domain *domain, unsigned long iov_pfn,
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struct scatterlist *sg, unsigned long nr_pages,
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int prot)
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{
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return domain_mapping(domain, iov_pfn, sg, 0, nr_pages, prot);
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}
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static inline int domain_pfn_mapping(struct dmar_domain *domain, unsigned long iov_pfn,
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unsigned long phys_pfn, unsigned long nr_pages,
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int prot)
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{
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return domain_mapping(domain, iov_pfn, NULL, phys_pfn, nr_pages, prot);
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}
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static void domain_context_clear_one(struct intel_iommu *iommu, u8 bus, u8 devfn)
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{
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unsigned long flags;
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@ -2688,7 +2654,7 @@ static int iommu_domain_identity_map(struct dmar_domain *domain,
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*/
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dma_pte_clear_range(domain, first_vpfn, last_vpfn);
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return __domain_mapping(domain, first_vpfn, NULL,
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return __domain_mapping(domain, first_vpfn,
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first_vpfn, last_vpfn - first_vpfn + 1,
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DMA_PTE_READ|DMA_PTE_WRITE);
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}
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@ -4942,8 +4908,8 @@ static int intel_iommu_map(struct iommu_domain *domain,
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/* Round up size to next multiple of PAGE_SIZE, if it and
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the low bits of hpa would take us onto the next page */
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size = aligned_nrpages(hpa, size);
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ret = domain_pfn_mapping(dmar_domain, iova >> VTD_PAGE_SHIFT,
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hpa >> VTD_PAGE_SHIFT, size, prot);
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ret = domain_mapping(dmar_domain, iova >> VTD_PAGE_SHIFT,
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hpa >> VTD_PAGE_SHIFT, size, prot);
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return ret;
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}
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