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drm/nouveau/core: rename subclass.base to subclass.superclass 

Makes things a bit more readable.  This is specially important now as
upcoming commits are going to be gradually removing the use of macros
for down-casts, in favour of compile-time checking.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2014-12-03 12:56:41 +10:00
parent 2f4a58e852
commit 587f7a5b7c
23 changed files with 51 additions and 52 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/nouveau/core/core/client.c
View File

@ -190,7 +190,7 @@ nouveau_client_dtor(struct nouveau_object *object)
nvkm_client_notify_del(client, i);
nouveau_object_ref(NULL, &client->device);
nouveau_handle_destroy(client->root);
nouveau_namedb_destroy(&client->base);
nouveau_namedb_destroy(&client->namedb);
}
static struct nouveau_oclass

10
drivers/gpu/drm/nouveau/core/core/engctx.c
View File

@ -125,10 +125,10 @@ nouveau_engctx_destroy(struct nouveau_engctx *engctx)
if (client->vm)
atomic_dec(&client->vm->engref[nv_engidx(engobj)]);
if (engctx->base.size)
nouveau_gpuobj_destroy(&engctx->base);
if (engctx->gpuobj.size)
nouveau_gpuobj_destroy(&engctx->gpuobj);
else
nouveau_object_destroy(&engctx->base.base);
nouveau_object_destroy(&engctx->gpuobj.object);
}
int
@ -140,7 +140,7 @@ nouveau_engctx_init(struct nouveau_engctx *engctx)
struct nouveau_subdev *pardev;
int ret;
ret = nouveau_gpuobj_init(&engctx->base);
ret = nouveau_gpuobj_init(&engctx->gpuobj);
if (ret)
return ret;
@ -186,7 +186,7 @@ nouveau_engctx_fini(struct nouveau_engctx *engctx, bool suspend)
}
nv_debug(parent, "detached %s context\n", subdev->name);
return nouveau_gpuobj_fini(&engctx->base, suspend);
return nouveau_gpuobj_fini(&engctx->gpuobj, suspend);
}
int

4
drivers/gpu/drm/nouveau/core/core/gpuobj.c
View File

@ -47,7 +47,7 @@ nouveau_gpuobj_destroy(struct nouveau_gpuobj *gpuobj)
if (gpuobj->heap.block_size)
nouveau_mm_fini(&gpuobj->heap);
nouveau_object_destroy(&gpuobj->base);
nouveau_object_destroy(&gpuobj->object);
}
int
@ -290,7 +290,7 @@ nouveau_gpudup_dtor(struct nouveau_object *object)
{
struct nouveau_gpuobj *gpuobj = (void *)object;
nouveau_object_ref(NULL, &gpuobj->parent);
nouveau_object_destroy(&gpuobj->base);
nouveau_object_destroy(&gpuobj->object);
}
static struct nouveau_oclass

2
drivers/gpu/drm/nouveau/core/core/parent.c
View File

@ -150,7 +150,7 @@ nouveau_parent_destroy(struct nouveau_parent *parent)
kfree(sclass);
}
nouveau_object_destroy(&parent->base);
nouveau_object_destroy(&parent->object);
}

8
drivers/gpu/drm/nouveau/core/core/subdev.c
View File

@ -38,11 +38,11 @@ nouveau_subdev_reset(struct nouveau_object *subdev)
int
nouveau_subdev_init(struct nouveau_subdev *subdev)
{
int ret = nouveau_object_init(&subdev->base);
int ret = nouveau_object_init(&subdev->object);
if (ret)
return ret;
nouveau_subdev_reset(&subdev->base);
nouveau_subdev_reset(&subdev->object);
return 0;
}
@ -60,7 +60,7 @@ nouveau_subdev_fini(struct nouveau_subdev *subdev, bool suspend)
nv_mask(subdev, 0x000200, subdev->unit, subdev->unit);
}
return nouveau_object_fini(&subdev->base, suspend);
return nouveau_object_fini(&subdev->object, suspend);
}
int
@ -74,7 +74,7 @@ nouveau_subdev_destroy(struct nouveau_subdev *subdev)
{
int subidx = nv_hclass(subdev) & 0xff;
nv_device(subdev)->subdev[subidx] = NULL;
nouveau_object_destroy(&subdev->base);
nouveau_object_destroy(&subdev->object);
}
void

2
drivers/gpu/drm/nouveau/core/engine/device/base.c
View File

@ -616,7 +616,7 @@ nouveau_device_dtor(struct nouveau_object *object)
if (nv_subdev(device)->mmio)
iounmap(nv_subdev(device)->mmio);
nouveau_engine_destroy(&device->base);
nouveau_engine_destroy(&device->engine);
}
resource_size_t

2
drivers/gpu/drm/nouveau/core/engine/fifo/base.c
View File

@ -127,7 +127,7 @@ nouveau_fifo_channel_destroy(struct nouveau_fifo_chan *chan)
nouveau_gpuobj_ref(NULL, &chan->pushgpu);
nouveau_object_ref(NULL, (struct nouveau_object **)&chan->pushdma);
nouveau_namedb_destroy(&chan->base);
nouveau_namedb_destroy(&chan->namedb);
}
void

2
drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c
View File

@ -629,7 +629,7 @@ nv04_fifo_init(struct nouveau_object *object)
nv_wr32(priv, NV03_PFIFO_RAMHT, (0x03 << 24) /* search 128 */ |
((priv->ramht->bits - 9) << 16) |
(priv->ramht->base.addr >> 8));
(priv->ramht->gpuobj.addr >> 8));
nv_wr32(priv, NV03_PFIFO_RAMRO, priv->ramro->addr >> 8);
nv_wr32(priv, NV03_PFIFO_RAMFC, priv->ramfc->addr >> 8);

2
drivers/gpu/drm/nouveau/core/engine/fifo/nv17.c
View File

@ -193,7 +193,7 @@ nv17_fifo_init(struct nouveau_object *object)
nv_wr32(priv, NV03_PFIFO_RAMHT, (0x03 << 24) /* search 128 */ |
((priv->ramht->bits - 9) << 16) |
(priv->ramht->base.addr >> 8));
(priv->ramht->gpuobj.addr >> 8));
nv_wr32(priv, NV03_PFIFO_RAMRO, priv->ramro->addr >> 8);
nv_wr32(priv, NV03_PFIFO_RAMFC, priv->ramfc->addr >> 8 | 0x00010000);

2
drivers/gpu/drm/nouveau/core/engine/fifo/nv40.c
View File

@ -314,7 +314,7 @@ nv40_fifo_init(struct nouveau_object *object)
nv_wr32(priv, NV03_PFIFO_RAMHT, (0x03 << 24) /* search 128 */ |
((priv->ramht->bits - 9) << 16) |
(priv->ramht->base.addr >> 8));
(priv->ramht->gpuobj.addr >> 8));
nv_wr32(priv, NV03_PFIFO_RAMRO, priv->ramro->addr >> 8);
switch (nv_device(priv)->chipset) {

4
drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c
View File

@ -246,7 +246,7 @@ nv50_fifo_chan_ctor_dma(struct nouveau_object *parent,
nv_wo32(base->ramfc, 0x7c, 0x30000001);
nv_wo32(base->ramfc, 0x80, ((chan->ramht->bits - 9) << 27) |
(4 << 24) /* SEARCH_FULL */ |
(chan->ramht->base.node->offset >> 4));
(chan->ramht->gpuobj.node->offset >> 4));
bar->flush(bar);
return 0;
}
@ -310,7 +310,7 @@ nv50_fifo_chan_ctor_ind(struct nouveau_object *parent,
nv_wo32(base->ramfc, 0x7c, 0x30000001);
nv_wo32(base->ramfc, 0x80, ((chan->ramht->bits - 9) << 27) |
(4 << 24) /* SEARCH_FULL */ |
(chan->ramht->base.node->offset >> 4));
(chan->ramht->gpuobj.node->offset >> 4));
bar->flush(bar);
return 0;
}

4
drivers/gpu/drm/nouveau/core/engine/fifo/nv84.c
View File

@ -219,7 +219,7 @@ nv84_fifo_chan_ctor_dma(struct nouveau_object *parent,
nv_wo32(base->ramfc, 0x7c, 0x30000001);
nv_wo32(base->ramfc, 0x80, ((chan->ramht->bits - 9) << 27) |
(4 << 24) /* SEARCH_FULL */ |
(chan->ramht->base.node->offset >> 4));
(chan->ramht->gpuobj.node->offset >> 4));
nv_wo32(base->ramfc, 0x88, base->cache->addr >> 10);
nv_wo32(base->ramfc, 0x98, nv_gpuobj(base)->addr >> 12);
bar->flush(bar);
@ -292,7 +292,7 @@ nv84_fifo_chan_ctor_ind(struct nouveau_object *parent,
nv_wo32(base->ramfc, 0x7c, 0x30000001);
nv_wo32(base->ramfc, 0x80, ((chan->ramht->bits - 9) << 27) |
(4 << 24) /* SEARCH_FULL */ |
(chan->ramht->base.node->offset >> 4));
(chan->ramht->gpuobj.node->offset >> 4));
nv_wo32(base->ramfc, 0x88, base->cache->addr >> 10);
nv_wo32(base->ramfc, 0x98, nv_gpuobj(base)->addr >> 12);
bar->flush(bar);

2
drivers/gpu/drm/nouveau/core/include/core/client.h
View File

@ -4,7 +4,7 @@
#include <core/namedb.h>
struct nouveau_client {
struct nouveau_namedb base;
struct nouveau_namedb namedb;
struct nouveau_handle *root;
struct nouveau_object *device;
char name[32];

2
drivers/gpu/drm/nouveau/core/include/core/device.h
View File

@ -64,7 +64,7 @@ enum nv_subdev_type {
};
struct nouveau_device {
struct nouveau_engine base;
struct nouveau_engine engine;
struct list_head head;
struct pci_dev *pdev;

2
drivers/gpu/drm/nouveau/core/include/core/engctx.h
View File

@ -10,7 +10,7 @@
#define NV_ENGCTX(name,var) NV_ENGCTX_(NVDEV_ENGINE_##name, (var))
struct nouveau_engctx {
struct nouveau_gpuobj base;
struct nouveau_gpuobj gpuobj;
struct nouveau_vma vma;
struct list_head head;
unsigned long save;

8
drivers/gpu/drm/nouveau/core/include/core/engine.h
View File

@ -8,7 +8,7 @@
#define NV_ENGINE(name,var) NV_ENGINE_(NVDEV_ENGINE_##name, (var))
struct nouveau_engine {
struct nouveau_subdev base;
struct nouveau_subdev subdev;
struct nouveau_oclass *cclass;
struct nouveau_oclass *sclass;
@ -40,11 +40,11 @@ nv_engidx(struct nouveau_object *object)
sizeof(**r),(void **)r)
#define nouveau_engine_destroy(p) \
nouveau_subdev_destroy(&(p)->base)
nouveau_subdev_destroy(&(p)->subdev)
#define nouveau_engine_init(p) \
nouveau_subdev_init(&(p)->base)
nouveau_subdev_init(&(p)->subdev)
#define nouveau_engine_fini(p,s) \
nouveau_subdev_fini(&(p)->base, (s))
nouveau_subdev_fini(&(p)->subdev, (s))
int nouveau_engine_create_(struct nouveau_object *, struct nouveau_object *,
struct nouveau_oclass *, bool, const char *,

8
drivers/gpu/drm/nouveau/core/include/core/gpuobj.h
View File

@ -14,7 +14,7 @@ struct nouveau_vm;
#define NVOBJ_FLAG_HEAP 0x00000004
struct nouveau_gpuobj {
struct nouveau_object base;
struct nouveau_object object;
struct nouveau_object *parent;
struct nouveau_mm_node *node;
struct nouveau_mm heap;
@ -37,8 +37,8 @@ nv_gpuobj(void *obj)
#define nouveau_gpuobj_create(p,e,c,v,g,s,a,f,d) \
nouveau_gpuobj_create_((p), (e), (c), (v), (g), (s), (a), (f), \
sizeof(**d), (void **)d)
#define nouveau_gpuobj_init(p) nouveau_object_init(&(p)->base)
#define nouveau_gpuobj_fini(p,s) nouveau_object_fini(&(p)->base, (s))
#define nouveau_gpuobj_init(p) nouveau_object_init(&(p)->object)
#define nouveau_gpuobj_fini(p,s) nouveau_object_fini(&(p)->object, (s))
int nouveau_gpuobj_create_(struct nouveau_object *, struct nouveau_object *,
struct nouveau_oclass *, u32 pclass,
struct nouveau_object *, u32 size, u32 align,
@ -59,7 +59,7 @@ void nouveau_gpuobj_unmap(struct nouveau_vma *);
static inline void
nouveau_gpuobj_ref(struct nouveau_gpuobj *obj, struct nouveau_gpuobj **ref)
{
nouveau_object_ref(&obj->base, (struct nouveau_object **)ref);
nouveau_object_ref(&obj->object, (struct nouveau_object **)ref);
}
void _nouveau_gpuobj_dtor(struct nouveau_object *);

8
drivers/gpu/drm/nouveau/core/include/core/namedb.h
View File

@ -6,7 +6,7 @@
struct nouveau_handle;
struct nouveau_namedb {
struct nouveau_parent base;
struct nouveau_parent parent;
rwlock_t lock;
struct list_head list;
};
@ -25,11 +25,11 @@ nv_namedb(void *obj)
nouveau_namedb_create_((p), (e), (c), (v), (s), (m), \
sizeof(**d), (void **)d)
#define nouveau_namedb_init(p) \
nouveau_parent_init(&(p)->base)
nouveau_parent_init(&(p)->parent)
#define nouveau_namedb_fini(p,s) \
nouveau_parent_fini(&(p)->base, (s))
nouveau_parent_fini(&(p)->parent, (s))
#define nouveau_namedb_destroy(p) \
nouveau_parent_destroy(&(p)->base)
nouveau_parent_destroy(&(p)->parent)
int nouveau_namedb_create_(struct nouveau_object *, struct nouveau_object *,
struct nouveau_oclass *, u32 pclass,

6
drivers/gpu/drm/nouveau/core/include/core/parent.h
View File

@ -11,7 +11,7 @@ struct nouveau_sclass {
};
struct nouveau_parent {
struct nouveau_object base;
struct nouveau_object object;
struct nouveau_sclass *sclass;
u64 engine;
@ -40,9 +40,9 @@ nv_parent(void *obj)
nouveau_parent_create_((p), (e), (c), (v), (s), (m), \
sizeof(**d), (void **)d)
#define nouveau_parent_init(p) \
nouveau_object_init(&(p)->base)
nouveau_object_init(&(p)->object)
#define nouveau_parent_fini(p,s) \
nouveau_object_fini(&(p)->base, (s))
nouveau_object_fini(&(p)->object, (s))
int nouveau_parent_create_(struct nouveau_object *, struct nouveau_object *,
struct nouveau_oclass *, u32 pclass,

4
drivers/gpu/drm/nouveau/core/include/core/ramht.h
View File

@ -4,7 +4,7 @@
#include <core/gpuobj.h>
struct nouveau_ramht {
struct nouveau_gpuobj base;
struct nouveau_gpuobj gpuobj;
int bits;
};
@ -17,7 +17,7 @@ int nouveau_ramht_new(struct nouveau_object *, struct nouveau_object *,
static inline void
nouveau_ramht_ref(struct nouveau_ramht *obj, struct nouveau_ramht **ref)
{
nouveau_gpuobj_ref(&obj->base, (struct nouveau_gpuobj **)ref);
nouveau_gpuobj_ref(&obj->gpuobj, (struct nouveau_gpuobj **)ref);
}
#endif

2
drivers/gpu/drm/nouveau/core/include/core/subdev.h
View File

@ -7,7 +7,7 @@
#define NV_SUBDEV(name,var) NV_SUBDEV_(NVDEV_SUBDEV_##name, (var))
struct nouveau_subdev {
struct nouveau_object base;
struct nouveau_object object;
struct mutex mutex;
const char *name;
void __iomem *mmio;

14
drivers/gpu/drm/nouveau/core/include/engine/fifo.h
View File

@ -7,7 +7,7 @@
#include <core/event.h>
struct nouveau_fifo_chan {
struct nouveau_namedb base;
struct nouveau_namedb namedb;
struct nouveau_dmaobj *pushdma;
struct nouveau_gpuobj *pushgpu;
void __iomem *user;
@ -27,9 +27,9 @@ nouveau_fifo_chan(void *obj)
nouveau_fifo_channel_create_((p), (e), (c), (b), (a), (s), (n), \
(m), sizeof(**d), (void **)d)
#define nouveau_fifo_channel_init(p) \
nouveau_namedb_init(&(p)->base)
nouveau_namedb_init(&(p)->namedb)
#define nouveau_fifo_channel_fini(p,s) \
nouveau_namedb_fini(&(p)->base, (s))
nouveau_namedb_fini(&(p)->namedb, (s))
int nouveau_fifo_channel_create_(struct nouveau_object *,
struct nouveau_object *,
@ -48,17 +48,17 @@ void _nouveau_fifo_channel_wr32(struct nouveau_object *, u64, u32);
int _nouveau_fifo_channel_ntfy(struct nouveau_object *, u32, struct nvkm_event **);
struct nouveau_fifo_base {
struct nouveau_gpuobj base;
struct nouveau_gpuobj gpuobj;
};
#define nouveau_fifo_context_create(p,e,c,g,s,a,f,d) \
nouveau_gpuobj_create((p), (e), (c), 0, (g), (s), (a), (f), (d))
#define nouveau_fifo_context_destroy(p) \
nouveau_gpuobj_destroy(&(p)->base)
nouveau_gpuobj_destroy(&(p)->gpuobj)
#define nouveau_fifo_context_init(p) \
nouveau_gpuobj_init(&(p)->base)
nouveau_gpuobj_init(&(p)->gpuobj)
#define nouveau_fifo_context_fini(p,s) \
nouveau_gpuobj_fini(&(p)->base, (s))
nouveau_gpuobj_fini(&(p)->gpuobj, (s))
#define _nouveau_fifo_context_dtor _nouveau_gpuobj_dtor
#define _nouveau_fifo_context_init _nouveau_gpuobj_init

3
drivers/gpu/drm/nouveau/core/subdev/vm/nvc0.c
View File

@ -116,8 +116,7 @@ nvc0_vm_map(struct nouveau_vma *vma, struct nouveau_gpuobj *pgt,
pte <<= 3;
if (mem->tag) {
struct nouveau_ltc *ltc =
nouveau_ltc(vma->vm->vmm->base.base.parent);
struct nouveau_ltc *ltc = nouveau_ltc(vma->vm->vmm);
u32 tag = mem->tag->offset + (delta >> 17);
phys |= (u64)tag << (32 + 12);
next |= (u64)1 << (32 + 12);