IB/qib: Replace deprecated pci functions with new API
pci_enable_msix_range() and pci_disable_msix() have been deprecated. Updating to the new pci_alloc_irq_vectors() interface. Reviewed-by: Sebastian Sanchez <sebastian.sanchez@intel.com> Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com> Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
This commit is contained in:
Michael J. Ruhl
Doug Ledford
parent
8cb1021b80
commit
581d01aaac
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@ -1,7 +1,7 @@
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#ifndef _QIB_KERNEL_H
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#define _QIB_KERNEL_H
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/*
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* Copyright (c) 2012, 2013 Intel Corporation. All rights reserved.
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* Copyright (c) 2012 - 2017 Intel Corporation. All rights reserved.
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* Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved.
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* Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
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*
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@ -443,7 +443,7 @@ struct qib_irq_notify;
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#endif
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struct qib_msix_entry {
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struct msix_entry msix;
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int irq;
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void *arg;
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#ifdef CONFIG_INFINIBAND_QIB_DCA
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int dca;
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@ -1433,9 +1433,9 @@ int qib_pcie_init(struct pci_dev *, const struct pci_device_id *);
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int qib_pcie_ddinit(struct qib_devdata *, struct pci_dev *,
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const struct pci_device_id *);
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void qib_pcie_ddcleanup(struct qib_devdata *);
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int qib_pcie_params(struct qib_devdata *, u32, u32 *, struct qib_msix_entry *);
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int qib_pcie_params(struct qib_devdata *dd, u32 minw, u32 *nent);
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int qib_reinit_intr(struct qib_devdata *);
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void qib_enable_intx(struct pci_dev *);
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void qib_enable_intx(struct qib_devdata *dd);
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void qib_nomsi(struct qib_devdata *);
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void qib_nomsix(struct qib_devdata *);
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void qib_pcie_getcmd(struct qib_devdata *, u16 *, u8 *, u8 *);
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2013 Intel Corporation. All rights reserved.
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* Copyright (c) 2013 - 2017 Intel Corporation. All rights reserved.
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* Copyright (c) 2006, 2007, 2008, 2009, 2010 QLogic Corporation.
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* All rights reserved.
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* Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
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@ -1838,7 +1838,7 @@ static int qib_6120_setup_reset(struct qib_devdata *dd)
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bail:
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if (ret) {
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if (qib_pcie_params(dd, dd->lbus_width, NULL, NULL))
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if (qib_pcie_params(dd, dd->lbus_width, NULL))
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qib_dev_err(dd,
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"Reset failed to setup PCIe or interrupts; continuing anyway\n");
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/* clear the reset error, init error/hwerror mask */
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@ -3562,7 +3562,7 @@ struct qib_devdata *qib_init_iba6120_funcs(struct pci_dev *pdev,
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if (qib_mini_init)
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goto bail;
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if (qib_pcie_params(dd, 8, NULL, NULL))
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if (qib_pcie_params(dd, 8, NULL))
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qib_dev_err(dd,
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"Failed to setup PCIe or interrupts; continuing anyway\n");
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dd->cspec->irq = pdev->irq; /* save IRQ */
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@ -1,4 +1,5 @@
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/*
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* Copyright (c) 2011 - 2017 Intel Corporation. All rights reserved.
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* Copyright (c) 2006, 2007, 2008, 2009, 2010 QLogic Corporation.
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* All rights reserved.
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* Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
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@ -2148,7 +2149,7 @@ static int qib_setup_7220_reset(struct qib_devdata *dd)
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bail:
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if (ret) {
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if (qib_pcie_params(dd, dd->lbus_width, NULL, NULL))
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if (qib_pcie_params(dd, dd->lbus_width, NULL))
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qib_dev_err(dd,
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"Reset failed to setup PCIe or interrupts; continuing anyway\n");
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@ -3309,7 +3310,7 @@ static int qib_7220_intr_fallback(struct qib_devdata *dd)
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qib_devinfo(dd->pcidev,
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"MSI interrupt not detected, trying INTx interrupts\n");
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qib_7220_free_irq(dd);
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qib_enable_intx(dd->pcidev);
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qib_enable_intx(dd);
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/*
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* Some newer kernels require free_irq before disable_msi,
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* and irq can be changed during disable and INTx enable
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@ -4619,7 +4620,7 @@ struct qib_devdata *qib_init_iba7220_funcs(struct pci_dev *pdev,
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minwidth = 8; /* x8 capable boards */
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break;
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}
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if (qib_pcie_params(dd, minwidth, NULL, NULL))
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if (qib_pcie_params(dd, minwidth, NULL))
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qib_dev_err(dd,
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"Failed to setup PCIe or interrupts; continuing anyway\n");
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2012 Intel Corporation. All rights reserved.
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* Copyright (c) 2012 - 2017 Intel Corporation. All rights reserved.
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* Copyright (c) 2008 - 2012 QLogic Corporation. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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@ -2841,10 +2841,10 @@ static void qib_7322_nomsix(struct qib_devdata *dd)
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reset_dca_notifier(dd, &dd->cspec->msix_entries[i]);
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#endif
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irq_set_affinity_hint(
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dd->cspec->msix_entries[i].msix.vector, NULL);
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dd->cspec->msix_entries[i].irq, NULL);
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free_cpumask_var(dd->cspec->msix_entries[i].mask);
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free_irq(dd->cspec->msix_entries[i].msix.vector,
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dd->cspec->msix_entries[i].arg);
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free_irq(dd->cspec->msix_entries[i].irq,
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dd->cspec->msix_entries[i].arg);
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}
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qib_nomsix(dd);
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}
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@ -3336,9 +3336,9 @@ static void reset_dca_notifier(struct qib_devdata *dd, struct qib_msix_entry *m)
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qib_devinfo(dd->pcidev,
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"Disabling notifier on HCA %d irq %d\n",
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dd->unit,
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m->msix.vector);
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m->irq);
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irq_set_affinity_notifier(
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m->msix.vector,
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m->irq,
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NULL);
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m->notifier = NULL;
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}
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@ -3354,7 +3354,7 @@ static void setup_dca_notifier(struct qib_devdata *dd, struct qib_msix_entry *m)
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int ret;
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m->notifier = n;
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n->notify.irq = m->msix.vector;
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n->notify.irq = m->irq;
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n->notify.notify = qib_irq_notifier_notify;
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n->notify.release = qib_irq_notifier_release;
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n->arg = m->arg;
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@ -3500,10 +3500,21 @@ try_intx:
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- 1,
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QIB_DRV_NAME "%d (kctx)", dd->unit);
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}
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ret = request_irq(
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dd->cspec->msix_entries[msixnum].msix.vector,
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handler, 0, dd->cspec->msix_entries[msixnum].name,
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arg);
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dd->cspec->msix_entries[msixnum].irq = pci_irq_vector(
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dd->pcidev, msixnum);
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if (dd->cspec->msix_entries[msixnum].irq < 0) {
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qib_dev_err(dd,
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"Couldn't get MSIx irq (vec=%d): %d\n",
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msixnum,
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dd->cspec->msix_entries[msixnum].irq);
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qib_7322_nomsix(dd);
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goto try_intx;
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}
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ret = request_irq(dd->cspec->msix_entries[msixnum].irq,
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handler, 0,
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dd->cspec->msix_entries[msixnum].name,
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arg);
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if (ret) {
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/*
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* Shouldn't happen since the enable said we could
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@ -3512,7 +3523,7 @@ try_intx:
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qib_dev_err(dd,
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"Couldn't setup MSIx interrupt (vec=%d, irq=%d): %d\n",
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msixnum,
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dd->cspec->msix_entries[msixnum].msix.vector,
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dd->cspec->msix_entries[msixnum].irq,
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ret);
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qib_7322_nomsix(dd);
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goto try_intx;
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@ -3548,7 +3559,7 @@ try_intx:
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dd->cspec->msix_entries[msixnum].mask);
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}
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irq_set_affinity_hint(
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dd->cspec->msix_entries[msixnum].msix.vector,
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dd->cspec->msix_entries[msixnum].irq,
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dd->cspec->msix_entries[msixnum].mask);
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}
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msixnum++;
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@ -3744,7 +3755,6 @@ static int qib_do_7322_reset(struct qib_devdata *dd)
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if (msix_entries) {
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/* restore the MSIx vector address and data if saved above */
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for (i = 0; i < msix_entries; i++) {
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dd->cspec->msix_entries[i].msix.entry = i;
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if (!msix_vecsave || !msix_vecsave[2 * i])
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continue;
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qib_write_kreg(dd, 2 * i +
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@ -3762,8 +3772,7 @@ static int qib_do_7322_reset(struct qib_devdata *dd)
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write_7322_initregs(dd);
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if (qib_pcie_params(dd, dd->lbus_width,
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&dd->cspec->num_msix_entries,
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dd->cspec->msix_entries))
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&dd->cspec->num_msix_entries))
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qib_dev_err(dd,
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"Reset failed to setup PCIe or interrupts; continuing anyway\n");
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@ -5195,7 +5204,7 @@ static int qib_7322_intr_fallback(struct qib_devdata *dd)
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qib_devinfo(dd->pcidev,
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"MSIx interrupt not detected, trying INTx interrupts\n");
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qib_7322_nomsix(dd);
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qib_enable_intx(dd->pcidev);
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qib_enable_intx(dd);
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qib_setup_7322_interrupt(dd, 0);
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return 1;
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}
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@ -7327,10 +7336,7 @@ struct qib_devdata *qib_init_iba7322_funcs(struct pci_dev *pdev,
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if (!dd->cspec->msix_entries)
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tabsize = 0;
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for (i = 0; i < tabsize; i++)
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dd->cspec->msix_entries[i].msix.entry = i;
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if (qib_pcie_params(dd, 8, &tabsize, dd->cspec->msix_entries))
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if (qib_pcie_params(dd, 8, &tabsize))
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qib_dev_err(dd,
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"Failed to setup PCIe or interrupts; continuing anyway\n");
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/* may be less than we wanted, if not enough available */
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@ -1,4 +1,5 @@
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/*
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* Copyright (c) 2010 - 2017 Intel Corporation. All rights reserved.
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* Copyright (c) 2008, 2009 QLogic Corporation. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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@ -187,112 +188,84 @@ void qib_pcie_ddcleanup(struct qib_devdata *dd)
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pci_set_drvdata(dd->pcidev, NULL);
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}
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static void qib_msix_setup(struct qib_devdata *dd, int pos, u32 *msixcnt,
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struct qib_msix_entry *qib_msix_entry)
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{
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int ret;
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int nvec = *msixcnt;
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struct msix_entry *msix_entry;
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int i;
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ret = pci_msix_vec_count(dd->pcidev);
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if (ret < 0)
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goto do_intx;
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nvec = min(nvec, ret);
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/* We can't pass qib_msix_entry array to qib_msix_setup
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* so use a dummy msix_entry array and copy the allocated
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* irq back to the qib_msix_entry array. */
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msix_entry = kcalloc(nvec, sizeof(*msix_entry), GFP_KERNEL);
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if (!msix_entry)
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goto do_intx;
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for (i = 0; i < nvec; i++)
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msix_entry[i] = qib_msix_entry[i].msix;
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ret = pci_enable_msix_range(dd->pcidev, msix_entry, 1, nvec);
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if (ret < 0)
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goto free_msix_entry;
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else
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nvec = ret;
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for (i = 0; i < nvec; i++)
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qib_msix_entry[i].msix = msix_entry[i];
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kfree(msix_entry);
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*msixcnt = nvec;
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return;
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free_msix_entry:
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kfree(msix_entry);
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do_intx:
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qib_dev_err(
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dd,
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"pci_enable_msix_range %d vectors failed: %d, falling back to INTx\n",
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nvec, ret);
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*msixcnt = 0;
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qib_enable_intx(dd->pcidev);
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}
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/**
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* We save the msi lo and hi values, so we can restore them after
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* chip reset (the kernel PCI infrastructure doesn't yet handle that
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* correctly.
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*/
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static int qib_msi_setup(struct qib_devdata *dd, int pos)
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static void qib_msi_setup(struct qib_devdata *dd, int pos)
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{
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struct pci_dev *pdev = dd->pcidev;
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u16 control;
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int ret;
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ret = pci_enable_msi(pdev);
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if (ret)
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qib_dev_err(dd,
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"pci_enable_msi failed: %d, interrupts may not work\n",
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ret);
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/* continue even if it fails, we may still be OK... */
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pci_read_config_dword(pdev, pos + PCI_MSI_ADDRESS_LO,
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&dd->msi_lo);
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pci_read_config_dword(pdev, pos + PCI_MSI_ADDRESS_HI,
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&dd->msi_hi);
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pci_read_config_dword(pdev, pos + PCI_MSI_ADDRESS_LO, &dd->msi_lo);
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pci_read_config_dword(pdev, pos + PCI_MSI_ADDRESS_HI, &dd->msi_hi);
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pci_read_config_word(pdev, pos + PCI_MSI_FLAGS, &control);
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/* now save the data (vector) info */
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pci_read_config_word(pdev, pos + ((control & PCI_MSI_FLAGS_64BIT)
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? 12 : 8),
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pci_read_config_word(pdev,
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pos + ((control & PCI_MSI_FLAGS_64BIT) ? 12 : 8),
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&dd->msi_data);
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return ret;
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}
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int qib_pcie_params(struct qib_devdata *dd, u32 minw, u32 *nent,
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struct qib_msix_entry *entry)
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static int qib_allocate_irqs(struct qib_devdata *dd, u32 maxvec)
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{
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unsigned int flags = PCI_IRQ_LEGACY;
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/* Check our capabilities */
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if (dd->pcidev->msix_cap) {
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flags |= PCI_IRQ_MSIX;
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} else {
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if (dd->pcidev->msi_cap) {
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flags |= PCI_IRQ_MSI;
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/* Get msi_lo and msi_hi */
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qib_msi_setup(dd, dd->pcidev->msi_cap);
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}
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}
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if (!(flags & (PCI_IRQ_MSIX | PCI_IRQ_MSI)))
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qib_dev_err(dd, "No PCI MSI or MSIx capability!\n");
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return pci_alloc_irq_vectors(dd->pcidev, 1, maxvec, flags);
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}
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int qib_pcie_params(struct qib_devdata *dd, u32 minw, u32 *nent)
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{
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u16 linkstat, speed;
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int pos = 0, ret = 1;
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int nvec;
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int maxvec;
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int ret = 0;
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if (!pci_is_pcie(dd->pcidev)) {
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qib_dev_err(dd, "Can't find PCI Express capability!\n");
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/* set up something... */
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dd->lbus_width = 1;
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dd->lbus_speed = 2500; /* Gen1, 2.5GHz */
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ret = -1;
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goto bail;
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}
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pos = dd->pcidev->msix_cap;
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if (nent && *nent && pos) {
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qib_msix_setup(dd, pos, nent, entry);
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ret = 0; /* did it, either MSIx or INTx */
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} else {
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pos = dd->pcidev->msi_cap;
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if (pos)
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ret = qib_msi_setup(dd, pos);
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else
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qib_dev_err(dd, "No PCI MSI or MSIx capability!\n");
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maxvec = (nent && *nent) ? *nent : 1;
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nvec = qib_allocate_irqs(dd, maxvec);
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if (nvec < 0) {
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ret = nvec;
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goto bail;
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}
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/*
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* If nent exists, make sure to record how many vectors were allocated
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*/
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if (nent) {
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*nent = nvec;
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/*
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* If we requested (nent) MSIX, but msix_enabled is not set,
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* pci_alloc_irq_vectors() enabled INTx.
|
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*/
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if (!dd->pcidev->msix_enabled)
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qib_dev_err(dd,
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"no msix vectors allocated, using INTx\n");
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}
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if (!pos)
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qib_enable_intx(dd->pcidev);
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pcie_capability_read_word(dd->pcidev, PCI_EXP_LNKSTA, &linkstat);
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/*
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|
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@ -379,7 +352,7 @@ int qib_reinit_intr(struct qib_devdata *dd)
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ret = 1;
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bail:
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if (!ret && (dd->flags & QIB_HAS_INTX)) {
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qib_enable_intx(dd->pcidev);
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qib_enable_intx(dd);
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||||
ret = 1;
|
||||
}
|
||||
|
||||
|
|
@ -397,7 +370,7 @@ bail:
|
|||
void qib_nomsi(struct qib_devdata *dd)
|
||||
{
|
||||
dd->msi_lo = 0;
|
||||
pci_disable_msi(dd->pcidev);
|
||||
pci_free_irq_vectors(dd->pcidev);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -405,23 +378,21 @@ void qib_nomsi(struct qib_devdata *dd)
|
|||
*/
|
||||
void qib_nomsix(struct qib_devdata *dd)
|
||||
{
|
||||
pci_disable_msix(dd->pcidev);
|
||||
pci_free_irq_vectors(dd->pcidev);
|
||||
}
|
||||
|
||||
/*
|
||||
* Similar to pci_intx(pdev, 1), except that we make sure
|
||||
* msi(x) is off.
|
||||
*/
|
||||
void qib_enable_intx(struct pci_dev *pdev)
|
||||
void qib_enable_intx(struct qib_devdata *dd)
|
||||
{
|
||||
u16 cw, new;
|
||||
int pos;
|
||||
struct pci_dev *pdev = dd->pcidev;
|
||||
|
||||
/* first, turn on INTx */
|
||||
pci_read_config_word(pdev, PCI_COMMAND, &cw);
|
||||
new = cw & ~PCI_COMMAND_INTX_DISABLE;
|
||||
if (new != cw)
|
||||
pci_write_config_word(pdev, PCI_COMMAND, new);
|
||||
if (pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_LEGACY) < 0)
|
||||
qib_dev_err(dd, "Failed to enable INTx\n");
|
||||
|
||||
pos = pdev->msi_cap;
|
||||
if (pos) {
|
||||
|
|
|
|||
Loading…
Reference in New Issue