[POWERPC] Move common PCI code out of pci_32/pci_64
Moved the low hanging fruit that was either identical or close to it between ppc32 & ppc64 for PCI into pci-common.c Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Kumar Gala
parent
0b1d40c4d4
commit
58083dade5
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@ -51,3 +51,317 @@ int pci_domain_nr(struct pci_bus *bus)
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}
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EXPORT_SYMBOL(pci_domain_nr);
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#ifdef CONFIG_PPC_OF
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static ssize_t pci_show_devspec(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct pci_dev *pdev;
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struct device_node *np;
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pdev = to_pci_dev (dev);
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np = pci_device_to_OF_node(pdev);
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if (np == NULL || np->full_name == NULL)
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return 0;
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return sprintf(buf, "%s", np->full_name);
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}
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static DEVICE_ATTR(devspec, S_IRUGO, pci_show_devspec, NULL);
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#endif /* CONFIG_PPC_OF */
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/* Add sysfs properties */
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void pcibios_add_platform_entries(struct pci_dev *pdev)
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{
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#ifdef CONFIG_PPC_OF
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device_create_file(&pdev->dev, &dev_attr_devspec);
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#endif /* CONFIG_PPC_OF */
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}
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char __init *pcibios_setup(char *str)
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{
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return str;
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}
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/*
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* Reads the interrupt pin to determine if interrupt is use by card.
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* If the interrupt is used, then gets the interrupt line from the
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* openfirmware and sets it in the pci_dev and pci_config line.
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*/
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int pci_read_irq_line(struct pci_dev *pci_dev)
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{
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struct of_irq oirq;
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unsigned int virq;
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DBG("Try to map irq for %s...\n", pci_name(pci_dev));
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#ifdef DEBUG
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memset(&oirq, 0xff, sizeof(oirq));
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#endif
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/* Try to get a mapping from the device-tree */
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if (of_irq_map_pci(pci_dev, &oirq)) {
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u8 line, pin;
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/* If that fails, lets fallback to what is in the config
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* space and map that through the default controller. We
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* also set the type to level low since that's what PCI
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* interrupts are. If your platform does differently, then
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* either provide a proper interrupt tree or don't use this
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* function.
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*/
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if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_PIN, &pin))
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return -1;
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if (pin == 0)
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return -1;
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if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_LINE, &line) ||
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line == 0xff) {
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return -1;
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}
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DBG(" -> no map ! Using irq line %d from PCI config\n", line);
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virq = irq_create_mapping(NULL, line);
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if (virq != NO_IRQ)
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set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
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} else {
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DBG(" -> got one, spec %d cells (0x%08x 0x%08x...) on %s\n",
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oirq.size, oirq.specifier[0], oirq.specifier[1],
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oirq.controller->full_name);
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virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
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oirq.size);
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}
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if(virq == NO_IRQ) {
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DBG(" -> failed to map !\n");
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return -1;
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}
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DBG(" -> mapped to linux irq %d\n", virq);
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pci_dev->irq = virq;
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return 0;
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}
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EXPORT_SYMBOL(pci_read_irq_line);
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/*
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* Platform support for /proc/bus/pci/X/Y mmap()s,
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* modelled on the sparc64 implementation by Dave Miller.
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* -- paulus.
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*/
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/*
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* Adjust vm_pgoff of VMA such that it is the physical page offset
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* corresponding to the 32-bit pci bus offset for DEV requested by the user.
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*
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* Basically, the user finds the base address for his device which he wishes
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* to mmap. They read the 32-bit value from the config space base register,
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* add whatever PAGE_SIZE multiple offset they wish, and feed this into the
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* offset parameter of mmap on /proc/bus/pci/XXX for that device.
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*
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* Returns negative error code on failure, zero on success.
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*/
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static struct resource *__pci_mmap_make_offset(struct pci_dev *dev,
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resource_size_t *offset,
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enum pci_mmap_state mmap_state)
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{
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struct pci_controller *hose = pci_bus_to_host(dev->bus);
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unsigned long io_offset = 0;
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int i, res_bit;
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if (hose == 0)
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return NULL; /* should never happen */
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/* If memory, add on the PCI bridge address offset */
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if (mmap_state == pci_mmap_mem) {
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#if 0 /* See comment in pci_resource_to_user() for why this is disabled */
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*offset += hose->pci_mem_offset;
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#endif
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res_bit = IORESOURCE_MEM;
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} else {
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io_offset = (unsigned long)hose->io_base_virt - _IO_BASE;
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*offset += io_offset;
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res_bit = IORESOURCE_IO;
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}
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/*
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* Check that the offset requested corresponds to one of the
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* resources of the device.
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*/
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for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
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struct resource *rp = &dev->resource[i];
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int flags = rp->flags;
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/* treat ROM as memory (should be already) */
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if (i == PCI_ROM_RESOURCE)
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flags |= IORESOURCE_MEM;
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/* Active and same type? */
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if ((flags & res_bit) == 0)
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continue;
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/* In the range of this resource? */
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if (*offset < (rp->start & PAGE_MASK) || *offset > rp->end)
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continue;
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/* found it! construct the final physical address */
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if (mmap_state == pci_mmap_io)
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*offset += hose->io_base_phys - io_offset;
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return rp;
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}
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return NULL;
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}
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/*
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* Set vm_page_prot of VMA, as appropriate for this architecture, for a pci
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* device mapping.
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*/
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static pgprot_t __pci_mmap_set_pgprot(struct pci_dev *dev, struct resource *rp,
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pgprot_t protection,
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enum pci_mmap_state mmap_state,
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int write_combine)
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{
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unsigned long prot = pgprot_val(protection);
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/* Write combine is always 0 on non-memory space mappings. On
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* memory space, if the user didn't pass 1, we check for a
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* "prefetchable" resource. This is a bit hackish, but we use
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* this to workaround the inability of /sysfs to provide a write
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* combine bit
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*/
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if (mmap_state != pci_mmap_mem)
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write_combine = 0;
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else if (write_combine == 0) {
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if (rp->flags & IORESOURCE_PREFETCH)
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write_combine = 1;
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}
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/* XXX would be nice to have a way to ask for write-through */
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prot |= _PAGE_NO_CACHE;
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if (write_combine)
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prot &= ~_PAGE_GUARDED;
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else
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prot |= _PAGE_GUARDED;
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return __pgprot(prot);
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}
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/*
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* This one is used by /dev/mem and fbdev who have no clue about the
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* PCI device, it tries to find the PCI device first and calls the
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* above routine
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*/
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pgprot_t pci_phys_mem_access_prot(struct file *file,
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unsigned long pfn,
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unsigned long size,
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pgprot_t protection)
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{
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struct pci_dev *pdev = NULL;
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struct resource *found = NULL;
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unsigned long prot = pgprot_val(protection);
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unsigned long offset = pfn << PAGE_SHIFT;
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int i;
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if (page_is_ram(pfn))
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return __pgprot(prot);
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prot |= _PAGE_NO_CACHE | _PAGE_GUARDED;
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for_each_pci_dev(pdev) {
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for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
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struct resource *rp = &pdev->resource[i];
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int flags = rp->flags;
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/* Active and same type? */
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if ((flags & IORESOURCE_MEM) == 0)
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continue;
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/* In the range of this resource? */
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if (offset < (rp->start & PAGE_MASK) ||
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offset > rp->end)
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continue;
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found = rp;
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break;
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}
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if (found)
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break;
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}
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if (found) {
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if (found->flags & IORESOURCE_PREFETCH)
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prot &= ~_PAGE_GUARDED;
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pci_dev_put(pdev);
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}
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DBG("non-PCI map for %lx, prot: %lx\n", offset, prot);
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return __pgprot(prot);
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}
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/*
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* Perform the actual remap of the pages for a PCI device mapping, as
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* appropriate for this architecture. The region in the process to map
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* is described by vm_start and vm_end members of VMA, the base physical
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* address is found in vm_pgoff.
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* The pci device structure is provided so that architectures may make mapping
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* decisions on a per-device or per-bus basis.
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*
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* Returns a negative error code on failure, zero on success.
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*/
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int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state, int write_combine)
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{
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resource_size_t offset = vma->vm_pgoff << PAGE_SHIFT;
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struct resource *rp;
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int ret;
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rp = __pci_mmap_make_offset(dev, &offset, mmap_state);
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if (rp == NULL)
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return -EINVAL;
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vma->vm_pgoff = offset >> PAGE_SHIFT;
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vma->vm_page_prot = __pci_mmap_set_pgprot(dev, rp,
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vma->vm_page_prot,
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mmap_state, write_combine);
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ret = remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
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vma->vm_end - vma->vm_start, vma->vm_page_prot);
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return ret;
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}
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void pci_resource_to_user(const struct pci_dev *dev, int bar,
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const struct resource *rsrc,
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resource_size_t *start, resource_size_t *end)
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{
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struct pci_controller *hose = pci_bus_to_host(dev->bus);
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resource_size_t offset = 0;
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if (hose == NULL)
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return;
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if (rsrc->flags & IORESOURCE_IO)
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offset = (unsigned long)hose->io_base_virt - _IO_BASE;
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/* We pass a fully fixed up address to userland for MMIO instead of
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* a BAR value because X is lame and expects to be able to use that
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* to pass to /dev/mem !
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*
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* That means that we'll have potentially 64 bits values where some
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* userland apps only expect 32 (like X itself since it thinks only
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* Sparc has 64 bits MMIO) but if we don't do that, we break it on
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* 32 bits CHRPs :-(
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*
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* Hopefully, the sysfs insterface is immune to that gunk. Once X
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* has been fixed (and the fix spread enough), we can re-enable the
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* 2 lines below and pass down a BAR value to userland. In that case
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* we'll also have to re-enable the matching code in
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* __pci_mmap_make_offset().
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*
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* BenH.
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*/
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#if 0
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else if (rsrc->flags & IORESOURCE_MEM)
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offset = hose->pci_mem_offset;
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#endif
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*start = rsrc->start - offset;
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*end = rsrc->end - offset;
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}
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@ -1028,34 +1028,12 @@ pci_create_OF_bus_map(void)
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}
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}
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static ssize_t pci_show_devspec(struct device *dev, struct device_attribute *attr, char *buf)
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{
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struct pci_dev *pdev;
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struct device_node *np;
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pdev = to_pci_dev (dev);
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np = pci_device_to_OF_node(pdev);
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if (np == NULL || np->full_name == NULL)
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return 0;
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return sprintf(buf, "%s", np->full_name);
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}
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static DEVICE_ATTR(devspec, S_IRUGO, pci_show_devspec, NULL);
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#else /* CONFIG_PPC_OF */
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void pcibios_make_OF_bus_map(void)
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{
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}
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#endif /* CONFIG_PPC_OF */
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/* Add sysfs properties */
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void pcibios_add_platform_entries(struct pci_dev *pdev)
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{
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#ifdef CONFIG_PPC_OF
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device_create_file(&pdev->dev, &dev_attr_devspec);
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#endif /* CONFIG_PPC_OF */
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}
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#ifdef CONFIG_PPC_PMAC
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/*
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* This set of routines checks for PCI<->PCI bridges that have closed
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@ -1390,11 +1368,6 @@ void __init pcibios_fixup_bus(struct pci_bus *bus)
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}
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}
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char __init *pcibios_setup(char *str)
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{
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return str;
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}
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/* the next one is stolen from the alpha port... */
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void __init
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pcibios_update_irq(struct pci_dev *dev, int irq)
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@ -1403,64 +1376,6 @@ pcibios_update_irq(struct pci_dev *dev, int irq)
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/* XXX FIXME - update OF device tree node interrupt property */
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}
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#ifdef CONFIG_PPC_MERGE
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/* XXX This is a copy of the ppc64 version. This is temporary until we start
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* merging the 2 PCI layers
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*/
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/*
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* Reads the interrupt pin to determine if interrupt is use by card.
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* If the interrupt is used, then gets the interrupt line from the
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* openfirmware and sets it in the pci_dev and pci_config line.
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*/
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int pci_read_irq_line(struct pci_dev *pci_dev)
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{
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struct of_irq oirq;
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unsigned int virq;
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DBG("Try to map irq for %s...\n", pci_name(pci_dev));
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/* Try to get a mapping from the device-tree */
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if (of_irq_map_pci(pci_dev, &oirq)) {
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u8 line, pin;
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/* If that fails, lets fallback to what is in the config
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* space and map that through the default controller. We
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* also set the type to level low since that's what PCI
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* interrupts are. If your platform does differently, then
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* either provide a proper interrupt tree or don't use this
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* function.
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*/
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if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_PIN, &pin))
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return -1;
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if (pin == 0)
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return -1;
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if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_LINE, &line) ||
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line == 0xff) {
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return -1;
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}
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DBG(" -> no map ! Using irq line %d from PCI config\n", line);
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virq = irq_create_mapping(NULL, line);
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if (virq != NO_IRQ)
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set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
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} else {
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DBG(" -> got one, spec %d cells (0x%08x...) on %s\n",
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oirq.size, oirq.specifier[0], oirq.controller->full_name);
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virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
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oirq.size);
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}
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if(virq == NO_IRQ) {
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DBG(" -> failed to map !\n");
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return -1;
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}
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pci_dev->irq = virq;
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return 0;
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}
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EXPORT_SYMBOL(pci_read_irq_line);
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#endif /* CONFIG_PPC_MERGE */
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int pcibios_enable_device(struct pci_dev *dev, int mask)
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{
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u16 cmd, old_cmd;
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@ -1503,176 +1418,6 @@ pci_bus_to_hose(int bus)
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return NULL;
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}
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static struct resource *__pci_mmap_make_offset(struct pci_dev *dev,
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resource_size_t *offset,
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enum pci_mmap_state mmap_state)
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{
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struct pci_controller *hose = pci_bus_to_host(dev->bus);
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unsigned long io_offset = 0;
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int i, res_bit;
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if (hose == 0)
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return NULL; /* should never happen */
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/* If memory, add on the PCI bridge address offset */
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if (mmap_state == pci_mmap_mem) {
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#if 0 /* See comment in pci_resource_to_user() for why this is disabled */
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*offset += hose->pci_mem_offset;
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#endif
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res_bit = IORESOURCE_MEM;
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} else {
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io_offset = hose->io_base_virt - (void __iomem *)_IO_BASE;
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*offset += io_offset;
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res_bit = IORESOURCE_IO;
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}
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/*
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* Check that the offset requested corresponds to one of the
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* resources of the device.
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*/
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for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
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struct resource *rp = &dev->resource[i];
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int flags = rp->flags;
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/* treat ROM as memory (should be already) */
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if (i == PCI_ROM_RESOURCE)
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flags |= IORESOURCE_MEM;
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/* Active and same type? */
|
||||
if ((flags & res_bit) == 0)
|
||||
continue;
|
||||
|
||||
/* In the range of this resource? */
|
||||
if (*offset < (rp->start & PAGE_MASK) || *offset > rp->end)
|
||||
continue;
|
||||
|
||||
/* found it! construct the final physical address */
|
||||
if (mmap_state == pci_mmap_io)
|
||||
*offset += hose->io_base_phys - io_offset;
|
||||
return rp;
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/*
|
||||
* Set vm_page_prot of VMA, as appropriate for this architecture, for a pci
|
||||
* device mapping.
|
||||
*/
|
||||
static pgprot_t __pci_mmap_set_pgprot(struct pci_dev *dev, struct resource *rp,
|
||||
pgprot_t protection,
|
||||
enum pci_mmap_state mmap_state,
|
||||
int write_combine)
|
||||
{
|
||||
unsigned long prot = pgprot_val(protection);
|
||||
|
||||
/* Write combine is always 0 on non-memory space mappings. On
|
||||
* memory space, if the user didn't pass 1, we check for a
|
||||
* "prefetchable" resource. This is a bit hackish, but we use
|
||||
* this to workaround the inability of /sysfs to provide a write
|
||||
* combine bit
|
||||
*/
|
||||
if (mmap_state != pci_mmap_mem)
|
||||
write_combine = 0;
|
||||
else if (write_combine == 0) {
|
||||
if (rp->flags & IORESOURCE_PREFETCH)
|
||||
write_combine = 1;
|
||||
}
|
||||
|
||||
/* XXX would be nice to have a way to ask for write-through */
|
||||
prot |= _PAGE_NO_CACHE;
|
||||
if (write_combine)
|
||||
prot &= ~_PAGE_GUARDED;
|
||||
else
|
||||
prot |= _PAGE_GUARDED;
|
||||
|
||||
return __pgprot(prot);
|
||||
}
|
||||
|
||||
/*
|
||||
* This one is used by /dev/mem and fbdev who have no clue about the
|
||||
* PCI device, it tries to find the PCI device first and calls the
|
||||
* above routine
|
||||
*/
|
||||
pgprot_t pci_phys_mem_access_prot(struct file *file,
|
||||
unsigned long pfn,
|
||||
unsigned long size,
|
||||
pgprot_t protection)
|
||||
{
|
||||
struct pci_dev *pdev = NULL;
|
||||
struct resource *found = NULL;
|
||||
unsigned long prot = pgprot_val(protection);
|
||||
unsigned long offset = pfn << PAGE_SHIFT;
|
||||
int i;
|
||||
|
||||
if (page_is_ram(pfn))
|
||||
return __pgprot(prot);
|
||||
|
||||
prot |= _PAGE_NO_CACHE | _PAGE_GUARDED;
|
||||
|
||||
for_each_pci_dev(pdev) {
|
||||
for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
|
||||
struct resource *rp = &pdev->resource[i];
|
||||
int flags = rp->flags;
|
||||
|
||||
/* Active and same type? */
|
||||
if ((flags & IORESOURCE_MEM) == 0)
|
||||
continue;
|
||||
/* In the range of this resource? */
|
||||
if (offset < (rp->start & PAGE_MASK) ||
|
||||
offset > rp->end)
|
||||
continue;
|
||||
found = rp;
|
||||
break;
|
||||
}
|
||||
if (found)
|
||||
break;
|
||||
}
|
||||
if (found) {
|
||||
if (found->flags & IORESOURCE_PREFETCH)
|
||||
prot &= ~_PAGE_GUARDED;
|
||||
pci_dev_put(pdev);
|
||||
}
|
||||
|
||||
DBG("non-PCI map for %lx, prot: %lx\n", offset, prot);
|
||||
|
||||
return __pgprot(prot);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Perform the actual remap of the pages for a PCI device mapping, as
|
||||
* appropriate for this architecture. The region in the process to map
|
||||
* is described by vm_start and vm_end members of VMA, the base physical
|
||||
* address is found in vm_pgoff.
|
||||
* The pci device structure is provided so that architectures may make mapping
|
||||
* decisions on a per-device or per-bus basis.
|
||||
*
|
||||
* Returns a negative error code on failure, zero on success.
|
||||
*/
|
||||
int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
|
||||
enum pci_mmap_state mmap_state,
|
||||
int write_combine)
|
||||
{
|
||||
resource_size_t offset = vma->vm_pgoff << PAGE_SHIFT;
|
||||
struct resource *rp;
|
||||
int ret;
|
||||
|
||||
rp = __pci_mmap_make_offset(dev, &offset, mmap_state);
|
||||
if (rp == NULL)
|
||||
return -EINVAL;
|
||||
|
||||
vma->vm_pgoff = offset >> PAGE_SHIFT;
|
||||
vma->vm_page_prot = __pci_mmap_set_pgprot(dev, rp,
|
||||
vma->vm_page_prot,
|
||||
mmap_state, write_combine);
|
||||
|
||||
ret = remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
|
||||
vma->vm_end - vma->vm_start, vma->vm_page_prot);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Provide information on locations of various I/O regions in physical
|
||||
* memory. Do this on a per-card basis so that we choose the right
|
||||
* root bridge.
|
||||
|
|
@ -1715,45 +1460,6 @@ long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn)
|
|||
return result;
|
||||
}
|
||||
|
||||
void pci_resource_to_user(const struct pci_dev *dev, int bar,
|
||||
const struct resource *rsrc,
|
||||
resource_size_t *start, resource_size_t *end)
|
||||
{
|
||||
struct pci_controller *hose = pci_bus_to_host(dev->bus);
|
||||
resource_size_t offset = 0;
|
||||
|
||||
if (hose == NULL)
|
||||
return;
|
||||
|
||||
if (rsrc->flags & IORESOURCE_IO)
|
||||
offset = (unsigned long)hose->io_base_virt - _IO_BASE;
|
||||
|
||||
/* We pass a fully fixed up address to userland for MMIO instead of
|
||||
* a BAR value because X is lame and expects to be able to use that
|
||||
* to pass to /dev/mem !
|
||||
*
|
||||
* That means that we'll have potentially 64 bits values where some
|
||||
* userland apps only expect 32 (like X itself since it thinks only
|
||||
* Sparc has 64 bits MMIO) but if we don't do that, we break it on
|
||||
* 32 bits CHRPs :-(
|
||||
*
|
||||
* Hopefully, the sysfs insterface is immune to that gunk. Once X
|
||||
* has been fixed (and the fix spread enough), we can re-enable the
|
||||
* 2 lines below and pass down a BAR value to userland. In that case
|
||||
* we'll also have to re-enable the matching code in
|
||||
* __pci_mmap_make_offset().
|
||||
*
|
||||
* BenH.
|
||||
*/
|
||||
#if 0
|
||||
else if (rsrc->flags & IORESOURCE_MEM)
|
||||
offset = hose->pci_mem_offset;
|
||||
#endif
|
||||
|
||||
*start = rsrc->start - offset;
|
||||
*end = rsrc->end - offset;
|
||||
}
|
||||
|
||||
unsigned long pci_address_to_pio(phys_addr_t address)
|
||||
{
|
||||
struct pci_controller* hose = hose_head;
|
||||
|
|
|
|||
|
|
@ -601,11 +601,6 @@ static int __init pcibios_init(void)
|
|||
|
||||
subsys_initcall(pcibios_init);
|
||||
|
||||
char __init *pcibios_setup(char *str)
|
||||
{
|
||||
return str;
|
||||
}
|
||||
|
||||
int pcibios_enable_device(struct pci_dev *dev, int mask)
|
||||
{
|
||||
u16 cmd, oldcmd;
|
||||
|
|
@ -647,211 +642,6 @@ int pci_proc_domain(struct pci_bus *bus)
|
|||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Platform support for /proc/bus/pci/X/Y mmap()s,
|
||||
* modelled on the sparc64 implementation by Dave Miller.
|
||||
* -- paulus.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Adjust vm_pgoff of VMA such that it is the physical page offset
|
||||
* corresponding to the 32-bit pci bus offset for DEV requested by the user.
|
||||
*
|
||||
* Basically, the user finds the base address for his device which he wishes
|
||||
* to mmap. They read the 32-bit value from the config space base register,
|
||||
* add whatever PAGE_SIZE multiple offset they wish, and feed this into the
|
||||
* offset parameter of mmap on /proc/bus/pci/XXX for that device.
|
||||
*
|
||||
* Returns negative error code on failure, zero on success.
|
||||
*/
|
||||
static struct resource *__pci_mmap_make_offset(struct pci_dev *dev,
|
||||
resource_size_t *offset,
|
||||
enum pci_mmap_state mmap_state)
|
||||
{
|
||||
struct pci_controller *hose = pci_bus_to_host(dev->bus);
|
||||
unsigned long io_offset = 0;
|
||||
int i, res_bit;
|
||||
|
||||
if (hose == 0)
|
||||
return NULL; /* should never happen */
|
||||
|
||||
/* If memory, add on the PCI bridge address offset */
|
||||
if (mmap_state == pci_mmap_mem) {
|
||||
#if 0 /* See comment in pci_resource_to_user() for why this is disabled */
|
||||
*offset += hose->pci_mem_offset;
|
||||
#endif
|
||||
res_bit = IORESOURCE_MEM;
|
||||
} else {
|
||||
io_offset = (unsigned long)hose->io_base_virt - _IO_BASE;
|
||||
*offset += io_offset;
|
||||
res_bit = IORESOURCE_IO;
|
||||
}
|
||||
|
||||
/*
|
||||
* Check that the offset requested corresponds to one of the
|
||||
* resources of the device.
|
||||
*/
|
||||
for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
|
||||
struct resource *rp = &dev->resource[i];
|
||||
int flags = rp->flags;
|
||||
|
||||
/* treat ROM as memory (should be already) */
|
||||
if (i == PCI_ROM_RESOURCE)
|
||||
flags |= IORESOURCE_MEM;
|
||||
|
||||
/* Active and same type? */
|
||||
if ((flags & res_bit) == 0)
|
||||
continue;
|
||||
|
||||
/* In the range of this resource? */
|
||||
if (*offset < (rp->start & PAGE_MASK) || *offset > rp->end)
|
||||
continue;
|
||||
|
||||
/* found it! construct the final physical address */
|
||||
if (mmap_state == pci_mmap_io)
|
||||
*offset += hose->io_base_phys - io_offset;
|
||||
return rp;
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/*
|
||||
* Set vm_page_prot of VMA, as appropriate for this architecture, for a pci
|
||||
* device mapping.
|
||||
*/
|
||||
static pgprot_t __pci_mmap_set_pgprot(struct pci_dev *dev, struct resource *rp,
|
||||
pgprot_t protection,
|
||||
enum pci_mmap_state mmap_state,
|
||||
int write_combine)
|
||||
{
|
||||
unsigned long prot = pgprot_val(protection);
|
||||
|
||||
/* Write combine is always 0 on non-memory space mappings. On
|
||||
* memory space, if the user didn't pass 1, we check for a
|
||||
* "prefetchable" resource. This is a bit hackish, but we use
|
||||
* this to workaround the inability of /sysfs to provide a write
|
||||
* combine bit
|
||||
*/
|
||||
if (mmap_state != pci_mmap_mem)
|
||||
write_combine = 0;
|
||||
else if (write_combine == 0) {
|
||||
if (rp->flags & IORESOURCE_PREFETCH)
|
||||
write_combine = 1;
|
||||
}
|
||||
|
||||
/* XXX would be nice to have a way to ask for write-through */
|
||||
prot |= _PAGE_NO_CACHE;
|
||||
if (write_combine)
|
||||
prot &= ~_PAGE_GUARDED;
|
||||
else
|
||||
prot |= _PAGE_GUARDED;
|
||||
|
||||
return __pgprot(prot);
|
||||
}
|
||||
|
||||
/*
|
||||
* This one is used by /dev/mem and fbdev who have no clue about the
|
||||
* PCI device, it tries to find the PCI device first and calls the
|
||||
* above routine
|
||||
*/
|
||||
pgprot_t pci_phys_mem_access_prot(struct file *file,
|
||||
unsigned long pfn,
|
||||
unsigned long size,
|
||||
pgprot_t protection)
|
||||
{
|
||||
struct pci_dev *pdev = NULL;
|
||||
struct resource *found = NULL;
|
||||
unsigned long prot = pgprot_val(protection);
|
||||
unsigned long offset = pfn << PAGE_SHIFT;
|
||||
int i;
|
||||
|
||||
if (page_is_ram(pfn))
|
||||
return __pgprot(prot);
|
||||
|
||||
prot |= _PAGE_NO_CACHE | _PAGE_GUARDED;
|
||||
|
||||
for_each_pci_dev(pdev) {
|
||||
for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
|
||||
struct resource *rp = &pdev->resource[i];
|
||||
int flags = rp->flags;
|
||||
|
||||
/* Active and same type? */
|
||||
if ((flags & IORESOURCE_MEM) == 0)
|
||||
continue;
|
||||
/* In the range of this resource? */
|
||||
if (offset < (rp->start & PAGE_MASK) ||
|
||||
offset > rp->end)
|
||||
continue;
|
||||
found = rp;
|
||||
break;
|
||||
}
|
||||
if (found)
|
||||
break;
|
||||
}
|
||||
if (found) {
|
||||
if (found->flags & IORESOURCE_PREFETCH)
|
||||
prot &= ~_PAGE_GUARDED;
|
||||
pci_dev_put(pdev);
|
||||
}
|
||||
|
||||
DBG("non-PCI map for %lx, prot: %lx\n", offset, prot);
|
||||
|
||||
return __pgprot(prot);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Perform the actual remap of the pages for a PCI device mapping, as
|
||||
* appropriate for this architecture. The region in the process to map
|
||||
* is described by vm_start and vm_end members of VMA, the base physical
|
||||
* address is found in vm_pgoff.
|
||||
* The pci device structure is provided so that architectures may make mapping
|
||||
* decisions on a per-device or per-bus basis.
|
||||
*
|
||||
* Returns a negative error code on failure, zero on success.
|
||||
*/
|
||||
int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
|
||||
enum pci_mmap_state mmap_state, int write_combine)
|
||||
{
|
||||
resource_size_t offset = vma->vm_pgoff << PAGE_SHIFT;
|
||||
struct resource *rp;
|
||||
int ret;
|
||||
|
||||
rp = __pci_mmap_make_offset(dev, &offset, mmap_state);
|
||||
if (rp == NULL)
|
||||
return -EINVAL;
|
||||
|
||||
vma->vm_pgoff = offset >> PAGE_SHIFT;
|
||||
vma->vm_page_prot = __pci_mmap_set_pgprot(dev, rp,
|
||||
vma->vm_page_prot,
|
||||
mmap_state, write_combine);
|
||||
|
||||
ret = remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
|
||||
vma->vm_end - vma->vm_start, vma->vm_page_prot);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static ssize_t pci_show_devspec(struct device *dev,
|
||||
struct device_attribute *attr, char *buf)
|
||||
{
|
||||
struct pci_dev *pdev;
|
||||
struct device_node *np;
|
||||
|
||||
pdev = to_pci_dev (dev);
|
||||
np = pci_device_to_OF_node(pdev);
|
||||
if (np == NULL || np->full_name == NULL)
|
||||
return 0;
|
||||
return sprintf(buf, "%s", np->full_name);
|
||||
}
|
||||
static DEVICE_ATTR(devspec, S_IRUGO, pci_show_devspec, NULL);
|
||||
|
||||
void pcibios_add_platform_entries(struct pci_dev *pdev)
|
||||
{
|
||||
device_create_file(&pdev->dev, &dev_attr_devspec);
|
||||
}
|
||||
|
||||
void __devinit pci_process_bridge_OF_ranges(struct pci_controller *hose,
|
||||
struct device_node *dev, int prim)
|
||||
{
|
||||
|
|
@ -1167,105 +957,6 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
|
|||
}
|
||||
EXPORT_SYMBOL(pcibios_fixup_bus);
|
||||
|
||||
/*
|
||||
* Reads the interrupt pin to determine if interrupt is use by card.
|
||||
* If the interrupt is used, then gets the interrupt line from the
|
||||
* openfirmware and sets it in the pci_dev and pci_config line.
|
||||
*/
|
||||
int pci_read_irq_line(struct pci_dev *pci_dev)
|
||||
{
|
||||
struct of_irq oirq;
|
||||
unsigned int virq;
|
||||
|
||||
DBG("Try to map irq for %s...\n", pci_name(pci_dev));
|
||||
|
||||
#ifdef DEBUG
|
||||
memset(&oirq, 0xff, sizeof(oirq));
|
||||
#endif
|
||||
/* Try to get a mapping from the device-tree */
|
||||
if (of_irq_map_pci(pci_dev, &oirq)) {
|
||||
u8 line, pin;
|
||||
|
||||
/* If that fails, lets fallback to what is in the config
|
||||
* space and map that through the default controller. We
|
||||
* also set the type to level low since that's what PCI
|
||||
* interrupts are. If your platform does differently, then
|
||||
* either provide a proper interrupt tree or don't use this
|
||||
* function.
|
||||
*/
|
||||
if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_PIN, &pin))
|
||||
return -1;
|
||||
if (pin == 0)
|
||||
return -1;
|
||||
if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_LINE, &line) ||
|
||||
line == 0xff) {
|
||||
return -1;
|
||||
}
|
||||
DBG(" -> no map ! Using irq line %d from PCI config\n", line);
|
||||
|
||||
virq = irq_create_mapping(NULL, line);
|
||||
if (virq != NO_IRQ)
|
||||
set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
|
||||
} else {
|
||||
DBG(" -> got one, spec %d cells (0x%08x 0x%08x...) on %s\n",
|
||||
oirq.size, oirq.specifier[0], oirq.specifier[1],
|
||||
oirq.controller->full_name);
|
||||
|
||||
virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
|
||||
oirq.size);
|
||||
}
|
||||
if(virq == NO_IRQ) {
|
||||
DBG(" -> failed to map !\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
DBG(" -> mapped to linux irq %d\n", virq);
|
||||
|
||||
pci_dev->irq = virq;
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(pci_read_irq_line);
|
||||
|
||||
void pci_resource_to_user(const struct pci_dev *dev, int bar,
|
||||
const struct resource *rsrc,
|
||||
resource_size_t *start, resource_size_t *end)
|
||||
{
|
||||
struct pci_controller *hose = pci_bus_to_host(dev->bus);
|
||||
resource_size_t offset = 0;
|
||||
|
||||
if (hose == NULL)
|
||||
return;
|
||||
|
||||
if (rsrc->flags & IORESOURCE_IO)
|
||||
offset = (unsigned long)hose->io_base_virt - _IO_BASE;
|
||||
|
||||
/* We pass a fully fixed up address to userland for MMIO instead of
|
||||
* a BAR value because X is lame and expects to be able to use that
|
||||
* to pass to /dev/mem !
|
||||
*
|
||||
* That means that we'll have potentially 64 bits values where some
|
||||
* userland apps only expect 32 (like X itself since it thinks only
|
||||
* Sparc has 64 bits MMIO) but if we don't do that, we break it on
|
||||
* 32 bits CHRPs :-(
|
||||
*
|
||||
* Hopefully, the sysfs insterface is immune to that gunk. Once X
|
||||
* has been fixed (and the fix spread enough), we can re-enable the
|
||||
* 2 lines below and pass down a BAR value to userland. In that case
|
||||
* we'll also have to re-enable the matching code in
|
||||
* __pci_mmap_make_offset().
|
||||
*
|
||||
* BenH.
|
||||
*/
|
||||
#if 0
|
||||
else if (rsrc->flags & IORESOURCE_MEM)
|
||||
offset = hose->pci_mem_offset;
|
||||
#endif
|
||||
|
||||
*start = rsrc->start - offset;
|
||||
*end = rsrc->end - offset;
|
||||
}
|
||||
|
||||
struct pci_controller* pci_find_hose_for_OF_device(struct device_node* node)
|
||||
{
|
||||
if (!have_of)
|
||||
|
|
|
|||
Loading…
Reference in New Issue