Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next into for-davem
Conflicts: drivers/net/wireless/b43/dma.c drivers/net/wireless/brcm80211/brcmfmac/dhd_linux.c
This commit is contained in:
commit
57adc1fcba
|
@ -101,6 +101,7 @@ static struct usb_device_id btusb_table[] = {
|
|||
{ USB_DEVICE(0x0c10, 0x0000) },
|
||||
|
||||
/* Broadcom BCM20702A0 */
|
||||
{ USB_DEVICE(0x0a5c, 0x21e3) },
|
||||
{ USB_DEVICE(0x413c, 0x8197) },
|
||||
|
||||
{ } /* Terminating entry */
|
||||
|
@ -508,15 +509,10 @@ static int btusb_submit_isoc_urb(struct hci_dev *hdev, gfp_t mem_flags)
|
|||
|
||||
pipe = usb_rcvisocpipe(data->udev, data->isoc_rx_ep->bEndpointAddress);
|
||||
|
||||
urb->dev = data->udev;
|
||||
urb->pipe = pipe;
|
||||
urb->context = hdev;
|
||||
urb->complete = btusb_isoc_complete;
|
||||
urb->interval = data->isoc_rx_ep->bInterval;
|
||||
usb_fill_int_urb(urb, data->udev, pipe, buf, size, btusb_isoc_complete,
|
||||
hdev, data->isoc_rx_ep->bInterval);
|
||||
|
||||
urb->transfer_flags = URB_FREE_BUFFER | URB_ISO_ASAP;
|
||||
urb->transfer_buffer = buf;
|
||||
urb->transfer_buffer_length = size;
|
||||
|
||||
__fill_isoc_descriptor(urb, size,
|
||||
le16_to_cpu(data->isoc_rx_ep->wMaxPacketSize));
|
||||
|
|
|
@ -11,3 +11,4 @@ ath-objs := main.o \
|
|||
key.o
|
||||
|
||||
ath-$(CONFIG_ATH_DEBUG) += debug.o
|
||||
ccflags-y += -D__CHECK_ENDIAN__
|
||||
|
|
|
@ -255,7 +255,7 @@ enum ATH_DEBUG {
|
|||
|
||||
#define ath_dbg(common, dbg_mask, fmt, ...) \
|
||||
do { \
|
||||
if ((common)->debug_mask & dbg_mask) \
|
||||
if ((common)->debug_mask & ATH_DBG_##dbg_mask) \
|
||||
_ath_printk(KERN_DEBUG, common, fmt, ##__VA_ARGS__); \
|
||||
} while (0)
|
||||
|
||||
|
@ -265,10 +265,13 @@ do { \
|
|||
#else
|
||||
|
||||
static inline __attribute__ ((format (printf, 3, 4)))
|
||||
void ath_dbg(struct ath_common *common, enum ATH_DEBUG dbg_mask,
|
||||
void _ath_dbg(struct ath_common *common, enum ATH_DEBUG dbg_mask,
|
||||
const char *fmt, ...)
|
||||
{
|
||||
}
|
||||
#define ath_dbg(common, dbg_mask, fmt, ...) \
|
||||
_ath_dbg(common, ATH_DBG_##dbg_mask, fmt, ##__VA_ARGS__)
|
||||
|
||||
#define ATH_DBG_WARN(foo, arg...) do {} while (0)
|
||||
#define ATH_DBG_WARN_ON_ONCE(foo) ({ \
|
||||
int __ret_warn_once = !!(foo); \
|
||||
|
|
|
@ -1,12 +1,29 @@
|
|||
config ATH6KL
|
||||
tristate "Atheros ath6kl support"
|
||||
tristate "Atheros mobile chipsets support"
|
||||
|
||||
config ATH6KL_SDIO
|
||||
tristate "Atheros ath6kl SDIO support"
|
||||
depends on ATH6KL
|
||||
depends on MMC
|
||||
depends on CFG80211
|
||||
---help---
|
||||
This module adds support for wireless adapters based on
|
||||
Atheros AR6003 chipset running over SDIO. If you choose to
|
||||
build it as a module, it will be called ath6kl. Pls note
|
||||
that AR6002 and AR6001 are not supported by this driver.
|
||||
Atheros AR6003 and AR6004 chipsets running over SDIO. If you
|
||||
choose to build it as a module, it will be called ath6kl_sdio.
|
||||
Please note that AR6002 and AR6001 are not supported by this
|
||||
driver.
|
||||
|
||||
config ATH6KL_USB
|
||||
tristate "Atheros ath6kl USB support"
|
||||
depends on ATH6KL
|
||||
depends on USB
|
||||
depends on CFG80211
|
||||
depends on EXPERIMENTAL
|
||||
---help---
|
||||
This module adds support for wireless adapters based on
|
||||
Atheros AR6004 chipset running over USB. This is still under
|
||||
implementation and it isn't functional. If you choose to
|
||||
build it as a module, it will be called ath6kl_usb.
|
||||
|
||||
config ATH6KL_DEBUG
|
||||
bool "Atheros ath6kl debugging"
|
||||
|
|
|
@ -21,17 +21,30 @@
|
|||
# Author(s): ="Atheros"
|
||||
#------------------------------------------------------------------------------
|
||||
|
||||
obj-$(CONFIG_ATH6KL) := ath6kl.o
|
||||
ath6kl-y += debug.o
|
||||
ath6kl-y += hif.o
|
||||
ath6kl-y += htc.o
|
||||
ath6kl-y += bmi.o
|
||||
ath6kl-y += cfg80211.o
|
||||
ath6kl-y += init.o
|
||||
ath6kl-y += main.o
|
||||
ath6kl-y += txrx.o
|
||||
ath6kl-y += wmi.o
|
||||
ath6kl-y += sdio.o
|
||||
ath6kl-$(CONFIG_NL80211_TESTMODE) += testmode.o
|
||||
obj-$(CONFIG_ATH6KL_SDIO) := ath6kl_sdio.o
|
||||
ath6kl_sdio-y += debug.o
|
||||
ath6kl_sdio-y += hif.o
|
||||
ath6kl_sdio-y += htc.o
|
||||
ath6kl_sdio-y += bmi.o
|
||||
ath6kl_sdio-y += cfg80211.o
|
||||
ath6kl_sdio-y += init.o
|
||||
ath6kl_sdio-y += main.o
|
||||
ath6kl_sdio-y += txrx.o
|
||||
ath6kl_sdio-y += wmi.o
|
||||
ath6kl_sdio-y += sdio.o
|
||||
ath6kl_sdio-$(CONFIG_NL80211_TESTMODE) += testmode.o
|
||||
|
||||
obj-$(CONFIG_ATH6KL_USB) += ath6kl_usb.o
|
||||
ath6kl_usb-y += debug.o
|
||||
ath6kl_usb-y += hif.o
|
||||
ath6kl_usb-y += htc.o
|
||||
ath6kl_usb-y += bmi.o
|
||||
ath6kl_usb-y += cfg80211.o
|
||||
ath6kl_usb-y += init.o
|
||||
ath6kl_usb-y += main.o
|
||||
ath6kl_usb-y += txrx.o
|
||||
ath6kl_usb-y += wmi.o
|
||||
ath6kl_usb-y += usb.o
|
||||
ath6kl_usb-$(CONFIG_NL80211_TESTMODE) += testmode.o
|
||||
|
||||
ccflags-y += -D__CHECK_ENDIAN__
|
||||
|
|
|
@ -19,165 +19,6 @@
|
|||
#include "target.h"
|
||||
#include "debug.h"
|
||||
|
||||
static int ath6kl_get_bmi_cmd_credits(struct ath6kl *ar)
|
||||
{
|
||||
u32 addr;
|
||||
unsigned long timeout;
|
||||
int ret;
|
||||
|
||||
ar->bmi.cmd_credits = 0;
|
||||
|
||||
/* Read the counter register to get the command credits */
|
||||
addr = COUNT_DEC_ADDRESS + (HTC_MAILBOX_NUM_MAX + ENDPOINT1) * 4;
|
||||
|
||||
timeout = jiffies + msecs_to_jiffies(BMI_COMMUNICATION_TIMEOUT);
|
||||
while (time_before(jiffies, timeout) && !ar->bmi.cmd_credits) {
|
||||
|
||||
/*
|
||||
* Hit the credit counter with a 4-byte access, the first byte
|
||||
* read will hit the counter and cause a decrement, while the
|
||||
* remaining 3 bytes has no effect. The rationale behind this
|
||||
* is to make all HIF accesses 4-byte aligned.
|
||||
*/
|
||||
ret = hif_read_write_sync(ar, addr,
|
||||
(u8 *)&ar->bmi.cmd_credits, 4,
|
||||
HIF_RD_SYNC_BYTE_INC);
|
||||
if (ret) {
|
||||
ath6kl_err("Unable to decrement the command credit count register: %d\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* The counter is only 8 bits.
|
||||
* Ignore anything in the upper 3 bytes
|
||||
*/
|
||||
ar->bmi.cmd_credits &= 0xFF;
|
||||
}
|
||||
|
||||
if (!ar->bmi.cmd_credits) {
|
||||
ath6kl_err("bmi communication timeout\n");
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ath6kl_bmi_get_rx_lkahd(struct ath6kl *ar)
|
||||
{
|
||||
unsigned long timeout;
|
||||
u32 rx_word = 0;
|
||||
int ret = 0;
|
||||
|
||||
timeout = jiffies + msecs_to_jiffies(BMI_COMMUNICATION_TIMEOUT);
|
||||
while (time_before(jiffies, timeout) && !rx_word) {
|
||||
ret = hif_read_write_sync(ar, RX_LOOKAHEAD_VALID_ADDRESS,
|
||||
(u8 *)&rx_word, sizeof(rx_word),
|
||||
HIF_RD_SYNC_BYTE_INC);
|
||||
if (ret) {
|
||||
ath6kl_err("unable to read RX_LOOKAHEAD_VALID\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* all we really want is one bit */
|
||||
rx_word &= (1 << ENDPOINT1);
|
||||
}
|
||||
|
||||
if (!rx_word) {
|
||||
ath6kl_err("bmi_recv_buf FIFO empty\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ath6kl_bmi_send_buf(struct ath6kl *ar, u8 *buf, u32 len)
|
||||
{
|
||||
int ret;
|
||||
u32 addr;
|
||||
|
||||
ret = ath6kl_get_bmi_cmd_credits(ar);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
addr = ar->mbox_info.htc_addr;
|
||||
|
||||
ret = hif_read_write_sync(ar, addr, buf, len,
|
||||
HIF_WR_SYNC_BYTE_INC);
|
||||
if (ret)
|
||||
ath6kl_err("unable to send the bmi data to the device\n");
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ath6kl_bmi_recv_buf(struct ath6kl *ar, u8 *buf, u32 len)
|
||||
{
|
||||
int ret;
|
||||
u32 addr;
|
||||
|
||||
/*
|
||||
* During normal bootup, small reads may be required.
|
||||
* Rather than issue an HIF Read and then wait as the Target
|
||||
* adds successive bytes to the FIFO, we wait here until
|
||||
* we know that response data is available.
|
||||
*
|
||||
* This allows us to cleanly timeout on an unexpected
|
||||
* Target failure rather than risk problems at the HIF level.
|
||||
* In particular, this avoids SDIO timeouts and possibly garbage
|
||||
* data on some host controllers. And on an interconnect
|
||||
* such as Compact Flash (as well as some SDIO masters) which
|
||||
* does not provide any indication on data timeout, it avoids
|
||||
* a potential hang or garbage response.
|
||||
*
|
||||
* Synchronization is more difficult for reads larger than the
|
||||
* size of the MBOX FIFO (128B), because the Target is unable
|
||||
* to push the 129th byte of data until AFTER the Host posts an
|
||||
* HIF Read and removes some FIFO data. So for large reads the
|
||||
* Host proceeds to post an HIF Read BEFORE all the data is
|
||||
* actually available to read. Fortunately, large BMI reads do
|
||||
* not occur in practice -- they're supported for debug/development.
|
||||
*
|
||||
* So Host/Target BMI synchronization is divided into these cases:
|
||||
* CASE 1: length < 4
|
||||
* Should not happen
|
||||
*
|
||||
* CASE 2: 4 <= length <= 128
|
||||
* Wait for first 4 bytes to be in FIFO
|
||||
* If CONSERVATIVE_BMI_READ is enabled, also wait for
|
||||
* a BMI command credit, which indicates that the ENTIRE
|
||||
* response is available in the the FIFO
|
||||
*
|
||||
* CASE 3: length > 128
|
||||
* Wait for the first 4 bytes to be in FIFO
|
||||
*
|
||||
* For most uses, a small timeout should be sufficient and we will
|
||||
* usually see a response quickly; but there may be some unusual
|
||||
* (debug) cases of BMI_EXECUTE where we want an larger timeout.
|
||||
* For now, we use an unbounded busy loop while waiting for
|
||||
* BMI_EXECUTE.
|
||||
*
|
||||
* If BMI_EXECUTE ever needs to support longer-latency execution,
|
||||
* especially in production, this code needs to be enhanced to sleep
|
||||
* and yield. Also note that BMI_COMMUNICATION_TIMEOUT is currently
|
||||
* a function of Host processor speed.
|
||||
*/
|
||||
if (len >= 4) { /* NB: Currently, always true */
|
||||
ret = ath6kl_bmi_get_rx_lkahd(ar);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
addr = ar->mbox_info.htc_addr;
|
||||
ret = hif_read_write_sync(ar, addr, buf, len,
|
||||
HIF_RD_SYNC_BYTE_INC);
|
||||
if (ret) {
|
||||
ath6kl_err("Unable to read the bmi data from the device: %d\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ath6kl_bmi_done(struct ath6kl *ar)
|
||||
{
|
||||
int ret;
|
||||
|
@ -190,7 +31,7 @@ int ath6kl_bmi_done(struct ath6kl *ar)
|
|||
|
||||
ar->bmi.done_sent = true;
|
||||
|
||||
ret = ath6kl_bmi_send_buf(ar, (u8 *)&cid, sizeof(cid));
|
||||
ret = ath6kl_hif_bmi_write(ar, (u8 *)&cid, sizeof(cid));
|
||||
if (ret) {
|
||||
ath6kl_err("Unable to send bmi done: %d\n", ret);
|
||||
return ret;
|
||||
|
@ -210,14 +51,20 @@ int ath6kl_bmi_get_target_info(struct ath6kl *ar,
|
|||
return -EACCES;
|
||||
}
|
||||
|
||||
ret = ath6kl_bmi_send_buf(ar, (u8 *)&cid, sizeof(cid));
|
||||
ret = ath6kl_hif_bmi_write(ar, (u8 *)&cid, sizeof(cid));
|
||||
if (ret) {
|
||||
ath6kl_err("Unable to send get target info: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = ath6kl_bmi_recv_buf(ar, (u8 *)&targ_info->version,
|
||||
if (ar->hif_type == ATH6KL_HIF_TYPE_USB) {
|
||||
ret = ath6kl_hif_bmi_read(ar, (u8 *)targ_info,
|
||||
sizeof(*targ_info));
|
||||
} else {
|
||||
ret = ath6kl_hif_bmi_read(ar, (u8 *)&targ_info->version,
|
||||
sizeof(targ_info->version));
|
||||
}
|
||||
|
||||
if (ret) {
|
||||
ath6kl_err("Unable to recv target info: %d\n", ret);
|
||||
return ret;
|
||||
|
@ -225,7 +72,7 @@ int ath6kl_bmi_get_target_info(struct ath6kl *ar,
|
|||
|
||||
if (le32_to_cpu(targ_info->version) == TARGET_VERSION_SENTINAL) {
|
||||
/* Determine how many bytes are in the Target's targ_info */
|
||||
ret = ath6kl_bmi_recv_buf(ar,
|
||||
ret = ath6kl_hif_bmi_read(ar,
|
||||
(u8 *)&targ_info->byte_count,
|
||||
sizeof(targ_info->byte_count));
|
||||
if (ret) {
|
||||
|
@ -244,7 +91,7 @@ int ath6kl_bmi_get_target_info(struct ath6kl *ar,
|
|||
}
|
||||
|
||||
/* Read the remainder of the targ_info */
|
||||
ret = ath6kl_bmi_recv_buf(ar,
|
||||
ret = ath6kl_hif_bmi_read(ar,
|
||||
((u8 *)targ_info) +
|
||||
sizeof(targ_info->byte_count),
|
||||
sizeof(*targ_info) -
|
||||
|
@ -276,8 +123,8 @@ int ath6kl_bmi_read(struct ath6kl *ar, u32 addr, u8 *buf, u32 len)
|
|||
return -EACCES;
|
||||
}
|
||||
|
||||
size = BMI_DATASZ_MAX + sizeof(cid) + sizeof(addr) + sizeof(len);
|
||||
if (size > MAX_BMI_CMDBUF_SZ) {
|
||||
size = ar->bmi.max_data_size + sizeof(cid) + sizeof(addr) + sizeof(len);
|
||||
if (size > ar->bmi.max_cmd_size) {
|
||||
WARN_ON(1);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
@ -290,8 +137,8 @@ int ath6kl_bmi_read(struct ath6kl *ar, u32 addr, u8 *buf, u32 len)
|
|||
len_remain = len;
|
||||
|
||||
while (len_remain) {
|
||||
rx_len = (len_remain < BMI_DATASZ_MAX) ?
|
||||
len_remain : BMI_DATASZ_MAX;
|
||||
rx_len = (len_remain < ar->bmi.max_data_size) ?
|
||||
len_remain : ar->bmi.max_data_size;
|
||||
offset = 0;
|
||||
memcpy(&(ar->bmi.cmd_buf[offset]), &cid, sizeof(cid));
|
||||
offset += sizeof(cid);
|
||||
|
@ -300,13 +147,13 @@ int ath6kl_bmi_read(struct ath6kl *ar, u32 addr, u8 *buf, u32 len)
|
|||
memcpy(&(ar->bmi.cmd_buf[offset]), &rx_len, sizeof(rx_len));
|
||||
offset += sizeof(len);
|
||||
|
||||
ret = ath6kl_bmi_send_buf(ar, ar->bmi.cmd_buf, offset);
|
||||
ret = ath6kl_hif_bmi_write(ar, ar->bmi.cmd_buf, offset);
|
||||
if (ret) {
|
||||
ath6kl_err("Unable to write to the device: %d\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
ret = ath6kl_bmi_recv_buf(ar, ar->bmi.cmd_buf, rx_len);
|
||||
ret = ath6kl_hif_bmi_read(ar, ar->bmi.cmd_buf, rx_len);
|
||||
if (ret) {
|
||||
ath6kl_err("Unable to read from the device: %d\n",
|
||||
ret);
|
||||
|
@ -326,7 +173,7 @@ int ath6kl_bmi_write(struct ath6kl *ar, u32 addr, u8 *buf, u32 len)
|
|||
u32 offset;
|
||||
u32 len_remain, tx_len;
|
||||
const u32 header = sizeof(cid) + sizeof(addr) + sizeof(len);
|
||||
u8 aligned_buf[BMI_DATASZ_MAX];
|
||||
u8 aligned_buf[400];
|
||||
u8 *src;
|
||||
|
||||
if (ar->bmi.done_sent) {
|
||||
|
@ -334,12 +181,15 @@ int ath6kl_bmi_write(struct ath6kl *ar, u32 addr, u8 *buf, u32 len)
|
|||
return -EACCES;
|
||||
}
|
||||
|
||||
if ((BMI_DATASZ_MAX + header) > MAX_BMI_CMDBUF_SZ) {
|
||||
if ((ar->bmi.max_data_size + header) > ar->bmi.max_cmd_size) {
|
||||
WARN_ON(1);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
memset(ar->bmi.cmd_buf, 0, BMI_DATASZ_MAX + header);
|
||||
if (WARN_ON(ar->bmi.max_data_size > sizeof(aligned_buf)))
|
||||
return -E2BIG;
|
||||
|
||||
memset(ar->bmi.cmd_buf, 0, ar->bmi.max_data_size + header);
|
||||
|
||||
ath6kl_dbg(ATH6KL_DBG_BMI,
|
||||
"bmi write memory: addr: 0x%x, len: %d\n", addr, len);
|
||||
|
@ -348,7 +198,7 @@ int ath6kl_bmi_write(struct ath6kl *ar, u32 addr, u8 *buf, u32 len)
|
|||
while (len_remain) {
|
||||
src = &buf[len - len_remain];
|
||||
|
||||
if (len_remain < (BMI_DATASZ_MAX - header)) {
|
||||
if (len_remain < (ar->bmi.max_data_size - header)) {
|
||||
if (len_remain & 3) {
|
||||
/* align it with 4 bytes */
|
||||
len_remain = len_remain +
|
||||
|
@ -358,7 +208,7 @@ int ath6kl_bmi_write(struct ath6kl *ar, u32 addr, u8 *buf, u32 len)
|
|||
}
|
||||
tx_len = len_remain;
|
||||
} else {
|
||||
tx_len = (BMI_DATASZ_MAX - header);
|
||||
tx_len = (ar->bmi.max_data_size - header);
|
||||
}
|
||||
|
||||
offset = 0;
|
||||
|
@ -371,7 +221,7 @@ int ath6kl_bmi_write(struct ath6kl *ar, u32 addr, u8 *buf, u32 len)
|
|||
memcpy(&(ar->bmi.cmd_buf[offset]), src, tx_len);
|
||||
offset += tx_len;
|
||||
|
||||
ret = ath6kl_bmi_send_buf(ar, ar->bmi.cmd_buf, offset);
|
||||
ret = ath6kl_hif_bmi_write(ar, ar->bmi.cmd_buf, offset);
|
||||
if (ret) {
|
||||
ath6kl_err("Unable to write to the device: %d\n",
|
||||
ret);
|
||||
|
@ -396,7 +246,7 @@ int ath6kl_bmi_execute(struct ath6kl *ar, u32 addr, u32 *param)
|
|||
}
|
||||
|
||||
size = sizeof(cid) + sizeof(addr) + sizeof(param);
|
||||
if (size > MAX_BMI_CMDBUF_SZ) {
|
||||
if (size > ar->bmi.max_cmd_size) {
|
||||
WARN_ON(1);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
@ -413,13 +263,13 @@ int ath6kl_bmi_execute(struct ath6kl *ar, u32 addr, u32 *param)
|
|||
memcpy(&(ar->bmi.cmd_buf[offset]), param, sizeof(*param));
|
||||
offset += sizeof(*param);
|
||||
|
||||
ret = ath6kl_bmi_send_buf(ar, ar->bmi.cmd_buf, offset);
|
||||
ret = ath6kl_hif_bmi_write(ar, ar->bmi.cmd_buf, offset);
|
||||
if (ret) {
|
||||
ath6kl_err("Unable to write to the device: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = ath6kl_bmi_recv_buf(ar, ar->bmi.cmd_buf, sizeof(*param));
|
||||
ret = ath6kl_hif_bmi_read(ar, ar->bmi.cmd_buf, sizeof(*param));
|
||||
if (ret) {
|
||||
ath6kl_err("Unable to read from the device: %d\n", ret);
|
||||
return ret;
|
||||
|
@ -443,7 +293,7 @@ int ath6kl_bmi_set_app_start(struct ath6kl *ar, u32 addr)
|
|||
}
|
||||
|
||||
size = sizeof(cid) + sizeof(addr);
|
||||
if (size > MAX_BMI_CMDBUF_SZ) {
|
||||
if (size > ar->bmi.max_cmd_size) {
|
||||
WARN_ON(1);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
@ -457,7 +307,7 @@ int ath6kl_bmi_set_app_start(struct ath6kl *ar, u32 addr)
|
|||
memcpy(&(ar->bmi.cmd_buf[offset]), &addr, sizeof(addr));
|
||||
offset += sizeof(addr);
|
||||
|
||||
ret = ath6kl_bmi_send_buf(ar, ar->bmi.cmd_buf, offset);
|
||||
ret = ath6kl_hif_bmi_write(ar, ar->bmi.cmd_buf, offset);
|
||||
if (ret) {
|
||||
ath6kl_err("Unable to write to the device: %d\n", ret);
|
||||
return ret;
|
||||
|
@ -479,7 +329,7 @@ int ath6kl_bmi_reg_read(struct ath6kl *ar, u32 addr, u32 *param)
|
|||
}
|
||||
|
||||
size = sizeof(cid) + sizeof(addr);
|
||||
if (size > MAX_BMI_CMDBUF_SZ) {
|
||||
if (size > ar->bmi.max_cmd_size) {
|
||||
WARN_ON(1);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
@ -493,13 +343,13 @@ int ath6kl_bmi_reg_read(struct ath6kl *ar, u32 addr, u32 *param)
|
|||
memcpy(&(ar->bmi.cmd_buf[offset]), &addr, sizeof(addr));
|
||||
offset += sizeof(addr);
|
||||
|
||||
ret = ath6kl_bmi_send_buf(ar, ar->bmi.cmd_buf, offset);
|
||||
ret = ath6kl_hif_bmi_write(ar, ar->bmi.cmd_buf, offset);
|
||||
if (ret) {
|
||||
ath6kl_err("Unable to write to the device: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = ath6kl_bmi_recv_buf(ar, ar->bmi.cmd_buf, sizeof(*param));
|
||||
ret = ath6kl_hif_bmi_read(ar, ar->bmi.cmd_buf, sizeof(*param));
|
||||
if (ret) {
|
||||
ath6kl_err("Unable to read from the device: %d\n", ret);
|
||||
return ret;
|
||||
|
@ -522,7 +372,7 @@ int ath6kl_bmi_reg_write(struct ath6kl *ar, u32 addr, u32 param)
|
|||
}
|
||||
|
||||
size = sizeof(cid) + sizeof(addr) + sizeof(param);
|
||||
if (size > MAX_BMI_CMDBUF_SZ) {
|
||||
if (size > ar->bmi.max_cmd_size) {
|
||||
WARN_ON(1);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
@ -540,7 +390,7 @@ int ath6kl_bmi_reg_write(struct ath6kl *ar, u32 addr, u32 param)
|
|||
memcpy(&(ar->bmi.cmd_buf[offset]), ¶m, sizeof(param));
|
||||
offset += sizeof(param);
|
||||
|
||||
ret = ath6kl_bmi_send_buf(ar, ar->bmi.cmd_buf, offset);
|
||||
ret = ath6kl_hif_bmi_write(ar, ar->bmi.cmd_buf, offset);
|
||||
if (ret) {
|
||||
ath6kl_err("Unable to write to the device: %d\n", ret);
|
||||
return ret;
|
||||
|
@ -563,8 +413,8 @@ int ath6kl_bmi_lz_data(struct ath6kl *ar, u8 *buf, u32 len)
|
|||
return -EACCES;
|
||||
}
|
||||
|
||||
size = BMI_DATASZ_MAX + header;
|
||||
if (size > MAX_BMI_CMDBUF_SZ) {
|
||||
size = ar->bmi.max_data_size + header;
|
||||
if (size > ar->bmi.max_cmd_size) {
|
||||
WARN_ON(1);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
@ -575,8 +425,8 @@ int ath6kl_bmi_lz_data(struct ath6kl *ar, u8 *buf, u32 len)
|
|||
|
||||
len_remain = len;
|
||||
while (len_remain) {
|
||||
tx_len = (len_remain < (BMI_DATASZ_MAX - header)) ?
|
||||
len_remain : (BMI_DATASZ_MAX - header);
|
||||
tx_len = (len_remain < (ar->bmi.max_data_size - header)) ?
|
||||
len_remain : (ar->bmi.max_data_size - header);
|
||||
|
||||
offset = 0;
|
||||
memcpy(&(ar->bmi.cmd_buf[offset]), &cid, sizeof(cid));
|
||||
|
@ -587,7 +437,7 @@ int ath6kl_bmi_lz_data(struct ath6kl *ar, u8 *buf, u32 len)
|
|||
tx_len);
|
||||
offset += tx_len;
|
||||
|
||||
ret = ath6kl_bmi_send_buf(ar, ar->bmi.cmd_buf, offset);
|
||||
ret = ath6kl_hif_bmi_write(ar, ar->bmi.cmd_buf, offset);
|
||||
if (ret) {
|
||||
ath6kl_err("Unable to write to the device: %d\n",
|
||||
ret);
|
||||
|
@ -613,7 +463,7 @@ int ath6kl_bmi_lz_stream_start(struct ath6kl *ar, u32 addr)
|
|||
}
|
||||
|
||||
size = sizeof(cid) + sizeof(addr);
|
||||
if (size > MAX_BMI_CMDBUF_SZ) {
|
||||
if (size > ar->bmi.max_cmd_size) {
|
||||
WARN_ON(1);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
@ -629,7 +479,7 @@ int ath6kl_bmi_lz_stream_start(struct ath6kl *ar, u32 addr)
|
|||
memcpy(&(ar->bmi.cmd_buf[offset]), &addr, sizeof(addr));
|
||||
offset += sizeof(addr);
|
||||
|
||||
ret = ath6kl_bmi_send_buf(ar, ar->bmi.cmd_buf, offset);
|
||||
ret = ath6kl_hif_bmi_write(ar, ar->bmi.cmd_buf, offset);
|
||||
if (ret) {
|
||||
ath6kl_err("Unable to start LZ stream to the device: %d\n",
|
||||
ret);
|
||||
|
@ -677,8 +527,13 @@ void ath6kl_bmi_reset(struct ath6kl *ar)
|
|||
|
||||
int ath6kl_bmi_init(struct ath6kl *ar)
|
||||
{
|
||||
ar->bmi.cmd_buf = kzalloc(MAX_BMI_CMDBUF_SZ, GFP_ATOMIC);
|
||||
if (WARN_ON(ar->bmi.max_data_size == 0))
|
||||
return -EINVAL;
|
||||
|
||||
/* cmd + addr + len + data_size */
|
||||
ar->bmi.max_cmd_size = ar->bmi.max_data_size + (sizeof(u32) * 3);
|
||||
|
||||
ar->bmi.cmd_buf = kzalloc(ar->bmi.max_cmd_size, GFP_ATOMIC);
|
||||
if (!ar->bmi.cmd_buf)
|
||||
return -ENOMEM;
|
||||
|
||||
|
|
|
@ -44,12 +44,6 @@
|
|||
* BMI handles all required Target-side cache flushing.
|
||||
*/
|
||||
|
||||
#define MAX_BMI_CMDBUF_SZ (BMI_DATASZ_MAX + \
|
||||
(sizeof(u32) * 3 /* cmd + addr + len */))
|
||||
|
||||
/* Maximum data size used for BMI transfers */
|
||||
#define BMI_DATASZ_MAX 256
|
||||
|
||||
/* BMI Commands */
|
||||
|
||||
#define BMI_NO_COMMAND 0
|
||||
|
|
|
@ -23,10 +23,8 @@
|
|||
#include "testmode.h"
|
||||
|
||||
static unsigned int ath6kl_p2p;
|
||||
static unsigned int multi_norm_if_support;
|
||||
|
||||
module_param(ath6kl_p2p, uint, 0644);
|
||||
module_param(multi_norm_if_support, uint, 0644);
|
||||
|
||||
#define RATETAB_ENT(_rate, _rateid, _flags) { \
|
||||
.bitrate = (_rate), \
|
||||
|
@ -127,6 +125,37 @@ static struct ieee80211_supported_band ath6kl_band_5ghz = {
|
|||
|
||||
#define CCKM_KRK_CIPHER_SUITE 0x004096ff /* use for KRK */
|
||||
|
||||
/* returns true if scheduled scan was stopped */
|
||||
static bool __ath6kl_cfg80211_sscan_stop(struct ath6kl_vif *vif)
|
||||
{
|
||||
struct ath6kl *ar = vif->ar;
|
||||
|
||||
if (ar->state != ATH6KL_STATE_SCHED_SCAN)
|
||||
return false;
|
||||
|
||||
del_timer_sync(&vif->sched_scan_timer);
|
||||
|
||||
ath6kl_wmi_set_host_sleep_mode_cmd(ar->wmi, vif->fw_vif_idx,
|
||||
ATH6KL_HOST_MODE_AWAKE);
|
||||
|
||||
ar->state = ATH6KL_STATE_ON;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
static void ath6kl_cfg80211_sscan_disable(struct ath6kl_vif *vif)
|
||||
{
|
||||
struct ath6kl *ar = vif->ar;
|
||||
bool stopped;
|
||||
|
||||
stopped = __ath6kl_cfg80211_sscan_stop(vif);
|
||||
|
||||
if (!stopped)
|
||||
return;
|
||||
|
||||
cfg80211_sched_scan_stopped(ar->wiphy);
|
||||
}
|
||||
|
||||
static int ath6kl_set_wpa_version(struct ath6kl_vif *vif,
|
||||
enum nl80211_wpa_versions wpa_version)
|
||||
{
|
||||
|
@ -205,6 +234,10 @@ static int ath6kl_set_cipher(struct ath6kl_vif *vif, u32 cipher, bool ucast)
|
|||
*ar_cipher = AES_CRYPT;
|
||||
*ar_cipher_len = 0;
|
||||
break;
|
||||
case WLAN_CIPHER_SUITE_SMS4:
|
||||
*ar_cipher = WAPI_CRYPT;
|
||||
*ar_cipher_len = 0;
|
||||
break;
|
||||
default:
|
||||
ath6kl_err("cipher 0x%x not supported\n", cipher);
|
||||
return -ENOTSUPP;
|
||||
|
@ -355,7 +388,7 @@ static bool ath6kl_is_valid_iftype(struct ath6kl *ar, enum nl80211_iftype type,
|
|||
|
||||
if (type == NL80211_IFTYPE_STATION ||
|
||||
type == NL80211_IFTYPE_AP || type == NL80211_IFTYPE_ADHOC) {
|
||||
for (i = 0; i < MAX_NUM_VIF; i++) {
|
||||
for (i = 0; i < ar->vif_max; i++) {
|
||||
if ((ar->avail_idx_map >> i) & BIT(0)) {
|
||||
*if_idx = i;
|
||||
return true;
|
||||
|
@ -365,7 +398,7 @@ static bool ath6kl_is_valid_iftype(struct ath6kl *ar, enum nl80211_iftype type,
|
|||
|
||||
if (type == NL80211_IFTYPE_P2P_CLIENT ||
|
||||
type == NL80211_IFTYPE_P2P_GO) {
|
||||
for (i = ar->max_norm_iface; i < MAX_NUM_VIF; i++) {
|
||||
for (i = ar->max_norm_iface; i < ar->vif_max; i++) {
|
||||
if ((ar->avail_idx_map >> i) & BIT(0)) {
|
||||
*if_idx = i;
|
||||
return true;
|
||||
|
@ -382,6 +415,9 @@ static int ath6kl_cfg80211_connect(struct wiphy *wiphy, struct net_device *dev,
|
|||
struct ath6kl *ar = ath6kl_priv(dev);
|
||||
struct ath6kl_vif *vif = netdev_priv(dev);
|
||||
int status;
|
||||
u8 nw_subtype = (ar->p2p) ? SUBTYPE_P2PDEV : SUBTYPE_NONE;
|
||||
|
||||
ath6kl_cfg80211_sscan_disable(vif);
|
||||
|
||||
vif->sme_state = SME_CONNECTING;
|
||||
|
||||
|
@ -427,9 +463,12 @@ static int ath6kl_cfg80211_connect(struct wiphy *wiphy, struct net_device *dev,
|
|||
|
||||
if (sme->ie && (sme->ie_len > 0)) {
|
||||
status = ath6kl_set_assoc_req_ies(vif, sme->ie, sme->ie_len);
|
||||
if (status)
|
||||
if (status) {
|
||||
up(&ar->sem);
|
||||
return status;
|
||||
}
|
||||
} else
|
||||
ar->connect_ctrl_flags &= ~CONNECT_WPS_FLAG;
|
||||
|
||||
if (test_bit(CONNECTED, &vif->flags) &&
|
||||
vif->ssid_len == sme->ssid_len &&
|
||||
|
@ -519,6 +558,9 @@ static int ath6kl_cfg80211_connect(struct wiphy *wiphy, struct net_device *dev,
|
|||
|
||||
vif->nw_type = vif->next_mode;
|
||||
|
||||
if (vif->wdev.iftype == NL80211_IFTYPE_P2P_CLIENT)
|
||||
nw_subtype = SUBTYPE_P2PCLIENT;
|
||||
|
||||
ath6kl_dbg(ATH6KL_DBG_WLAN_CFG,
|
||||
"%s: connect called with authmode %d dot11 auth %d"
|
||||
" PW crypto %d PW crypto len %d GRP crypto %d"
|
||||
|
@ -536,7 +578,7 @@ static int ath6kl_cfg80211_connect(struct wiphy *wiphy, struct net_device *dev,
|
|||
vif->grp_crypto, vif->grp_crypto_len,
|
||||
vif->ssid_len, vif->ssid,
|
||||
vif->req_bssid, vif->ch_hint,
|
||||
ar->connect_ctrl_flags);
|
||||
ar->connect_ctrl_flags, nw_subtype);
|
||||
|
||||
up(&ar->sem);
|
||||
|
||||
|
@ -563,17 +605,28 @@ static int ath6kl_cfg80211_connect(struct wiphy *wiphy, struct net_device *dev,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int ath6kl_add_bss_if_needed(struct ath6kl_vif *vif, const u8 *bssid,
|
||||
static int ath6kl_add_bss_if_needed(struct ath6kl_vif *vif,
|
||||
enum network_type nw_type,
|
||||
const u8 *bssid,
|
||||
struct ieee80211_channel *chan,
|
||||
const u8 *beacon_ie, size_t beacon_ie_len)
|
||||
{
|
||||
struct ath6kl *ar = vif->ar;
|
||||
struct cfg80211_bss *bss;
|
||||
u16 cap_mask, cap_val;
|
||||
u8 *ie;
|
||||
|
||||
if (nw_type & ADHOC_NETWORK) {
|
||||
cap_mask = WLAN_CAPABILITY_IBSS;
|
||||
cap_val = WLAN_CAPABILITY_IBSS;
|
||||
} else {
|
||||
cap_mask = WLAN_CAPABILITY_ESS;
|
||||
cap_val = WLAN_CAPABILITY_ESS;
|
||||
}
|
||||
|
||||
bss = cfg80211_get_bss(ar->wiphy, chan, bssid,
|
||||
vif->ssid, vif->ssid_len, WLAN_CAPABILITY_ESS,
|
||||
WLAN_CAPABILITY_ESS);
|
||||
vif->ssid, vif->ssid_len,
|
||||
cap_mask, cap_val);
|
||||
if (bss == NULL) {
|
||||
/*
|
||||
* Since cfg80211 may not yet know about the BSS,
|
||||
|
@ -591,13 +644,12 @@ static int ath6kl_add_bss_if_needed(struct ath6kl_vif *vif, const u8 *bssid,
|
|||
memcpy(ie + 2, vif->ssid, vif->ssid_len);
|
||||
memcpy(ie + 2 + vif->ssid_len, beacon_ie, beacon_ie_len);
|
||||
bss = cfg80211_inform_bss(ar->wiphy, chan,
|
||||
bssid, 0, WLAN_CAPABILITY_ESS, 100,
|
||||
bssid, 0, cap_val, 100,
|
||||
ie, 2 + vif->ssid_len + beacon_ie_len,
|
||||
0, GFP_KERNEL);
|
||||
if (bss)
|
||||
ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "added dummy bss for "
|
||||
"%pM prior to indicating connect/roamed "
|
||||
"event\n", bssid);
|
||||
ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "added bss %pM to "
|
||||
"cfg80211\n", bssid);
|
||||
kfree(ie);
|
||||
} else
|
||||
ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "cfg80211 already has a bss "
|
||||
|
@ -660,16 +712,16 @@ void ath6kl_cfg80211_connect_event(struct ath6kl_vif *vif, u16 channel,
|
|||
|
||||
chan = ieee80211_get_channel(ar->wiphy, (int) channel);
|
||||
|
||||
|
||||
if (nw_type & ADHOC_NETWORK) {
|
||||
cfg80211_ibss_joined(vif->ndev, bssid, GFP_KERNEL);
|
||||
if (ath6kl_add_bss_if_needed(vif, nw_type, bssid, chan, assoc_info,
|
||||
beacon_ie_len) < 0) {
|
||||
ath6kl_err("could not add cfg80211 bss entry\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if (ath6kl_add_bss_if_needed(vif, bssid, chan, assoc_info,
|
||||
beacon_ie_len) < 0) {
|
||||
ath6kl_err("could not add cfg80211 bss entry for "
|
||||
"connect/roamed notification\n");
|
||||
if (nw_type & ADHOC_NETWORK) {
|
||||
ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "ad-hoc %s selected\n",
|
||||
nw_type & ADHOC_CREATOR ? "creator" : "joiner");
|
||||
cfg80211_ibss_joined(vif->ndev, bssid, GFP_KERNEL);
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -691,12 +743,14 @@ void ath6kl_cfg80211_connect_event(struct ath6kl_vif *vif, u16 channel,
|
|||
static int ath6kl_cfg80211_disconnect(struct wiphy *wiphy,
|
||||
struct net_device *dev, u16 reason_code)
|
||||
{
|
||||
struct ath6kl *ar = (struct ath6kl *)ath6kl_priv(dev);
|
||||
struct ath6kl *ar = ath6kl_priv(dev);
|
||||
struct ath6kl_vif *vif = netdev_priv(dev);
|
||||
|
||||
ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "%s: reason=%u\n", __func__,
|
||||
reason_code);
|
||||
|
||||
ath6kl_cfg80211_sscan_disable(vif);
|
||||
|
||||
if (!ath6kl_cfg80211_ready(vif))
|
||||
return -EIO;
|
||||
|
||||
|
@ -789,7 +843,7 @@ void ath6kl_cfg80211_disconnect_event(struct ath6kl_vif *vif, u8 reason,
|
|||
static int ath6kl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev,
|
||||
struct cfg80211_scan_request *request)
|
||||
{
|
||||
struct ath6kl *ar = (struct ath6kl *)ath6kl_priv(ndev);
|
||||
struct ath6kl *ar = ath6kl_priv(ndev);
|
||||
struct ath6kl_vif *vif = netdev_priv(ndev);
|
||||
s8 n_channels = 0;
|
||||
u16 *channels = NULL;
|
||||
|
@ -799,6 +853,8 @@ static int ath6kl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev,
|
|||
if (!ath6kl_cfg80211_ready(vif))
|
||||
return -EIO;
|
||||
|
||||
ath6kl_cfg80211_sscan_disable(vif);
|
||||
|
||||
if (!ar->usr_bss_filter) {
|
||||
clear_bit(CLEAR_BSSFILTER_ON_BEACON, &vif->flags);
|
||||
ret = ath6kl_wmi_bssfilter_cmd(
|
||||
|
@ -824,6 +880,10 @@ static int ath6kl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev,
|
|||
request->ssids[i].ssid);
|
||||
}
|
||||
|
||||
/*
|
||||
* FIXME: we should clear the IE in fw if it's not set so just
|
||||
* remove the check altogether
|
||||
*/
|
||||
if (request->ie) {
|
||||
ret = ath6kl_wmi_set_appie_cmd(ar->wmi, vif->fw_vif_idx,
|
||||
WMI_FRAME_PROBE_REQ,
|
||||
|
@ -860,9 +920,25 @@ static int ath6kl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev,
|
|||
if (test_bit(CONNECTED, &vif->flags))
|
||||
force_fg_scan = 1;
|
||||
|
||||
ret = ath6kl_wmi_startscan_cmd(ar->wmi, vif->fw_vif_idx, WMI_LONG_SCAN,
|
||||
force_fg_scan, false, 0, 0, n_channels,
|
||||
if (test_bit(ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,
|
||||
ar->fw_capabilities)) {
|
||||
/*
|
||||
* If capable of doing P2P mgmt operations using
|
||||
* station interface, send additional information like
|
||||
* supported rates to advertise and xmit rates for
|
||||
* probe requests
|
||||
*/
|
||||
ret = ath6kl_wmi_beginscan_cmd(ar->wmi, vif->fw_vif_idx,
|
||||
WMI_LONG_SCAN, force_fg_scan,
|
||||
false, 0, 0, n_channels,
|
||||
channels, request->no_cck,
|
||||
request->rates);
|
||||
} else {
|
||||
ret = ath6kl_wmi_startscan_cmd(ar->wmi, vif->fw_vif_idx,
|
||||
WMI_LONG_SCAN, force_fg_scan,
|
||||
false, 0, 0, n_channels,
|
||||
channels);
|
||||
}
|
||||
if (ret)
|
||||
ath6kl_err("wmi_startscan_cmd failed\n");
|
||||
else
|
||||
|
@ -905,7 +981,7 @@ static int ath6kl_cfg80211_add_key(struct wiphy *wiphy, struct net_device *ndev,
|
|||
const u8 *mac_addr,
|
||||
struct key_params *params)
|
||||
{
|
||||
struct ath6kl *ar = (struct ath6kl *)ath6kl_priv(ndev);
|
||||
struct ath6kl *ar = ath6kl_priv(ndev);
|
||||
struct ath6kl_vif *vif = netdev_priv(ndev);
|
||||
struct ath6kl_key *key = NULL;
|
||||
u8 key_usage;
|
||||
|
@ -937,13 +1013,19 @@ static int ath6kl_cfg80211_add_key(struct wiphy *wiphy, struct net_device *ndev,
|
|||
key_usage = GROUP_USAGE;
|
||||
|
||||
if (params) {
|
||||
int seq_len = params->seq_len;
|
||||
if (params->cipher == WLAN_CIPHER_SUITE_SMS4 &&
|
||||
seq_len > ATH6KL_KEY_SEQ_LEN) {
|
||||
/* Only first half of the WPI PN is configured */
|
||||
seq_len = ATH6KL_KEY_SEQ_LEN;
|
||||
}
|
||||
if (params->key_len > WLAN_MAX_KEY_LEN ||
|
||||
params->seq_len > sizeof(key->seq))
|
||||
seq_len > sizeof(key->seq))
|
||||
return -EINVAL;
|
||||
|
||||
key->key_len = params->key_len;
|
||||
memcpy(key->key, params->key, key->key_len);
|
||||
key->seq_len = params->seq_len;
|
||||
key->seq_len = seq_len;
|
||||
memcpy(key->seq, params->seq, key->seq_len);
|
||||
key->cipher = params->cipher;
|
||||
}
|
||||
|
@ -961,6 +1043,9 @@ static int ath6kl_cfg80211_add_key(struct wiphy *wiphy, struct net_device *ndev,
|
|||
case WLAN_CIPHER_SUITE_CCMP:
|
||||
key_type = AES_CRYPT;
|
||||
break;
|
||||
case WLAN_CIPHER_SUITE_SMS4:
|
||||
key_type = WAPI_CRYPT;
|
||||
break;
|
||||
|
||||
default:
|
||||
return -ENOTSUPP;
|
||||
|
@ -976,10 +1061,9 @@ static int ath6kl_cfg80211_add_key(struct wiphy *wiphy, struct net_device *ndev,
|
|||
__func__, key_index, key->key_len, key_type,
|
||||
key_usage, key->seq_len);
|
||||
|
||||
vif->def_txkey_index = key_index;
|
||||
|
||||
if (vif->nw_type == AP_NETWORK && !pairwise &&
|
||||
(key_type == TKIP_CRYPT || key_type == AES_CRYPT) && params) {
|
||||
(key_type == TKIP_CRYPT || key_type == AES_CRYPT ||
|
||||
key_type == WAPI_CRYPT) && params) {
|
||||
ar->ap_mode_bkey.valid = true;
|
||||
ar->ap_mode_bkey.key_index = key_index;
|
||||
ar->ap_mode_bkey.key_type = key_type;
|
||||
|
@ -1012,8 +1096,7 @@ static int ath6kl_cfg80211_add_key(struct wiphy *wiphy, struct net_device *ndev,
|
|||
return 0;
|
||||
}
|
||||
|
||||
return ath6kl_wmi_addkey_cmd(ar->wmi, vif->fw_vif_idx,
|
||||
vif->def_txkey_index,
|
||||
return ath6kl_wmi_addkey_cmd(ar->wmi, vif->fw_vif_idx, key_index,
|
||||
key_type, key_usage, key->key_len,
|
||||
key->seq, key->seq_len, key->key,
|
||||
KEY_OP_INIT_VAL,
|
||||
|
@ -1024,7 +1107,7 @@ static int ath6kl_cfg80211_del_key(struct wiphy *wiphy, struct net_device *ndev,
|
|||
u8 key_index, bool pairwise,
|
||||
const u8 *mac_addr)
|
||||
{
|
||||
struct ath6kl *ar = (struct ath6kl *)ath6kl_priv(ndev);
|
||||
struct ath6kl *ar = ath6kl_priv(ndev);
|
||||
struct ath6kl_vif *vif = netdev_priv(ndev);
|
||||
|
||||
ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "%s: index %d\n", __func__, key_index);
|
||||
|
@ -1090,7 +1173,7 @@ static int ath6kl_cfg80211_set_default_key(struct wiphy *wiphy,
|
|||
u8 key_index, bool unicast,
|
||||
bool multicast)
|
||||
{
|
||||
struct ath6kl *ar = (struct ath6kl *)ath6kl_priv(ndev);
|
||||
struct ath6kl *ar = ath6kl_priv(ndev);
|
||||
struct ath6kl_vif *vif = netdev_priv(ndev);
|
||||
struct ath6kl_key *key = NULL;
|
||||
u8 key_usage;
|
||||
|
@ -1181,11 +1264,12 @@ static int ath6kl_cfg80211_set_wiphy_params(struct wiphy *wiphy, u32 changed)
|
|||
*/
|
||||
static int ath6kl_cfg80211_set_txpower(struct wiphy *wiphy,
|
||||
enum nl80211_tx_power_setting type,
|
||||
int dbm)
|
||||
int mbm)
|
||||
{
|
||||
struct ath6kl *ar = (struct ath6kl *)wiphy_priv(wiphy);
|
||||
struct ath6kl_vif *vif;
|
||||
u8 ath6kl_dbm;
|
||||
int dbm = MBM_TO_DBM(mbm);
|
||||
|
||||
ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "%s: type 0x%x, dbm %d\n", __func__,
|
||||
type, dbm);
|
||||
|
@ -1288,7 +1372,7 @@ static struct net_device *ath6kl_cfg80211_add_iface(struct wiphy *wiphy,
|
|||
struct net_device *ndev;
|
||||
u8 if_idx, nw_type;
|
||||
|
||||
if (ar->num_vif == MAX_NUM_VIF) {
|
||||
if (ar->num_vif == ar->vif_max) {
|
||||
ath6kl_err("Reached maximum number of supported vif\n");
|
||||
return ERR_PTR(-EINVAL);
|
||||
}
|
||||
|
@ -1333,9 +1417,6 @@ static int ath6kl_cfg80211_change_iface(struct wiphy *wiphy,
|
|||
|
||||
ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "%s: type %u\n", __func__, type);
|
||||
|
||||
if (!ath6kl_cfg80211_ready(vif))
|
||||
return -EIO;
|
||||
|
||||
switch (type) {
|
||||
case NL80211_IFTYPE_STATION:
|
||||
vif->next_mode = INFRA_NETWORK;
|
||||
|
@ -1426,7 +1507,7 @@ static int ath6kl_cfg80211_join_ibss(struct wiphy *wiphy,
|
|||
vif->grp_crypto, vif->grp_crypto_len,
|
||||
vif->ssid_len, vif->ssid,
|
||||
vif->req_bssid, vif->ch_hint,
|
||||
ar->connect_ctrl_flags);
|
||||
ar->connect_ctrl_flags, SUBTYPE_NONE);
|
||||
set_bit(CONNECT_PEND, &vif->flags);
|
||||
|
||||
return 0;
|
||||
|
@ -1453,6 +1534,7 @@ static const u32 cipher_suites[] = {
|
|||
WLAN_CIPHER_SUITE_TKIP,
|
||||
WLAN_CIPHER_SUITE_CCMP,
|
||||
CCKM_KRK_CIPHER_SUITE,
|
||||
WLAN_CIPHER_SUITE_SMS4,
|
||||
};
|
||||
|
||||
static bool is_rate_legacy(s32 rate)
|
||||
|
@ -1779,7 +1861,7 @@ int ath6kl_cfg80211_suspend(struct ath6kl *ar,
|
|||
|
||||
case ATH6KL_CFG_SUSPEND_DEEPSLEEP:
|
||||
|
||||
ath6kl_cfg80211_stop(ar);
|
||||
ath6kl_cfg80211_stop_all(ar);
|
||||
|
||||
/* save the current power mode before enabling power save */
|
||||
ar->wmi->saved_pwr_mode = ar->wmi->pwr_mode;
|
||||
|
@ -1796,7 +1878,7 @@ int ath6kl_cfg80211_suspend(struct ath6kl *ar,
|
|||
|
||||
case ATH6KL_CFG_SUSPEND_CUTPOWER:
|
||||
|
||||
ath6kl_cfg80211_stop(ar);
|
||||
ath6kl_cfg80211_stop_all(ar);
|
||||
|
||||
if (ar->state == ATH6KL_STATE_OFF) {
|
||||
ath6kl_dbg(ATH6KL_DBG_SUSPEND,
|
||||
|
@ -1816,6 +1898,13 @@ int ath6kl_cfg80211_suspend(struct ath6kl *ar,
|
|||
|
||||
break;
|
||||
|
||||
case ATH6KL_CFG_SUSPEND_SCHED_SCAN:
|
||||
/*
|
||||
* Nothing needed for schedule scan, firmware is already in
|
||||
* wow mode and sleeping most of the time.
|
||||
*/
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
@ -1864,6 +1953,9 @@ int ath6kl_cfg80211_resume(struct ath6kl *ar)
|
|||
}
|
||||
break;
|
||||
|
||||
case ATH6KL_STATE_SCHED_SCAN:
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
@ -1987,7 +2079,7 @@ static int ath6kl_ap_beacon(struct wiphy *wiphy, struct net_device *dev,
|
|||
int ies_len;
|
||||
struct wmi_connect_cmd p;
|
||||
int res;
|
||||
int i;
|
||||
int i, ret;
|
||||
|
||||
ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "%s: add=%d\n", __func__, add);
|
||||
|
||||
|
@ -2045,7 +2137,9 @@ static int ath6kl_ap_beacon(struct wiphy *wiphy, struct net_device *dev,
|
|||
if (info->hidden_ssid != NL80211_HIDDEN_SSID_NOT_IN_USE)
|
||||
return -EOPNOTSUPP; /* TODO */
|
||||
|
||||
vif->dot11_auth_mode = OPEN_AUTH;
|
||||
ret = ath6kl_set_auth_type(vif, info->auth_type);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
memset(&p, 0, sizeof(p));
|
||||
|
||||
|
@ -2081,6 +2175,9 @@ static int ath6kl_ap_beacon(struct wiphy *wiphy, struct net_device *dev,
|
|||
case WLAN_CIPHER_SUITE_CCMP:
|
||||
p.prwise_crypto_type |= AES_CRYPT;
|
||||
break;
|
||||
case WLAN_CIPHER_SUITE_SMS4:
|
||||
p.prwise_crypto_type |= WAPI_CRYPT;
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (p.prwise_crypto_type == 0) {
|
||||
|
@ -2100,6 +2197,9 @@ static int ath6kl_ap_beacon(struct wiphy *wiphy, struct net_device *dev,
|
|||
case WLAN_CIPHER_SUITE_CCMP:
|
||||
p.grp_crypto_type = AES_CRYPT;
|
||||
break;
|
||||
case WLAN_CIPHER_SUITE_SMS4:
|
||||
p.grp_crypto_type = WAPI_CRYPT;
|
||||
break;
|
||||
default:
|
||||
p.grp_crypto_type = NONE_CRYPT;
|
||||
break;
|
||||
|
@ -2114,6 +2214,16 @@ static int ath6kl_ap_beacon(struct wiphy *wiphy, struct net_device *dev,
|
|||
p.dot11_auth_mode = vif->dot11_auth_mode;
|
||||
p.ch = cpu_to_le16(vif->next_chan);
|
||||
|
||||
if (vif->wdev.iftype == NL80211_IFTYPE_P2P_GO) {
|
||||
p.nw_subtype = SUBTYPE_P2PGO;
|
||||
} else {
|
||||
/*
|
||||
* Due to firmware limitation, it is not possible to
|
||||
* do P2P mgmt operations in AP mode
|
||||
*/
|
||||
p.nw_subtype = SUBTYPE_NONE;
|
||||
}
|
||||
|
||||
res = ath6kl_wmi_ap_profile_commit(ar->wmi, vif->fw_vif_idx, &p);
|
||||
if (res < 0)
|
||||
return res;
|
||||
|
@ -2279,10 +2389,24 @@ static int ath6kl_mgmt_tx(struct wiphy *wiphy, struct net_device *dev,
|
|||
}
|
||||
|
||||
*cookie = id;
|
||||
|
||||
if (test_bit(ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,
|
||||
ar->fw_capabilities)) {
|
||||
/*
|
||||
* If capable of doing P2P mgmt operations using
|
||||
* station interface, send additional information like
|
||||
* supported rates to advertise and xmit rates for
|
||||
* probe requests
|
||||
*/
|
||||
return ath6kl_wmi_send_mgmt_cmd(ar->wmi, vif->fw_vif_idx, id,
|
||||
chan->center_freq, wait,
|
||||
buf, len, no_cck);
|
||||
} else {
|
||||
return ath6kl_wmi_send_action_cmd(ar->wmi, vif->fw_vif_idx, id,
|
||||
chan->center_freq, wait,
|
||||
buf, len);
|
||||
}
|
||||
}
|
||||
|
||||
static void ath6kl_mgmt_frame_register(struct wiphy *wiphy,
|
||||
struct net_device *dev,
|
||||
|
@ -2302,6 +2426,90 @@ static void ath6kl_mgmt_frame_register(struct wiphy *wiphy,
|
|||
}
|
||||
}
|
||||
|
||||
static int ath6kl_cfg80211_sscan_start(struct wiphy *wiphy,
|
||||
struct net_device *dev,
|
||||
struct cfg80211_sched_scan_request *request)
|
||||
{
|
||||
struct ath6kl *ar = ath6kl_priv(dev);
|
||||
struct ath6kl_vif *vif = netdev_priv(dev);
|
||||
u16 interval;
|
||||
int ret;
|
||||
u8 i;
|
||||
|
||||
if (ar->state != ATH6KL_STATE_ON)
|
||||
return -EIO;
|
||||
|
||||
if (vif->sme_state != SME_DISCONNECTED)
|
||||
return -EBUSY;
|
||||
|
||||
for (i = 0; i < ar->wiphy->max_sched_scan_ssids; i++) {
|
||||
ath6kl_wmi_probedssid_cmd(ar->wmi, vif->fw_vif_idx,
|
||||
i, DISABLE_SSID_FLAG,
|
||||
0, NULL);
|
||||
}
|
||||
|
||||
/* fw uses seconds, also make sure that it's >0 */
|
||||
interval = max_t(u16, 1, request->interval / 1000);
|
||||
|
||||
ath6kl_wmi_scanparams_cmd(ar->wmi, vif->fw_vif_idx,
|
||||
interval, interval,
|
||||
10, 0, 0, 0, 3, 0, 0, 0);
|
||||
|
||||
if (request->n_ssids && request->ssids[0].ssid_len) {
|
||||
for (i = 0; i < request->n_ssids; i++) {
|
||||
ath6kl_wmi_probedssid_cmd(ar->wmi, vif->fw_vif_idx,
|
||||
i, SPECIFIC_SSID_FLAG,
|
||||
request->ssids[i].ssid_len,
|
||||
request->ssids[i].ssid);
|
||||
}
|
||||
}
|
||||
|
||||
ret = ath6kl_wmi_set_wow_mode_cmd(ar->wmi, vif->fw_vif_idx,
|
||||
ATH6KL_WOW_MODE_ENABLE,
|
||||
WOW_FILTER_SSID,
|
||||
WOW_HOST_REQ_DELAY);
|
||||
if (ret) {
|
||||
ath6kl_warn("Failed to enable wow with ssid filter: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* this also clears IE in fw if it's not set */
|
||||
ret = ath6kl_wmi_set_appie_cmd(ar->wmi, vif->fw_vif_idx,
|
||||
WMI_FRAME_PROBE_REQ,
|
||||
request->ie, request->ie_len);
|
||||
if (ret) {
|
||||
ath6kl_warn("Failed to set probe request IE for scheduled scan: %d",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = ath6kl_wmi_set_host_sleep_mode_cmd(ar->wmi, vif->fw_vif_idx,
|
||||
ATH6KL_HOST_MODE_ASLEEP);
|
||||
if (ret) {
|
||||
ath6kl_warn("Failed to enable host sleep mode for sched scan: %d\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ar->state = ATH6KL_STATE_SCHED_SCAN;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ath6kl_cfg80211_sscan_stop(struct wiphy *wiphy,
|
||||
struct net_device *dev)
|
||||
{
|
||||
struct ath6kl_vif *vif = netdev_priv(dev);
|
||||
bool stopped;
|
||||
|
||||
stopped = __ath6kl_cfg80211_sscan_stop(vif);
|
||||
|
||||
if (!stopped)
|
||||
return -EIO;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct ieee80211_txrx_stypes
|
||||
ath6kl_mgmt_stypes[NUM_NL80211_IFTYPES] = {
|
||||
[NL80211_IFTYPE_STATION] = {
|
||||
|
@ -2359,13 +2567,48 @@ static struct cfg80211_ops ath6kl_cfg80211_ops = {
|
|||
.cancel_remain_on_channel = ath6kl_cancel_remain_on_channel,
|
||||
.mgmt_tx = ath6kl_mgmt_tx,
|
||||
.mgmt_frame_register = ath6kl_mgmt_frame_register,
|
||||
.sched_scan_start = ath6kl_cfg80211_sscan_start,
|
||||
.sched_scan_stop = ath6kl_cfg80211_sscan_stop,
|
||||
};
|
||||
|
||||
void ath6kl_cfg80211_stop(struct ath6kl *ar)
|
||||
void ath6kl_cfg80211_stop(struct ath6kl_vif *vif)
|
||||
{
|
||||
ath6kl_cfg80211_sscan_disable(vif);
|
||||
|
||||
switch (vif->sme_state) {
|
||||
case SME_DISCONNECTED:
|
||||
break;
|
||||
case SME_CONNECTING:
|
||||
cfg80211_connect_result(vif->ndev, vif->bssid, NULL, 0,
|
||||
NULL, 0,
|
||||
WLAN_STATUS_UNSPECIFIED_FAILURE,
|
||||
GFP_KERNEL);
|
||||
break;
|
||||
case SME_CONNECTED:
|
||||
cfg80211_disconnected(vif->ndev, 0, NULL, 0, GFP_KERNEL);
|
||||
break;
|
||||
}
|
||||
|
||||
if (test_bit(CONNECTED, &vif->flags) ||
|
||||
test_bit(CONNECT_PEND, &vif->flags))
|
||||
ath6kl_wmi_disconnect_cmd(vif->ar->wmi, vif->fw_vif_idx);
|
||||
|
||||
vif->sme_state = SME_DISCONNECTED;
|
||||
clear_bit(CONNECTED, &vif->flags);
|
||||
clear_bit(CONNECT_PEND, &vif->flags);
|
||||
|
||||
/* disable scanning */
|
||||
if (ath6kl_wmi_scanparams_cmd(vif->ar->wmi, vif->fw_vif_idx, 0xFFFF,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0) != 0)
|
||||
ath6kl_warn("failed to disable scan during stop\n");
|
||||
|
||||
ath6kl_cfg80211_scan_complete_event(vif, true);
|
||||
}
|
||||
|
||||
void ath6kl_cfg80211_stop_all(struct ath6kl *ar)
|
||||
{
|
||||
struct ath6kl_vif *vif;
|
||||
|
||||
/* FIXME: for multi vif */
|
||||
vif = ath6kl_vif_first(ar);
|
||||
if (!vif) {
|
||||
/* save the current power mode before enabling power save */
|
||||
|
@ -2377,39 +2620,13 @@ void ath6kl_cfg80211_stop(struct ath6kl *ar)
|
|||
return;
|
||||
}
|
||||
|
||||
switch (vif->sme_state) {
|
||||
case SME_CONNECTING:
|
||||
cfg80211_connect_result(vif->ndev, vif->bssid, NULL, 0,
|
||||
NULL, 0,
|
||||
WLAN_STATUS_UNSPECIFIED_FAILURE,
|
||||
GFP_KERNEL);
|
||||
break;
|
||||
case SME_CONNECTED:
|
||||
default:
|
||||
/*
|
||||
* FIXME: oddly enough smeState is in DISCONNECTED during
|
||||
* suspend, why? Need to send disconnected event in that
|
||||
* state.
|
||||
* FIXME: we should take ar->list_lock to protect changes in the
|
||||
* vif_list, but that's not trivial to do as ath6kl_cfg80211_stop()
|
||||
* sleeps.
|
||||
*/
|
||||
cfg80211_disconnected(vif->ndev, 0, NULL, 0, GFP_KERNEL);
|
||||
break;
|
||||
}
|
||||
|
||||
if (test_bit(CONNECTED, &vif->flags) ||
|
||||
test_bit(CONNECT_PEND, &vif->flags))
|
||||
ath6kl_wmi_disconnect_cmd(ar->wmi, vif->fw_vif_idx);
|
||||
|
||||
vif->sme_state = SME_DISCONNECTED;
|
||||
clear_bit(CONNECTED, &vif->flags);
|
||||
clear_bit(CONNECT_PEND, &vif->flags);
|
||||
|
||||
/* disable scanning */
|
||||
if (ath6kl_wmi_scanparams_cmd(ar->wmi, vif->fw_vif_idx, 0xFFFF, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0) != 0)
|
||||
printk(KERN_WARNING "ath6kl: failed to disable scan "
|
||||
"during suspend\n");
|
||||
|
||||
ath6kl_cfg80211_scan_complete_event(vif, true);
|
||||
list_for_each_entry(vif, &ar->vif_list, list)
|
||||
ath6kl_cfg80211_stop(vif);
|
||||
}
|
||||
|
||||
struct ath6kl *ath6kl_core_alloc(struct device *dev)
|
||||
|
@ -2427,17 +2644,12 @@ struct ath6kl *ath6kl_core_alloc(struct device *dev)
|
|||
}
|
||||
|
||||
ar = wiphy_priv(wiphy);
|
||||
if (!multi_norm_if_support)
|
||||
ar->p2p = !!ath6kl_p2p;
|
||||
ar->wiphy = wiphy;
|
||||
ar->dev = dev;
|
||||
|
||||
if (multi_norm_if_support)
|
||||
ar->max_norm_iface = 2;
|
||||
else
|
||||
ar->max_norm_iface = 1;
|
||||
ar->vif_max = 1;
|
||||
|
||||
/* FIXME: Remove this once the multivif support is enabled */
|
||||
ar->max_norm_iface = 1;
|
||||
|
||||
spin_lock_init(&ar->lock);
|
||||
|
@ -2459,9 +2671,6 @@ struct ath6kl *ath6kl_core_alloc(struct device *dev)
|
|||
ar->tx_pwr = 0;
|
||||
|
||||
ar->intra_bss = 1;
|
||||
memset(&ar->sc_params, 0, sizeof(ar->sc_params));
|
||||
ar->sc_params.short_scan_ratio = WMI_SHORTSCANRATIO_DEFAULT;
|
||||
ar->sc_params.scan_ctrl_flags = DEFAULT_SCAN_CTRL_FLAGS;
|
||||
ar->lrssi_roam_threshold = DEF_LRSSI_ROAM_THRESHOLD;
|
||||
|
||||
ar->state = ATH6KL_STATE_OFF;
|
||||
|
@ -2522,6 +2731,8 @@ int ath6kl_register_ieee80211_hw(struct ath6kl *ar)
|
|||
wiphy->wowlan.pattern_min_len = 1;
|
||||
wiphy->wowlan.pattern_max_len = WOW_PATTERN_SIZE;
|
||||
|
||||
wiphy->max_sched_scan_ssids = 10;
|
||||
|
||||
ret = wiphy_register(wiphy);
|
||||
if (ret < 0) {
|
||||
ath6kl_err("couldn't register wiphy device\n");
|
||||
|
@ -2541,6 +2752,9 @@ static int ath6kl_init_if_data(struct ath6kl_vif *vif)
|
|||
|
||||
setup_timer(&vif->disconnect_timer, disconnect_timer_handler,
|
||||
(unsigned long) vif->ndev);
|
||||
setup_timer(&vif->sched_scan_timer, ath6kl_wmi_sscan_timer,
|
||||
(unsigned long) vif);
|
||||
|
||||
set_bit(WMM_ENABLED, &vif->flags);
|
||||
spin_lock_init(&vif->if_lock);
|
||||
|
||||
|
|
|
@ -20,7 +20,8 @@
|
|||
enum ath6kl_cfg_suspend_mode {
|
||||
ATH6KL_CFG_SUSPEND_DEEPSLEEP,
|
||||
ATH6KL_CFG_SUSPEND_CUTPOWER,
|
||||
ATH6KL_CFG_SUSPEND_WOW
|
||||
ATH6KL_CFG_SUSPEND_WOW,
|
||||
ATH6KL_CFG_SUSPEND_SCHED_SCAN,
|
||||
};
|
||||
|
||||
struct net_device *ath6kl_interface_add(struct ath6kl *ar, char *name,
|
||||
|
@ -52,6 +53,7 @@ int ath6kl_cfg80211_suspend(struct ath6kl *ar,
|
|||
|
||||
int ath6kl_cfg80211_resume(struct ath6kl *ar);
|
||||
|
||||
void ath6kl_cfg80211_stop(struct ath6kl *ar);
|
||||
void ath6kl_cfg80211_stop(struct ath6kl_vif *vif);
|
||||
void ath6kl_cfg80211_stop_all(struct ath6kl *ar);
|
||||
|
||||
#endif /* ATH6KL_CFG80211_H */
|
||||
|
|
|
@ -71,6 +71,7 @@ enum crypto_type {
|
|||
WEP_CRYPT = 0x02,
|
||||
TKIP_CRYPT = 0x04,
|
||||
AES_CRYPT = 0x08,
|
||||
WAPI_CRYPT = 0x10,
|
||||
};
|
||||
|
||||
struct htc_endpoint_credit_dist;
|
||||
|
|
|
@ -70,10 +70,20 @@ enum ath6kl_fw_ie_type {
|
|||
ATH6KL_FW_IE_RESERVED_RAM_SIZE = 5,
|
||||
ATH6KL_FW_IE_CAPABILITIES = 6,
|
||||
ATH6KL_FW_IE_PATCH_ADDR = 7,
|
||||
ATH6KL_FW_IE_BOARD_ADDR = 8,
|
||||
ATH6KL_FW_IE_VIF_MAX = 9,
|
||||
};
|
||||
|
||||
enum ath6kl_fw_capability {
|
||||
ATH6KL_FW_CAPABILITY_HOST_P2P = 0,
|
||||
ATH6KL_FW_CAPABILITY_SCHED_SCAN = 1,
|
||||
|
||||
/*
|
||||
* Firmware is capable of supporting P2P mgmt operations on a
|
||||
* station interface. After group formation, the station
|
||||
* interface will become a P2P client/GO interface as the case may be
|
||||
*/
|
||||
ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,
|
||||
|
||||
/* this needs to be last */
|
||||
ATH6KL_FW_CAPABILITY_MAX,
|
||||
|
@ -88,37 +98,47 @@ struct ath6kl_fw_ie {
|
|||
};
|
||||
|
||||
/* AR6003 1.0 definitions */
|
||||
#define AR6003_REV1_VERSION 0x300002ba
|
||||
#define AR6003_HW_1_0_VERSION 0x300002ba
|
||||
|
||||
/* AR6003 2.0 definitions */
|
||||
#define AR6003_REV2_VERSION 0x30000384
|
||||
#define AR6003_REV2_PATCH_DOWNLOAD_ADDRESS 0x57e910
|
||||
#define AR6003_REV2_OTP_FILE "ath6k/AR6003/hw2.0/otp.bin.z77"
|
||||
#define AR6003_REV2_FIRMWARE_FILE "ath6k/AR6003/hw2.0/athwlan.bin.z77"
|
||||
#define AR6003_REV2_TCMD_FIRMWARE_FILE "ath6k/AR6003/hw2.0/athtcmd_ram.bin"
|
||||
#define AR6003_REV2_PATCH_FILE "ath6k/AR6003/hw2.0/data.patch.bin"
|
||||
#define AR6003_REV2_FIRMWARE_2_FILE "ath6k/AR6003/hw2.0/fw-2.bin"
|
||||
#define AR6003_REV2_BOARD_DATA_FILE "ath6k/AR6003/hw2.0/bdata.bin"
|
||||
#define AR6003_REV2_DEFAULT_BOARD_DATA_FILE "ath6k/AR6003/hw2.0/bdata.SD31.bin"
|
||||
#define AR6003_HW_2_0_VERSION 0x30000384
|
||||
#define AR6003_HW_2_0_PATCH_DOWNLOAD_ADDRESS 0x57e910
|
||||
#define AR6003_HW_2_0_OTP_FILE "ath6k/AR6003/hw2.0/otp.bin.z77"
|
||||
#define AR6003_HW_2_0_FIRMWARE_FILE "ath6k/AR6003/hw2.0/athwlan.bin.z77"
|
||||
#define AR6003_HW_2_0_TCMD_FIRMWARE_FILE "ath6k/AR6003/hw2.0/athtcmd_ram.bin"
|
||||
#define AR6003_HW_2_0_PATCH_FILE "ath6k/AR6003/hw2.0/data.patch.bin"
|
||||
#define AR6003_HW_2_0_FIRMWARE_2_FILE "ath6k/AR6003/hw2.0/fw-2.bin"
|
||||
#define AR6003_HW_2_0_BOARD_DATA_FILE "ath6k/AR6003/hw2.0/bdata.bin"
|
||||
#define AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE \
|
||||
"ath6k/AR6003/hw2.0/bdata.SD31.bin"
|
||||
|
||||
/* AR6003 3.0 definitions */
|
||||
#define AR6003_REV3_VERSION 0x30000582
|
||||
#define AR6003_REV3_OTP_FILE "ath6k/AR6003/hw2.1.1/otp.bin"
|
||||
#define AR6003_REV3_FIRMWARE_FILE "ath6k/AR6003/hw2.1.1/athwlan.bin"
|
||||
#define AR6003_REV3_TCMD_FIRMWARE_FILE "ath6k/AR6003/hw2.1.1/athtcmd_ram.bin"
|
||||
#define AR6003_REV3_PATCH_FILE "ath6k/AR6003/hw2.1.1/data.patch.bin"
|
||||
#define AR6003_REV3_FIRMWARE_2_FILE "ath6k/AR6003/hw2.1.1/fw-2.bin"
|
||||
#define AR6003_REV3_BOARD_DATA_FILE "ath6k/AR6003/hw2.1.1/bdata.bin"
|
||||
#define AR6003_REV3_DEFAULT_BOARD_DATA_FILE \
|
||||
#define AR6003_HW_2_1_1_VERSION 0x30000582
|
||||
#define AR6003_HW_2_1_1_OTP_FILE "ath6k/AR6003/hw2.1.1/otp.bin"
|
||||
#define AR6003_HW_2_1_1_FIRMWARE_FILE "ath6k/AR6003/hw2.1.1/athwlan.bin"
|
||||
#define AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE \
|
||||
"ath6k/AR6003/hw2.1.1/athtcmd_ram.bin"
|
||||
#define AR6003_HW_2_1_1_PATCH_FILE "ath6k/AR6003/hw2.1.1/data.patch.bin"
|
||||
#define AR6003_HW_2_1_1_FIRMWARE_2_FILE "ath6k/AR6003/hw2.1.1/fw-2.bin"
|
||||
#define AR6003_HW_2_1_1_BOARD_DATA_FILE "ath6k/AR6003/hw2.1.1/bdata.bin"
|
||||
#define AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE \
|
||||
"ath6k/AR6003/hw2.1.1/bdata.SD31.bin"
|
||||
|
||||
/* AR6004 1.0 definitions */
|
||||
#define AR6004_REV1_VERSION 0x30000623
|
||||
#define AR6004_REV1_FIRMWARE_FILE "ath6k/AR6004/hw6.1/fw.ram.bin"
|
||||
#define AR6004_REV1_FIRMWARE_2_FILE "ath6k/AR6004/hw6.1/fw-2.bin"
|
||||
#define AR6004_REV1_BOARD_DATA_FILE "ath6k/AR6004/hw6.1/bdata.bin"
|
||||
#define AR6004_REV1_DEFAULT_BOARD_DATA_FILE "ath6k/AR6004/hw6.1/bdata.DB132.bin"
|
||||
#define AR6004_REV1_EPPING_FIRMWARE_FILE "ath6k/AR6004/hw6.1/endpointping.bin"
|
||||
#define AR6004_HW_1_0_VERSION 0x30000623
|
||||
#define AR6004_HW_1_0_FIRMWARE_2_FILE "ath6k/AR6004/hw1.0/fw-2.bin"
|
||||
#define AR6004_HW_1_0_FIRMWARE_FILE "ath6k/AR6004/hw1.0/fw.ram.bin"
|
||||
#define AR6004_HW_1_0_BOARD_DATA_FILE "ath6k/AR6004/hw1.0/bdata.bin"
|
||||
#define AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE \
|
||||
"ath6k/AR6004/hw1.0/bdata.DB132.bin"
|
||||
|
||||
/* AR6004 1.1 definitions */
|
||||
#define AR6004_HW_1_1_VERSION 0x30000001
|
||||
#define AR6004_HW_1_1_FIRMWARE_2_FILE "ath6k/AR6004/hw1.1/fw-2.bin"
|
||||
#define AR6004_HW_1_1_FIRMWARE_FILE "ath6k/AR6004/hw1.1/fw.ram.bin"
|
||||
#define AR6004_HW_1_1_BOARD_DATA_FILE "ath6k/AR6004/hw1.1/bdata.bin"
|
||||
#define AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE \
|
||||
"ath6k/AR6004/hw1.1/bdata.DB132.bin"
|
||||
|
||||
/* Per STA data, used in AP mode */
|
||||
#define STA_PS_AWAKE BIT(0)
|
||||
|
@ -272,6 +292,8 @@ struct ath6kl_bmi {
|
|||
u32 cmd_credits;
|
||||
bool done_sent;
|
||||
u8 *cmd_buf;
|
||||
u32 max_data_size;
|
||||
u32 max_cmd_size;
|
||||
};
|
||||
|
||||
struct target_stats {
|
||||
|
@ -381,7 +403,16 @@ struct ath6kl_req_key {
|
|||
u8 key_len;
|
||||
};
|
||||
|
||||
#define MAX_NUM_VIF 1
|
||||
enum ath6kl_hif_type {
|
||||
ATH6KL_HIF_TYPE_SDIO,
|
||||
ATH6KL_HIF_TYPE_USB,
|
||||
};
|
||||
|
||||
/*
|
||||
* Driver's maximum limit, note that some firmwares support only one vif
|
||||
* and the runtime (current) limit must be checked from ar->vif_max.
|
||||
*/
|
||||
#define ATH6KL_VIF_MAX 3
|
||||
|
||||
/* vif flags info */
|
||||
enum ath6kl_vif_state {
|
||||
|
@ -424,7 +455,10 @@ struct ath6kl_vif {
|
|||
struct ath6kl_wep_key wep_key_list[WMI_MAX_KEY_INDEX + 1];
|
||||
struct ath6kl_key keys[WMI_MAX_KEY_INDEX + 1];
|
||||
struct aggr_info *aggr_cntxt;
|
||||
|
||||
struct timer_list disconnect_timer;
|
||||
struct timer_list sched_scan_timer;
|
||||
|
||||
struct cfg80211_scan_request *scan_req;
|
||||
enum sme_state sme_state;
|
||||
int reconnect_flag;
|
||||
|
@ -442,6 +476,8 @@ struct ath6kl_vif {
|
|||
#define WOW_LIST_ID 0
|
||||
#define WOW_HOST_REQ_DELAY 500 /* ms */
|
||||
|
||||
#define ATH6KL_SCHED_SCAN_RESULT_DELAY 5000 /* ms */
|
||||
|
||||
/* Flag info */
|
||||
enum ath6kl_dev_state {
|
||||
WMI_ENABLED,
|
||||
|
@ -460,6 +496,7 @@ enum ath6kl_state {
|
|||
ATH6KL_STATE_DEEPSLEEP,
|
||||
ATH6KL_STATE_CUTPOWER,
|
||||
ATH6KL_STATE_WOW,
|
||||
ATH6KL_STATE_SCHED_SCAN,
|
||||
};
|
||||
|
||||
struct ath6kl {
|
||||
|
@ -474,11 +511,13 @@ struct ath6kl {
|
|||
int tx_pending[ENDPOINT_MAX];
|
||||
int total_tx_data_pend;
|
||||
struct htc_target *htc_target;
|
||||
enum ath6kl_hif_type hif_type;
|
||||
void *hif_priv;
|
||||
struct list_head vif_list;
|
||||
/* Lock to avoid race in vif_list entries among add/del/traverse */
|
||||
spinlock_t list_lock;
|
||||
u8 num_vif;
|
||||
unsigned int vif_max;
|
||||
u8 max_norm_iface;
|
||||
u8 avail_idx_map;
|
||||
spinlock_t lock;
|
||||
|
@ -517,7 +556,6 @@ struct ath6kl {
|
|||
struct list_head amsdu_rx_buffer_queue;
|
||||
u8 rx_meta_ver;
|
||||
enum wlan_low_pwr_state wlan_pwr_state;
|
||||
struct wmi_scan_params_cmd sc_params;
|
||||
u8 mac_addr[ETH_ALEN];
|
||||
#define AR_MCAST_FILTER_MAC_ADDR_SIZE 4
|
||||
struct {
|
||||
|
@ -525,12 +563,25 @@ struct ath6kl {
|
|||
size_t rx_report_len;
|
||||
} tm;
|
||||
|
||||
struct {
|
||||
struct ath6kl_hw {
|
||||
u32 id;
|
||||
const char *name;
|
||||
u32 dataset_patch_addr;
|
||||
u32 app_load_addr;
|
||||
u32 app_start_override_addr;
|
||||
u32 board_ext_data_addr;
|
||||
u32 reserved_ram_size;
|
||||
u32 board_addr;
|
||||
u32 refclk_hz;
|
||||
u32 uarttx_pin;
|
||||
|
||||
const char *fw_otp;
|
||||
const char *fw;
|
||||
const char *fw_tcmd;
|
||||
const char *fw_patch;
|
||||
const char *fw_api2;
|
||||
const char *fw_board;
|
||||
const char *fw_default_board;
|
||||
} hw;
|
||||
|
||||
u16 conf_flags;
|
||||
|
@ -583,7 +634,7 @@ struct ath6kl {
|
|||
#endif /* CONFIG_ATH6KL_DEBUG */
|
||||
};
|
||||
|
||||
static inline void *ath6kl_priv(struct net_device *dev)
|
||||
static inline struct ath6kl *ath6kl_priv(struct net_device *dev)
|
||||
{
|
||||
return ((struct ath6kl_vif *) netdev_priv(dev))->ar;
|
||||
}
|
||||
|
|
|
@ -1551,10 +1551,10 @@ static ssize_t ath6kl_listen_int_read(struct file *file,
|
|||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath6kl *ar = file->private_data;
|
||||
char buf[16];
|
||||
char buf[32];
|
||||
int len;
|
||||
|
||||
len = snprintf(buf, sizeof(buf), "%u %u\n", ar->listen_intvl_t,
|
||||
len = scnprintf(buf, sizeof(buf), "%u %u\n", ar->listen_intvl_t,
|
||||
ar->listen_intvl_b);
|
||||
|
||||
return simple_read_from_buffer(user_buf, count, ppos, buf, len);
|
||||
|
|
|
@ -41,6 +41,7 @@ enum ATH6K_DEBUG_MASK {
|
|||
ATH6KL_DBG_BOOT = BIT(18), /* driver init and fw boot */
|
||||
ATH6KL_DBG_WMI_DUMP = BIT(19),
|
||||
ATH6KL_DBG_SUSPEND = BIT(20),
|
||||
ATH6KL_DBG_USB = BIT(21),
|
||||
ATH6KL_DBG_ANY = 0xffffffff /* enable all logs */
|
||||
};
|
||||
|
||||
|
|
|
@ -91,6 +91,36 @@ static inline int ath6kl_hif_suspend(struct ath6kl *ar,
|
|||
return ar->hif_ops->suspend(ar, wow);
|
||||
}
|
||||
|
||||
/*
|
||||
* Read from the ATH6KL through its diagnostic window. No cooperation from
|
||||
* the Target is required for this.
|
||||
*/
|
||||
static inline int ath6kl_hif_diag_read32(struct ath6kl *ar, u32 address,
|
||||
u32 *value)
|
||||
{
|
||||
return ar->hif_ops->diag_read32(ar, address, value);
|
||||
}
|
||||
|
||||
/*
|
||||
* Write to the ATH6KL through its diagnostic window. No cooperation from
|
||||
* the Target is required for this.
|
||||
*/
|
||||
static inline int ath6kl_hif_diag_write32(struct ath6kl *ar, u32 address,
|
||||
__le32 value)
|
||||
{
|
||||
return ar->hif_ops->diag_write32(ar, address, value);
|
||||
}
|
||||
|
||||
static inline int ath6kl_hif_bmi_read(struct ath6kl *ar, u8 *buf, u32 len)
|
||||
{
|
||||
return ar->hif_ops->bmi_read(ar, buf, len);
|
||||
}
|
||||
|
||||
static inline int ath6kl_hif_bmi_write(struct ath6kl *ar, u8 *buf, u32 len)
|
||||
{
|
||||
return ar->hif_ops->bmi_write(ar, buf, len);
|
||||
}
|
||||
|
||||
static inline int ath6kl_hif_resume(struct ath6kl *ar)
|
||||
{
|
||||
ath6kl_dbg(ATH6KL_DBG_HIF, "hif resume\n");
|
||||
|
|
|
@ -689,6 +689,11 @@ int ath6kl_hif_setup(struct ath6kl_device *dev)
|
|||
ath6kl_dbg(ATH6KL_DBG_HIF, "hif block size %d mbox addr 0x%x\n",
|
||||
dev->htc_cnxt->block_sz, dev->ar->mbox_info.htc_addr);
|
||||
|
||||
/* usb doesn't support enabling interrupts */
|
||||
/* FIXME: remove check once USB support is implemented */
|
||||
if (dev->ar->hif_type == ATH6KL_HIF_TYPE_USB)
|
||||
return 0;
|
||||
|
||||
status = ath6kl_hif_disable_intrs(dev);
|
||||
|
||||
fail_setup:
|
||||
|
|
|
@ -35,6 +35,7 @@
|
|||
#define MAX_SCATTER_REQ_TRANSFER_SIZE (32 * 1024)
|
||||
|
||||
#define MANUFACTURER_ID_AR6003_BASE 0x300
|
||||
#define MANUFACTURER_ID_AR6004_BASE 0x400
|
||||
/* SDIO manufacturer ID and Codes */
|
||||
#define MANUFACTURER_ID_ATH6KL_BASE_MASK 0xFF00
|
||||
#define MANUFACTURER_CODE 0x271 /* Atheros */
|
||||
|
@ -244,6 +245,10 @@ struct ath6kl_hif_ops {
|
|||
void (*cleanup_scatter)(struct ath6kl *ar);
|
||||
int (*suspend)(struct ath6kl *ar, struct cfg80211_wowlan *wow);
|
||||
int (*resume)(struct ath6kl *ar);
|
||||
int (*diag_read32)(struct ath6kl *ar, u32 address, u32 *value);
|
||||
int (*diag_write32)(struct ath6kl *ar, u32 address, __le32 value);
|
||||
int (*bmi_read)(struct ath6kl *ar, u8 *buf, u32 len);
|
||||
int (*bmi_write)(struct ath6kl *ar, u8 *buf, u32 len);
|
||||
int (*power_on)(struct ath6kl *ar);
|
||||
int (*power_off)(struct ath6kl *ar);
|
||||
void (*stop)(struct ath6kl *ar);
|
||||
|
|
|
@ -2543,6 +2543,12 @@ int ath6kl_htc_wait_target(struct htc_target *target)
|
|||
struct htc_service_connect_resp resp;
|
||||
int status;
|
||||
|
||||
/* FIXME: remove once USB support is implemented */
|
||||
if (target->dev->ar->hif_type == ATH6KL_HIF_TYPE_USB) {
|
||||
ath6kl_err("HTC doesn't support USB yet. Patience!\n");
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
/* we should be getting 1 control message that the target is ready */
|
||||
packet = htc_wait_for_ctrl_msg(target);
|
||||
|
||||
|
@ -2772,6 +2778,8 @@ void ath6kl_htc_cleanup(struct htc_target *target)
|
|||
{
|
||||
struct htc_packet *packet, *tmp_packet;
|
||||
|
||||
/* FIXME: remove check once USB support is implemented */
|
||||
if (target->dev->ar->hif_type != ATH6KL_HIF_TYPE_USB)
|
||||
ath6kl_hif_cleanup_scatter(target->dev->ar);
|
||||
|
||||
list_for_each_entry_safe(packet, tmp_packet,
|
||||
|
|
|
@ -33,6 +33,80 @@ module_param(debug_mask, uint, 0644);
|
|||
module_param(testmode, uint, 0644);
|
||||
module_param(suspend_cutpower, bool, 0444);
|
||||
|
||||
static const struct ath6kl_hw hw_list[] = {
|
||||
{
|
||||
.id = AR6003_HW_2_0_VERSION,
|
||||
.name = "ar6003 hw 2.0",
|
||||
.dataset_patch_addr = 0x57e884,
|
||||
.app_load_addr = 0x543180,
|
||||
.board_ext_data_addr = 0x57e500,
|
||||
.reserved_ram_size = 6912,
|
||||
.refclk_hz = 26000000,
|
||||
.uarttx_pin = 8,
|
||||
|
||||
/* hw2.0 needs override address hardcoded */
|
||||
.app_start_override_addr = 0x944C00,
|
||||
|
||||
.fw_otp = AR6003_HW_2_0_OTP_FILE,
|
||||
.fw = AR6003_HW_2_0_FIRMWARE_FILE,
|
||||
.fw_tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
|
||||
.fw_patch = AR6003_HW_2_0_PATCH_FILE,
|
||||
.fw_api2 = AR6003_HW_2_0_FIRMWARE_2_FILE,
|
||||
.fw_board = AR6003_HW_2_0_BOARD_DATA_FILE,
|
||||
.fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
|
||||
},
|
||||
{
|
||||
.id = AR6003_HW_2_1_1_VERSION,
|
||||
.name = "ar6003 hw 2.1.1",
|
||||
.dataset_patch_addr = 0x57ff74,
|
||||
.app_load_addr = 0x1234,
|
||||
.board_ext_data_addr = 0x542330,
|
||||
.reserved_ram_size = 512,
|
||||
.refclk_hz = 26000000,
|
||||
.uarttx_pin = 8,
|
||||
|
||||
.fw_otp = AR6003_HW_2_1_1_OTP_FILE,
|
||||
.fw = AR6003_HW_2_1_1_FIRMWARE_FILE,
|
||||
.fw_tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
|
||||
.fw_patch = AR6003_HW_2_1_1_PATCH_FILE,
|
||||
.fw_api2 = AR6003_HW_2_1_1_FIRMWARE_2_FILE,
|
||||
.fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE,
|
||||
.fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
|
||||
},
|
||||
{
|
||||
.id = AR6004_HW_1_0_VERSION,
|
||||
.name = "ar6004 hw 1.0",
|
||||
.dataset_patch_addr = 0x57e884,
|
||||
.app_load_addr = 0x1234,
|
||||
.board_ext_data_addr = 0x437000,
|
||||
.reserved_ram_size = 19456,
|
||||
.board_addr = 0x433900,
|
||||
.refclk_hz = 26000000,
|
||||
.uarttx_pin = 11,
|
||||
|
||||
.fw = AR6004_HW_1_0_FIRMWARE_FILE,
|
||||
.fw_api2 = AR6004_HW_1_0_FIRMWARE_2_FILE,
|
||||
.fw_board = AR6004_HW_1_0_BOARD_DATA_FILE,
|
||||
.fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
|
||||
},
|
||||
{
|
||||
.id = AR6004_HW_1_1_VERSION,
|
||||
.name = "ar6004 hw 1.1",
|
||||
.dataset_patch_addr = 0x57e884,
|
||||
.app_load_addr = 0x1234,
|
||||
.board_ext_data_addr = 0x437000,
|
||||
.reserved_ram_size = 11264,
|
||||
.board_addr = 0x43d400,
|
||||
.refclk_hz = 40000000,
|
||||
.uarttx_pin = 11,
|
||||
|
||||
.fw = AR6004_HW_1_1_FIRMWARE_FILE,
|
||||
.fw_api2 = AR6004_HW_1_1_FIRMWARE_2_FILE,
|
||||
.fw_board = AR6004_HW_1_1_BOARD_DATA_FILE,
|
||||
.fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* Include definitions here that can be used to tune the WLAN module
|
||||
* behavior. Different customers can tune the behavior as per their needs,
|
||||
|
@ -58,7 +132,6 @@ module_param(suspend_cutpower, bool, 0444);
|
|||
*/
|
||||
#define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
|
||||
|
||||
#define CONFIG_AR600x_DEBUG_UART_TX_PIN 8
|
||||
|
||||
#define ATH6KL_DATA_OFFSET 64
|
||||
struct sk_buff *ath6kl_buf_alloc(int size)
|
||||
|
@ -348,11 +421,7 @@ static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
|
|||
status = -EIO;
|
||||
}
|
||||
|
||||
/*
|
||||
* FIXME: Make sure p2p configurations are not applied to
|
||||
* non-p2p capable interfaces when multivif support is enabled.
|
||||
*/
|
||||
if (ar->p2p) {
|
||||
if (ar->p2p && (ar->vif_max == 1 || idx)) {
|
||||
ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
|
||||
P2P_FLAG_CAPABILITIES_REQ |
|
||||
P2P_FLAG_MACADDR_REQ |
|
||||
|
@ -365,11 +434,7 @@ static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
|
|||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* FIXME: Make sure p2p configurations are not applied to
|
||||
* non-p2p capable interfaces when multivif support is enabled.
|
||||
*/
|
||||
if (ar->p2p) {
|
||||
if (ar->p2p && (ar->vif_max == 1 || idx)) {
|
||||
/* Enable Probe Request reporting for P2P */
|
||||
ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
|
||||
if (ret) {
|
||||
|
@ -385,7 +450,7 @@ int ath6kl_configure_target(struct ath6kl *ar)
|
|||
{
|
||||
u32 param, ram_reserved_size;
|
||||
u8 fw_iftype, fw_mode = 0, fw_submode = 0;
|
||||
int i;
|
||||
int i, status;
|
||||
|
||||
/*
|
||||
* Note: Even though the firmware interface type is
|
||||
|
@ -397,7 +462,7 @@ int ath6kl_configure_target(struct ath6kl *ar)
|
|||
*/
|
||||
fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
|
||||
|
||||
for (i = 0; i < MAX_NUM_VIF; i++)
|
||||
for (i = 0; i < ar->vif_max; i++)
|
||||
fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
|
||||
|
||||
/*
|
||||
|
@ -411,15 +476,11 @@ int ath6kl_configure_target(struct ath6kl *ar)
|
|||
fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
|
||||
(i * HI_OPTION_FW_SUBMODE_BITS);
|
||||
|
||||
for (i = ar->max_norm_iface; i < MAX_NUM_VIF; i++)
|
||||
for (i = ar->max_norm_iface; i < ar->vif_max; i++)
|
||||
fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
|
||||
(i * HI_OPTION_FW_SUBMODE_BITS);
|
||||
|
||||
/*
|
||||
* FIXME: This needs to be removed once the multivif
|
||||
* support is enabled.
|
||||
*/
|
||||
if (ar->p2p)
|
||||
if (ar->p2p && ar->vif_max == 1)
|
||||
fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
|
||||
|
||||
param = HTC_PROTOCOL_VERSION;
|
||||
|
@ -442,7 +503,7 @@ int ath6kl_configure_target(struct ath6kl *ar)
|
|||
return -EIO;
|
||||
}
|
||||
|
||||
param |= (MAX_NUM_VIF << HI_OPTION_NUM_DEV_SHIFT);
|
||||
param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
|
||||
param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
|
||||
param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
|
||||
|
||||
|
@ -491,6 +552,24 @@ int ath6kl_configure_target(struct ath6kl *ar)
|
|||
/* use default number of control buffers */
|
||||
return -EIO;
|
||||
|
||||
/* Configure GPIO AR600x UART */
|
||||
param = ar->hw.uarttx_pin;
|
||||
status = ath6kl_bmi_write(ar,
|
||||
ath6kl_get_hi_item_addr(ar,
|
||||
HI_ITEM(hi_dbg_uart_txpin)),
|
||||
(u8 *)¶m, 4);
|
||||
if (status)
|
||||
return status;
|
||||
|
||||
/* Configure target refclk_hz */
|
||||
param = ar->hw.refclk_hz;
|
||||
status = ath6kl_bmi_write(ar,
|
||||
ath6kl_get_hi_item_addr(ar,
|
||||
HI_ITEM(hi_refclk_hz)),
|
||||
(u8 *)¶m, 4);
|
||||
if (status)
|
||||
return status;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -550,11 +629,11 @@ static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
|
|||
static const char *get_target_ver_dir(const struct ath6kl *ar)
|
||||
{
|
||||
switch (ar->version.target_ver) {
|
||||
case AR6003_REV1_VERSION:
|
||||
case AR6003_HW_1_0_VERSION:
|
||||
return "ath6k/AR6003/hw1.0";
|
||||
case AR6003_REV2_VERSION:
|
||||
case AR6003_HW_2_0_VERSION:
|
||||
return "ath6k/AR6003/hw2.0";
|
||||
case AR6003_REV3_VERSION:
|
||||
case AR6003_HW_2_1_1_VERSION:
|
||||
return "ath6k/AR6003/hw2.1.1";
|
||||
}
|
||||
ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__,
|
||||
|
@ -612,17 +691,10 @@ static int ath6kl_fetch_board_file(struct ath6kl *ar)
|
|||
if (ar->fw_board != NULL)
|
||||
return 0;
|
||||
|
||||
switch (ar->version.target_ver) {
|
||||
case AR6003_REV2_VERSION:
|
||||
filename = AR6003_REV2_BOARD_DATA_FILE;
|
||||
break;
|
||||
case AR6004_REV1_VERSION:
|
||||
filename = AR6004_REV1_BOARD_DATA_FILE;
|
||||
break;
|
||||
default:
|
||||
filename = AR6003_REV3_BOARD_DATA_FILE;
|
||||
break;
|
||||
}
|
||||
if (WARN_ON(ar->hw.fw_board == NULL))
|
||||
return -EINVAL;
|
||||
|
||||
filename = ar->hw.fw_board;
|
||||
|
||||
ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
|
||||
&ar->fw_board_len);
|
||||
|
@ -640,17 +712,7 @@ static int ath6kl_fetch_board_file(struct ath6kl *ar)
|
|||
ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
|
||||
filename, ret);
|
||||
|
||||
switch (ar->version.target_ver) {
|
||||
case AR6003_REV2_VERSION:
|
||||
filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE;
|
||||
break;
|
||||
case AR6004_REV1_VERSION:
|
||||
filename = AR6004_REV1_DEFAULT_BOARD_DATA_FILE;
|
||||
break;
|
||||
default:
|
||||
filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE;
|
||||
break;
|
||||
}
|
||||
filename = ar->hw.fw_default_board;
|
||||
|
||||
ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
|
||||
&ar->fw_board_len);
|
||||
|
@ -674,19 +736,14 @@ static int ath6kl_fetch_otp_file(struct ath6kl *ar)
|
|||
if (ar->fw_otp != NULL)
|
||||
return 0;
|
||||
|
||||
switch (ar->version.target_ver) {
|
||||
case AR6003_REV2_VERSION:
|
||||
filename = AR6003_REV2_OTP_FILE;
|
||||
break;
|
||||
case AR6004_REV1_VERSION:
|
||||
ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n");
|
||||
if (ar->hw.fw_otp == NULL) {
|
||||
ath6kl_dbg(ATH6KL_DBG_BOOT,
|
||||
"no OTP file configured for this hw\n");
|
||||
return 0;
|
||||
break;
|
||||
default:
|
||||
filename = AR6003_REV3_OTP_FILE;
|
||||
break;
|
||||
}
|
||||
|
||||
filename = ar->hw.fw_otp;
|
||||
|
||||
ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
|
||||
&ar->fw_otp_len);
|
||||
if (ret) {
|
||||
|
@ -707,38 +764,22 @@ static int ath6kl_fetch_fw_file(struct ath6kl *ar)
|
|||
return 0;
|
||||
|
||||
if (testmode) {
|
||||
switch (ar->version.target_ver) {
|
||||
case AR6003_REV2_VERSION:
|
||||
filename = AR6003_REV2_TCMD_FIRMWARE_FILE;
|
||||
break;
|
||||
case AR6003_REV3_VERSION:
|
||||
filename = AR6003_REV3_TCMD_FIRMWARE_FILE;
|
||||
break;
|
||||
case AR6004_REV1_VERSION:
|
||||
ath6kl_warn("testmode not supported with ar6004\n");
|
||||
if (ar->hw.fw_tcmd == NULL) {
|
||||
ath6kl_warn("testmode not supported\n");
|
||||
return -EOPNOTSUPP;
|
||||
default:
|
||||
ath6kl_warn("unknown target version: 0x%x\n",
|
||||
ar->version.target_ver);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
filename = ar->hw.fw_tcmd;
|
||||
|
||||
set_bit(TESTMODE, &ar->flag);
|
||||
|
||||
goto get_fw;
|
||||
}
|
||||
|
||||
switch (ar->version.target_ver) {
|
||||
case AR6003_REV2_VERSION:
|
||||
filename = AR6003_REV2_FIRMWARE_FILE;
|
||||
break;
|
||||
case AR6004_REV1_VERSION:
|
||||
filename = AR6004_REV1_FIRMWARE_FILE;
|
||||
break;
|
||||
default:
|
||||
filename = AR6003_REV3_FIRMWARE_FILE;
|
||||
break;
|
||||
}
|
||||
if (WARN_ON(ar->hw.fw == NULL))
|
||||
return -EINVAL;
|
||||
|
||||
filename = ar->hw.fw;
|
||||
|
||||
get_fw:
|
||||
ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
|
||||
|
@ -756,20 +797,14 @@ static int ath6kl_fetch_patch_file(struct ath6kl *ar)
|
|||
const char *filename;
|
||||
int ret;
|
||||
|
||||
switch (ar->version.target_ver) {
|
||||
case AR6003_REV2_VERSION:
|
||||
filename = AR6003_REV2_PATCH_FILE;
|
||||
break;
|
||||
case AR6004_REV1_VERSION:
|
||||
/* FIXME: implement for AR6004 */
|
||||
if (ar->fw_patch != NULL)
|
||||
return 0;
|
||||
break;
|
||||
default:
|
||||
filename = AR6003_REV3_PATCH_FILE;
|
||||
break;
|
||||
}
|
||||
|
||||
if (ar->fw_patch == NULL) {
|
||||
if (ar->hw.fw_patch == NULL)
|
||||
return 0;
|
||||
|
||||
filename = ar->hw.fw_patch;
|
||||
|
||||
ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
|
||||
&ar->fw_patch_len);
|
||||
if (ret) {
|
||||
|
@ -777,7 +812,6 @@ static int ath6kl_fetch_patch_file(struct ath6kl *ar)
|
|||
filename, ret);
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -811,19 +845,10 @@ static int ath6kl_fetch_fw_api2(struct ath6kl *ar)
|
|||
int ret, ie_id, i, index, bit;
|
||||
__le32 *val;
|
||||
|
||||
switch (ar->version.target_ver) {
|
||||
case AR6003_REV2_VERSION:
|
||||
filename = AR6003_REV2_FIRMWARE_2_FILE;
|
||||
break;
|
||||
case AR6003_REV3_VERSION:
|
||||
filename = AR6003_REV3_FIRMWARE_2_FILE;
|
||||
break;
|
||||
case AR6004_REV1_VERSION:
|
||||
filename = AR6004_REV1_FIRMWARE_2_FILE;
|
||||
break;
|
||||
default:
|
||||
if (ar->hw.fw_api2 == NULL)
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
filename = ar->hw.fw_api2;
|
||||
|
||||
ret = request_firmware(&fw, filename, ar->dev);
|
||||
if (ret)
|
||||
|
@ -913,12 +938,15 @@ static int ath6kl_fetch_fw_api2(struct ath6kl *ar)
|
|||
ar->hw.reserved_ram_size);
|
||||
break;
|
||||
case ATH6KL_FW_IE_CAPABILITIES:
|
||||
if (ie_len < DIV_ROUND_UP(ATH6KL_FW_CAPABILITY_MAX, 8))
|
||||
break;
|
||||
|
||||
ath6kl_dbg(ATH6KL_DBG_BOOT,
|
||||
"found firmware capabilities ie (%zd B)\n",
|
||||
ie_len);
|
||||
|
||||
for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
|
||||
index = ALIGN(i, 8) / 8;
|
||||
index = i / 8;
|
||||
bit = i % 8;
|
||||
|
||||
if (data[index] & (1 << bit))
|
||||
|
@ -937,9 +965,34 @@ static int ath6kl_fetch_fw_api2(struct ath6kl *ar)
|
|||
ar->hw.dataset_patch_addr = le32_to_cpup(val);
|
||||
|
||||
ath6kl_dbg(ATH6KL_DBG_BOOT,
|
||||
"found patch address ie 0x%d\n",
|
||||
"found patch address ie 0x%x\n",
|
||||
ar->hw.dataset_patch_addr);
|
||||
break;
|
||||
case ATH6KL_FW_IE_BOARD_ADDR:
|
||||
if (ie_len != sizeof(*val))
|
||||
break;
|
||||
|
||||
val = (__le32 *) data;
|
||||
ar->hw.board_addr = le32_to_cpup(val);
|
||||
|
||||
ath6kl_dbg(ATH6KL_DBG_BOOT,
|
||||
"found board address ie 0x%x\n",
|
||||
ar->hw.board_addr);
|
||||
break;
|
||||
case ATH6KL_FW_IE_VIF_MAX:
|
||||
if (ie_len != sizeof(*val))
|
||||
break;
|
||||
|
||||
val = (__le32 *) data;
|
||||
ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
|
||||
ATH6KL_VIF_MAX);
|
||||
|
||||
if (ar->vif_max > 1 && !ar->p2p)
|
||||
ar->max_norm_iface = 2;
|
||||
|
||||
ath6kl_dbg(ATH6KL_DBG_BOOT,
|
||||
"found vif max ie %d\n", ar->vif_max);
|
||||
break;
|
||||
default:
|
||||
ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
|
||||
le32_to_cpup(&hdr->id));
|
||||
|
@ -994,8 +1047,8 @@ static int ath6kl_upload_board_file(struct ath6kl *ar)
|
|||
* For AR6004, host determine Target RAM address for
|
||||
* writing board data.
|
||||
*/
|
||||
if (ar->target_type == TARGET_TYPE_AR6004) {
|
||||
board_address = AR6004_REV1_BOARD_DATA_ADDRESS;
|
||||
if (ar->hw.board_addr != 0) {
|
||||
board_address = ar->hw.board_addr;
|
||||
ath6kl_bmi_write(ar,
|
||||
ath6kl_get_hi_item_addr(ar,
|
||||
HI_ITEM(hi_board_data)),
|
||||
|
@ -1013,7 +1066,8 @@ static int ath6kl_upload_board_file(struct ath6kl *ar)
|
|||
HI_ITEM(hi_board_ext_data)),
|
||||
(u8 *) &board_ext_address, 4);
|
||||
|
||||
if (board_ext_address == 0) {
|
||||
if (ar->target_type == TARGET_TYPE_AR6003 &&
|
||||
board_ext_address == 0) {
|
||||
ath6kl_err("Failed to get board file target address.\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
@ -1033,8 +1087,8 @@ static int ath6kl_upload_board_file(struct ath6kl *ar)
|
|||
break;
|
||||
}
|
||||
|
||||
if (ar->fw_board_len == (board_data_size +
|
||||
board_ext_data_size)) {
|
||||
if (board_ext_address &&
|
||||
ar->fw_board_len == (board_data_size + board_ext_data_size)) {
|
||||
|
||||
/* write extended board data */
|
||||
ath6kl_dbg(ATH6KL_DBG_BOOT,
|
||||
|
@ -1092,8 +1146,8 @@ static int ath6kl_upload_otp(struct ath6kl *ar)
|
|||
bool from_hw = false;
|
||||
int ret;
|
||||
|
||||
if (WARN_ON(ar->fw_otp == NULL))
|
||||
return -ENOENT;
|
||||
if (ar->fw_otp == NULL)
|
||||
return 0;
|
||||
|
||||
address = ar->hw.app_load_addr;
|
||||
|
||||
|
@ -1142,7 +1196,7 @@ static int ath6kl_upload_firmware(struct ath6kl *ar)
|
|||
int ret;
|
||||
|
||||
if (WARN_ON(ar->fw == NULL))
|
||||
return -ENOENT;
|
||||
return 0;
|
||||
|
||||
address = ar->hw.app_load_addr;
|
||||
|
||||
|
@ -1172,8 +1226,8 @@ static int ath6kl_upload_patch(struct ath6kl *ar)
|
|||
u32 address, param;
|
||||
int ret;
|
||||
|
||||
if (WARN_ON(ar->fw_patch == NULL))
|
||||
return -ENOENT;
|
||||
if (ar->fw_patch == NULL)
|
||||
return 0;
|
||||
|
||||
address = ar->hw.dataset_patch_addr;
|
||||
|
||||
|
@ -1258,7 +1312,7 @@ static int ath6kl_init_upload(struct ath6kl *ar)
|
|||
return status;
|
||||
|
||||
/* WAR to avoid SDIO CRC err */
|
||||
if (ar->version.target_ver == AR6003_REV2_VERSION) {
|
||||
if (ar->version.target_ver == AR6003_HW_2_0_VERSION) {
|
||||
ath6kl_err("temporary war to avoid sdio crc error\n");
|
||||
|
||||
param = 0x20;
|
||||
|
@ -1315,47 +1369,29 @@ static int ath6kl_init_upload(struct ath6kl *ar)
|
|||
if (status)
|
||||
return status;
|
||||
|
||||
/* Configure GPIO AR6003 UART */
|
||||
param = CONFIG_AR600x_DEBUG_UART_TX_PIN;
|
||||
status = ath6kl_bmi_write(ar,
|
||||
ath6kl_get_hi_item_addr(ar,
|
||||
HI_ITEM(hi_dbg_uart_txpin)),
|
||||
(u8 *)¶m, 4);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
static int ath6kl_init_hw_params(struct ath6kl *ar)
|
||||
{
|
||||
switch (ar->version.target_ver) {
|
||||
case AR6003_REV2_VERSION:
|
||||
ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS;
|
||||
ar->hw.app_load_addr = AR6003_REV2_APP_LOAD_ADDRESS;
|
||||
ar->hw.board_ext_data_addr = AR6003_REV2_BOARD_EXT_DATA_ADDRESS;
|
||||
ar->hw.reserved_ram_size = AR6003_REV2_RAM_RESERVE_SIZE;
|
||||
const struct ath6kl_hw *hw;
|
||||
int i;
|
||||
|
||||
/* hw2.0 needs override address hardcoded */
|
||||
ar->hw.app_start_override_addr = 0x944C00;
|
||||
for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
|
||||
hw = &hw_list[i];
|
||||
|
||||
if (hw->id == ar->version.target_ver)
|
||||
break;
|
||||
case AR6003_REV3_VERSION:
|
||||
ar->hw.dataset_patch_addr = AR6003_REV3_DATASET_PATCH_ADDRESS;
|
||||
ar->hw.app_load_addr = 0x1234;
|
||||
ar->hw.board_ext_data_addr = AR6003_REV3_BOARD_EXT_DATA_ADDRESS;
|
||||
ar->hw.reserved_ram_size = AR6003_REV3_RAM_RESERVE_SIZE;
|
||||
break;
|
||||
case AR6004_REV1_VERSION:
|
||||
ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS;
|
||||
ar->hw.app_load_addr = AR6003_REV3_APP_LOAD_ADDRESS;
|
||||
ar->hw.board_ext_data_addr = AR6004_REV1_BOARD_EXT_DATA_ADDRESS;
|
||||
ar->hw.reserved_ram_size = AR6004_REV1_RAM_RESERVE_SIZE;
|
||||
break;
|
||||
default:
|
||||
}
|
||||
|
||||
if (i == ARRAY_SIZE(hw_list)) {
|
||||
ath6kl_err("Unsupported hardware version: 0x%x\n",
|
||||
ar->version.target_ver);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ar->hw = *hw;
|
||||
|
||||
ath6kl_dbg(ATH6KL_DBG_BOOT,
|
||||
"target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
|
||||
ar->version.target_ver, ar->target_type,
|
||||
|
@ -1364,10 +1400,25 @@ static int ath6kl_init_hw_params(struct ath6kl *ar)
|
|||
"app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
|
||||
ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
|
||||
ar->hw.reserved_ram_size);
|
||||
ath6kl_dbg(ATH6KL_DBG_BOOT,
|
||||
"refclk_hz %d uarttx_pin %d",
|
||||
ar->hw.refclk_hz, ar->hw.uarttx_pin);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
|
||||
{
|
||||
switch (type) {
|
||||
case ATH6KL_HIF_TYPE_SDIO:
|
||||
return "sdio";
|
||||
case ATH6KL_HIF_TYPE_USB:
|
||||
return "usb";
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
int ath6kl_init_hw_start(struct ath6kl *ar)
|
||||
{
|
||||
long timeleft;
|
||||
|
@ -1428,6 +1479,15 @@ int ath6kl_init_hw_start(struct ath6kl *ar)
|
|||
|
||||
ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
|
||||
|
||||
|
||||
if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
|
||||
ath6kl_info("%s %s fw %s%s\n",
|
||||
ar->hw.name,
|
||||
ath6kl_init_get_hif_name(ar->hif_type),
|
||||
ar->wiphy->fw_version,
|
||||
test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
|
||||
}
|
||||
|
||||
if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
|
||||
ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
|
||||
ATH6KL_ABI_VERSION, ar->version.abi_ver);
|
||||
|
@ -1448,7 +1508,7 @@ int ath6kl_init_hw_start(struct ath6kl *ar)
|
|||
if ((ath6kl_set_host_app_area(ar)) != 0)
|
||||
ath6kl_err("unable to set the host app area\n");
|
||||
|
||||
for (i = 0; i < MAX_NUM_VIF; i++) {
|
||||
for (i = 0; i < ar->vif_max; i++) {
|
||||
ret = ath6kl_target_config_wlan_params(ar, i);
|
||||
if (ret)
|
||||
goto err_htc_stop;
|
||||
|
@ -1558,7 +1618,7 @@ int ath6kl_core_init(struct ath6kl *ar)
|
|||
goto err_node_cleanup;
|
||||
}
|
||||
|
||||
for (i = 0; i < MAX_NUM_VIF; i++)
|
||||
for (i = 0; i < ar->vif_max; i++)
|
||||
ar->avail_idx_map |= BIT(i);
|
||||
|
||||
rtnl_lock();
|
||||
|
@ -1603,7 +1663,17 @@ int ath6kl_core_init(struct ath6kl *ar)
|
|||
|
||||
ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM |
|
||||
WIPHY_FLAG_HAVE_AP_SME |
|
||||
WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL;
|
||||
WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL |
|
||||
WIPHY_FLAG_AP_PROBE_RESP_OFFLOAD;
|
||||
|
||||
if (test_bit(ATH6KL_FW_CAPABILITY_SCHED_SCAN, ar->fw_capabilities))
|
||||
ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_SCHED_SCAN;
|
||||
|
||||
ar->wiphy->probe_resp_offload =
|
||||
NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS |
|
||||
NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS2 |
|
||||
NL80211_PROBE_RESP_OFFLOAD_SUPPORT_P2P |
|
||||
NL80211_PROBE_RESP_OFFLOAD_SUPPORT_80211U;
|
||||
|
||||
set_bit(FIRST_BOOT, &ar->flag);
|
||||
|
||||
|
|
|
@ -175,64 +175,6 @@ void ath6kl_free_cookie(struct ath6kl *ar, struct ath6kl_cookie *cookie)
|
|||
ar->cookie_count++;
|
||||
}
|
||||
|
||||
/* set the window address register (using 4-byte register access ). */
|
||||
static int ath6kl_set_addrwin_reg(struct ath6kl *ar, u32 reg_addr, u32 addr)
|
||||
{
|
||||
int status;
|
||||
s32 i;
|
||||
__le32 addr_val;
|
||||
|
||||
/*
|
||||
* Write bytes 1,2,3 of the register to set the upper address bytes,
|
||||
* the LSB is written last to initiate the access cycle
|
||||
*/
|
||||
|
||||
for (i = 1; i <= 3; i++) {
|
||||
/*
|
||||
* Fill the buffer with the address byte value we want to
|
||||
* hit 4 times. No need to worry about endianness as the
|
||||
* same byte is copied to all four bytes of addr_val at
|
||||
* any time.
|
||||
*/
|
||||
memset((u8 *)&addr_val, ((u8 *)&addr)[i], 4);
|
||||
|
||||
/*
|
||||
* Hit each byte of the register address with a 4-byte
|
||||
* write operation to the same address, this is a harmless
|
||||
* operation.
|
||||
*/
|
||||
status = hif_read_write_sync(ar, reg_addr + i, (u8 *)&addr_val,
|
||||
4, HIF_WR_SYNC_BYTE_FIX);
|
||||
if (status)
|
||||
break;
|
||||
}
|
||||
|
||||
if (status) {
|
||||
ath6kl_err("failed to write initial bytes of 0x%x to window reg: 0x%X\n",
|
||||
addr, reg_addr);
|
||||
return status;
|
||||
}
|
||||
|
||||
/*
|
||||
* Write the address register again, this time write the whole
|
||||
* 4-byte value. The effect here is that the LSB write causes the
|
||||
* cycle to start, the extra 3 byte write to bytes 1,2,3 has no
|
||||
* effect since we are writing the same values again
|
||||
*/
|
||||
addr_val = cpu_to_le32(addr);
|
||||
status = hif_read_write_sync(ar, reg_addr,
|
||||
(u8 *)&(addr_val),
|
||||
4, HIF_WR_SYNC_BYTE_INC);
|
||||
|
||||
if (status) {
|
||||
ath6kl_err("failed to write 0x%x to window reg: 0x%X\n",
|
||||
addr, reg_addr);
|
||||
return status;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Read from the hardware through its diagnostic window. No cooperation
|
||||
* from the firmware is required for this.
|
||||
|
@ -241,14 +183,7 @@ int ath6kl_diag_read32(struct ath6kl *ar, u32 address, u32 *value)
|
|||
{
|
||||
int ret;
|
||||
|
||||
/* set window register to start read cycle */
|
||||
ret = ath6kl_set_addrwin_reg(ar, WINDOW_READ_ADDR_ADDRESS, address);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* read the data */
|
||||
ret = hif_read_write_sync(ar, WINDOW_DATA_ADDRESS, (u8 *) value,
|
||||
sizeof(*value), HIF_RD_SYNC_BYTE_INC);
|
||||
ret = ath6kl_hif_diag_read32(ar, address, value);
|
||||
if (ret) {
|
||||
ath6kl_warn("failed to read32 through diagnose window: %d\n",
|
||||
ret);
|
||||
|
@ -266,18 +201,15 @@ int ath6kl_diag_write32(struct ath6kl *ar, u32 address, __le32 value)
|
|||
{
|
||||
int ret;
|
||||
|
||||
/* set write data */
|
||||
ret = hif_read_write_sync(ar, WINDOW_DATA_ADDRESS, (u8 *) &value,
|
||||
sizeof(value), HIF_WR_SYNC_BYTE_INC);
|
||||
ret = ath6kl_hif_diag_write32(ar, address, value);
|
||||
|
||||
if (ret) {
|
||||
ath6kl_err("failed to write 0x%x during diagnose window to 0x%d\n",
|
||||
address, value);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* set window register, which starts the write cycle */
|
||||
return ath6kl_set_addrwin_reg(ar, WINDOW_WRITE_ADDR_ADDRESS,
|
||||
address);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ath6kl_diag_read(struct ath6kl *ar, u32 address, void *data, u32 length)
|
||||
|
@ -465,7 +397,9 @@ void ath6kl_connect_ap_mode_bss(struct ath6kl_vif *vif, u16 channel)
|
|||
case NONE_AUTH:
|
||||
if (vif->prwise_crypto == WEP_CRYPT)
|
||||
ath6kl_install_static_wep_keys(vif);
|
||||
if (!ik->valid || ik->key_type != WAPI_CRYPT)
|
||||
break;
|
||||
/* for WAPI, we need to set the delayed group key, continue: */
|
||||
case WPA_PSK_AUTH:
|
||||
case WPA2_PSK_AUTH:
|
||||
case (WPA_PSK_AUTH | WPA2_PSK_AUTH):
|
||||
|
@ -534,6 +468,18 @@ void ath6kl_connect_ap_mode_sta(struct ath6kl_vif *vif, u16 aid, u8 *mac_addr,
|
|||
wpa_ie = pos; /* WPS IE */
|
||||
break; /* overrides WPA/RSN IE */
|
||||
}
|
||||
} else if (pos[0] == 0x44 && wpa_ie == NULL) {
|
||||
/*
|
||||
* Note: WAPI Parameter Set IE re-uses Element ID that
|
||||
* was officially allocated for BSS AC Access Delay. As
|
||||
* such, we need to be a bit more careful on when
|
||||
* parsing the frame. However, BSS AC Access Delay
|
||||
* element is not supposed to be included in
|
||||
* (Re)Association Request frames, so this should not
|
||||
* cause problems.
|
||||
*/
|
||||
wpa_ie = pos; /* WAPI IE */
|
||||
break;
|
||||
}
|
||||
pos += 2 + pos[1];
|
||||
}
|
||||
|
@ -581,20 +527,6 @@ void ath6kl_disconnect(struct ath6kl_vif *vif)
|
|||
|
||||
/* WMI Event handlers */
|
||||
|
||||
static const char *get_hw_id_string(u32 id)
|
||||
{
|
||||
switch (id) {
|
||||
case AR6003_REV1_VERSION:
|
||||
return "1.0";
|
||||
case AR6003_REV2_VERSION:
|
||||
return "2.0";
|
||||
case AR6003_REV3_VERSION:
|
||||
return "2.1.1";
|
||||
default:
|
||||
return "unknown";
|
||||
}
|
||||
}
|
||||
|
||||
void ath6kl_ready_event(void *devt, u8 *datap, u32 sw_ver, u32 abi_ver)
|
||||
{
|
||||
struct ath6kl *ar = devt;
|
||||
|
@ -617,13 +549,6 @@ void ath6kl_ready_event(void *devt, u8 *datap, u32 sw_ver, u32 abi_ver)
|
|||
/* indicate to the waiting thread that the ready event was received */
|
||||
set_bit(WMI_READY, &ar->flag);
|
||||
wake_up(&ar->event_wq);
|
||||
|
||||
if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
|
||||
ath6kl_info("hw %s fw %s%s\n",
|
||||
get_hw_id_string(ar->wiphy->hw_version),
|
||||
ar->wiphy->fw_version,
|
||||
test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
|
||||
}
|
||||
}
|
||||
|
||||
void ath6kl_scan_complete_evt(struct ath6kl_vif *vif, int status)
|
||||
|
@ -1077,21 +1002,11 @@ static int ath6kl_open(struct net_device *dev)
|
|||
|
||||
static int ath6kl_close(struct net_device *dev)
|
||||
{
|
||||
struct ath6kl *ar = ath6kl_priv(dev);
|
||||
struct ath6kl_vif *vif = netdev_priv(dev);
|
||||
|
||||
netif_stop_queue(dev);
|
||||
|
||||
ath6kl_disconnect(vif);
|
||||
|
||||
if (test_bit(WMI_READY, &ar->flag)) {
|
||||
if (ath6kl_wmi_scanparams_cmd(ar->wmi, vif->fw_vif_idx, 0xFFFF,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0))
|
||||
return -EIO;
|
||||
|
||||
}
|
||||
|
||||
ath6kl_cfg80211_scan_complete_event(vif, true);
|
||||
ath6kl_cfg80211_stop(vif);
|
||||
|
||||
clear_bit(WLAN_ENABLED, &vif->flags);
|
||||
|
||||
|
|
|
@ -40,8 +40,12 @@ struct ath6kl_sdio {
|
|||
struct bus_request bus_req[BUS_REQUEST_MAX_NUM];
|
||||
|
||||
struct ath6kl *ar;
|
||||
|
||||
u8 *dma_buffer;
|
||||
|
||||
/* protects access to dma_buffer */
|
||||
struct mutex dma_buffer_mutex;
|
||||
|
||||
/* scatter request list head */
|
||||
struct list_head scat_req;
|
||||
|
||||
|
@ -396,6 +400,7 @@ static int ath6kl_sdio_read_write_sync(struct ath6kl *ar, u32 addr, u8 *buf,
|
|||
if (buf_needs_bounce(buf)) {
|
||||
if (!ar_sdio->dma_buffer)
|
||||
return -ENOMEM;
|
||||
mutex_lock(&ar_sdio->dma_buffer_mutex);
|
||||
tbuf = ar_sdio->dma_buffer;
|
||||
memcpy(tbuf, buf, len);
|
||||
bounced = true;
|
||||
|
@ -406,6 +411,9 @@ static int ath6kl_sdio_read_write_sync(struct ath6kl *ar, u32 addr, u8 *buf,
|
|||
if ((request & HIF_READ) && bounced)
|
||||
memcpy(buf, tbuf, len);
|
||||
|
||||
if (bounced)
|
||||
mutex_unlock(&ar_sdio->dma_buffer_mutex);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -799,7 +807,28 @@ static int ath6kl_sdio_suspend(struct ath6kl *ar, struct cfg80211_wowlan *wow)
|
|||
return ret;
|
||||
}
|
||||
|
||||
if ((flags & MMC_PM_WAKE_SDIO_IRQ) && wow) {
|
||||
if (!(flags & MMC_PM_WAKE_SDIO_IRQ))
|
||||
goto deepsleep;
|
||||
|
||||
/* sdio irq wakes up host */
|
||||
|
||||
if (ar->state == ATH6KL_STATE_SCHED_SCAN) {
|
||||
ret = ath6kl_cfg80211_suspend(ar,
|
||||
ATH6KL_CFG_SUSPEND_SCHED_SCAN,
|
||||
NULL);
|
||||
if (ret) {
|
||||
ath6kl_warn("Schedule scan suspend failed: %d", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = sdio_set_host_pm_flags(func, MMC_PM_WAKE_SDIO_IRQ);
|
||||
if (ret)
|
||||
ath6kl_warn("set sdio wake irq flag failed: %d\n", ret);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (wow) {
|
||||
/*
|
||||
* The host sdio controller is capable of keep power and
|
||||
* sdio irq wake up at this point. It's fine to continue
|
||||
|
@ -816,6 +845,7 @@ static int ath6kl_sdio_suspend(struct ath6kl *ar, struct cfg80211_wowlan *wow)
|
|||
return ret;
|
||||
}
|
||||
|
||||
deepsleep:
|
||||
return ath6kl_cfg80211_suspend(ar, ATH6KL_CFG_SUSPEND_DEEPSLEEP, NULL);
|
||||
}
|
||||
|
||||
|
@ -839,6 +869,8 @@ static int ath6kl_sdio_resume(struct ath6kl *ar)
|
|||
|
||||
case ATH6KL_STATE_WOW:
|
||||
break;
|
||||
case ATH6KL_STATE_SCHED_SCAN:
|
||||
break;
|
||||
}
|
||||
|
||||
ath6kl_cfg80211_resume(ar);
|
||||
|
@ -846,6 +878,264 @@ static int ath6kl_sdio_resume(struct ath6kl *ar)
|
|||
return 0;
|
||||
}
|
||||
|
||||
/* set the window address register (using 4-byte register access ). */
|
||||
static int ath6kl_set_addrwin_reg(struct ath6kl *ar, u32 reg_addr, u32 addr)
|
||||
{
|
||||
int status;
|
||||
u8 addr_val[4];
|
||||
s32 i;
|
||||
|
||||
/*
|
||||
* Write bytes 1,2,3 of the register to set the upper address bytes,
|
||||
* the LSB is written last to initiate the access cycle
|
||||
*/
|
||||
|
||||
for (i = 1; i <= 3; i++) {
|
||||
/*
|
||||
* Fill the buffer with the address byte value we want to
|
||||
* hit 4 times.
|
||||
*/
|
||||
memset(addr_val, ((u8 *)&addr)[i], 4);
|
||||
|
||||
/*
|
||||
* Hit each byte of the register address with a 4-byte
|
||||
* write operation to the same address, this is a harmless
|
||||
* operation.
|
||||
*/
|
||||
status = ath6kl_sdio_read_write_sync(ar, reg_addr + i, addr_val,
|
||||
4, HIF_WR_SYNC_BYTE_FIX);
|
||||
if (status)
|
||||
break;
|
||||
}
|
||||
|
||||
if (status) {
|
||||
ath6kl_err("%s: failed to write initial bytes of 0x%x "
|
||||
"to window reg: 0x%X\n", __func__,
|
||||
addr, reg_addr);
|
||||
return status;
|
||||
}
|
||||
|
||||
/*
|
||||
* Write the address register again, this time write the whole
|
||||
* 4-byte value. The effect here is that the LSB write causes the
|
||||
* cycle to start, the extra 3 byte write to bytes 1,2,3 has no
|
||||
* effect since we are writing the same values again
|
||||
*/
|
||||
status = ath6kl_sdio_read_write_sync(ar, reg_addr, (u8 *)(&addr),
|
||||
4, HIF_WR_SYNC_BYTE_INC);
|
||||
|
||||
if (status) {
|
||||
ath6kl_err("%s: failed to write 0x%x to window reg: 0x%X\n",
|
||||
__func__, addr, reg_addr);
|
||||
return status;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ath6kl_sdio_diag_read32(struct ath6kl *ar, u32 address, u32 *data)
|
||||
{
|
||||
int status;
|
||||
|
||||
/* set window register to start read cycle */
|
||||
status = ath6kl_set_addrwin_reg(ar, WINDOW_READ_ADDR_ADDRESS,
|
||||
address);
|
||||
|
||||
if (status)
|
||||
return status;
|
||||
|
||||
/* read the data */
|
||||
status = ath6kl_sdio_read_write_sync(ar, WINDOW_DATA_ADDRESS,
|
||||
(u8 *)data, sizeof(u32), HIF_RD_SYNC_BYTE_INC);
|
||||
if (status) {
|
||||
ath6kl_err("%s: failed to read from window data addr\n",
|
||||
__func__);
|
||||
return status;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
static int ath6kl_sdio_diag_write32(struct ath6kl *ar, u32 address,
|
||||
__le32 data)
|
||||
{
|
||||
int status;
|
||||
u32 val = (__force u32) data;
|
||||
|
||||
/* set write data */
|
||||
status = ath6kl_sdio_read_write_sync(ar, WINDOW_DATA_ADDRESS,
|
||||
(u8 *) &val, sizeof(u32), HIF_WR_SYNC_BYTE_INC);
|
||||
if (status) {
|
||||
ath6kl_err("%s: failed to write 0x%x to window data addr\n",
|
||||
__func__, data);
|
||||
return status;
|
||||
}
|
||||
|
||||
/* set window register, which starts the write cycle */
|
||||
return ath6kl_set_addrwin_reg(ar, WINDOW_WRITE_ADDR_ADDRESS,
|
||||
address);
|
||||
}
|
||||
|
||||
static int ath6kl_sdio_bmi_credits(struct ath6kl *ar)
|
||||
{
|
||||
u32 addr;
|
||||
unsigned long timeout;
|
||||
int ret;
|
||||
|
||||
ar->bmi.cmd_credits = 0;
|
||||
|
||||
/* Read the counter register to get the command credits */
|
||||
addr = COUNT_DEC_ADDRESS + (HTC_MAILBOX_NUM_MAX + ENDPOINT1) * 4;
|
||||
|
||||
timeout = jiffies + msecs_to_jiffies(BMI_COMMUNICATION_TIMEOUT);
|
||||
while (time_before(jiffies, timeout) && !ar->bmi.cmd_credits) {
|
||||
|
||||
/*
|
||||
* Hit the credit counter with a 4-byte access, the first byte
|
||||
* read will hit the counter and cause a decrement, while the
|
||||
* remaining 3 bytes has no effect. The rationale behind this
|
||||
* is to make all HIF accesses 4-byte aligned.
|
||||
*/
|
||||
ret = ath6kl_sdio_read_write_sync(ar, addr,
|
||||
(u8 *)&ar->bmi.cmd_credits, 4,
|
||||
HIF_RD_SYNC_BYTE_INC);
|
||||
if (ret) {
|
||||
ath6kl_err("Unable to decrement the command credit "
|
||||
"count register: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* The counter is only 8 bits.
|
||||
* Ignore anything in the upper 3 bytes
|
||||
*/
|
||||
ar->bmi.cmd_credits &= 0xFF;
|
||||
}
|
||||
|
||||
if (!ar->bmi.cmd_credits) {
|
||||
ath6kl_err("bmi communication timeout\n");
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ath6kl_bmi_get_rx_lkahd(struct ath6kl *ar)
|
||||
{
|
||||
unsigned long timeout;
|
||||
u32 rx_word = 0;
|
||||
int ret = 0;
|
||||
|
||||
timeout = jiffies + msecs_to_jiffies(BMI_COMMUNICATION_TIMEOUT);
|
||||
while ((time_before(jiffies, timeout)) && !rx_word) {
|
||||
ret = ath6kl_sdio_read_write_sync(ar,
|
||||
RX_LOOKAHEAD_VALID_ADDRESS,
|
||||
(u8 *)&rx_word, sizeof(rx_word),
|
||||
HIF_RD_SYNC_BYTE_INC);
|
||||
if (ret) {
|
||||
ath6kl_err("unable to read RX_LOOKAHEAD_VALID\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* all we really want is one bit */
|
||||
rx_word &= (1 << ENDPOINT1);
|
||||
}
|
||||
|
||||
if (!rx_word) {
|
||||
ath6kl_err("bmi_recv_buf FIFO empty\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ath6kl_sdio_bmi_write(struct ath6kl *ar, u8 *buf, u32 len)
|
||||
{
|
||||
int ret;
|
||||
u32 addr;
|
||||
|
||||
ret = ath6kl_sdio_bmi_credits(ar);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
addr = ar->mbox_info.htc_addr;
|
||||
|
||||
ret = ath6kl_sdio_read_write_sync(ar, addr, buf, len,
|
||||
HIF_WR_SYNC_BYTE_INC);
|
||||
if (ret)
|
||||
ath6kl_err("unable to send the bmi data to the device\n");
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ath6kl_sdio_bmi_read(struct ath6kl *ar, u8 *buf, u32 len)
|
||||
{
|
||||
int ret;
|
||||
u32 addr;
|
||||
|
||||
/*
|
||||
* During normal bootup, small reads may be required.
|
||||
* Rather than issue an HIF Read and then wait as the Target
|
||||
* adds successive bytes to the FIFO, we wait here until
|
||||
* we know that response data is available.
|
||||
*
|
||||
* This allows us to cleanly timeout on an unexpected
|
||||
* Target failure rather than risk problems at the HIF level.
|
||||
* In particular, this avoids SDIO timeouts and possibly garbage
|
||||
* data on some host controllers. And on an interconnect
|
||||
* such as Compact Flash (as well as some SDIO masters) which
|
||||
* does not provide any indication on data timeout, it avoids
|
||||
* a potential hang or garbage response.
|
||||
*
|
||||
* Synchronization is more difficult for reads larger than the
|
||||
* size of the MBOX FIFO (128B), because the Target is unable
|
||||
* to push the 129th byte of data until AFTER the Host posts an
|
||||
* HIF Read and removes some FIFO data. So for large reads the
|
||||
* Host proceeds to post an HIF Read BEFORE all the data is
|
||||
* actually available to read. Fortunately, large BMI reads do
|
||||
* not occur in practice -- they're supported for debug/development.
|
||||
*
|
||||
* So Host/Target BMI synchronization is divided into these cases:
|
||||
* CASE 1: length < 4
|
||||
* Should not happen
|
||||
*
|
||||
* CASE 2: 4 <= length <= 128
|
||||
* Wait for first 4 bytes to be in FIFO
|
||||
* If CONSERVATIVE_BMI_READ is enabled, also wait for
|
||||
* a BMI command credit, which indicates that the ENTIRE
|
||||
* response is available in the the FIFO
|
||||
*
|
||||
* CASE 3: length > 128
|
||||
* Wait for the first 4 bytes to be in FIFO
|
||||
*
|
||||
* For most uses, a small timeout should be sufficient and we will
|
||||
* usually see a response quickly; but there may be some unusual
|
||||
* (debug) cases of BMI_EXECUTE where we want an larger timeout.
|
||||
* For now, we use an unbounded busy loop while waiting for
|
||||
* BMI_EXECUTE.
|
||||
*
|
||||
* If BMI_EXECUTE ever needs to support longer-latency execution,
|
||||
* especially in production, this code needs to be enhanced to sleep
|
||||
* and yield. Also note that BMI_COMMUNICATION_TIMEOUT is currently
|
||||
* a function of Host processor speed.
|
||||
*/
|
||||
if (len >= 4) { /* NB: Currently, always true */
|
||||
ret = ath6kl_bmi_get_rx_lkahd(ar);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
addr = ar->mbox_info.htc_addr;
|
||||
ret = ath6kl_sdio_read_write_sync(ar, addr, buf, len,
|
||||
HIF_RD_SYNC_BYTE_INC);
|
||||
if (ret) {
|
||||
ath6kl_err("Unable to read the bmi data from the device: %d\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void ath6kl_sdio_stop(struct ath6kl *ar)
|
||||
{
|
||||
struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
|
||||
|
@ -890,6 +1180,10 @@ static const struct ath6kl_hif_ops ath6kl_sdio_ops = {
|
|||
.cleanup_scatter = ath6kl_sdio_cleanup_scatter,
|
||||
.suspend = ath6kl_sdio_suspend,
|
||||
.resume = ath6kl_sdio_resume,
|
||||
.diag_read32 = ath6kl_sdio_diag_read32,
|
||||
.diag_write32 = ath6kl_sdio_diag_write32,
|
||||
.bmi_read = ath6kl_sdio_bmi_read,
|
||||
.bmi_write = ath6kl_sdio_bmi_write,
|
||||
.power_on = ath6kl_sdio_power_on,
|
||||
.power_off = ath6kl_sdio_power_off,
|
||||
.stop = ath6kl_sdio_stop,
|
||||
|
@ -958,6 +1252,7 @@ static int ath6kl_sdio_probe(struct sdio_func *func,
|
|||
spin_lock_init(&ar_sdio->lock);
|
||||
spin_lock_init(&ar_sdio->scat_lock);
|
||||
spin_lock_init(&ar_sdio->wr_async_lock);
|
||||
mutex_init(&ar_sdio->dma_buffer_mutex);
|
||||
|
||||
INIT_LIST_HEAD(&ar_sdio->scat_req);
|
||||
INIT_LIST_HEAD(&ar_sdio->bus_req_freeq);
|
||||
|
@ -976,8 +1271,10 @@ static int ath6kl_sdio_probe(struct sdio_func *func,
|
|||
}
|
||||
|
||||
ar_sdio->ar = ar;
|
||||
ar->hif_type = ATH6KL_HIF_TYPE_SDIO;
|
||||
ar->hif_priv = ar_sdio;
|
||||
ar->hif_ops = &ath6kl_sdio_ops;
|
||||
ar->bmi.max_data_size = 256;
|
||||
|
||||
ath6kl_sdio_set_mbox_info(ar);
|
||||
|
||||
|
@ -1027,13 +1324,15 @@ static void ath6kl_sdio_remove(struct sdio_func *func)
|
|||
static const struct sdio_device_id ath6kl_sdio_devices[] = {
|
||||
{SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x0))},
|
||||
{SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x1))},
|
||||
{SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6004_BASE | 0x0))},
|
||||
{SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6004_BASE | 0x1))},
|
||||
{},
|
||||
};
|
||||
|
||||
MODULE_DEVICE_TABLE(sdio, ath6kl_sdio_devices);
|
||||
|
||||
static struct sdio_driver ath6kl_sdio_driver = {
|
||||
.name = "ath6kl",
|
||||
.name = "ath6kl_sdio",
|
||||
.id_table = ath6kl_sdio_devices,
|
||||
.probe = ath6kl_sdio_probe,
|
||||
.remove = ath6kl_sdio_remove,
|
||||
|
@ -1063,13 +1362,19 @@ MODULE_AUTHOR("Atheros Communications, Inc.");
|
|||
MODULE_DESCRIPTION("Driver support for Atheros AR600x SDIO devices");
|
||||
MODULE_LICENSE("Dual BSD/GPL");
|
||||
|
||||
MODULE_FIRMWARE(AR6003_REV2_OTP_FILE);
|
||||
MODULE_FIRMWARE(AR6003_REV2_FIRMWARE_FILE);
|
||||
MODULE_FIRMWARE(AR6003_REV2_PATCH_FILE);
|
||||
MODULE_FIRMWARE(AR6003_REV2_BOARD_DATA_FILE);
|
||||
MODULE_FIRMWARE(AR6003_REV2_DEFAULT_BOARD_DATA_FILE);
|
||||
MODULE_FIRMWARE(AR6003_REV3_OTP_FILE);
|
||||
MODULE_FIRMWARE(AR6003_REV3_FIRMWARE_FILE);
|
||||
MODULE_FIRMWARE(AR6003_REV3_PATCH_FILE);
|
||||
MODULE_FIRMWARE(AR6003_REV3_BOARD_DATA_FILE);
|
||||
MODULE_FIRMWARE(AR6003_REV3_DEFAULT_BOARD_DATA_FILE);
|
||||
MODULE_FIRMWARE(AR6003_HW_2_0_OTP_FILE);
|
||||
MODULE_FIRMWARE(AR6003_HW_2_0_FIRMWARE_FILE);
|
||||
MODULE_FIRMWARE(AR6003_HW_2_0_PATCH_FILE);
|
||||
MODULE_FIRMWARE(AR6003_HW_2_0_BOARD_DATA_FILE);
|
||||
MODULE_FIRMWARE(AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE);
|
||||
MODULE_FIRMWARE(AR6003_HW_2_1_1_OTP_FILE);
|
||||
MODULE_FIRMWARE(AR6003_HW_2_1_1_FIRMWARE_FILE);
|
||||
MODULE_FIRMWARE(AR6003_HW_2_1_1_PATCH_FILE);
|
||||
MODULE_FIRMWARE(AR6003_HW_2_1_1_BOARD_DATA_FILE);
|
||||
MODULE_FIRMWARE(AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE);
|
||||
MODULE_FIRMWARE(AR6004_HW_1_0_FIRMWARE_FILE);
|
||||
MODULE_FIRMWARE(AR6004_HW_1_0_BOARD_DATA_FILE);
|
||||
MODULE_FIRMWARE(AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE);
|
||||
MODULE_FIRMWARE(AR6004_HW_1_1_FIRMWARE_FILE);
|
||||
MODULE_FIRMWARE(AR6004_HW_1_1_BOARD_DATA_FILE);
|
||||
MODULE_FIRMWARE(AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE);
|
||||
|
|
|
@ -20,7 +20,7 @@
|
|||
#define AR6003_BOARD_DATA_SZ 1024
|
||||
#define AR6003_BOARD_EXT_DATA_SZ 768
|
||||
|
||||
#define AR6004_BOARD_DATA_SZ 7168
|
||||
#define AR6004_BOARD_DATA_SZ 6144
|
||||
#define AR6004_BOARD_EXT_DATA_SZ 0
|
||||
|
||||
#define RESET_CONTROL_ADDRESS 0x00000000
|
||||
|
@ -334,20 +334,6 @@ struct host_interest {
|
|||
(((target_type) == TARGET_TYPE_AR6003) ? AR6003_VTOP(vaddr) : \
|
||||
(((target_type) == TARGET_TYPE_AR6004) ? AR6004_VTOP(vaddr) : 0))
|
||||
|
||||
#define AR6003_REV2_APP_LOAD_ADDRESS 0x543180
|
||||
#define AR6003_REV2_BOARD_EXT_DATA_ADDRESS 0x57E500
|
||||
#define AR6003_REV2_DATASET_PATCH_ADDRESS 0x57e884
|
||||
#define AR6003_REV2_RAM_RESERVE_SIZE 6912
|
||||
|
||||
#define AR6003_REV3_APP_LOAD_ADDRESS 0x545000
|
||||
#define AR6003_REV3_BOARD_EXT_DATA_ADDRESS 0x542330
|
||||
#define AR6003_REV3_DATASET_PATCH_ADDRESS 0x57FF74
|
||||
#define AR6003_REV3_RAM_RESERVE_SIZE 512
|
||||
|
||||
#define AR6004_REV1_BOARD_DATA_ADDRESS 0x435400
|
||||
#define AR6004_REV1_BOARD_EXT_DATA_ADDRESS 0x437000
|
||||
#define AR6004_REV1_RAM_RESERVE_SIZE 11264
|
||||
|
||||
#define ATH6KL_FWLOG_PAYLOAD_SIZE 1500
|
||||
|
||||
struct ath6kl_dbglog_buf {
|
||||
|
|
|
@ -453,11 +453,11 @@ enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target,
|
|||
set_bit(WMI_CTRL_EP_FULL, &ar->flag);
|
||||
spin_unlock_bh(&ar->lock);
|
||||
ath6kl_err("wmi ctrl ep is full\n");
|
||||
goto stop_adhoc_netq;
|
||||
return action;
|
||||
}
|
||||
|
||||
if (packet->info.tx.tag == ATH6KL_CONTROL_PKT_TAG)
|
||||
goto stop_adhoc_netq;
|
||||
return action;
|
||||
|
||||
/*
|
||||
* The last MAX_HI_COOKIE_NUM "batch" of cookies are reserved for
|
||||
|
@ -465,20 +465,18 @@ enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target,
|
|||
*/
|
||||
if (ar->ac_stream_pri_map[ar->ep2ac_map[endpoint]] <
|
||||
ar->hiac_stream_active_pri &&
|
||||
ar->cookie_count <= MAX_HI_COOKIE_NUM) {
|
||||
ar->cookie_count <= MAX_HI_COOKIE_NUM)
|
||||
/*
|
||||
* Give preference to the highest priority stream by
|
||||
* dropping the packets which overflowed.
|
||||
*/
|
||||
action = HTC_SEND_FULL_DROP;
|
||||
goto stop_adhoc_netq;
|
||||
}
|
||||
|
||||
stop_adhoc_netq:
|
||||
/* FIXME: Locking */
|
||||
spin_lock_bh(&ar->list_lock);
|
||||
list_for_each_entry(vif, &ar->vif_list, list) {
|
||||
if (vif->nw_type == ADHOC_NETWORK) {
|
||||
if (vif->nw_type == ADHOC_NETWORK ||
|
||||
action != HTC_SEND_FULL_DROP) {
|
||||
spin_unlock_bh(&ar->list_lock);
|
||||
|
||||
spin_lock_bh(&vif->if_lock);
|
||||
|
@ -543,7 +541,7 @@ void ath6kl_tx_complete(void *context, struct list_head *packet_queue)
|
|||
int status;
|
||||
enum htc_endpoint_id eid;
|
||||
bool wake_event = false;
|
||||
bool flushing[MAX_NUM_VIF] = {false};
|
||||
bool flushing[ATH6KL_VIF_MAX] = {false};
|
||||
u8 if_idx;
|
||||
struct ath6kl_vif *vif;
|
||||
|
||||
|
@ -571,8 +569,6 @@ void ath6kl_tx_complete(void *context, struct list_head *packet_queue)
|
|||
if (!skb || !skb->data)
|
||||
goto fatal;
|
||||
|
||||
packet->buf = skb->data;
|
||||
|
||||
__skb_queue_tail(&skb_queue, skb);
|
||||
|
||||
if (!status && (packet->act_len != skb->len))
|
||||
|
@ -593,10 +589,10 @@ void ath6kl_tx_complete(void *context, struct list_head *packet_queue)
|
|||
|
||||
if (eid == ar->ctrl_ep) {
|
||||
if_idx = wmi_cmd_hdr_get_if_idx(
|
||||
(struct wmi_cmd_hdr *) skb->data);
|
||||
(struct wmi_cmd_hdr *) packet->buf);
|
||||
} else {
|
||||
if_idx = wmi_data_hdr_get_if_idx(
|
||||
(struct wmi_data_hdr *) skb->data);
|
||||
(struct wmi_data_hdr *) packet->buf);
|
||||
}
|
||||
|
||||
vif = ath6kl_get_vif_by_index(ar, if_idx);
|
||||
|
|
|
@ -0,0 +1,431 @@
|
|||
/*
|
||||
* Copyright (c) 2007-2011 Atheros Communications Inc.
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/usb.h>
|
||||
|
||||
#include "debug.h"
|
||||
#include "core.h"
|
||||
|
||||
/* usb device object */
|
||||
struct ath6kl_usb {
|
||||
struct usb_device *udev;
|
||||
struct usb_interface *interface;
|
||||
u8 *diag_cmd_buffer;
|
||||
u8 *diag_resp_buffer;
|
||||
struct ath6kl *ar;
|
||||
};
|
||||
|
||||
/* diagnostic command defnitions */
|
||||
#define ATH6KL_USB_CONTROL_REQ_SEND_BMI_CMD 1
|
||||
#define ATH6KL_USB_CONTROL_REQ_RECV_BMI_RESP 2
|
||||
#define ATH6KL_USB_CONTROL_REQ_DIAG_CMD 3
|
||||
#define ATH6KL_USB_CONTROL_REQ_DIAG_RESP 4
|
||||
|
||||
#define ATH6KL_USB_CTRL_DIAG_CC_READ 0
|
||||
#define ATH6KL_USB_CTRL_DIAG_CC_WRITE 1
|
||||
|
||||
struct ath6kl_usb_ctrl_diag_cmd_write {
|
||||
__le32 cmd;
|
||||
__le32 address;
|
||||
__le32 value;
|
||||
__le32 _pad[1];
|
||||
} __packed;
|
||||
|
||||
struct ath6kl_usb_ctrl_diag_cmd_read {
|
||||
__le32 cmd;
|
||||
__le32 address;
|
||||
} __packed;
|
||||
|
||||
struct ath6kl_usb_ctrl_diag_resp_read {
|
||||
__le32 value;
|
||||
} __packed;
|
||||
|
||||
#define ATH6KL_USB_MAX_DIAG_CMD (sizeof(struct ath6kl_usb_ctrl_diag_cmd_write))
|
||||
#define ATH6KL_USB_MAX_DIAG_RESP (sizeof(struct ath6kl_usb_ctrl_diag_resp_read))
|
||||
|
||||
static void ath6kl_usb_destroy(struct ath6kl_usb *ar_usb)
|
||||
{
|
||||
usb_set_intfdata(ar_usb->interface, NULL);
|
||||
|
||||
kfree(ar_usb->diag_cmd_buffer);
|
||||
kfree(ar_usb->diag_resp_buffer);
|
||||
|
||||
kfree(ar_usb);
|
||||
}
|
||||
|
||||
static struct ath6kl_usb *ath6kl_usb_create(struct usb_interface *interface)
|
||||
{
|
||||
struct ath6kl_usb *ar_usb = NULL;
|
||||
struct usb_device *dev = interface_to_usbdev(interface);
|
||||
int status = 0;
|
||||
|
||||
ar_usb = kzalloc(sizeof(struct ath6kl_usb), GFP_KERNEL);
|
||||
if (ar_usb == NULL)
|
||||
goto fail_ath6kl_usb_create;
|
||||
|
||||
memset(ar_usb, 0, sizeof(struct ath6kl_usb));
|
||||
usb_set_intfdata(interface, ar_usb);
|
||||
ar_usb->udev = dev;
|
||||
ar_usb->interface = interface;
|
||||
|
||||
ar_usb->diag_cmd_buffer = kzalloc(ATH6KL_USB_MAX_DIAG_CMD, GFP_KERNEL);
|
||||
if (ar_usb->diag_cmd_buffer == NULL) {
|
||||
status = -ENOMEM;
|
||||
goto fail_ath6kl_usb_create;
|
||||
}
|
||||
|
||||
ar_usb->diag_resp_buffer = kzalloc(ATH6KL_USB_MAX_DIAG_RESP,
|
||||
GFP_KERNEL);
|
||||
if (ar_usb->diag_resp_buffer == NULL) {
|
||||
status = -ENOMEM;
|
||||
goto fail_ath6kl_usb_create;
|
||||
}
|
||||
|
||||
fail_ath6kl_usb_create:
|
||||
if (status != 0) {
|
||||
ath6kl_usb_destroy(ar_usb);
|
||||
ar_usb = NULL;
|
||||
}
|
||||
return ar_usb;
|
||||
}
|
||||
|
||||
static void ath6kl_usb_device_detached(struct usb_interface *interface)
|
||||
{
|
||||
struct ath6kl_usb *ar_usb;
|
||||
|
||||
ar_usb = usb_get_intfdata(interface);
|
||||
if (ar_usb == NULL)
|
||||
return;
|
||||
|
||||
ath6kl_stop_txrx(ar_usb->ar);
|
||||
|
||||
ath6kl_core_cleanup(ar_usb->ar);
|
||||
|
||||
ath6kl_usb_destroy(ar_usb);
|
||||
}
|
||||
|
||||
static int ath6kl_usb_submit_ctrl_out(struct ath6kl_usb *ar_usb,
|
||||
u8 req, u16 value, u16 index, void *data,
|
||||
u32 size)
|
||||
{
|
||||
u8 *buf = NULL;
|
||||
int ret;
|
||||
|
||||
if (size > 0) {
|
||||
buf = kmalloc(size, GFP_KERNEL);
|
||||
if (buf == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
memcpy(buf, data, size);
|
||||
}
|
||||
|
||||
/* note: if successful returns number of bytes transfered */
|
||||
ret = usb_control_msg(ar_usb->udev,
|
||||
usb_sndctrlpipe(ar_usb->udev, 0),
|
||||
req,
|
||||
USB_DIR_OUT | USB_TYPE_VENDOR |
|
||||
USB_RECIP_DEVICE, value, index, buf,
|
||||
size, 1000);
|
||||
|
||||
if (ret < 0) {
|
||||
ath6kl_dbg(ATH6KL_DBG_USB, "%s failed,result = %d\n",
|
||||
__func__, ret);
|
||||
}
|
||||
|
||||
kfree(buf);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ath6kl_usb_submit_ctrl_in(struct ath6kl_usb *ar_usb,
|
||||
u8 req, u16 value, u16 index, void *data,
|
||||
u32 size)
|
||||
{
|
||||
u8 *buf = NULL;
|
||||
int ret;
|
||||
|
||||
if (size > 0) {
|
||||
buf = kmalloc(size, GFP_KERNEL);
|
||||
if (buf == NULL)
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
/* note: if successful returns number of bytes transfered */
|
||||
ret = usb_control_msg(ar_usb->udev,
|
||||
usb_rcvctrlpipe(ar_usb->udev, 0),
|
||||
req,
|
||||
USB_DIR_IN | USB_TYPE_VENDOR |
|
||||
USB_RECIP_DEVICE, value, index, buf,
|
||||
size, 2 * HZ);
|
||||
|
||||
if (ret < 0) {
|
||||
ath6kl_dbg(ATH6KL_DBG_USB, "%s failed,result = %d\n",
|
||||
__func__, ret);
|
||||
}
|
||||
|
||||
memcpy((u8 *) data, buf, size);
|
||||
|
||||
kfree(buf);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ath6kl_usb_ctrl_msg_exchange(struct ath6kl_usb *ar_usb,
|
||||
u8 req_val, u8 *req_buf, u32 req_len,
|
||||
u8 resp_val, u8 *resp_buf, u32 *resp_len)
|
||||
{
|
||||
int ret;
|
||||
|
||||
/* send command */
|
||||
ret = ath6kl_usb_submit_ctrl_out(ar_usb, req_val, 0, 0,
|
||||
req_buf, req_len);
|
||||
|
||||
if (ret != 0)
|
||||
return ret;
|
||||
|
||||
if (resp_buf == NULL) {
|
||||
/* no expected response */
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* get response */
|
||||
ret = ath6kl_usb_submit_ctrl_in(ar_usb, resp_val, 0, 0,
|
||||
resp_buf, *resp_len);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ath6kl_usb_diag_read32(struct ath6kl *ar, u32 address, u32 *data)
|
||||
{
|
||||
struct ath6kl_usb *ar_usb = ar->hif_priv;
|
||||
struct ath6kl_usb_ctrl_diag_resp_read *resp;
|
||||
struct ath6kl_usb_ctrl_diag_cmd_read *cmd;
|
||||
u32 resp_len;
|
||||
int ret;
|
||||
|
||||
cmd = (struct ath6kl_usb_ctrl_diag_cmd_read *) ar_usb->diag_cmd_buffer;
|
||||
|
||||
memset(cmd, 0, sizeof(*cmd));
|
||||
cmd->cmd = ATH6KL_USB_CTRL_DIAG_CC_READ;
|
||||
cmd->address = cpu_to_le32(address);
|
||||
resp_len = sizeof(*resp);
|
||||
|
||||
ret = ath6kl_usb_ctrl_msg_exchange(ar_usb,
|
||||
ATH6KL_USB_CONTROL_REQ_DIAG_CMD,
|
||||
(u8 *) cmd,
|
||||
sizeof(struct ath6kl_usb_ctrl_diag_cmd_write),
|
||||
ATH6KL_USB_CONTROL_REQ_DIAG_RESP,
|
||||
ar_usb->diag_resp_buffer, &resp_len);
|
||||
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
resp = (struct ath6kl_usb_ctrl_diag_resp_read *)
|
||||
ar_usb->diag_resp_buffer;
|
||||
|
||||
*data = le32_to_cpu(resp->value);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ath6kl_usb_diag_write32(struct ath6kl *ar, u32 address, __le32 data)
|
||||
{
|
||||
struct ath6kl_usb *ar_usb = ar->hif_priv;
|
||||
struct ath6kl_usb_ctrl_diag_cmd_write *cmd;
|
||||
|
||||
cmd = (struct ath6kl_usb_ctrl_diag_cmd_write *) ar_usb->diag_cmd_buffer;
|
||||
|
||||
memset(cmd, 0, sizeof(struct ath6kl_usb_ctrl_diag_cmd_write));
|
||||
cmd->cmd = cpu_to_le32(ATH6KL_USB_CTRL_DIAG_CC_WRITE);
|
||||
cmd->address = cpu_to_le32(address);
|
||||
cmd->value = data;
|
||||
|
||||
return ath6kl_usb_ctrl_msg_exchange(ar_usb,
|
||||
ATH6KL_USB_CONTROL_REQ_DIAG_CMD,
|
||||
(u8 *) cmd,
|
||||
sizeof(*cmd),
|
||||
0, NULL, NULL);
|
||||
|
||||
}
|
||||
|
||||
static int ath6kl_usb_bmi_read(struct ath6kl *ar, u8 *buf, u32 len)
|
||||
{
|
||||
struct ath6kl_usb *ar_usb = ar->hif_priv;
|
||||
int ret;
|
||||
|
||||
/* get response */
|
||||
ret = ath6kl_usb_submit_ctrl_in(ar_usb,
|
||||
ATH6KL_USB_CONTROL_REQ_RECV_BMI_RESP,
|
||||
0, 0, buf, len);
|
||||
if (ret != 0) {
|
||||
ath6kl_err("Unable to read the bmi data from the device: %d\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ath6kl_usb_bmi_write(struct ath6kl *ar, u8 *buf, u32 len)
|
||||
{
|
||||
struct ath6kl_usb *ar_usb = ar->hif_priv;
|
||||
int ret;
|
||||
|
||||
/* send command */
|
||||
ret = ath6kl_usb_submit_ctrl_out(ar_usb,
|
||||
ATH6KL_USB_CONTROL_REQ_SEND_BMI_CMD,
|
||||
0, 0, buf, len);
|
||||
if (ret != 0) {
|
||||
ath6kl_err("unable to send the bmi data to the device: %d\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ath6kl_usb_power_on(struct ath6kl *ar)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ath6kl_usb_power_off(struct ath6kl *ar)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct ath6kl_hif_ops ath6kl_usb_ops = {
|
||||
.diag_read32 = ath6kl_usb_diag_read32,
|
||||
.diag_write32 = ath6kl_usb_diag_write32,
|
||||
.bmi_read = ath6kl_usb_bmi_read,
|
||||
.bmi_write = ath6kl_usb_bmi_write,
|
||||
.power_on = ath6kl_usb_power_on,
|
||||
.power_off = ath6kl_usb_power_off,
|
||||
};
|
||||
|
||||
/* ath6kl usb driver registered functions */
|
||||
static int ath6kl_usb_probe(struct usb_interface *interface,
|
||||
const struct usb_device_id *id)
|
||||
{
|
||||
struct usb_device *dev = interface_to_usbdev(interface);
|
||||
struct ath6kl *ar;
|
||||
struct ath6kl_usb *ar_usb = NULL;
|
||||
int vendor_id, product_id;
|
||||
int ret = 0;
|
||||
|
||||
usb_get_dev(dev);
|
||||
|
||||
vendor_id = le16_to_cpu(dev->descriptor.idVendor);
|
||||
product_id = le16_to_cpu(dev->descriptor.idProduct);
|
||||
|
||||
ath6kl_dbg(ATH6KL_DBG_USB, "vendor_id = %04x\n", vendor_id);
|
||||
ath6kl_dbg(ATH6KL_DBG_USB, "product_id = %04x\n", product_id);
|
||||
|
||||
if (interface->cur_altsetting)
|
||||
ath6kl_dbg(ATH6KL_DBG_USB, "USB Interface %d\n",
|
||||
interface->cur_altsetting->desc.bInterfaceNumber);
|
||||
|
||||
|
||||
if (dev->speed == USB_SPEED_HIGH)
|
||||
ath6kl_dbg(ATH6KL_DBG_USB, "USB 2.0 Host\n");
|
||||
else
|
||||
ath6kl_dbg(ATH6KL_DBG_USB, "USB 1.1 Host\n");
|
||||
|
||||
ar_usb = ath6kl_usb_create(interface);
|
||||
|
||||
if (ar_usb == NULL) {
|
||||
ret = -ENOMEM;
|
||||
goto err_usb_put;
|
||||
}
|
||||
|
||||
ar = ath6kl_core_alloc(&ar_usb->udev->dev);
|
||||
if (ar == NULL) {
|
||||
ath6kl_err("Failed to alloc ath6kl core\n");
|
||||
ret = -ENOMEM;
|
||||
goto err_usb_destroy;
|
||||
}
|
||||
|
||||
ar->hif_priv = ar_usb;
|
||||
ar->hif_type = ATH6KL_HIF_TYPE_USB;
|
||||
ar->hif_ops = &ath6kl_usb_ops;
|
||||
ar->mbox_info.block_size = 16;
|
||||
ar->bmi.max_data_size = 252;
|
||||
|
||||
ar_usb->ar = ar;
|
||||
|
||||
ret = ath6kl_core_init(ar);
|
||||
if (ret) {
|
||||
ath6kl_err("Failed to init ath6kl core: %d\n", ret);
|
||||
goto err_core_free;
|
||||
}
|
||||
|
||||
return ret;
|
||||
|
||||
err_core_free:
|
||||
ath6kl_core_free(ar);
|
||||
err_usb_destroy:
|
||||
ath6kl_usb_destroy(ar_usb);
|
||||
err_usb_put:
|
||||
usb_put_dev(dev);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void ath6kl_usb_remove(struct usb_interface *interface)
|
||||
{
|
||||
usb_put_dev(interface_to_usbdev(interface));
|
||||
ath6kl_usb_device_detached(interface);
|
||||
}
|
||||
|
||||
/* table of devices that work with this driver */
|
||||
static struct usb_device_id ath6kl_usb_ids[] = {
|
||||
{USB_DEVICE(0x0cf3, 0x9374)},
|
||||
{ /* Terminating entry */ },
|
||||
};
|
||||
|
||||
MODULE_DEVICE_TABLE(usb, ath6kl_usb_ids);
|
||||
|
||||
static struct usb_driver ath6kl_usb_driver = {
|
||||
.name = "ath6kl_usb",
|
||||
.probe = ath6kl_usb_probe,
|
||||
.disconnect = ath6kl_usb_remove,
|
||||
.id_table = ath6kl_usb_ids,
|
||||
};
|
||||
|
||||
static int ath6kl_usb_init(void)
|
||||
{
|
||||
usb_register(&ath6kl_usb_driver);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void ath6kl_usb_exit(void)
|
||||
{
|
||||
usb_deregister(&ath6kl_usb_driver);
|
||||
}
|
||||
|
||||
module_init(ath6kl_usb_init);
|
||||
module_exit(ath6kl_usb_exit);
|
||||
|
||||
MODULE_AUTHOR("Atheros Communications, Inc.");
|
||||
MODULE_DESCRIPTION("Driver support for Atheros AR600x USB devices");
|
||||
MODULE_LICENSE("Dual BSD/GPL");
|
||||
MODULE_FIRMWARE(AR6004_HW_1_0_FIRMWARE_FILE);
|
||||
MODULE_FIRMWARE(AR6004_HW_1_0_BOARD_DATA_FILE);
|
||||
MODULE_FIRMWARE(AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE);
|
||||
MODULE_FIRMWARE(AR6004_HW_1_1_FIRMWARE_FILE);
|
||||
MODULE_FIRMWARE(AR6004_HW_1_1_BOARD_DATA_FILE);
|
||||
MODULE_FIRMWARE(AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE);
|
|
@ -85,7 +85,7 @@ struct ath6kl_vif *ath6kl_get_vif_by_index(struct ath6kl *ar, u8 if_idx)
|
|||
{
|
||||
struct ath6kl_vif *vif, *found = NULL;
|
||||
|
||||
if (WARN_ON(if_idx > (MAX_NUM_VIF - 1)))
|
||||
if (WARN_ON(if_idx > (ar->vif_max - 1)))
|
||||
return NULL;
|
||||
|
||||
/* FIXME: Locking */
|
||||
|
@ -187,7 +187,7 @@ int ath6kl_wmi_data_hdr_add(struct wmi *wmi, struct sk_buff *skb,
|
|||
struct wmi_data_hdr *data_hdr;
|
||||
int ret;
|
||||
|
||||
if (WARN_ON(skb == NULL || (if_idx > MAX_NUM_VIF - 1)))
|
||||
if (WARN_ON(skb == NULL || (if_idx > wmi->parent_dev->vif_max - 1)))
|
||||
return -EINVAL;
|
||||
|
||||
if (tx_meta_info) {
|
||||
|
@ -977,6 +977,13 @@ static int ath6kl_wmi_tkip_micerr_event_rx(struct wmi *wmi, u8 *datap, int len,
|
|||
return 0;
|
||||
}
|
||||
|
||||
void ath6kl_wmi_sscan_timer(unsigned long ptr)
|
||||
{
|
||||
struct ath6kl_vif *vif = (struct ath6kl_vif *) ptr;
|
||||
|
||||
cfg80211_sched_scan_results(vif->ar->wiphy);
|
||||
}
|
||||
|
||||
static int ath6kl_wmi_bssinfo_event_rx(struct wmi *wmi, u8 *datap, int len,
|
||||
struct ath6kl_vif *vif)
|
||||
{
|
||||
|
@ -1066,6 +1073,21 @@ static int ath6kl_wmi_bssinfo_event_rx(struct wmi *wmi, u8 *datap, int len,
|
|||
return -ENOMEM;
|
||||
cfg80211_put_bss(bss);
|
||||
|
||||
/*
|
||||
* Firmware doesn't return any event when scheduled scan has
|
||||
* finished, so we need to use a timer to find out when there are
|
||||
* no more results.
|
||||
*
|
||||
* The timer is started from the first bss info received, otherwise
|
||||
* the timer would not ever fire if the scan interval is short
|
||||
* enough.
|
||||
*/
|
||||
if (ar->state == ATH6KL_STATE_SCHED_SCAN &&
|
||||
!timer_pending(&vif->sched_scan_timer)) {
|
||||
mod_timer(&vif->sched_scan_timer, jiffies +
|
||||
msecs_to_jiffies(ATH6KL_SCHED_SCAN_RESULT_DELAY));
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -1620,7 +1642,7 @@ int ath6kl_wmi_cmd_send(struct wmi *wmi, u8 if_idx, struct sk_buff *skb,
|
|||
int ret;
|
||||
u16 info1;
|
||||
|
||||
if (WARN_ON(skb == NULL || (if_idx > (MAX_NUM_VIF - 1))))
|
||||
if (WARN_ON(skb == NULL || (if_idx > (wmi->parent_dev->vif_max - 1))))
|
||||
return -EINVAL;
|
||||
|
||||
ath6kl_dbg(ATH6KL_DBG_WMI, "wmi tx id %d len %d flag %d\n",
|
||||
|
@ -1682,7 +1704,8 @@ int ath6kl_wmi_connect_cmd(struct wmi *wmi, u8 if_idx,
|
|||
u8 pairwise_crypto_len,
|
||||
enum crypto_type group_crypto,
|
||||
u8 group_crypto_len, int ssid_len, u8 *ssid,
|
||||
u8 *bssid, u16 channel, u32 ctrl_flags)
|
||||
u8 *bssid, u16 channel, u32 ctrl_flags,
|
||||
u8 nw_subtype)
|
||||
{
|
||||
struct sk_buff *skb;
|
||||
struct wmi_connect_cmd *cc;
|
||||
|
@ -1722,6 +1745,7 @@ int ath6kl_wmi_connect_cmd(struct wmi *wmi, u8 if_idx,
|
|||
cc->grp_crypto_len = group_crypto_len;
|
||||
cc->ch = cpu_to_le16(channel);
|
||||
cc->ctrl_flags = cpu_to_le32(ctrl_flags);
|
||||
cc->nw_subtype = nw_subtype;
|
||||
|
||||
if (bssid != NULL)
|
||||
memcpy(cc->bssid, bssid, ETH_ALEN);
|
||||
|
@ -1774,6 +1798,72 @@ int ath6kl_wmi_disconnect_cmd(struct wmi *wmi, u8 if_idx)
|
|||
return ret;
|
||||
}
|
||||
|
||||
int ath6kl_wmi_beginscan_cmd(struct wmi *wmi, u8 if_idx,
|
||||
enum wmi_scan_type scan_type,
|
||||
u32 force_fgscan, u32 is_legacy,
|
||||
u32 home_dwell_time, u32 force_scan_interval,
|
||||
s8 num_chan, u16 *ch_list, u32 no_cck, u32 *rates)
|
||||
{
|
||||
struct sk_buff *skb;
|
||||
struct wmi_begin_scan_cmd *sc;
|
||||
s8 size;
|
||||
int i, band, ret;
|
||||
struct ath6kl *ar = wmi->parent_dev;
|
||||
int num_rates;
|
||||
|
||||
size = sizeof(struct wmi_begin_scan_cmd);
|
||||
|
||||
if ((scan_type != WMI_LONG_SCAN) && (scan_type != WMI_SHORT_SCAN))
|
||||
return -EINVAL;
|
||||
|
||||
if (num_chan > WMI_MAX_CHANNELS)
|
||||
return -EINVAL;
|
||||
|
||||
if (num_chan)
|
||||
size += sizeof(u16) * (num_chan - 1);
|
||||
|
||||
skb = ath6kl_wmi_get_new_buf(size);
|
||||
if (!skb)
|
||||
return -ENOMEM;
|
||||
|
||||
sc = (struct wmi_begin_scan_cmd *) skb->data;
|
||||
sc->scan_type = scan_type;
|
||||
sc->force_fg_scan = cpu_to_le32(force_fgscan);
|
||||
sc->is_legacy = cpu_to_le32(is_legacy);
|
||||
sc->home_dwell_time = cpu_to_le32(home_dwell_time);
|
||||
sc->force_scan_intvl = cpu_to_le32(force_scan_interval);
|
||||
sc->no_cck = cpu_to_le32(no_cck);
|
||||
sc->num_ch = num_chan;
|
||||
|
||||
for (band = 0; band < IEEE80211_NUM_BANDS; band++) {
|
||||
struct ieee80211_supported_band *sband =
|
||||
ar->wiphy->bands[band];
|
||||
u32 ratemask = rates[band];
|
||||
u8 *supp_rates = sc->supp_rates[band].rates;
|
||||
num_rates = 0;
|
||||
|
||||
for (i = 0; i < sband->n_bitrates; i++) {
|
||||
if ((BIT(i) & ratemask) == 0)
|
||||
continue; /* skip rate */
|
||||
supp_rates[num_rates++] =
|
||||
(u8) (sband->bitrates[i].bitrate / 5);
|
||||
}
|
||||
sc->supp_rates[band].nrates = num_rates;
|
||||
}
|
||||
|
||||
for (i = 0; i < num_chan; i++)
|
||||
sc->ch_list[i] = cpu_to_le16(ch_list[i]);
|
||||
|
||||
ret = ath6kl_wmi_cmd_send(wmi, if_idx, skb, WMI_BEGIN_SCAN_CMDID,
|
||||
NO_SYNC_WMIFLAG);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* ath6kl_wmi_start_scan_cmd is to be deprecated. Use
|
||||
* ath6kl_wmi_begin_scan_cmd instead. The new function supports P2P
|
||||
* mgmt operations using station interface.
|
||||
*/
|
||||
int ath6kl_wmi_startscan_cmd(struct wmi *wmi, u8 if_idx,
|
||||
enum wmi_scan_type scan_type,
|
||||
u32 force_fgscan, u32 is_legacy,
|
||||
|
@ -2940,7 +3030,10 @@ int ath6kl_wmi_set_appie_cmd(struct wmi *wmi, u8 if_idx, u8 mgmt_frm_type,
|
|||
p = (struct wmi_set_appie_cmd *) skb->data;
|
||||
p->mgmt_frm_type = mgmt_frm_type;
|
||||
p->ie_len = ie_len;
|
||||
|
||||
if (ie != NULL && ie_len > 0)
|
||||
memcpy(p->ie_info, ie, ie_len);
|
||||
|
||||
return ath6kl_wmi_cmd_send(wmi, if_idx, skb, WMI_SET_APPIE_CMDID,
|
||||
NO_SYNC_WMIFLAG);
|
||||
}
|
||||
|
@ -2981,6 +3074,10 @@ int ath6kl_wmi_remain_on_chnl_cmd(struct wmi *wmi, u8 if_idx, u32 freq, u32 dur)
|
|||
NO_SYNC_WMIFLAG);
|
||||
}
|
||||
|
||||
/* ath6kl_wmi_send_action_cmd is to be deprecated. Use
|
||||
* ath6kl_wmi_send_mgmt_cmd instead. The new function supports P2P
|
||||
* mgmt operations using station interface.
|
||||
*/
|
||||
int ath6kl_wmi_send_action_cmd(struct wmi *wmi, u8 if_idx, u32 id, u32 freq,
|
||||
u32 wait, const u8 *data, u16 data_len)
|
||||
{
|
||||
|
@ -3018,14 +3115,57 @@ int ath6kl_wmi_send_action_cmd(struct wmi *wmi, u8 if_idx, u32 id, u32 freq,
|
|||
NO_SYNC_WMIFLAG);
|
||||
}
|
||||
|
||||
int ath6kl_wmi_send_mgmt_cmd(struct wmi *wmi, u8 if_idx, u32 id, u32 freq,
|
||||
u32 wait, const u8 *data, u16 data_len,
|
||||
u32 no_cck)
|
||||
{
|
||||
struct sk_buff *skb;
|
||||
struct wmi_send_mgmt_cmd *p;
|
||||
u8 *buf;
|
||||
|
||||
if (wait)
|
||||
return -EINVAL; /* Offload for wait not supported */
|
||||
|
||||
buf = kmalloc(data_len, GFP_KERNEL);
|
||||
if (!buf)
|
||||
return -ENOMEM;
|
||||
|
||||
skb = ath6kl_wmi_get_new_buf(sizeof(*p) + data_len);
|
||||
if (!skb) {
|
||||
kfree(buf);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
kfree(wmi->last_mgmt_tx_frame);
|
||||
memcpy(buf, data, data_len);
|
||||
wmi->last_mgmt_tx_frame = buf;
|
||||
wmi->last_mgmt_tx_frame_len = data_len;
|
||||
|
||||
ath6kl_dbg(ATH6KL_DBG_WMI, "send_action_cmd: id=%u freq=%u wait=%u "
|
||||
"len=%u\n", id, freq, wait, data_len);
|
||||
p = (struct wmi_send_mgmt_cmd *) skb->data;
|
||||
p->id = cpu_to_le32(id);
|
||||
p->freq = cpu_to_le32(freq);
|
||||
p->wait = cpu_to_le32(wait);
|
||||
p->no_cck = cpu_to_le32(no_cck);
|
||||
p->len = cpu_to_le16(data_len);
|
||||
memcpy(p->data, data, data_len);
|
||||
return ath6kl_wmi_cmd_send(wmi, if_idx, skb, WMI_SEND_MGMT_CMDID,
|
||||
NO_SYNC_WMIFLAG);
|
||||
}
|
||||
|
||||
int ath6kl_wmi_send_probe_response_cmd(struct wmi *wmi, u8 if_idx, u32 freq,
|
||||
const u8 *dst, const u8 *data,
|
||||
u16 data_len)
|
||||
{
|
||||
struct sk_buff *skb;
|
||||
struct wmi_p2p_probe_response_cmd *p;
|
||||
size_t cmd_len = sizeof(*p) + data_len;
|
||||
|
||||
skb = ath6kl_wmi_get_new_buf(sizeof(*p) + data_len);
|
||||
if (data_len == 0)
|
||||
cmd_len++; /* work around target minimum length requirement */
|
||||
|
||||
skb = ath6kl_wmi_get_new_buf(cmd_len);
|
||||
if (!skb)
|
||||
return -ENOMEM;
|
||||
|
||||
|
|
|
@ -329,6 +329,10 @@ enum wmi_cmd_id {
|
|||
WMI_SYNCHRONIZE_CMDID,
|
||||
WMI_CREATE_PSTREAM_CMDID,
|
||||
WMI_DELETE_PSTREAM_CMDID,
|
||||
/* WMI_START_SCAN_CMDID is to be deprecated. Use
|
||||
* WMI_BEGIN_SCAN_CMDID instead. The new cmd supports P2P mgmt
|
||||
* operations using station interface.
|
||||
*/
|
||||
WMI_START_SCAN_CMDID,
|
||||
WMI_SET_SCAN_PARAMS_CMDID,
|
||||
WMI_SET_BSS_FILTER_CMDID,
|
||||
|
@ -542,12 +546,61 @@ enum wmi_cmd_id {
|
|||
WMI_GTK_OFFLOAD_OP_CMDID,
|
||||
WMI_REMAIN_ON_CHNL_CMDID,
|
||||
WMI_CANCEL_REMAIN_ON_CHNL_CMDID,
|
||||
/* WMI_SEND_ACTION_CMDID is to be deprecated. Use
|
||||
* WMI_SEND_MGMT_CMDID instead. The new cmd supports P2P mgmt
|
||||
* operations using station interface.
|
||||
*/
|
||||
WMI_SEND_ACTION_CMDID,
|
||||
WMI_PROBE_REQ_REPORT_CMDID,
|
||||
WMI_DISABLE_11B_RATES_CMDID,
|
||||
WMI_SEND_PROBE_RESPONSE_CMDID,
|
||||
WMI_GET_P2P_INFO_CMDID,
|
||||
WMI_AP_JOIN_BSS_CMDID,
|
||||
|
||||
WMI_SMPS_ENABLE_CMDID,
|
||||
WMI_SMPS_CONFIG_CMDID,
|
||||
WMI_SET_RATECTRL_PARM_CMDID,
|
||||
/* LPL specific commands*/
|
||||
WMI_LPL_FORCE_ENABLE_CMDID,
|
||||
WMI_LPL_SET_POLICY_CMDID,
|
||||
WMI_LPL_GET_POLICY_CMDID,
|
||||
WMI_LPL_GET_HWSTATE_CMDID,
|
||||
WMI_LPL_SET_PARAMS_CMDID,
|
||||
WMI_LPL_GET_PARAMS_CMDID,
|
||||
|
||||
WMI_SET_BUNDLE_PARAM_CMDID,
|
||||
|
||||
/*GreenTx specific commands*/
|
||||
|
||||
WMI_GREENTX_PARAMS_CMDID,
|
||||
|
||||
WMI_RTT_MEASREQ_CMDID,
|
||||
WMI_RTT_CAPREQ_CMDID,
|
||||
WMI_RTT_STATUSREQ_CMDID,
|
||||
|
||||
/* WPS Commands */
|
||||
WMI_WPS_START_CMDID,
|
||||
WMI_GET_WPS_STATUS_CMDID,
|
||||
|
||||
/* More P2P commands */
|
||||
WMI_SET_NOA_CMDID,
|
||||
WMI_GET_NOA_CMDID,
|
||||
WMI_SET_OPPPS_CMDID,
|
||||
WMI_GET_OPPPS_CMDID,
|
||||
WMI_ADD_PORT_CMDID,
|
||||
WMI_DEL_PORT_CMDID,
|
||||
|
||||
/* 802.11w cmd */
|
||||
WMI_SET_RSN_CAP_CMDID,
|
||||
WMI_GET_RSN_CAP_CMDID,
|
||||
WMI_SET_IGTK_CMDID,
|
||||
|
||||
WMI_RX_FILTER_COALESCE_FILTER_OP_CMDID,
|
||||
WMI_RX_FILTER_SET_FRAME_TEST_LIST_CMDID,
|
||||
|
||||
WMI_SEND_MGMT_CMDID,
|
||||
WMI_BEGIN_SCAN_CMDID,
|
||||
|
||||
};
|
||||
|
||||
enum wmi_mgmt_frame_type {
|
||||
|
@ -567,6 +620,14 @@ enum network_type {
|
|||
AP_NETWORK = 0x10,
|
||||
};
|
||||
|
||||
enum network_subtype {
|
||||
SUBTYPE_NONE,
|
||||
SUBTYPE_BT,
|
||||
SUBTYPE_P2PDEV,
|
||||
SUBTYPE_P2PCLIENT,
|
||||
SUBTYPE_P2PGO,
|
||||
};
|
||||
|
||||
enum dot11_auth_mode {
|
||||
OPEN_AUTH = 0x01,
|
||||
SHARED_AUTH = 0x02,
|
||||
|
@ -639,6 +700,7 @@ struct wmi_connect_cmd {
|
|||
__le16 ch;
|
||||
u8 bssid[ETH_ALEN];
|
||||
__le32 ctrl_flags;
|
||||
u8 nw_subtype;
|
||||
} __packed;
|
||||
|
||||
/* WMI_RECONNECT_CMDID */
|
||||
|
@ -726,6 +788,43 @@ enum wmi_scan_type {
|
|||
WMI_SHORT_SCAN = 1,
|
||||
};
|
||||
|
||||
struct wmi_supp_rates {
|
||||
u8 nrates;
|
||||
u8 rates[ATH6KL_RATE_MAXSIZE];
|
||||
};
|
||||
|
||||
struct wmi_begin_scan_cmd {
|
||||
__le32 force_fg_scan;
|
||||
|
||||
/* for legacy cisco AP compatibility */
|
||||
__le32 is_legacy;
|
||||
|
||||
/* max duration in the home channel(msec) */
|
||||
__le32 home_dwell_time;
|
||||
|
||||
/* time interval between scans (msec) */
|
||||
__le32 force_scan_intvl;
|
||||
|
||||
/* no CCK rates */
|
||||
__le32 no_cck;
|
||||
|
||||
/* enum wmi_scan_type */
|
||||
u8 scan_type;
|
||||
|
||||
/* Supported rates to advertise in the probe request frames */
|
||||
struct wmi_supp_rates supp_rates[IEEE80211_NUM_BANDS];
|
||||
|
||||
/* how many channels follow */
|
||||
u8 num_ch;
|
||||
|
||||
/* channels in Mhz */
|
||||
__le16 ch_list[1];
|
||||
} __packed;
|
||||
|
||||
/* wmi_start_scan_cmd is to be deprecated. Use
|
||||
* wmi_begin_scan_cmd instead. The new structure supports P2P mgmt
|
||||
* operations using station interface.
|
||||
*/
|
||||
struct wmi_start_scan_cmd {
|
||||
__le32 force_fg_scan;
|
||||
|
||||
|
@ -748,9 +847,6 @@ struct wmi_start_scan_cmd {
|
|||
__le16 ch_list[1];
|
||||
} __packed;
|
||||
|
||||
/* WMI_SET_SCAN_PARAMS_CMDID */
|
||||
#define WMI_SHORTSCANRATIO_DEFAULT 3
|
||||
|
||||
/*
|
||||
* Warning: scan control flag value of 0xFF is used to disable
|
||||
* all flags in WMI_SCAN_PARAMS_CMD. Do not add any more
|
||||
|
@ -783,13 +879,6 @@ enum wmi_scan_ctrl_flags_bits {
|
|||
ENABLE_SCAN_ABORT_EVENT = 0x40
|
||||
};
|
||||
|
||||
#define DEFAULT_SCAN_CTRL_FLAGS \
|
||||
(CONNECT_SCAN_CTRL_FLAGS | \
|
||||
SCAN_CONNECTED_CTRL_FLAGS | \
|
||||
ACTIVE_SCAN_CTRL_FLAGS | \
|
||||
ROAM_SCAN_CTRL_FLAGS | \
|
||||
ENABLE_AUTO_CTRL_FLAGS)
|
||||
|
||||
struct wmi_scan_params_cmd {
|
||||
/* sec */
|
||||
__le16 fg_start_period;
|
||||
|
@ -1818,7 +1907,7 @@ struct wmi_set_ip_cmd {
|
|||
} __packed;
|
||||
|
||||
enum ath6kl_wow_filters {
|
||||
WOW_FILTER_SSID = BIT(0),
|
||||
WOW_FILTER_SSID = BIT(1),
|
||||
WOW_FILTER_OPTION_MAGIC_PACKET = BIT(2),
|
||||
WOW_FILTER_OPTION_EAP_REQ = BIT(3),
|
||||
WOW_FILTER_OPTION_PATTERNS = BIT(4),
|
||||
|
@ -1963,7 +2052,7 @@ struct wmi_tx_complete_event {
|
|||
* !!! Warning !!!
|
||||
* -Changing the following values needs compilation of both driver and firmware
|
||||
*/
|
||||
#define AP_MAX_NUM_STA 8
|
||||
#define AP_MAX_NUM_STA 10
|
||||
|
||||
/* Spl. AID used to set DTIM flag in the beacons */
|
||||
#define MCAST_AID 0xFF
|
||||
|
@ -2046,6 +2135,10 @@ struct wmi_remain_on_chnl_cmd {
|
|||
__le32 duration;
|
||||
} __packed;
|
||||
|
||||
/* wmi_send_action_cmd is to be deprecated. Use
|
||||
* wmi_send_mgmt_cmd instead. The new structure supports P2P mgmt
|
||||
* operations using station interface.
|
||||
*/
|
||||
struct wmi_send_action_cmd {
|
||||
__le32 id;
|
||||
__le32 freq;
|
||||
|
@ -2054,6 +2147,15 @@ struct wmi_send_action_cmd {
|
|||
u8 data[0];
|
||||
} __packed;
|
||||
|
||||
struct wmi_send_mgmt_cmd {
|
||||
__le32 id;
|
||||
__le32 freq;
|
||||
__le32 wait;
|
||||
__le32 no_cck;
|
||||
__le16 len;
|
||||
u8 data[0];
|
||||
} __packed;
|
||||
|
||||
struct wmi_tx_status_event {
|
||||
__le32 id;
|
||||
u8 ack_status;
|
||||
|
@ -2242,7 +2344,8 @@ int ath6kl_wmi_connect_cmd(struct wmi *wmi, u8 if_idx,
|
|||
u8 pairwise_crypto_len,
|
||||
enum crypto_type group_crypto,
|
||||
u8 group_crypto_len, int ssid_len, u8 *ssid,
|
||||
u8 *bssid, u16 channel, u32 ctrl_flags);
|
||||
u8 *bssid, u16 channel, u32 ctrl_flags,
|
||||
u8 nw_subtype);
|
||||
|
||||
int ath6kl_wmi_reconnect_cmd(struct wmi *wmi, u8 if_idx, u8 *bssid,
|
||||
u16 channel);
|
||||
|
@ -2252,6 +2355,14 @@ int ath6kl_wmi_startscan_cmd(struct wmi *wmi, u8 if_idx,
|
|||
u32 force_fgscan, u32 is_legacy,
|
||||
u32 home_dwell_time, u32 force_scan_interval,
|
||||
s8 num_chan, u16 *ch_list);
|
||||
|
||||
int ath6kl_wmi_beginscan_cmd(struct wmi *wmi, u8 if_idx,
|
||||
enum wmi_scan_type scan_type,
|
||||
u32 force_fgscan, u32 is_legacy,
|
||||
u32 home_dwell_time, u32 force_scan_interval,
|
||||
s8 num_chan, u16 *ch_list, u32 no_cck,
|
||||
u32 *rates);
|
||||
|
||||
int ath6kl_wmi_scanparams_cmd(struct wmi *wmi, u8 if_idx, u16 fg_start_sec,
|
||||
u16 fg_end_sec, u16 bg_sec,
|
||||
u16 minact_chdw_msec, u16 maxact_chdw_msec,
|
||||
|
@ -2346,6 +2457,10 @@ int ath6kl_wmi_remain_on_chnl_cmd(struct wmi *wmi, u8 if_idx, u32 freq,
|
|||
int ath6kl_wmi_send_action_cmd(struct wmi *wmi, u8 if_idx, u32 id, u32 freq,
|
||||
u32 wait, const u8 *data, u16 data_len);
|
||||
|
||||
int ath6kl_wmi_send_mgmt_cmd(struct wmi *wmi, u8 if_idx, u32 id, u32 freq,
|
||||
u32 wait, const u8 *data, u16 data_len,
|
||||
u32 no_cck);
|
||||
|
||||
int ath6kl_wmi_send_probe_response_cmd(struct wmi *wmi, u8 if_idx, u32 freq,
|
||||
const u8 *dst, const u8 *data,
|
||||
u16 data_len);
|
||||
|
@ -2359,6 +2474,8 @@ int ath6kl_wmi_cancel_remain_on_chnl_cmd(struct wmi *wmi, u8 if_idx);
|
|||
int ath6kl_wmi_set_appie_cmd(struct wmi *wmi, u8 if_idx, u8 mgmt_frm_type,
|
||||
const u8 *ie, u8 ie_len);
|
||||
|
||||
void ath6kl_wmi_sscan_timer(unsigned long ptr);
|
||||
|
||||
struct ath6kl_vif *ath6kl_get_vif_by_index(struct ath6kl *ar, u8 if_idx);
|
||||
void *ath6kl_wmi_init(struct ath6kl *devt);
|
||||
void ath6kl_wmi_shutdown(struct wmi *wmi);
|
||||
|
|
|
@ -81,6 +81,14 @@ config ATH9K_RATE_CONTROL
|
|||
Say Y, if you want to use the ath9k specific rate control
|
||||
module instead of minstrel_ht.
|
||||
|
||||
config ATH9K_BTCOEX_SUPPORT
|
||||
bool "Atheros ath9k bluetooth coexistence support"
|
||||
depends on ATH9K
|
||||
default y
|
||||
---help---
|
||||
Say Y, if you want to use the ath9k radios together with
|
||||
Bluetooth modules in the same system.
|
||||
|
||||
config ATH9K_HTC
|
||||
tristate "Atheros HTC based wireless cards support"
|
||||
depends on USB && MAC80211
|
||||
|
|
|
@ -136,8 +136,8 @@ static void ath9k_ani_restart(struct ath_hw *ah)
|
|||
cck_base = AR_PHY_COUNTMAX - ah->config.cck_trig_high;
|
||||
}
|
||||
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
"Writing ofdmbase=%u cckbase=%u\n", ofdm_base, cck_base);
|
||||
ath_dbg(common, ANI, "Writing ofdmbase=%u cckbase=%u\n",
|
||||
ofdm_base, cck_base);
|
||||
|
||||
ENABLE_REGWRITE_BUFFER(ah);
|
||||
|
||||
|
@ -268,8 +268,7 @@ static void ath9k_hw_set_ofdm_nil(struct ath_hw *ah, u8 immunityLevel)
|
|||
|
||||
aniState->noiseFloor = BEACON_RSSI(ah);
|
||||
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
"**** ofdmlevel %d=>%d, rssi=%d[lo=%d hi=%d]\n",
|
||||
ath_dbg(common, ANI, "**** ofdmlevel %d=>%d, rssi=%d[lo=%d hi=%d]\n",
|
||||
aniState->ofdmNoiseImmunityLevel,
|
||||
immunityLevel, aniState->noiseFloor,
|
||||
aniState->rssiThrLow, aniState->rssiThrHigh);
|
||||
|
@ -336,8 +335,7 @@ static void ath9k_hw_set_cck_nil(struct ath_hw *ah, u_int8_t immunityLevel)
|
|||
const struct ani_cck_level_entry *entry_cck;
|
||||
|
||||
aniState->noiseFloor = BEACON_RSSI(ah);
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
"**** ccklevel %d=>%d, rssi=%d[lo=%d hi=%d]\n",
|
||||
ath_dbg(common, ANI, "**** ccklevel %d=>%d, rssi=%d[lo=%d hi=%d]\n",
|
||||
aniState->cckNoiseImmunityLevel, immunityLevel,
|
||||
aniState->noiseFloor, aniState->rssiThrLow,
|
||||
aniState->rssiThrHigh);
|
||||
|
@ -481,8 +479,7 @@ static void ath9k_ani_reset_old(struct ath_hw *ah, bool is_scanning)
|
|||
|
||||
if (ah->opmode != NL80211_IFTYPE_STATION
|
||||
&& ah->opmode != NL80211_IFTYPE_ADHOC) {
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
"Reset ANI state opmode %u\n", ah->opmode);
|
||||
ath_dbg(common, ANI, "Reset ANI state opmode %u\n", ah->opmode);
|
||||
ah->stats.ast_ani_reset++;
|
||||
|
||||
if (ah->opmode == NL80211_IFTYPE_AP) {
|
||||
|
@ -582,7 +579,7 @@ void ath9k_ani_reset(struct ath_hw *ah, bool is_scanning)
|
|||
ATH9K_ANI_OFDM_DEF_LEVEL ||
|
||||
aniState->cckNoiseImmunityLevel !=
|
||||
ATH9K_ANI_CCK_DEF_LEVEL) {
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
ath_dbg(common, ANI,
|
||||
"Restore defaults: opmode %u chan %d Mhz/0x%x is_scanning=%d ofdm:%d cck:%d\n",
|
||||
ah->opmode,
|
||||
chan->channel,
|
||||
|
@ -599,7 +596,7 @@ void ath9k_ani_reset(struct ath_hw *ah, bool is_scanning)
|
|||
/*
|
||||
* restore historical levels for this channel
|
||||
*/
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
ath_dbg(common, ANI,
|
||||
"Restore history: opmode %u chan %d Mhz/0x%x is_scanning=%d ofdm:%d cck:%d\n",
|
||||
ah->opmode,
|
||||
chan->channel,
|
||||
|
@ -662,7 +659,7 @@ static bool ath9k_hw_ani_read_counters(struct ath_hw *ah)
|
|||
|
||||
if (!use_new_ani(ah) && (phyCnt1 < ofdm_base || phyCnt2 < cck_base)) {
|
||||
if (phyCnt1 < ofdm_base) {
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
ath_dbg(common, ANI,
|
||||
"phyCnt1 0x%x, resetting counter value to 0x%x\n",
|
||||
phyCnt1, ofdm_base);
|
||||
REG_WRITE(ah, AR_PHY_ERR_1, ofdm_base);
|
||||
|
@ -670,7 +667,7 @@ static bool ath9k_hw_ani_read_counters(struct ath_hw *ah)
|
|||
AR_PHY_ERR_OFDM_TIMING);
|
||||
}
|
||||
if (phyCnt2 < cck_base) {
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
ath_dbg(common, ANI,
|
||||
"phyCnt2 0x%x, resetting counter value to 0x%x\n",
|
||||
phyCnt2, cck_base);
|
||||
REG_WRITE(ah, AR_PHY_ERR_2, cck_base);
|
||||
|
@ -713,7 +710,7 @@ void ath9k_hw_ani_monitor(struct ath_hw *ah, struct ath9k_channel *chan)
|
|||
cckPhyErrRate = aniState->cckPhyErrCount * 1000 /
|
||||
aniState->listenTime;
|
||||
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
ath_dbg(common, ANI,
|
||||
"listenTime=%d OFDM:%d errs=%d/s CCK:%d errs=%d/s ofdm_turn=%d\n",
|
||||
aniState->listenTime,
|
||||
aniState->ofdmNoiseImmunityLevel,
|
||||
|
@ -748,7 +745,7 @@ void ath9k_enable_mib_counters(struct ath_hw *ah)
|
|||
{
|
||||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
|
||||
ath_dbg(common, ATH_DBG_ANI, "Enable MIB counters\n");
|
||||
ath_dbg(common, ANI, "Enable MIB counters\n");
|
||||
|
||||
ath9k_hw_update_mibstats(ah, &ah->ah_mibStats);
|
||||
|
||||
|
@ -770,7 +767,7 @@ void ath9k_hw_disable_mib_counters(struct ath_hw *ah)
|
|||
{
|
||||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
|
||||
ath_dbg(common, ATH_DBG_ANI, "Disable MIB counters\n");
|
||||
ath_dbg(common, ANI, "Disable MIB counters\n");
|
||||
|
||||
REG_WRITE(ah, AR_MIBC, AR_MIBC_FMC);
|
||||
ath9k_hw_update_mibstats(ah, &ah->ah_mibStats);
|
||||
|
@ -845,7 +842,7 @@ void ath9k_hw_ani_init(struct ath_hw *ah)
|
|||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
int i;
|
||||
|
||||
ath_dbg(common, ATH_DBG_ANI, "Initialize ANI\n");
|
||||
ath_dbg(common, ANI, "Initialize ANI\n");
|
||||
|
||||
if (use_new_ani(ah)) {
|
||||
ah->config.ofdm_trig_high = ATH9K_ANI_OFDM_TRIG_HIGH_NEW;
|
||||
|
|
|
@ -158,7 +158,7 @@ static void ar5008_hw_force_bias(struct ath_hw *ah, u16 synth_freq)
|
|||
/* pre-reverse this field */
|
||||
tmp_reg = ath9k_hw_reverse_bits(new_bias, 3);
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG, "Force rf_pwd_icsyndiv to %1d on %4d\n",
|
||||
ath_dbg(common, CONFIG, "Force rf_pwd_icsyndiv to %1d on %4d\n",
|
||||
new_bias, synth_freq);
|
||||
|
||||
/* swizzle rf_pwd_icsyndiv */
|
||||
|
@ -1053,8 +1053,7 @@ static bool ar5008_hw_ani_control_old(struct ath_hw *ah,
|
|||
u32 level = param;
|
||||
|
||||
if (level >= ARRAY_SIZE(ah->totalSizeDesired)) {
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
"level out of range (%u > %zu)\n",
|
||||
ath_dbg(common, ANI, "level out of range (%u > %zu)\n",
|
||||
level, ARRAY_SIZE(ah->totalSizeDesired));
|
||||
return false;
|
||||
}
|
||||
|
@ -1157,8 +1156,7 @@ static bool ar5008_hw_ani_control_old(struct ath_hw *ah,
|
|||
u32 level = param;
|
||||
|
||||
if (level >= ARRAY_SIZE(firstep)) {
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
"level out of range (%u > %zu)\n",
|
||||
ath_dbg(common, ANI, "level out of range (%u > %zu)\n",
|
||||
level, ARRAY_SIZE(firstep));
|
||||
return false;
|
||||
}
|
||||
|
@ -1177,8 +1175,7 @@ static bool ar5008_hw_ani_control_old(struct ath_hw *ah,
|
|||
u32 level = param;
|
||||
|
||||
if (level >= ARRAY_SIZE(cycpwrThr1)) {
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
"level out of range (%u > %zu)\n",
|
||||
ath_dbg(common, ANI, "level out of range (%u > %zu)\n",
|
||||
level, ARRAY_SIZE(cycpwrThr1));
|
||||
return false;
|
||||
}
|
||||
|
@ -1195,23 +1192,22 @@ static bool ar5008_hw_ani_control_old(struct ath_hw *ah,
|
|||
case ATH9K_ANI_PRESENT:
|
||||
break;
|
||||
default:
|
||||
ath_dbg(common, ATH_DBG_ANI, "invalid cmd %u\n", cmd);
|
||||
ath_dbg(common, ANI, "invalid cmd %u\n", cmd);
|
||||
return false;
|
||||
}
|
||||
|
||||
ath_dbg(common, ATH_DBG_ANI, "ANI parameters:\n");
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
ath_dbg(common, ANI, "ANI parameters:\n");
|
||||
ath_dbg(common, ANI,
|
||||
"noiseImmunityLevel=%d, spurImmunityLevel=%d, ofdmWeakSigDetectOff=%d\n",
|
||||
aniState->noiseImmunityLevel,
|
||||
aniState->spurImmunityLevel,
|
||||
!aniState->ofdmWeakSigDetectOff);
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
ath_dbg(common, ANI,
|
||||
"cckWeakSigThreshold=%d, firstepLevel=%d, listenTime=%d\n",
|
||||
aniState->cckWeakSigThreshold,
|
||||
aniState->firstepLevel,
|
||||
aniState->listenTime);
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
"ofdmPhyErrCount=%d, cckPhyErrCount=%d\n\n",
|
||||
ath_dbg(common, ANI, "ofdmPhyErrCount=%d, cckPhyErrCount=%d\n\n",
|
||||
aniState->ofdmPhyErrCount,
|
||||
aniState->cckPhyErrCount);
|
||||
|
||||
|
@ -1295,7 +1291,7 @@ static bool ar5008_hw_ani_control_new(struct ath_hw *ah,
|
|||
AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW);
|
||||
|
||||
if (!on != aniState->ofdmWeakSigDetectOff) {
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
ath_dbg(common, ANI,
|
||||
"** ch %d: ofdm weak signal: %s=>%s\n",
|
||||
chan->channel,
|
||||
!aniState->ofdmWeakSigDetectOff ?
|
||||
|
@ -1313,7 +1309,7 @@ static bool ar5008_hw_ani_control_new(struct ath_hw *ah,
|
|||
u32 level = param;
|
||||
|
||||
if (level >= ARRAY_SIZE(firstep_table)) {
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
ath_dbg(common, ANI,
|
||||
"ATH9K_ANI_FIRSTEP_LEVEL: level out of range (%u > %zu)\n",
|
||||
level, ARRAY_SIZE(firstep_table));
|
||||
return false;
|
||||
|
@ -1350,7 +1346,7 @@ static bool ar5008_hw_ani_control_new(struct ath_hw *ah,
|
|||
AR_PHY_FIND_SIG_FIRSTEP_LOW, value2);
|
||||
|
||||
if (level != aniState->firstepLevel) {
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
ath_dbg(common, ANI,
|
||||
"** ch %d: level %d=>%d[def:%d] firstep[level]=%d ini=%d\n",
|
||||
chan->channel,
|
||||
aniState->firstepLevel,
|
||||
|
@ -1358,7 +1354,7 @@ static bool ar5008_hw_ani_control_new(struct ath_hw *ah,
|
|||
ATH9K_ANI_FIRSTEP_LVL_NEW,
|
||||
value,
|
||||
aniState->iniDef.firstep);
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
ath_dbg(common, ANI,
|
||||
"** ch %d: level %d=>%d[def:%d] firstep_low[level]=%d ini=%d\n",
|
||||
chan->channel,
|
||||
aniState->firstepLevel,
|
||||
|
@ -1378,7 +1374,7 @@ static bool ar5008_hw_ani_control_new(struct ath_hw *ah,
|
|||
u32 level = param;
|
||||
|
||||
if (level >= ARRAY_SIZE(cycpwrThr1_table)) {
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
ath_dbg(common, ANI,
|
||||
"ATH9K_ANI_SPUR_IMMUNITY_LEVEL: level out of range (%u > %zu)\n",
|
||||
level, ARRAY_SIZE(cycpwrThr1_table));
|
||||
return false;
|
||||
|
@ -1414,7 +1410,7 @@ static bool ar5008_hw_ani_control_new(struct ath_hw *ah,
|
|||
AR_PHY_EXT_TIMING5_CYCPWR_THR1, value2);
|
||||
|
||||
if (level != aniState->spurImmunityLevel) {
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
ath_dbg(common, ANI,
|
||||
"** ch %d: level %d=>%d[def:%d] cycpwrThr1[level]=%d ini=%d\n",
|
||||
chan->channel,
|
||||
aniState->spurImmunityLevel,
|
||||
|
@ -1422,7 +1418,7 @@ static bool ar5008_hw_ani_control_new(struct ath_hw *ah,
|
|||
ATH9K_ANI_SPUR_IMMUNE_LVL_NEW,
|
||||
value,
|
||||
aniState->iniDef.cycpwrThr1);
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
ath_dbg(common, ANI,
|
||||
"** ch %d: level %d=>%d[def:%d] cycpwrThr1Ext[level]=%d ini=%d\n",
|
||||
chan->channel,
|
||||
aniState->spurImmunityLevel,
|
||||
|
@ -1448,11 +1444,11 @@ static bool ar5008_hw_ani_control_new(struct ath_hw *ah,
|
|||
case ATH9K_ANI_PRESENT:
|
||||
break;
|
||||
default:
|
||||
ath_dbg(common, ATH_DBG_ANI, "invalid cmd %u\n", cmd);
|
||||
ath_dbg(common, ANI, "invalid cmd %u\n", cmd);
|
||||
return false;
|
||||
}
|
||||
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
ath_dbg(common, ANI,
|
||||
"ANI parameters: SI=%d, ofdmWS=%s FS=%d MRCcck=%s listenTime=%d ofdmErrs=%d cckErrs=%d\n",
|
||||
aniState->spurImmunityLevel,
|
||||
!aniState->ofdmWeakSigDetectOff ? "on" : "off",
|
||||
|
@ -1506,7 +1502,7 @@ static void ar5008_hw_ani_cache_ini_regs(struct ath_hw *ah)
|
|||
|
||||
iniDef = &aniState->iniDef;
|
||||
|
||||
ath_dbg(common, ATH_DBG_ANI, "ver %d.%d opmode %u chan %d Mhz/0x%x\n",
|
||||
ath_dbg(common, ANI, "ver %d.%d opmode %u chan %d Mhz/0x%x\n",
|
||||
ah->hw_version.macVersion,
|
||||
ah->hw_version.macRev,
|
||||
ah->opmode,
|
||||
|
|
|
@ -61,18 +61,16 @@ static void ar9002_hw_setup_calibration(struct ath_hw *ah,
|
|||
switch (currCal->calData->calType) {
|
||||
case IQ_MISMATCH_CAL:
|
||||
REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ);
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"starting IQ Mismatch Calibration\n");
|
||||
break;
|
||||
case ADC_GAIN_CAL:
|
||||
REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_GAIN);
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"starting ADC Gain Calibration\n");
|
||||
ath_dbg(common, CALIBRATE, "starting ADC Gain Calibration\n");
|
||||
break;
|
||||
case ADC_DC_CAL:
|
||||
REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_DC_PER);
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"starting ADC DC Calibration\n");
|
||||
ath_dbg(common, CALIBRATE, "starting ADC DC Calibration\n");
|
||||
break;
|
||||
}
|
||||
|
||||
|
@ -129,7 +127,7 @@ static void ar9002_hw_iqcal_collect(struct ath_hw *ah)
|
|||
REG_READ(ah, AR_PHY_CAL_MEAS_1(i));
|
||||
ah->totalIqCorrMeas[i] +=
|
||||
(int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_2(i));
|
||||
ath_dbg(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
|
||||
ath_dbg(ath9k_hw_common(ah), CALIBRATE,
|
||||
"%d: Chn %d pmi=0x%08x;pmq=0x%08x;iqcm=0x%08x;\n",
|
||||
ah->cal_samples, i, ah->totalPowerMeasI[i],
|
||||
ah->totalPowerMeasQ[i],
|
||||
|
@ -151,7 +149,7 @@ static void ar9002_hw_adc_gaincal_collect(struct ath_hw *ah)
|
|||
ah->totalAdcQEvenPhase[i] +=
|
||||
REG_READ(ah, AR_PHY_CAL_MEAS_3(i));
|
||||
|
||||
ath_dbg(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
|
||||
ath_dbg(ath9k_hw_common(ah), CALIBRATE,
|
||||
"%d: Chn %d oddi=0x%08x; eveni=0x%08x; oddq=0x%08x; evenq=0x%08x;\n",
|
||||
ah->cal_samples, i,
|
||||
ah->totalAdcIOddPhase[i],
|
||||
|
@ -175,7 +173,7 @@ static void ar9002_hw_adc_dccal_collect(struct ath_hw *ah)
|
|||
ah->totalAdcDcOffsetQEvenPhase[i] +=
|
||||
(int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_3(i));
|
||||
|
||||
ath_dbg(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
|
||||
ath_dbg(ath9k_hw_common(ah), CALIBRATE,
|
||||
"%d: Chn %d oddi=0x%08x; eveni=0x%08x; oddq=0x%08x; evenq=0x%08x;\n",
|
||||
ah->cal_samples, i,
|
||||
ah->totalAdcDcOffsetIOddPhase[i],
|
||||
|
@ -198,11 +196,11 @@ static void ar9002_hw_iqcalibrate(struct ath_hw *ah, u8 numChains)
|
|||
powerMeasQ = ah->totalPowerMeasQ[i];
|
||||
iqCorrMeas = ah->totalIqCorrMeas[i];
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"Starting IQ Cal and Correction for Chain %d\n",
|
||||
i);
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"Original: Chn %d iq_corr_meas = 0x%08x\n",
|
||||
i, ah->totalIqCorrMeas[i]);
|
||||
|
||||
|
@ -213,12 +211,11 @@ static void ar9002_hw_iqcalibrate(struct ath_hw *ah, u8 numChains)
|
|||
iqCorrNeg = 1;
|
||||
}
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Chn %d pwr_meas_i = 0x%08x\n", i, powerMeasI);
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Chn %d pwr_meas_q = 0x%08x\n", i, powerMeasQ);
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE, "iqCorrNeg is 0x%08x\n",
|
||||
iqCorrNeg);
|
||||
ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_i = 0x%08x\n",
|
||||
i, powerMeasI);
|
||||
ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_q = 0x%08x\n",
|
||||
i, powerMeasQ);
|
||||
ath_dbg(common, CALIBRATE, "iqCorrNeg is 0x%08x\n", iqCorrNeg);
|
||||
|
||||
iCoffDenom = (powerMeasI / 2 + powerMeasQ / 2) / 128;
|
||||
qCoffDenom = powerMeasQ / 64;
|
||||
|
@ -227,13 +224,13 @@ static void ar9002_hw_iqcalibrate(struct ath_hw *ah, u8 numChains)
|
|||
(qCoffDenom != 0)) {
|
||||
iCoff = iqCorrMeas / iCoffDenom;
|
||||
qCoff = powerMeasI / qCoffDenom - 64;
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Chn %d iCoff = 0x%08x\n", i, iCoff);
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Chn %d qCoff = 0x%08x\n", i, qCoff);
|
||||
ath_dbg(common, CALIBRATE, "Chn %d iCoff = 0x%08x\n",
|
||||
i, iCoff);
|
||||
ath_dbg(common, CALIBRATE, "Chn %d qCoff = 0x%08x\n",
|
||||
i, qCoff);
|
||||
|
||||
iCoff = iCoff & 0x3f;
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"New: Chn %d iCoff = 0x%08x\n", i, iCoff);
|
||||
if (iqCorrNeg == 0x0)
|
||||
iCoff = 0x40 - iCoff;
|
||||
|
@ -243,7 +240,7 @@ static void ar9002_hw_iqcalibrate(struct ath_hw *ah, u8 numChains)
|
|||
else if (qCoff <= -16)
|
||||
qCoff = -16;
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"Chn %d : iCoff = 0x%x qCoff = 0x%x\n",
|
||||
i, iCoff, qCoff);
|
||||
|
||||
|
@ -253,7 +250,7 @@ static void ar9002_hw_iqcalibrate(struct ath_hw *ah, u8 numChains)
|
|||
REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(i),
|
||||
AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF,
|
||||
qCoff);
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"IQ Cal and Correction done for Chain %d\n",
|
||||
i);
|
||||
}
|
||||
|
@ -275,21 +272,17 @@ static void ar9002_hw_adc_gaincal_calibrate(struct ath_hw *ah, u8 numChains)
|
|||
qOddMeasOffset = ah->totalAdcQOddPhase[i];
|
||||
qEvenMeasOffset = ah->totalAdcQEvenPhase[i];
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"Starting ADC Gain Cal for Chain %d\n", i);
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Chn %d pwr_meas_odd_i = 0x%08x\n", i,
|
||||
iOddMeasOffset);
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Chn %d pwr_meas_even_i = 0x%08x\n", i,
|
||||
iEvenMeasOffset);
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Chn %d pwr_meas_odd_q = 0x%08x\n", i,
|
||||
qOddMeasOffset);
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Chn %d pwr_meas_even_q = 0x%08x\n", i,
|
||||
qEvenMeasOffset);
|
||||
ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_odd_i = 0x%08x\n",
|
||||
i, iOddMeasOffset);
|
||||
ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_even_i = 0x%08x\n",
|
||||
i, iEvenMeasOffset);
|
||||
ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_odd_q = 0x%08x\n",
|
||||
i, qOddMeasOffset);
|
||||
ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_even_q = 0x%08x\n",
|
||||
i, qEvenMeasOffset);
|
||||
|
||||
if (iOddMeasOffset != 0 && qEvenMeasOffset != 0) {
|
||||
iGainMismatch =
|
||||
|
@ -299,19 +292,19 @@ static void ar9002_hw_adc_gaincal_calibrate(struct ath_hw *ah, u8 numChains)
|
|||
((qOddMeasOffset * 32) /
|
||||
qEvenMeasOffset) & 0x3f;
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Chn %d gain_mismatch_i = 0x%08x\n", i,
|
||||
iGainMismatch);
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Chn %d gain_mismatch_q = 0x%08x\n", i,
|
||||
qGainMismatch);
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"Chn %d gain_mismatch_i = 0x%08x\n",
|
||||
i, iGainMismatch);
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"Chn %d gain_mismatch_q = 0x%08x\n",
|
||||
i, qGainMismatch);
|
||||
|
||||
val = REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i));
|
||||
val &= 0xfffff000;
|
||||
val |= (qGainMismatch) | (iGainMismatch << 6);
|
||||
REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i), val);
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"ADC Gain Cal done for Chain %d\n", i);
|
||||
}
|
||||
}
|
||||
|
@ -337,40 +330,36 @@ static void ar9002_hw_adc_dccal_calibrate(struct ath_hw *ah, u8 numChains)
|
|||
qOddMeasOffset = ah->totalAdcDcOffsetQOddPhase[i];
|
||||
qEvenMeasOffset = ah->totalAdcDcOffsetQEvenPhase[i];
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"Starting ADC DC Offset Cal for Chain %d\n", i);
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Chn %d pwr_meas_odd_i = %d\n", i,
|
||||
iOddMeasOffset);
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Chn %d pwr_meas_even_i = %d\n", i,
|
||||
iEvenMeasOffset);
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Chn %d pwr_meas_odd_q = %d\n", i,
|
||||
qOddMeasOffset);
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Chn %d pwr_meas_even_q = %d\n", i,
|
||||
qEvenMeasOffset);
|
||||
ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_odd_i = %d\n",
|
||||
i, iOddMeasOffset);
|
||||
ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_even_i = %d\n",
|
||||
i, iEvenMeasOffset);
|
||||
ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_odd_q = %d\n",
|
||||
i, qOddMeasOffset);
|
||||
ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_even_q = %d\n",
|
||||
i, qEvenMeasOffset);
|
||||
|
||||
iDcMismatch = (((iEvenMeasOffset - iOddMeasOffset) * 2) /
|
||||
numSamples) & 0x1ff;
|
||||
qDcMismatch = (((qOddMeasOffset - qEvenMeasOffset) * 2) /
|
||||
numSamples) & 0x1ff;
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Chn %d dc_offset_mismatch_i = 0x%08x\n", i,
|
||||
iDcMismatch);
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Chn %d dc_offset_mismatch_q = 0x%08x\n", i,
|
||||
qDcMismatch);
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"Chn %d dc_offset_mismatch_i = 0x%08x\n",
|
||||
i, iDcMismatch);
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"Chn %d dc_offset_mismatch_q = 0x%08x\n",
|
||||
i, qDcMismatch);
|
||||
|
||||
val = REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i));
|
||||
val &= 0xc0000fff;
|
||||
val |= (qDcMismatch << 12) | (iDcMismatch << 21);
|
||||
REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i), val);
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"ADC DC Offset Cal done for Chain %d\n", i);
|
||||
}
|
||||
|
||||
|
@ -560,7 +549,7 @@ static inline void ar9285_hw_pa_cal(struct ath_hw *ah, bool is_reset)
|
|||
{ 0x7838, 0 },
|
||||
};
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE, "Running PA Calibration\n");
|
||||
ath_dbg(common, CALIBRATE, "Running PA Calibration\n");
|
||||
|
||||
/* PA CAL is not needed for high power solution */
|
||||
if (ah->eep_ops->get_eeprom(ah, EEP_TXGAIN_TYPE) ==
|
||||
|
@ -741,7 +730,7 @@ static bool ar9285_hw_cl_cal(struct ath_hw *ah, struct ath9k_channel *chan)
|
|||
REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL);
|
||||
if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL,
|
||||
AR_PHY_AGC_CONTROL_CAL, 0, AH_WAIT_TIMEOUT)) {
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"offset calibration failed to complete in 1ms; noisy environment?\n");
|
||||
return false;
|
||||
}
|
||||
|
@ -755,7 +744,7 @@ static bool ar9285_hw_cl_cal(struct ath_hw *ah, struct ath9k_channel *chan)
|
|||
REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL);
|
||||
if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL,
|
||||
0, AH_WAIT_TIMEOUT)) {
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"offset calibration failed to complete in 1ms; noisy environment?\n");
|
||||
return false;
|
||||
}
|
||||
|
@ -851,7 +840,7 @@ static bool ar9002_hw_init_cal(struct ath_hw *ah, struct ath9k_channel *chan)
|
|||
if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL,
|
||||
AR_PHY_AGC_CONTROL_CAL,
|
||||
0, AH_WAIT_TIMEOUT)) {
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"offset calibration failed to complete in 1ms; noisy environment?\n");
|
||||
return false;
|
||||
}
|
||||
|
@ -886,22 +875,21 @@ static bool ar9002_hw_init_cal(struct ath_hw *ah, struct ath9k_channel *chan)
|
|||
if (ar9002_hw_is_cal_supported(ah, chan, ADC_GAIN_CAL)) {
|
||||
INIT_CAL(&ah->adcgain_caldata);
|
||||
INSERT_CAL(ah, &ah->adcgain_caldata);
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"enabling ADC Gain Calibration.\n");
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"enabling ADC Gain Calibration\n");
|
||||
}
|
||||
|
||||
if (ar9002_hw_is_cal_supported(ah, chan, ADC_DC_CAL)) {
|
||||
INIT_CAL(&ah->adcdc_caldata);
|
||||
INSERT_CAL(ah, &ah->adcdc_caldata);
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"enabling ADC DC Calibration.\n");
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"enabling ADC DC Calibration\n");
|
||||
}
|
||||
|
||||
if (ar9002_hw_is_cal_supported(ah, chan, IQ_MISMATCH_CAL)) {
|
||||
INIT_CAL(&ah->iq_caldata);
|
||||
INSERT_CAL(ah, &ah->iq_caldata);
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"enabling IQ Calibration.\n");
|
||||
ath_dbg(common, CALIBRATE, "enabling IQ Calibration\n");
|
||||
}
|
||||
|
||||
ah->cal_list_curr = ah->cal_list;
|
||||
|
|
|
@ -107,7 +107,7 @@ static bool ar9002_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked)
|
|||
}
|
||||
|
||||
if (isr & AR_ISR_RXORN) {
|
||||
ath_dbg(common, ATH_DBG_INTERRUPT,
|
||||
ath_dbg(common, INTERRUPT,
|
||||
"receive FIFO overrun interrupt\n");
|
||||
}
|
||||
|
||||
|
@ -143,24 +143,24 @@ static bool ar9002_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked)
|
|||
|
||||
if (fatal_int) {
|
||||
if (sync_cause & AR_INTR_SYNC_HOST1_FATAL) {
|
||||
ath_dbg(common, ATH_DBG_ANY,
|
||||
ath_dbg(common, ANY,
|
||||
"received PCI FATAL interrupt\n");
|
||||
}
|
||||
if (sync_cause & AR_INTR_SYNC_HOST1_PERR) {
|
||||
ath_dbg(common, ATH_DBG_ANY,
|
||||
ath_dbg(common, ANY,
|
||||
"received PCI PERR interrupt\n");
|
||||
}
|
||||
*masked |= ATH9K_INT_FATAL;
|
||||
}
|
||||
if (sync_cause & AR_INTR_SYNC_RADM_CPL_TIMEOUT) {
|
||||
ath_dbg(common, ATH_DBG_INTERRUPT,
|
||||
ath_dbg(common, INTERRUPT,
|
||||
"AR_INTR_SYNC_RADM_CPL_TIMEOUT\n");
|
||||
REG_WRITE(ah, AR_RC, AR_RC_HOSTIF);
|
||||
REG_WRITE(ah, AR_RC, 0);
|
||||
*masked |= ATH9K_INT_FATAL;
|
||||
}
|
||||
if (sync_cause & AR_INTR_SYNC_LOCAL_TIMEOUT) {
|
||||
ath_dbg(common, ATH_DBG_INTERRUPT,
|
||||
ath_dbg(common, INTERRUPT,
|
||||
"AR_INTR_SYNC_LOCAL_TIMEOUT\n");
|
||||
}
|
||||
|
||||
|
|
|
@ -52,7 +52,7 @@ static void ar9003_hw_setup_calibration(struct ath_hw *ah,
|
|||
currCal->calData->calCountMax);
|
||||
REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ);
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"starting IQ Mismatch Calibration\n");
|
||||
|
||||
/* Kick-off cal */
|
||||
|
@ -64,7 +64,7 @@ static void ar9003_hw_setup_calibration(struct ath_hw *ah,
|
|||
REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_THERM,
|
||||
AR_PHY_65NM_CH0_THERM_START, 1);
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"starting Temperature Compensation Calibration\n");
|
||||
break;
|
||||
}
|
||||
|
@ -194,7 +194,7 @@ static void ar9003_hw_iqcal_collect(struct ath_hw *ah)
|
|||
REG_READ(ah, AR_PHY_CAL_MEAS_1(i));
|
||||
ah->totalIqCorrMeas[i] +=
|
||||
(int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_2(i));
|
||||
ath_dbg(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
|
||||
ath_dbg(ath9k_hw_common(ah), CALIBRATE,
|
||||
"%d: Chn %d pmi=0x%08x;pmq=0x%08x;iqcm=0x%08x;\n",
|
||||
ah->cal_samples, i, ah->totalPowerMeasI[i],
|
||||
ah->totalPowerMeasQ[i],
|
||||
|
@ -221,11 +221,10 @@ static void ar9003_hw_iqcalibrate(struct ath_hw *ah, u8 numChains)
|
|||
powerMeasQ = ah->totalPowerMeasQ[i];
|
||||
iqCorrMeas = ah->totalIqCorrMeas[i];
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Starting IQ Cal and Correction for Chain %d\n",
|
||||
i);
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"Starting IQ Cal and Correction for Chain %d\n", i);
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"Original: Chn %d iq_corr_meas = 0x%08x\n",
|
||||
i, ah->totalIqCorrMeas[i]);
|
||||
|
||||
|
@ -236,12 +235,11 @@ static void ar9003_hw_iqcalibrate(struct ath_hw *ah, u8 numChains)
|
|||
iqCorrNeg = 1;
|
||||
}
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Chn %d pwr_meas_i = 0x%08x\n", i, powerMeasI);
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Chn %d pwr_meas_q = 0x%08x\n", i, powerMeasQ);
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE, "iqCorrNeg is 0x%08x\n",
|
||||
iqCorrNeg);
|
||||
ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_i = 0x%08x\n",
|
||||
i, powerMeasI);
|
||||
ath_dbg(common, CALIBRATE, "Chn %d pwr_meas_q = 0x%08x\n",
|
||||
i, powerMeasQ);
|
||||
ath_dbg(common, CALIBRATE, "iqCorrNeg is 0x%08x\n", iqCorrNeg);
|
||||
|
||||
iCoffDenom = (powerMeasI / 2 + powerMeasQ / 2) / 256;
|
||||
qCoffDenom = powerMeasQ / 64;
|
||||
|
@ -249,10 +247,10 @@ static void ar9003_hw_iqcalibrate(struct ath_hw *ah, u8 numChains)
|
|||
if ((iCoffDenom != 0) && (qCoffDenom != 0)) {
|
||||
iCoff = iqCorrMeas / iCoffDenom;
|
||||
qCoff = powerMeasI / qCoffDenom - 64;
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Chn %d iCoff = 0x%08x\n", i, iCoff);
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Chn %d qCoff = 0x%08x\n", i, qCoff);
|
||||
ath_dbg(common, CALIBRATE, "Chn %d iCoff = 0x%08x\n",
|
||||
i, iCoff);
|
||||
ath_dbg(common, CALIBRATE, "Chn %d qCoff = 0x%08x\n",
|
||||
i, qCoff);
|
||||
|
||||
/* Force bounds on iCoff */
|
||||
if (iCoff >= 63)
|
||||
|
@ -273,10 +271,10 @@ static void ar9003_hw_iqcalibrate(struct ath_hw *ah, u8 numChains)
|
|||
iCoff = iCoff & 0x7f;
|
||||
qCoff = qCoff & 0x7f;
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"Chn %d : iCoff = 0x%x qCoff = 0x%x\n",
|
||||
i, iCoff, qCoff);
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"Register offset (0x%04x) before update = 0x%x\n",
|
||||
offset_array[i],
|
||||
REG_READ(ah, offset_array[i]));
|
||||
|
@ -287,25 +285,25 @@ static void ar9003_hw_iqcalibrate(struct ath_hw *ah, u8 numChains)
|
|||
REG_RMW_FIELD(ah, offset_array[i],
|
||||
AR_PHY_RX_IQCAL_CORR_IQCORR_Q_Q_COFF,
|
||||
qCoff);
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"Register offset (0x%04x) QI COFF (bitfields 0x%08x) after update = 0x%x\n",
|
||||
offset_array[i],
|
||||
AR_PHY_RX_IQCAL_CORR_IQCORR_Q_I_COFF,
|
||||
REG_READ(ah, offset_array[i]));
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"Register offset (0x%04x) QQ COFF (bitfields 0x%08x) after update = 0x%x\n",
|
||||
offset_array[i],
|
||||
AR_PHY_RX_IQCAL_CORR_IQCORR_Q_Q_COFF,
|
||||
REG_READ(ah, offset_array[i]));
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"IQ Cal and Correction done for Chain %d\n", i);
|
||||
}
|
||||
}
|
||||
|
||||
REG_SET_BIT(ah, AR_PHY_RX_IQCAL_CORR_B0,
|
||||
AR_PHY_RX_IQCAL_CORR_IQCORR_ENABLE);
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"IQ Cal and Correction (offset 0x%04x) enabled (bit position 0x%08x). New Value 0x%08x\n",
|
||||
(unsigned) (AR_PHY_RX_IQCAL_CORR_B0),
|
||||
AR_PHY_RX_IQCAL_CORR_IQCORR_ENABLE,
|
||||
|
@ -349,7 +347,7 @@ static bool ar9003_hw_solve_iq_cal(struct ath_hw *ah,
|
|||
f2 = (f1 * f1 + f3 * f3) / result_shift;
|
||||
|
||||
if (!f2) {
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE, "Divide by 0\n");
|
||||
ath_dbg(common, CALIBRATE, "Divide by 0\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
|
@ -470,7 +468,7 @@ static bool ar9003_hw_calc_iq_corr(struct ath_hw *ah,
|
|||
|
||||
if ((i2_p_q2_a0_d0 == 0) || (i2_p_q2_a0_d1 == 0) ||
|
||||
(i2_p_q2_a1_d0 == 0) || (i2_p_q2_a1_d1 == 0)) {
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"Divide by 0:\n"
|
||||
"a0_d0=%d\n"
|
||||
"a0_d1=%d\n"
|
||||
|
@ -510,8 +508,7 @@ static bool ar9003_hw_calc_iq_corr(struct ath_hw *ah,
|
|||
mag2 = ar9003_hw_find_mag_approx(ah, cos_2phi_2, sin_2phi_2);
|
||||
|
||||
if ((mag1 == 0) || (mag2 == 0)) {
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Divide by 0: mag1=%d, mag2=%d\n",
|
||||
ath_dbg(common, CALIBRATE, "Divide by 0: mag1=%d, mag2=%d\n",
|
||||
mag1, mag2);
|
||||
return false;
|
||||
}
|
||||
|
@ -529,8 +526,8 @@ static bool ar9003_hw_calc_iq_corr(struct ath_hw *ah,
|
|||
mag_a0_d0, phs_a0_d0,
|
||||
mag_a1_d0,
|
||||
phs_a1_d0, solved_eq)) {
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Call to ar9003_hw_solve_iq_cal() failed.\n");
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"Call to ar9003_hw_solve_iq_cal() failed\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
|
@ -539,12 +536,12 @@ static bool ar9003_hw_calc_iq_corr(struct ath_hw *ah,
|
|||
mag_rx = solved_eq[2];
|
||||
phs_rx = solved_eq[3];
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"chain %d: mag mismatch=%d phase mismatch=%d\n",
|
||||
chain_idx, mag_tx/res_scale, phs_tx/res_scale);
|
||||
|
||||
if (res_scale == mag_tx) {
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"Divide by 0: mag_tx=%d, res_scale=%d\n",
|
||||
mag_tx, res_scale);
|
||||
return false;
|
||||
|
@ -557,8 +554,7 @@ static bool ar9003_hw_calc_iq_corr(struct ath_hw *ah,
|
|||
q_q_coff = (mag_corr_tx * 128 / res_scale);
|
||||
q_i_coff = (phs_corr_tx * 256 / res_scale);
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"tx chain %d: mag corr=%d phase corr=%d\n",
|
||||
ath_dbg(common, CALIBRATE, "tx chain %d: mag corr=%d phase corr=%d\n",
|
||||
chain_idx, q_q_coff, q_i_coff);
|
||||
|
||||
if (q_i_coff < -63)
|
||||
|
@ -572,12 +568,11 @@ static bool ar9003_hw_calc_iq_corr(struct ath_hw *ah,
|
|||
|
||||
iqc_coeff[0] = (q_q_coff * 128) + q_i_coff;
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"tx chain %d: iq corr coeff=%x\n",
|
||||
ath_dbg(common, CALIBRATE, "tx chain %d: iq corr coeff=%x\n",
|
||||
chain_idx, iqc_coeff[0]);
|
||||
|
||||
if (-mag_rx == res_scale) {
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"Divide by 0: mag_rx=%d, res_scale=%d\n",
|
||||
mag_rx, res_scale);
|
||||
return false;
|
||||
|
@ -590,8 +585,7 @@ static bool ar9003_hw_calc_iq_corr(struct ath_hw *ah,
|
|||
q_q_coff = (mag_corr_rx * 128 / res_scale);
|
||||
q_i_coff = (phs_corr_rx * 256 / res_scale);
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"rx chain %d: mag corr=%d phase corr=%d\n",
|
||||
ath_dbg(common, CALIBRATE, "rx chain %d: mag corr=%d phase corr=%d\n",
|
||||
chain_idx, q_q_coff, q_i_coff);
|
||||
|
||||
if (q_i_coff < -63)
|
||||
|
@ -605,8 +599,7 @@ static bool ar9003_hw_calc_iq_corr(struct ath_hw *ah,
|
|||
|
||||
iqc_coeff[1] = (q_q_coff * 128) + q_i_coff;
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"rx chain %d: iq corr coeff=%x\n",
|
||||
ath_dbg(common, CALIBRATE, "rx chain %d: iq corr coeff=%x\n",
|
||||
chain_idx, iqc_coeff[1]);
|
||||
|
||||
return true;
|
||||
|
@ -753,8 +746,7 @@ static bool ar9003_hw_tx_iq_cal_run(struct ath_hw *ah)
|
|||
if (!ath9k_hw_wait(ah, AR_PHY_TX_IQCAL_START,
|
||||
AR_PHY_TX_IQCAL_START_DO_CAL, 0,
|
||||
AH_WAIT_TIMEOUT)) {
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Tx IQ Cal is not completed.\n");
|
||||
ath_dbg(common, CALIBRATE, "Tx IQ Cal is not completed\n");
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
|
@ -792,13 +784,13 @@ static void ar9003_hw_tx_iq_cal_post_proc(struct ath_hw *ah, bool is_reusable)
|
|||
nmeasurement = MAX_MEASUREMENT;
|
||||
|
||||
for (im = 0; im < nmeasurement; im++) {
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Doing Tx IQ Cal for chain %d.\n", i);
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"Doing Tx IQ Cal for chain %d\n", i);
|
||||
|
||||
if (REG_READ(ah, txiqcal_status[i]) &
|
||||
AR_PHY_TX_IQCAL_STATUS_FAILED) {
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Tx IQ Cal failed for chain %d.\n", i);
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"Tx IQ Cal failed for chain %d\n", i);
|
||||
goto tx_iqcal_fail;
|
||||
}
|
||||
|
||||
|
@ -824,18 +816,16 @@ static void ar9003_hw_tx_iq_cal_post_proc(struct ath_hw *ah, bool is_reusable)
|
|||
iq_res[idx + 1] = 0xffff & REG_READ(ah,
|
||||
chan_info_tab[i] + offset);
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"IQ_RES[%d]=0x%x "
|
||||
"IQ_RES[%d]=0x%x\n",
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"IQ_RES[%d]=0x%x IQ_RES[%d]=0x%x\n",
|
||||
idx, iq_res[idx], idx + 1,
|
||||
iq_res[idx + 1]);
|
||||
}
|
||||
|
||||
if (!ar9003_hw_calc_iq_corr(ah, i, iq_res,
|
||||
coeff.iqc_coeff)) {
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Failed in calculation of \
|
||||
IQ correction.\n");
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"Failed in calculation of IQ correction\n");
|
||||
goto tx_iqcal_fail;
|
||||
}
|
||||
|
||||
|
@ -855,7 +845,7 @@ static void ar9003_hw_tx_iq_cal_post_proc(struct ath_hw *ah, bool is_reusable)
|
|||
return;
|
||||
|
||||
tx_iqcal_fail:
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE, "Tx IQ Cal failed\n");
|
||||
ath_dbg(common, CALIBRATE, "Tx IQ Cal failed\n");
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -953,7 +943,7 @@ static bool ar9003_hw_init_cal(struct ath_hw *ah,
|
|||
if (!ar9003_hw_rtt_restore(ah, chan))
|
||||
run_rtt_cal = true;
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE, "RTT restore %s\n",
|
||||
ath_dbg(common, CALIBRATE, "RTT restore %s\n",
|
||||
run_rtt_cal ? "failed" : "succeed");
|
||||
}
|
||||
run_agc_cal = run_rtt_cal;
|
||||
|
@ -1016,20 +1006,20 @@ static bool ar9003_hw_init_cal(struct ath_hw *ah,
|
|||
u32 pld[4] = {0, 0, 0, 0};
|
||||
|
||||
/* send CAL_REQ only when BT is AWAKE. */
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI send WLAN_CAL_REQ 0x%x\n",
|
||||
ath_dbg(common, MCI, "MCI send WLAN_CAL_REQ 0x%x\n",
|
||||
mci_hw->wlan_cal_seq);
|
||||
MCI_GPM_SET_CAL_TYPE(pld, MCI_GPM_WLAN_CAL_REQ);
|
||||
pld[MCI_GPM_WLAN_CAL_W_SEQUENCE] = mci_hw->wlan_cal_seq++;
|
||||
ar9003_mci_send_message(ah, MCI_GPM, 0, pld, 16, true, false);
|
||||
|
||||
/* Wait BT_CAL_GRANT for 50ms */
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI wait for BT_CAL_GRANT");
|
||||
ath_dbg(common, MCI, "MCI wait for BT_CAL_GRANT\n");
|
||||
|
||||
if (ar9003_mci_wait_for_gpm(ah, MCI_GPM_BT_CAL_GRANT, 0, 50000))
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI got BT_CAL_GRANT");
|
||||
ath_dbg(common, MCI, "MCI got BT_CAL_GRANT\n");
|
||||
else {
|
||||
is_reusable = false;
|
||||
ath_dbg(common, ATH_DBG_MCI, "\nMCI BT is not responding");
|
||||
ath_dbg(common, MCI, "\nMCI BT is not responding\n");
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -1058,7 +1048,7 @@ skip_tx_iqcal:
|
|||
|
||||
u32 pld[4] = {0, 0, 0, 0};
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI Send WLAN_CAL_DONE 0x%x\n",
|
||||
ath_dbg(common, MCI, "MCI Send WLAN_CAL_DONE 0x%x\n",
|
||||
mci_hw->wlan_cal_done);
|
||||
MCI_GPM_SET_CAL_TYPE(pld, MCI_GPM_WLAN_CAL_DONE);
|
||||
pld[MCI_GPM_WLAN_CAL_W_SEQUENCE] = mci_hw->wlan_cal_done++;
|
||||
|
@ -1074,9 +1064,8 @@ skip_tx_iqcal:
|
|||
if (run_rtt_cal)
|
||||
ar9003_hw_rtt_disable(ah);
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"offset calibration failed to complete in 1ms;"
|
||||
"noisy environment?\n");
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"offset calibration failed to complete in 1ms; noisy environment?\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
|
@ -1135,15 +1124,14 @@ skip_tx_iqcal:
|
|||
if (ah->supp_cals & IQ_MISMATCH_CAL) {
|
||||
INIT_CAL(&ah->iq_caldata);
|
||||
INSERT_CAL(ah, &ah->iq_caldata);
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"enabling IQ Calibration.\n");
|
||||
ath_dbg(common, CALIBRATE, "enabling IQ Calibration\n");
|
||||
}
|
||||
|
||||
if (ah->supp_cals & TEMP_COMP_CAL) {
|
||||
INIT_CAL(&ah->tempCompCalData);
|
||||
INSERT_CAL(ah, &ah->tempCompCalData);
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"enabling Temperature Compensation Calibration.\n");
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"enabling Temperature Compensation Calibration\n");
|
||||
}
|
||||
|
||||
/* Initialize current pointer to first element in list */
|
||||
|
|
|
@ -3043,8 +3043,7 @@ static bool ar9300_read_eeprom(struct ath_hw *ah, int address, u8 *buffer,
|
|||
int i;
|
||||
|
||||
if ((address < 0) || ((address + count) / 2 > AR9300_EEPROM_SIZE - 1)) {
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
"eeprom address not in range\n");
|
||||
ath_dbg(common, EEPROM, "eeprom address not in range\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
|
@ -3075,8 +3074,8 @@ static bool ar9300_read_eeprom(struct ath_hw *ah, int address, u8 *buffer,
|
|||
return true;
|
||||
|
||||
error:
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
"unable to read eeprom region at offset %d\n", address);
|
||||
ath_dbg(common, EEPROM, "unable to read eeprom region at offset %d\n",
|
||||
address);
|
||||
return false;
|
||||
}
|
||||
|
||||
|
@ -3160,13 +3159,13 @@ static bool ar9300_uncompress_block(struct ath_hw *ah,
|
|||
length &= 0xff;
|
||||
|
||||
if (length > 0 && spot >= 0 && spot+length <= mdataSize) {
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
ath_dbg(common, EEPROM,
|
||||
"Restore at %d: spot=%d offset=%d length=%d\n",
|
||||
it, spot, offset, length);
|
||||
memcpy(&mptr[spot], &block[it+2], length);
|
||||
spot += length;
|
||||
} else if (length > 0) {
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
ath_dbg(common, EEPROM,
|
||||
"Bad restore at %d: spot=%d offset=%d length=%d\n",
|
||||
it, spot, offset, length);
|
||||
return false;
|
||||
|
@ -3188,13 +3187,13 @@ static int ar9300_compress_decision(struct ath_hw *ah,
|
|||
switch (code) {
|
||||
case _CompressNone:
|
||||
if (length != mdata_size) {
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
ath_dbg(common, EEPROM,
|
||||
"EEPROM structure size mismatch memory=%d eeprom=%d\n",
|
||||
mdata_size, length);
|
||||
return -1;
|
||||
}
|
||||
memcpy(mptr, (u8 *) (word + COMP_HDR_LEN), length);
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
ath_dbg(common, EEPROM,
|
||||
"restored eeprom %d: uncompressed, length %d\n",
|
||||
it, length);
|
||||
break;
|
||||
|
@ -3203,22 +3202,21 @@ static int ar9300_compress_decision(struct ath_hw *ah,
|
|||
} else {
|
||||
eep = ar9003_eeprom_struct_find_by_id(reference);
|
||||
if (eep == NULL) {
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
ath_dbg(common, EEPROM,
|
||||
"can't find reference eeprom struct %d\n",
|
||||
reference);
|
||||
return -1;
|
||||
}
|
||||
memcpy(mptr, eep, mdata_size);
|
||||
}
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
ath_dbg(common, EEPROM,
|
||||
"restore eeprom %d: block, reference %d, length %d\n",
|
||||
it, reference, length);
|
||||
ar9300_uncompress_block(ah, mptr, mdata_size,
|
||||
(u8 *) (word + COMP_HDR_LEN), length);
|
||||
break;
|
||||
default:
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
"unknown compression code %d\n", code);
|
||||
ath_dbg(common, EEPROM, "unknown compression code %d\n", code);
|
||||
return -1;
|
||||
}
|
||||
return 0;
|
||||
|
@ -3294,34 +3292,32 @@ static int ar9300_eeprom_restore_internal(struct ath_hw *ah,
|
|||
cptr = AR9300_BASE_ADDR_512;
|
||||
else
|
||||
cptr = AR9300_BASE_ADDR;
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
"Trying EEPROM access at Address 0x%04x\n", cptr);
|
||||
ath_dbg(common, EEPROM, "Trying EEPROM access at Address 0x%04x\n",
|
||||
cptr);
|
||||
if (ar9300_check_eeprom_header(ah, read, cptr))
|
||||
goto found;
|
||||
|
||||
cptr = AR9300_BASE_ADDR_512;
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
"Trying EEPROM access at Address 0x%04x\n", cptr);
|
||||
ath_dbg(common, EEPROM, "Trying EEPROM access at Address 0x%04x\n",
|
||||
cptr);
|
||||
if (ar9300_check_eeprom_header(ah, read, cptr))
|
||||
goto found;
|
||||
|
||||
read = ar9300_read_otp;
|
||||
cptr = AR9300_BASE_ADDR;
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
"Trying OTP access at Address 0x%04x\n", cptr);
|
||||
ath_dbg(common, EEPROM, "Trying OTP access at Address 0x%04x\n", cptr);
|
||||
if (ar9300_check_eeprom_header(ah, read, cptr))
|
||||
goto found;
|
||||
|
||||
cptr = AR9300_BASE_ADDR_512;
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
"Trying OTP access at Address 0x%04x\n", cptr);
|
||||
ath_dbg(common, EEPROM, "Trying OTP access at Address 0x%04x\n", cptr);
|
||||
if (ar9300_check_eeprom_header(ah, read, cptr))
|
||||
goto found;
|
||||
|
||||
goto fail;
|
||||
|
||||
found:
|
||||
ath_dbg(common, ATH_DBG_EEPROM, "Found valid EEPROM data\n");
|
||||
ath_dbg(common, EEPROM, "Found valid EEPROM data\n");
|
||||
|
||||
for (it = 0; it < MSTATE; it++) {
|
||||
if (!read(ah, cptr, word, COMP_HDR_LEN))
|
||||
|
@ -3332,13 +3328,12 @@ found:
|
|||
|
||||
ar9300_comp_hdr_unpack(word, &code, &reference,
|
||||
&length, &major, &minor);
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
ath_dbg(common, EEPROM,
|
||||
"Found block at %x: code=%d ref=%d length=%d major=%d minor=%d\n",
|
||||
cptr, code, reference, length, major, minor);
|
||||
if ((!AR_SREV_9485(ah) && length >= 1024) ||
|
||||
(AR_SREV_9485(ah) && length > EEPROM_DATA_LEN_9485)) {
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
"Skipping bad header\n");
|
||||
ath_dbg(common, EEPROM, "Skipping bad header\n");
|
||||
cptr -= COMP_HDR_LEN;
|
||||
continue;
|
||||
}
|
||||
|
@ -3347,13 +3342,13 @@ found:
|
|||
read(ah, cptr, word, COMP_HDR_LEN + osize + COMP_CKSUM_LEN);
|
||||
checksum = ar9300_comp_cksum(&word[COMP_HDR_LEN], length);
|
||||
mchecksum = get_unaligned_le16(&word[COMP_HDR_LEN + osize]);
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
"checksum %x %x\n", checksum, mchecksum);
|
||||
ath_dbg(common, EEPROM, "checksum %x %x\n",
|
||||
checksum, mchecksum);
|
||||
if (checksum == mchecksum) {
|
||||
ar9300_compress_decision(ah, it, code, reference, mptr,
|
||||
word, length, mdata_size);
|
||||
} else {
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
ath_dbg(common, EEPROM,
|
||||
"skipping block with bad checksum\n");
|
||||
}
|
||||
cptr -= (COMP_HDR_LEN + osize + COMP_CKSUM_LEN);
|
||||
|
@ -4424,8 +4419,8 @@ static void ar9003_hw_set_target_power_eeprom(struct ath_hw *ah, u16 freq,
|
|||
is2GHz) + ht40PowerIncForPdadc;
|
||||
|
||||
for (i = 0; i < ar9300RateSize; i++) {
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
"TPC[%02d] 0x%08x\n", i, targetPowerValT2[i]);
|
||||
ath_dbg(common, EEPROM, "TPC[%02d] 0x%08x\n",
|
||||
i, targetPowerValT2[i]);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -4444,7 +4439,7 @@ static int ar9003_hw_cal_pier_get(struct ath_hw *ah,
|
|||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
|
||||
if (ichain >= AR9300_MAX_CHAINS) {
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
ath_dbg(common, EEPROM,
|
||||
"Invalid chain index, must be less than %d\n",
|
||||
AR9300_MAX_CHAINS);
|
||||
return -1;
|
||||
|
@ -4452,7 +4447,7 @@ static int ar9003_hw_cal_pier_get(struct ath_hw *ah,
|
|||
|
||||
if (mode) { /* 5GHz */
|
||||
if (ipier >= AR9300_NUM_5G_CAL_PIERS) {
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
ath_dbg(common, EEPROM,
|
||||
"Invalid 5GHz cal pier index, must be less than %d\n",
|
||||
AR9300_NUM_5G_CAL_PIERS);
|
||||
return -1;
|
||||
|
@ -4462,7 +4457,7 @@ static int ar9003_hw_cal_pier_get(struct ath_hw *ah,
|
|||
is2GHz = 0;
|
||||
} else {
|
||||
if (ipier >= AR9300_NUM_2G_CAL_PIERS) {
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
ath_dbg(common, EEPROM,
|
||||
"Invalid 2GHz cal pier index, must be less than %d\n",
|
||||
AR9300_NUM_2G_CAL_PIERS);
|
||||
return -1;
|
||||
|
@ -4624,8 +4619,7 @@ static int ar9003_hw_calibration_apply(struct ath_hw *ah, int frequency)
|
|||
|
||||
/* interpolate */
|
||||
for (ichain = 0; ichain < AR9300_MAX_CHAINS; ichain++) {
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
"ch=%d f=%d low=%d %d h=%d %d\n",
|
||||
ath_dbg(common, EEPROM, "ch=%d f=%d low=%d %d h=%d %d\n",
|
||||
ichain, frequency, lfrequency[ichain],
|
||||
lcorrection[ichain], hfrequency[ichain],
|
||||
hcorrection[ichain]);
|
||||
|
@ -4680,7 +4674,7 @@ static int ar9003_hw_calibration_apply(struct ath_hw *ah, int frequency)
|
|||
ar9003_hw_power_control_override(ah, frequency, correction, voltage,
|
||||
temperature);
|
||||
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
ath_dbg(common, EEPROM,
|
||||
"for frequency=%d, calibration correction = %d %d %d\n",
|
||||
frequency, correction[0], correction[1], correction[2]);
|
||||
|
||||
|
@ -4866,7 +4860,7 @@ static void ar9003_hw_set_power_per_rate_table(struct ath_hw *ah,
|
|||
else
|
||||
freq = centers.ctl_center;
|
||||
|
||||
ath_dbg(common, ATH_DBG_REGULATORY,
|
||||
ath_dbg(common, REGULATORY,
|
||||
"LOOP-Mode ctlMode %d < %d, isHt40CtlMode %d, EXT_ADDITIVE %d\n",
|
||||
ctlMode, numCtlModes, isHt40CtlMode,
|
||||
(pCtlMode[ctlMode] & EXT_ADDITIVE));
|
||||
|
@ -4882,7 +4876,7 @@ static void ar9003_hw_set_power_per_rate_table(struct ath_hw *ah,
|
|||
|
||||
twiceMaxEdgePower = MAX_RATE_POWER;
|
||||
for (i = 0; (i < ctlNum) && ctlIndex[i]; i++) {
|
||||
ath_dbg(common, ATH_DBG_REGULATORY,
|
||||
ath_dbg(common, REGULATORY,
|
||||
"LOOP-Ctlidx %d: cfgCtl 0x%2.2x pCtlMode 0x%2.2x ctlIndex 0x%2.2x chan %d\n",
|
||||
i, cfgCtl, pCtlMode[ctlMode], ctlIndex[i],
|
||||
chan->channel);
|
||||
|
@ -4924,7 +4918,7 @@ static void ar9003_hw_set_power_per_rate_table(struct ath_hw *ah,
|
|||
|
||||
minCtlPower = (u8)min(twiceMaxEdgePower, scaledPower);
|
||||
|
||||
ath_dbg(common, ATH_DBG_REGULATORY,
|
||||
ath_dbg(common, REGULATORY,
|
||||
"SEL-Min ctlMode %d pCtlMode %d 2xMaxEdge %d sP %d minCtlPwr %d\n",
|
||||
ctlMode, pCtlMode[ctlMode], twiceMaxEdgePower,
|
||||
scaledPower, minCtlPower);
|
||||
|
@ -5048,7 +5042,7 @@ static void ath9k_hw_ar9300_set_txpower(struct ath_hw *ah,
|
|||
target_power_val_t2_eep[i]) >
|
||||
paprd_scale_factor)) {
|
||||
ah->paprd_ratemask &= ~(1 << i);
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
ath_dbg(common, EEPROM,
|
||||
"paprd disabled for mcs %d\n", i);
|
||||
}
|
||||
}
|
||||
|
@ -5066,8 +5060,8 @@ static void ath9k_hw_ar9300_set_txpower(struct ath_hw *ah,
|
|||
return;
|
||||
|
||||
for (i = 0; i < ar9300RateSize; i++) {
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
"TPC[%02d] 0x%08x\n", i, targetPowerValT2[i]);
|
||||
ath_dbg(common, EEPROM, "TPC[%02d] 0x%08x\n",
|
||||
i, targetPowerValT2[i]);
|
||||
}
|
||||
|
||||
ah->txpower_limit = regulatory->max_power_level;
|
||||
|
|
|
@ -305,10 +305,8 @@ static bool ar9003_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked)
|
|||
raw_intr = REG_READ(ah, AR_MCI_INTERRUPT_RAW);
|
||||
|
||||
if ((raw_intr == 0xdeadbeef) || (rx_msg_intr == 0xdeadbeef))
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI gets 0xdeadbeef during MCI int processing"
|
||||
"new raw_intr=0x%08x, new rx_msg_raw=0x%08x, "
|
||||
"raw_intr=0x%08x, rx_msg_raw=0x%08x\n",
|
||||
ath_dbg(common, MCI,
|
||||
"MCI gets 0xdeadbeef during MCI int processing new raw_intr=0x%08x, new rx_msg_raw=0x%08x, raw_intr=0x%08x, rx_msg_raw=0x%08x\n",
|
||||
raw_intr, rx_msg_intr, mci->raw_intr,
|
||||
mci->rx_msg_intr);
|
||||
else {
|
||||
|
@ -322,7 +320,7 @@ static bool ar9003_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked)
|
|||
|
||||
REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_RAW, rx_msg_intr);
|
||||
REG_WRITE(ah, AR_MCI_INTERRUPT_RAW, raw_intr);
|
||||
ath_dbg(common, ATH_DBG_MCI, "AR_INTR_SYNC_MCI\n");
|
||||
ath_dbg(common, MCI, "AR_INTR_SYNC_MCI\n");
|
||||
|
||||
}
|
||||
}
|
||||
|
@ -335,7 +333,7 @@ static bool ar9003_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked)
|
|||
}
|
||||
|
||||
if (sync_cause & AR_INTR_SYNC_LOCAL_TIMEOUT)
|
||||
ath_dbg(common, ATH_DBG_INTERRUPT,
|
||||
ath_dbg(common, INTERRUPT,
|
||||
"AR_INTR_SYNC_LOCAL_TIMEOUT\n");
|
||||
|
||||
REG_WRITE(ah, AR_INTR_SYNC_CAUSE_CLR, sync_cause);
|
||||
|
@ -366,7 +364,7 @@ static int ar9003_hw_proc_txdesc(struct ath_hw *ah, void *ds,
|
|||
|
||||
if ((MS(ads->ds_info, AR_DescId) != ATHEROS_VENDOR_ID) ||
|
||||
(MS(ads->ds_info, AR_TxRxDesc) != 1)) {
|
||||
ath_dbg(ath9k_hw_common(ah), ATH_DBG_XMIT,
|
||||
ath_dbg(ath9k_hw_common(ah), XMIT,
|
||||
"Tx Descriptor error %x\n", ads->ds_info);
|
||||
memset(ads, 0, sizeof(*ads));
|
||||
return -EIO;
|
||||
|
@ -574,7 +572,7 @@ void ath9k_hw_reset_txstatus_ring(struct ath_hw *ah)
|
|||
memset((void *) ah->ts_ring, 0,
|
||||
ah->ts_size * sizeof(struct ar9003_txs));
|
||||
|
||||
ath_dbg(ath9k_hw_common(ah), ATH_DBG_XMIT,
|
||||
ath_dbg(ath9k_hw_common(ah), XMIT,
|
||||
"TS Start 0x%x End 0x%x Virt %p, Size %d\n",
|
||||
ah->ts_paddr_start, ah->ts_paddr_end,
|
||||
ah->ts_ring, ah->ts_size);
|
||||
|
|
|
@ -68,11 +68,11 @@ static int ar9003_mci_wait_for_interrupt(struct ath_hw *ah, u32 address,
|
|||
}
|
||||
|
||||
if (time_out <= 0) {
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI Wait for Reg 0x%08x = 0x%08x timeout.\n",
|
||||
ath_dbg(common, MCI,
|
||||
"MCI Wait for Reg 0x%08x = 0x%08x timeout\n",
|
||||
address, bit_position);
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI INT_RAW = 0x%08x, RX_MSG_RAW = 0x%08x",
|
||||
ath_dbg(common, MCI,
|
||||
"MCI INT_RAW = 0x%08x, RX_MSG_RAW = 0x%08x\n",
|
||||
REG_READ(ah, AR_MCI_INTERRUPT_RAW),
|
||||
REG_READ(ah, AR_MCI_INTERRUPT_RX_MSG_RAW));
|
||||
time_out = 0;
|
||||
|
@ -85,6 +85,9 @@ void ar9003_mci_remote_reset(struct ath_hw *ah, bool wait_done)
|
|||
{
|
||||
u32 payload[4] = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffff00};
|
||||
|
||||
if (!ATH9K_HW_CAP_MCI)
|
||||
return;
|
||||
|
||||
ar9003_mci_send_message(ah, MCI_REMOTE_RESET, 0, payload, 16,
|
||||
wait_done, false);
|
||||
udelay(5);
|
||||
|
@ -94,6 +97,9 @@ void ar9003_mci_send_lna_transfer(struct ath_hw *ah, bool wait_done)
|
|||
{
|
||||
u32 payload = 0x00000000;
|
||||
|
||||
if (!ATH9K_HW_CAP_MCI)
|
||||
return;
|
||||
|
||||
ar9003_mci_send_message(ah, MCI_LNA_TRANS, 0, &payload, 1,
|
||||
wait_done, false);
|
||||
}
|
||||
|
@ -107,6 +113,9 @@ static void ar9003_mci_send_req_wake(struct ath_hw *ah, bool wait_done)
|
|||
|
||||
void ar9003_mci_send_sys_waking(struct ath_hw *ah, bool wait_done)
|
||||
{
|
||||
if (!ATH9K_HW_CAP_MCI)
|
||||
return;
|
||||
|
||||
ar9003_mci_send_message(ah, MCI_SYS_WAKING, MCI_FLAG_DISABLE_TIMESTAMP,
|
||||
NULL, 0, wait_done, false);
|
||||
}
|
||||
|
@ -135,7 +144,7 @@ static void ar9003_mci_send_coex_version_query(struct ath_hw *ah,
|
|||
|
||||
if (!mci->bt_version_known &&
|
||||
(mci->bt_state != MCI_BT_SLEEP)) {
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI Send Coex version query\n");
|
||||
ath_dbg(common, MCI, "MCI Send Coex version query\n");
|
||||
MCI_GPM_SET_TYPE_OPCODE(payload,
|
||||
MCI_GPM_COEX_AGENT, MCI_GPM_COEX_VERSION_QUERY);
|
||||
ar9003_mci_send_message(ah, MCI_GPM, 0, payload, 16,
|
||||
|
@ -150,7 +159,7 @@ static void ar9003_mci_send_coex_version_response(struct ath_hw *ah,
|
|||
struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci;
|
||||
u32 payload[4] = {0, 0, 0, 0};
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI Send Coex version response\n");
|
||||
ath_dbg(common, MCI, "MCI Send Coex version response\n");
|
||||
MCI_GPM_SET_TYPE_OPCODE(payload, MCI_GPM_COEX_AGENT,
|
||||
MCI_GPM_COEX_VERSION_RESPONSE);
|
||||
*(((u8 *)payload) + MCI_GPM_COEX_B_MAJOR_VERSION) =
|
||||
|
@ -187,8 +196,8 @@ static void ar9003_mci_send_coex_bt_status_query(struct ath_hw *ah,
|
|||
|
||||
if (mci->bt_state != MCI_BT_SLEEP) {
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI Send Coex BT Status Query 0x%02X\n", query_type);
|
||||
ath_dbg(common, MCI, "MCI Send Coex BT Status Query 0x%02X\n",
|
||||
query_type);
|
||||
|
||||
MCI_GPM_SET_TYPE_OPCODE(payload,
|
||||
MCI_GPM_COEX_AGENT, MCI_GPM_COEX_STATUS_QUERY);
|
||||
|
@ -203,9 +212,8 @@ static void ar9003_mci_send_coex_bt_status_query(struct ath_hw *ah,
|
|||
if (query_btinfo) {
|
||||
mci->need_flush_btinfo = true;
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI send bt_status_query fail, "
|
||||
"set flush flag again\n");
|
||||
ath_dbg(common, MCI,
|
||||
"MCI send bt_status_query fail, set flush flag again\n");
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -221,7 +229,10 @@ void ar9003_mci_send_coex_halt_bt_gpm(struct ath_hw *ah, bool halt,
|
|||
struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci;
|
||||
u32 payload[4] = {0, 0, 0, 0};
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI Send Coex %s BT GPM.\n",
|
||||
if (!ATH9K_HW_CAP_MCI)
|
||||
return;
|
||||
|
||||
ath_dbg(common, MCI, "MCI Send Coex %s BT GPM\n",
|
||||
(halt) ? "halt" : "unhalt");
|
||||
|
||||
MCI_GPM_SET_TYPE_OPCODE(payload,
|
||||
|
@ -259,8 +270,8 @@ static void ar9003_mci_prep_interface(struct ath_hw *ah)
|
|||
REG_READ(ah, AR_MCI_INTERRUPT_RAW));
|
||||
|
||||
/* Remote Reset */
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI Reset sequence start\n");
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI send REMOTE_RESET\n");
|
||||
ath_dbg(common, MCI, "MCI Reset sequence start\n");
|
||||
ath_dbg(common, MCI, "MCI send REMOTE_RESET\n");
|
||||
ar9003_mci_remote_reset(ah, true);
|
||||
|
||||
/*
|
||||
|
@ -271,14 +282,13 @@ static void ar9003_mci_prep_interface(struct ath_hw *ah)
|
|||
if (AR_SREV_9462_10(ah))
|
||||
udelay(252);
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI Send REQ_WAKE to remoter(BT)\n");
|
||||
ath_dbg(common, MCI, "MCI Send REQ_WAKE to remoter(BT)\n");
|
||||
ar9003_mci_send_req_wake(ah, true);
|
||||
|
||||
if (ar9003_mci_wait_for_interrupt(ah, AR_MCI_INTERRUPT_RX_MSG_RAW,
|
||||
AR_MCI_INTERRUPT_RX_MSG_SYS_WAKING, 500)) {
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI SYS_WAKING from remote(BT)\n");
|
||||
ath_dbg(common, MCI, "MCI SYS_WAKING from remote(BT)\n");
|
||||
mci->bt_state = MCI_BT_AWAKE;
|
||||
|
||||
if (AR_SREV_9462_10(ah))
|
||||
|
@ -302,8 +312,7 @@ static void ar9003_mci_prep_interface(struct ath_hw *ah)
|
|||
|
||||
/* Send SYS_WAKING to BT */
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI send SW SYS_WAKING to remote BT\n");
|
||||
ath_dbg(common, MCI, "MCI send SW SYS_WAKING to remote BT\n");
|
||||
|
||||
ar9003_mci_send_sys_waking(ah, true);
|
||||
udelay(10);
|
||||
|
@ -332,8 +341,7 @@ static void ar9003_mci_prep_interface(struct ath_hw *ah)
|
|||
|
||||
if (AR_SREV_9462_10(ah) || mci->is_2g) {
|
||||
/* Send LNA_TRANS */
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI send LNA_TRANS to BT\n");
|
||||
ath_dbg(common, MCI, "MCI send LNA_TRANS to BT\n");
|
||||
ar9003_mci_send_lna_transfer(ah, true);
|
||||
udelay(5);
|
||||
}
|
||||
|
@ -344,20 +352,17 @@ static void ar9003_mci_prep_interface(struct ath_hw *ah)
|
|||
AR_MCI_INTERRUPT_RX_MSG_RAW,
|
||||
AR_MCI_INTERRUPT_RX_MSG_LNA_INFO,
|
||||
mci_timeout))
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI WLAN has control over the LNA & "
|
||||
"BT obeys it\n");
|
||||
ath_dbg(common, MCI,
|
||||
"MCI WLAN has control over the LNA & BT obeys it\n");
|
||||
else
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI BT didn't respond to"
|
||||
"LNA_TRANS\n");
|
||||
ath_dbg(common, MCI,
|
||||
"MCI BT didn't respond to LNA_TRANS\n");
|
||||
}
|
||||
|
||||
if (AR_SREV_9462_10(ah)) {
|
||||
/* Send another remote_reset to deassert BT clk_req. */
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI another remote_reset to "
|
||||
"deassert clk_req\n");
|
||||
ath_dbg(common, MCI,
|
||||
"MCI another remote_reset to deassert clk_req\n");
|
||||
ar9003_mci_remote_reset(ah, true);
|
||||
udelay(252);
|
||||
}
|
||||
|
@ -381,12 +386,17 @@ static void ar9003_mci_prep_interface(struct ath_hw *ah)
|
|||
|
||||
void ar9003_mci_disable_interrupt(struct ath_hw *ah)
|
||||
{
|
||||
if (!ATH9K_HW_CAP_MCI)
|
||||
return;
|
||||
|
||||
REG_WRITE(ah, AR_MCI_INTERRUPT_EN, 0);
|
||||
REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_EN, 0);
|
||||
}
|
||||
|
||||
void ar9003_mci_enable_interrupt(struct ath_hw *ah)
|
||||
{
|
||||
if (!ATH9K_HW_CAP_MCI)
|
||||
return;
|
||||
|
||||
REG_WRITE(ah, AR_MCI_INTERRUPT_EN, AR_MCI_INTERRUPT_DEFAULT);
|
||||
REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_EN,
|
||||
|
@ -397,6 +407,9 @@ bool ar9003_mci_check_int(struct ath_hw *ah, u32 ints)
|
|||
{
|
||||
u32 intr;
|
||||
|
||||
if (!ATH9K_HW_CAP_MCI)
|
||||
return false;
|
||||
|
||||
intr = REG_READ(ah, AR_MCI_INTERRUPT_RX_MSG_RAW);
|
||||
return ((intr & ints) == ints);
|
||||
}
|
||||
|
@ -405,6 +418,10 @@ void ar9003_mci_get_interrupt(struct ath_hw *ah, u32 *raw_intr,
|
|||
u32 *rx_msg_intr)
|
||||
{
|
||||
struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci;
|
||||
|
||||
if (!ATH9K_HW_CAP_MCI)
|
||||
return;
|
||||
|
||||
*raw_intr = mci->raw_intr;
|
||||
*rx_msg_intr = mci->rx_msg_intr;
|
||||
|
||||
|
@ -418,6 +435,9 @@ void ar9003_mci_2g5g_changed(struct ath_hw *ah, bool is_2g)
|
|||
{
|
||||
struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci;
|
||||
|
||||
if (!ATH9K_HW_CAP_MCI)
|
||||
return;
|
||||
|
||||
if (!mci->update_2g5g &&
|
||||
(mci->is_2g != is_2g))
|
||||
mci->update_2g5g = true;
|
||||
|
@ -441,7 +461,7 @@ static bool ar9003_mci_is_gpm_valid(struct ath_hw *ah, u32 msg_index)
|
|||
recv_type = MCI_GPM_TYPE(payload);
|
||||
|
||||
if (recv_type == MCI_GPM_RSVD_PATTERN) {
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI Skip RSVD GPM\n");
|
||||
ath_dbg(common, MCI, "MCI Skip RSVD GPM\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
|
@ -514,10 +534,10 @@ static bool ar9003_mci_send_coex_bt_flags(struct ath_hw *ah, bool wait_done,
|
|||
*(((u8 *)pld) + MCI_GPM_COEX_W_BT_FLAGS + 2) = (bt_flags >> 16) & 0xFF;
|
||||
*(((u8 *)pld) + MCI_GPM_COEX_W_BT_FLAGS + 3) = (bt_flags >> 24) & 0xFF;
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
ath_dbg(common, MCI,
|
||||
"MCI BT_MCI_FLAGS: Send Coex BT Update Flags %s 0x%08x\n",
|
||||
(opcode == MCI_GPM_COEX_BT_FLAGS_READ) ? "READ" :
|
||||
((opcode == MCI_GPM_COEX_BT_FLAGS_SET) ? "SET" : "CLEAR"),
|
||||
opcode == MCI_GPM_COEX_BT_FLAGS_READ ? "READ" :
|
||||
opcode == MCI_GPM_COEX_BT_FLAGS_SET ? "SET" : "CLEAR",
|
||||
bt_flags);
|
||||
|
||||
return ar9003_mci_send_message(ah, MCI_GPM, 0, pld, 16,
|
||||
|
@ -531,7 +551,10 @@ void ar9003_mci_reset(struct ath_hw *ah, bool en_int, bool is_2g,
|
|||
struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci;
|
||||
u32 regval, thresh;
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI full_sleep = %d, is_2g = %d\n",
|
||||
if (!ATH9K_HW_CAP_MCI)
|
||||
return;
|
||||
|
||||
ath_dbg(common, MCI, "MCI full_sleep = %d, is_2g = %d\n",
|
||||
is_full_sleep, is_2g);
|
||||
|
||||
/*
|
||||
|
@ -539,14 +562,13 @@ void ar9003_mci_reset(struct ath_hw *ah, bool en_int, bool is_2g,
|
|||
*/
|
||||
|
||||
if (!mci->gpm_addr && !mci->sched_addr) {
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI GPM and schedule buffers are not allocated");
|
||||
ath_dbg(common, MCI,
|
||||
"MCI GPM and schedule buffers are not allocated\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if (REG_READ(ah, AR_BTCOEX_CTRL) == 0xdeadbeef) {
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI it's deadbeef, quit mci_reset\n");
|
||||
ath_dbg(common, MCI, "MCI it's deadbeef, quit mci_reset\n");
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -574,8 +596,7 @@ void ar9003_mci_reset(struct ath_hw *ah, bool en_int, bool is_2g,
|
|||
!(mci->config & ATH_MCI_CONFIG_DISABLE_OSLA)) {
|
||||
|
||||
regval |= SM(1, AR_BTCOEX_CTRL_ONE_STEP_LOOK_AHEAD_EN);
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI sched one step look ahead\n");
|
||||
ath_dbg(common, MCI, "MCI sched one step look ahead\n");
|
||||
|
||||
if (!(mci->config &
|
||||
ATH_MCI_CONFIG_DISABLE_AGGR_THRESH)) {
|
||||
|
@ -593,11 +614,9 @@ void ar9003_mci_reset(struct ath_hw *ah, bool en_int, bool is_2g,
|
|||
AR_MCI_SCHD_TABLE_2_MEM_BASED, 1);
|
||||
|
||||
} else
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI sched aggr thresh: off\n");
|
||||
ath_dbg(common, MCI, "MCI sched aggr thresh: off\n");
|
||||
} else
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI SCHED one step look ahead off\n");
|
||||
ath_dbg(common, MCI, "MCI SCHED one step look ahead off\n");
|
||||
|
||||
if (AR_SREV_9462_10(ah))
|
||||
regval |= SM(1, AR_BTCOEX_CTRL_SPDT_ENABLE_10);
|
||||
|
@ -661,6 +680,9 @@ void ar9003_mci_mute_bt(struct ath_hw *ah)
|
|||
{
|
||||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
|
||||
if (!ATH9K_HW_CAP_MCI)
|
||||
return;
|
||||
|
||||
/* disable all MCI messages */
|
||||
REG_WRITE(ah, AR_MCI_MSG_ATTRIBUTES_TABLE, 0xffff0000);
|
||||
REG_WRITE(ah, AR_BTCOEX_WL_WEIGHTS0, 0xffffffff);
|
||||
|
@ -678,12 +700,12 @@ void ar9003_mci_mute_bt(struct ath_hw *ah)
|
|||
* 2. before reset MCI RX, to quiet BT and avoid MCI RX misalignment
|
||||
*/
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI Send LNA take\n");
|
||||
ath_dbg(common, MCI, "MCI Send LNA take\n");
|
||||
ar9003_mci_send_lna_take(ah, true);
|
||||
|
||||
udelay(5);
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI Send sys sleeping\n");
|
||||
ath_dbg(common, MCI, "MCI Send sys sleeping\n");
|
||||
ar9003_mci_send_sys_sleeping(ah, true);
|
||||
}
|
||||
|
||||
|
@ -693,10 +715,13 @@ void ar9003_mci_sync_bt_state(struct ath_hw *ah)
|
|||
struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci;
|
||||
u32 cur_bt_state;
|
||||
|
||||
if (!ATH9K_HW_CAP_MCI)
|
||||
return;
|
||||
|
||||
cur_bt_state = ar9003_mci_state(ah, MCI_STATE_REMOTE_SLEEP, NULL);
|
||||
|
||||
if (mci->bt_state != cur_bt_state) {
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
ath_dbg(common, MCI,
|
||||
"MCI BT state mismatches. old: %d, new: %d\n",
|
||||
mci->bt_state, cur_bt_state);
|
||||
mci->bt_state = cur_bt_state;
|
||||
|
@ -708,7 +733,7 @@ void ar9003_mci_sync_bt_state(struct ath_hw *ah)
|
|||
ar9003_mci_send_coex_wlan_channels(ah, true);
|
||||
|
||||
if (mci->unhalt_bt_gpm == true) {
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI unhalt BT GPM");
|
||||
ath_dbg(common, MCI, "MCI unhalt BT GPM\n");
|
||||
ar9003_mci_send_coex_halt_bt_gpm(ah, false, true);
|
||||
}
|
||||
}
|
||||
|
@ -734,7 +759,7 @@ static void ar9003_mci_send_2g5g_status(struct ath_hw *ah, bool wait_done)
|
|||
to_set = MCI_5G_FLAGS_SET_MASK;
|
||||
}
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
ath_dbg(common, MCI,
|
||||
"MCI BT_MCI_FLAGS: %s 0x%08x clr=0x%08x, set=0x%08x\n",
|
||||
mci->is_2g ? "2G" : "5G", new_flags, to_clear, to_set);
|
||||
|
||||
|
@ -761,15 +786,15 @@ static void ar9003_mci_queue_unsent_gpm(struct ath_hw *ah, u8 header,
|
|||
if (queue) {
|
||||
|
||||
if (payload)
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
ath_dbg(common, MCI,
|
||||
"MCI ERROR: Send fail: %02x: %02x %02x %02x\n",
|
||||
header,
|
||||
*(((u8 *)payload) + 4),
|
||||
*(((u8 *)payload) + 5),
|
||||
*(((u8 *)payload) + 6));
|
||||
else
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI ERROR: Send fail: %02x\n", header);
|
||||
ath_dbg(common, MCI, "MCI ERROR: Send fail: %02x\n",
|
||||
header);
|
||||
}
|
||||
|
||||
/* check if the message is to be queued */
|
||||
|
@ -795,12 +820,12 @@ static void ar9003_mci_queue_unsent_gpm(struct ath_hw *ah, u8 header,
|
|||
mci->update_2g5g = queue;
|
||||
|
||||
if (queue)
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI BT_MCI_FLAGS: 2G5G status <queued> %s.\n",
|
||||
ath_dbg(common, MCI,
|
||||
"MCI BT_MCI_FLAGS: 2G5G status <queued> %s\n",
|
||||
mci->is_2g ? "2G" : "5G");
|
||||
else
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI BT_MCI_FLAGS: 2G5G status <sent> %s.\n",
|
||||
ath_dbg(common, MCI,
|
||||
"MCI BT_MCI_FLAGS: 2G5G status <sent> %s\n",
|
||||
mci->is_2g ? "2G" : "5G");
|
||||
|
||||
break;
|
||||
|
@ -809,11 +834,9 @@ static void ar9003_mci_queue_unsent_gpm(struct ath_hw *ah, u8 header,
|
|||
|
||||
mci->wlan_channels_update = queue;
|
||||
if (queue)
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI WLAN channel map <queued>\n");
|
||||
ath_dbg(common, MCI, "MCI WLAN channel map <queued>\n");
|
||||
else
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI WLAN channel map <sent>\n");
|
||||
ath_dbg(common, MCI, "MCI WLAN channel map <sent>\n");
|
||||
break;
|
||||
|
||||
case MCI_GPM_COEX_HALT_BT_GPM:
|
||||
|
@ -824,11 +847,11 @@ static void ar9003_mci_queue_unsent_gpm(struct ath_hw *ah, u8 header,
|
|||
mci->unhalt_bt_gpm = queue;
|
||||
|
||||
if (queue)
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
ath_dbg(common, MCI,
|
||||
"MCI UNHALT BT GPM <queued>\n");
|
||||
else {
|
||||
mci->halted_bt_gpm = false;
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
ath_dbg(common, MCI,
|
||||
"MCI UNHALT BT GPM <sent>\n");
|
||||
}
|
||||
}
|
||||
|
@ -839,10 +862,10 @@ static void ar9003_mci_queue_unsent_gpm(struct ath_hw *ah, u8 header,
|
|||
mci->halted_bt_gpm = !queue;
|
||||
|
||||
if (queue)
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
ath_dbg(common, MCI,
|
||||
"MCI HALT BT GPM <not sent>\n");
|
||||
else
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
ath_dbg(common, MCI,
|
||||
"MCI UNHALT BT GPM <sent>\n");
|
||||
}
|
||||
|
||||
|
@ -857,11 +880,14 @@ void ar9003_mci_2g5g_switch(struct ath_hw *ah, bool wait_done)
|
|||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci;
|
||||
|
||||
if (!ATH9K_HW_CAP_MCI)
|
||||
return;
|
||||
|
||||
if (mci->update_2g5g) {
|
||||
if (mci->is_2g) {
|
||||
|
||||
ar9003_mci_send_2g5g_status(ah, true);
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI Send LNA trans\n");
|
||||
ath_dbg(common, MCI, "MCI Send LNA trans\n");
|
||||
ar9003_mci_send_lna_transfer(ah, true);
|
||||
udelay(5);
|
||||
|
||||
|
@ -878,7 +904,7 @@ void ar9003_mci_2g5g_switch(struct ath_hw *ah, bool wait_done)
|
|||
}
|
||||
}
|
||||
} else {
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI Send LNA take\n");
|
||||
ath_dbg(common, MCI, "MCI Send LNA take\n");
|
||||
ar9003_mci_send_lna_take(ah, true);
|
||||
udelay(5);
|
||||
|
||||
|
@ -908,14 +934,17 @@ bool ar9003_mci_send_message(struct ath_hw *ah, u8 header, u32 flag,
|
|||
u32 saved_mci_int_en;
|
||||
int i;
|
||||
|
||||
if (!ATH9K_HW_CAP_MCI)
|
||||
return false;
|
||||
|
||||
saved_mci_int_en = REG_READ(ah, AR_MCI_INTERRUPT_EN);
|
||||
regval = REG_READ(ah, AR_BTCOEX_CTRL);
|
||||
|
||||
if ((regval == 0xdeadbeef) || !(regval & AR_BTCOEX_CTRL_MCI_MODE_EN)) {
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI Not sending 0x%x. MCI is not enabled. "
|
||||
"full_sleep = %d\n", header,
|
||||
ath_dbg(common, MCI,
|
||||
"MCI Not sending 0x%x. MCI is not enabled. full_sleep = %d\n",
|
||||
header,
|
||||
(ah->power_mode == ATH9K_PM_FULL_SLEEP) ? 1 : 0);
|
||||
|
||||
ar9003_mci_queue_unsent_gpm(ah, header, payload, true);
|
||||
|
@ -923,8 +952,9 @@ bool ar9003_mci_send_message(struct ath_hw *ah, u8 header, u32 flag,
|
|||
|
||||
} else if (check_bt && (mci->bt_state == MCI_BT_SLEEP)) {
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI Don't send message 0x%x. BT is in sleep state\n", header);
|
||||
ath_dbg(common, MCI,
|
||||
"MCI Don't send message 0x%x. BT is in sleep state\n",
|
||||
header);
|
||||
|
||||
ar9003_mci_queue_unsent_gpm(ah, header, payload, true);
|
||||
return false;
|
||||
|
@ -973,6 +1003,9 @@ void ar9003_mci_setup(struct ath_hw *ah, u32 gpm_addr, void *gpm_buf,
|
|||
struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci;
|
||||
void *sched_buf = (void *)((char *) gpm_buf + (sched_addr - gpm_addr));
|
||||
|
||||
if (!ATH9K_HW_CAP_MCI)
|
||||
return;
|
||||
|
||||
mci->gpm_addr = gpm_addr;
|
||||
mci->gpm_buf = gpm_buf;
|
||||
mci->gpm_len = len;
|
||||
|
@ -987,9 +1020,12 @@ void ar9003_mci_cleanup(struct ath_hw *ah)
|
|||
{
|
||||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
|
||||
if (!ATH9K_HW_CAP_MCI)
|
||||
return;
|
||||
|
||||
/* Turn off MCI and Jupiter mode. */
|
||||
REG_WRITE(ah, AR_BTCOEX_CTRL, 0x00);
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI ar9003_mci_cleanup\n");
|
||||
ath_dbg(common, MCI, "MCI ar9003_mci_cleanup\n");
|
||||
ar9003_mci_disable_interrupt(ah);
|
||||
}
|
||||
EXPORT_SYMBOL(ar9003_mci_cleanup);
|
||||
|
@ -1006,40 +1042,35 @@ static void ar9003_mci_process_gpm_extra(struct ath_hw *ah, u8 gpm_type,
|
|||
|
||||
switch (gpm_opcode) {
|
||||
case MCI_GPM_COEX_VERSION_QUERY:
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI Recv GPM COEX Version Query\n");
|
||||
ath_dbg(common, MCI, "MCI Recv GPM COEX Version Query\n");
|
||||
ar9003_mci_send_coex_version_response(ah, true);
|
||||
break;
|
||||
case MCI_GPM_COEX_VERSION_RESPONSE:
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI Recv GPM COEX Version Response\n");
|
||||
ath_dbg(common, MCI, "MCI Recv GPM COEX Version Response\n");
|
||||
mci->bt_ver_major =
|
||||
*(p_data + MCI_GPM_COEX_B_MAJOR_VERSION);
|
||||
mci->bt_ver_minor =
|
||||
*(p_data + MCI_GPM_COEX_B_MINOR_VERSION);
|
||||
mci->bt_version_known = true;
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI BT Coex version: %d.%d\n",
|
||||
mci->bt_ver_major,
|
||||
mci->bt_ver_minor);
|
||||
ath_dbg(common, MCI, "MCI BT Coex version: %d.%d\n",
|
||||
mci->bt_ver_major, mci->bt_ver_minor);
|
||||
break;
|
||||
case MCI_GPM_COEX_STATUS_QUERY:
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI Recv GPM COEX Status Query = 0x%02X.\n",
|
||||
ath_dbg(common, MCI,
|
||||
"MCI Recv GPM COEX Status Query = 0x%02X\n",
|
||||
*(p_data + MCI_GPM_COEX_B_WLAN_BITMAP));
|
||||
mci->wlan_channels_update = true;
|
||||
ar9003_mci_send_coex_wlan_channels(ah, true);
|
||||
break;
|
||||
case MCI_GPM_COEX_BT_PROFILE_INFO:
|
||||
mci->query_bt = true;
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI Recv GPM COEX BT_Profile_Info\n");
|
||||
ath_dbg(common, MCI, "MCI Recv GPM COEX BT_Profile_Info\n");
|
||||
break;
|
||||
case MCI_GPM_COEX_BT_STATUS_UPDATE:
|
||||
mci->query_bt = true;
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI Recv GPM COEX BT_Status_Update "
|
||||
"SEQ=%d (drop&query)\n", *(p_gpm + 3));
|
||||
ath_dbg(common, MCI,
|
||||
"MCI Recv GPM COEX BT_Status_Update SEQ=%d (drop&query)\n",
|
||||
*(p_gpm + 3));
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
|
@ -1056,6 +1087,9 @@ u32 ar9003_mci_wait_for_gpm(struct ath_hw *ah, u8 gpm_type,
|
|||
u8 recv_type = 0, recv_opcode = 0;
|
||||
bool b_is_bt_cal_done = (gpm_type == MCI_GPM_BT_CAL_DONE);
|
||||
|
||||
if (!ATH9K_HW_CAP_MCI)
|
||||
return 0;
|
||||
|
||||
more_data = time_out ? MCI_GPM_NOMORE : MCI_GPM_MORE;
|
||||
|
||||
while (time_out > 0) {
|
||||
|
@ -1090,9 +1124,8 @@ u32 ar9003_mci_wait_for_gpm(struct ath_hw *ah, u8 gpm_type,
|
|||
if ((gpm_type == MCI_GPM_BT_CAL_DONE) &&
|
||||
!b_is_bt_cal_done) {
|
||||
gpm_type = MCI_GPM_BT_CAL_GRANT;
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI Recv BT_CAL_DONE"
|
||||
"wait BT_CAL_GRANT\n");
|
||||
ath_dbg(common, MCI,
|
||||
"MCI Recv BT_CAL_DONE wait BT_CAL_GRANT\n");
|
||||
continue;
|
||||
}
|
||||
|
||||
|
@ -1123,7 +1156,7 @@ u32 ar9003_mci_wait_for_gpm(struct ath_hw *ah, u8 gpm_type,
|
|||
u32 payload[4] = {0, 0, 0, 0};
|
||||
|
||||
gpm_type = MCI_GPM_BT_CAL_DONE;
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
ath_dbg(common, MCI,
|
||||
"MCI Rcv BT_CAL_REQ, send WLAN_CAL_GRANT\n");
|
||||
|
||||
MCI_GPM_SET_CAL_TYPE(payload,
|
||||
|
@ -1132,13 +1165,12 @@ u32 ar9003_mci_wait_for_gpm(struct ath_hw *ah, u8 gpm_type,
|
|||
ar9003_mci_send_message(ah, MCI_GPM, 0, payload, 16,
|
||||
false, false);
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI now wait for BT_CAL_DONE\n");
|
||||
ath_dbg(common, MCI, "MCI now wait for BT_CAL_DONE\n");
|
||||
|
||||
continue;
|
||||
} else {
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI GPM subtype"
|
||||
"not match 0x%x\n", *(p_gpm + 1));
|
||||
ath_dbg(common, MCI, "MCI GPM subtype not match 0x%x\n",
|
||||
*(p_gpm + 1));
|
||||
mismatch++;
|
||||
ar9003_mci_process_gpm_extra(ah, recv_type,
|
||||
recv_opcode, p_gpm);
|
||||
|
@ -1151,16 +1183,15 @@ u32 ar9003_mci_wait_for_gpm(struct ath_hw *ah, u8 gpm_type,
|
|||
|
||||
if (time_out <= 0) {
|
||||
time_out = 0;
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
ath_dbg(common, MCI,
|
||||
"MCI GPM received timeout, mismatch = %d\n", mismatch);
|
||||
} else
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI Receive GPM type=0x%x, code=0x%x\n",
|
||||
ath_dbg(common, MCI, "MCI Receive GPM type=0x%x, code=0x%x\n",
|
||||
gpm_type, gpm_opcode);
|
||||
|
||||
while (more_data == MCI_GPM_MORE) {
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI discard remaining GPM\n");
|
||||
ath_dbg(common, MCI, "MCI discard remaining GPM\n");
|
||||
offset = ar9003_mci_state(ah, MCI_STATE_NEXT_GPM_OFFSET,
|
||||
&more_data);
|
||||
|
||||
|
@ -1188,6 +1219,9 @@ u32 ar9003_mci_state(struct ath_hw *ah, u32 state_type, u32 *p_data)
|
|||
u32 value = 0, more_gpm = 0, gpm_ptr;
|
||||
u8 query_type;
|
||||
|
||||
if (!ATH9K_HW_CAP_MCI)
|
||||
return 0;
|
||||
|
||||
switch (state_type) {
|
||||
case MCI_STATE_ENABLE:
|
||||
if (mci->ready) {
|
||||
|
@ -1201,8 +1235,7 @@ u32 ar9003_mci_state(struct ath_hw *ah, u32 state_type, u32 *p_data)
|
|||
break;
|
||||
case MCI_STATE_INIT_GPM_OFFSET:
|
||||
value = MS(REG_READ(ah, AR_MCI_GPM_1), AR_MCI_GPM_WRITE_PTR);
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI GPM initial WRITE_PTR=%d\n", value);
|
||||
ath_dbg(common, MCI, "MCI GPM initial WRITE_PTR=%d\n", value);
|
||||
mci->gpm_idx = value;
|
||||
break;
|
||||
case MCI_STATE_NEXT_GPM_OFFSET:
|
||||
|
@ -1227,8 +1260,8 @@ u32 ar9003_mci_state(struct ath_hw *ah, u32 state_type, u32 *p_data)
|
|||
else if (value >= mci->gpm_len) {
|
||||
if (value != 0xFFFF) {
|
||||
value = 0;
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI GPM offset"
|
||||
"out of range\n");
|
||||
ath_dbg(common, MCI,
|
||||
"MCI GPM offset out of range\n");
|
||||
}
|
||||
} else
|
||||
value--;
|
||||
|
@ -1236,8 +1269,8 @@ u32 ar9003_mci_state(struct ath_hw *ah, u32 state_type, u32 *p_data)
|
|||
if (value == 0xFFFF) {
|
||||
value = MCI_GPM_INVALID;
|
||||
more_gpm = MCI_GPM_NOMORE;
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI GPM ptr invalid"
|
||||
"@ptr=%d, offset=%d, more=GPM_NOMORE\n",
|
||||
ath_dbg(common, MCI,
|
||||
"MCI GPM ptr invalid @ptr=%d, offset=%d, more=GPM_NOMORE\n",
|
||||
gpm_ptr, value);
|
||||
} else if (state_type == MCI_STATE_NEXT_GPM_OFFSET) {
|
||||
|
||||
|
@ -1245,9 +1278,9 @@ u32 ar9003_mci_state(struct ath_hw *ah, u32 state_type, u32 *p_data)
|
|||
value = MCI_GPM_INVALID;
|
||||
more_gpm = MCI_GPM_NOMORE;
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI GPM message"
|
||||
"not available @ptr=%d, @offset=%d,"
|
||||
"more=GPM_NOMORE\n", gpm_ptr, value);
|
||||
ath_dbg(common, MCI,
|
||||
"MCI GPM message not available @ptr=%d, @offset=%d, more=GPM_NOMORE\n",
|
||||
gpm_ptr, value);
|
||||
} else {
|
||||
for (;;) {
|
||||
|
||||
|
@ -1267,9 +1300,8 @@ u32 ar9003_mci_state(struct ath_hw *ah, u32 state_type, u32 *p_data)
|
|||
mci->gpm_len)
|
||||
mci->gpm_idx = 0;
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI GPM message got ptr=%d,"
|
||||
"@offset=%d, more=%d\n",
|
||||
ath_dbg(common, MCI,
|
||||
"MCI GPM message got ptr=%d, @offset=%d, more=%d\n",
|
||||
gpm_ptr, temp_index,
|
||||
(more_gpm == MCI_GPM_MORE));
|
||||
|
||||
|
@ -1333,8 +1365,7 @@ u32 ar9003_mci_state(struct ath_hw *ah, u32 state_type, u32 *p_data)
|
|||
|
||||
if (mci->unhalt_bt_gpm) {
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI unhalt BT GPM\n");
|
||||
ath_dbg(common, MCI, "MCI unhalt BT GPM\n");
|
||||
ar9003_mci_send_coex_halt_bt_gpm(ah, false, true);
|
||||
}
|
||||
|
||||
|
@ -1360,8 +1391,8 @@ u32 ar9003_mci_state(struct ath_hw *ah, u32 state_type, u32 *p_data)
|
|||
ATH_MCI_CONFIG_MCI_OBS_GPIO) !=
|
||||
ATH_MCI_CONFIG_MCI_OBS_GPIO) {
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI reconfigure observation");
|
||||
ath_dbg(common, MCI,
|
||||
"MCI reconfigure observation\n");
|
||||
ar9003_mci_observation_set_up(ah);
|
||||
}
|
||||
}
|
||||
|
@ -1374,16 +1405,14 @@ u32 ar9003_mci_state(struct ath_hw *ah, u32 state_type, u32 *p_data)
|
|||
case MCI_STATE_SET_BT_COEX_VERSION:
|
||||
|
||||
if (!p_data)
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
ath_dbg(common, MCI,
|
||||
"MCI Set BT Coex version with NULL data!!\n");
|
||||
else {
|
||||
mci->bt_ver_major = (*p_data >> 8) & 0xff;
|
||||
mci->bt_ver_minor = (*p_data) & 0xff;
|
||||
mci->bt_version_known = true;
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI BT version set: %d.%d\n",
|
||||
mci->bt_ver_major,
|
||||
mci->bt_ver_minor);
|
||||
ath_dbg(common, MCI, "MCI BT version set: %d.%d\n",
|
||||
mci->bt_ver_major, mci->bt_ver_minor);
|
||||
}
|
||||
break;
|
||||
|
||||
|
@ -1438,7 +1467,7 @@ u32 ar9003_mci_state(struct ath_hw *ah, u32 state_type, u32 *p_data)
|
|||
|
||||
case MCI_STATE_RECOVER_RX:
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI hw RECOVER_RX\n");
|
||||
ath_dbg(common, MCI, "MCI hw RECOVER_RX\n");
|
||||
ar9003_mci_prep_interface(ah);
|
||||
mci->query_bt = true;
|
||||
mci->need_flush_btinfo = true;
|
||||
|
|
|
@ -119,8 +119,8 @@ static int ar9003_get_training_power_5g(struct ath_hw *ah)
|
|||
break;
|
||||
default:
|
||||
delta = 0;
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Invalid tx-chainmask: %u\n", ah->txchainmask);
|
||||
ath_dbg(common, CALIBRATE, "Invalid tx-chainmask: %u\n",
|
||||
ah->txchainmask);
|
||||
}
|
||||
|
||||
power += delta;
|
||||
|
@ -148,13 +148,12 @@ static int ar9003_paprd_setup_single_table(struct ath_hw *ah)
|
|||
else
|
||||
training_power = ar9003_get_training_power_5g(ah);
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Training power: %d, Target power: %d\n",
|
||||
ath_dbg(common, CALIBRATE, "Training power: %d, Target power: %d\n",
|
||||
training_power, ah->paprd_target_power);
|
||||
|
||||
if (training_power < 0) {
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"PAPRD target power delta out of range");
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"PAPRD target power delta out of range\n");
|
||||
return -ERANGE;
|
||||
}
|
||||
ah->paprd_training_power = training_power;
|
||||
|
@ -311,7 +310,7 @@ static unsigned int ar9003_get_desired_gain(struct ath_hw *ah, int chain,
|
|||
reg_cl_gain = AR_PHY_CL_TAB_2;
|
||||
break;
|
||||
default:
|
||||
ath_dbg(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
|
||||
ath_dbg(ath9k_hw_common(ah), CALIBRATE,
|
||||
"Invalid chainmask: %d\n", chain);
|
||||
break;
|
||||
}
|
||||
|
@ -850,7 +849,7 @@ bool ar9003_paprd_is_done(struct ath_hw *ah)
|
|||
agc2_pwr = REG_READ_FIELD(ah, AR_PHY_PAPRD_TRAINER_STAT1,
|
||||
AR_PHY_PAPRD_TRAINER_STAT1_PAPRD_AGC2_PWR);
|
||||
|
||||
ath_dbg(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
|
||||
ath_dbg(ath9k_hw_common(ah), CALIBRATE,
|
||||
"AGC2_PWR = 0x%x training done = 0x%x\n",
|
||||
agc2_pwr, paprd_done);
|
||||
/*
|
||||
|
|
|
@ -882,7 +882,7 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah,
|
|||
AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW);
|
||||
|
||||
if (!on != aniState->ofdmWeakSigDetectOff) {
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
ath_dbg(common, ANI,
|
||||
"** ch %d: ofdm weak signal: %s=>%s\n",
|
||||
chan->channel,
|
||||
!aniState->ofdmWeakSigDetectOff ?
|
||||
|
@ -900,7 +900,7 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah,
|
|||
u32 level = param;
|
||||
|
||||
if (level >= ARRAY_SIZE(firstep_table)) {
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
ath_dbg(common, ANI,
|
||||
"ATH9K_ANI_FIRSTEP_LEVEL: level out of range (%u > %zu)\n",
|
||||
level, ARRAY_SIZE(firstep_table));
|
||||
return false;
|
||||
|
@ -937,7 +937,7 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah,
|
|||
AR_PHY_FIND_SIG_LOW_FIRSTEP_LOW, value2);
|
||||
|
||||
if (level != aniState->firstepLevel) {
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
ath_dbg(common, ANI,
|
||||
"** ch %d: level %d=>%d[def:%d] firstep[level]=%d ini=%d\n",
|
||||
chan->channel,
|
||||
aniState->firstepLevel,
|
||||
|
@ -945,7 +945,7 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah,
|
|||
ATH9K_ANI_FIRSTEP_LVL_NEW,
|
||||
value,
|
||||
aniState->iniDef.firstep);
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
ath_dbg(common, ANI,
|
||||
"** ch %d: level %d=>%d[def:%d] firstep_low[level]=%d ini=%d\n",
|
||||
chan->channel,
|
||||
aniState->firstepLevel,
|
||||
|
@ -965,7 +965,7 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah,
|
|||
u32 level = param;
|
||||
|
||||
if (level >= ARRAY_SIZE(cycpwrThr1_table)) {
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
ath_dbg(common, ANI,
|
||||
"ATH9K_ANI_SPUR_IMMUNITY_LEVEL: level out of range (%u > %zu)\n",
|
||||
level, ARRAY_SIZE(cycpwrThr1_table));
|
||||
return false;
|
||||
|
@ -1001,7 +1001,7 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah,
|
|||
AR_PHY_EXT_CYCPWR_THR1, value2);
|
||||
|
||||
if (level != aniState->spurImmunityLevel) {
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
ath_dbg(common, ANI,
|
||||
"** ch %d: level %d=>%d[def:%d] cycpwrThr1[level]=%d ini=%d\n",
|
||||
chan->channel,
|
||||
aniState->spurImmunityLevel,
|
||||
|
@ -1009,7 +1009,7 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah,
|
|||
ATH9K_ANI_SPUR_IMMUNE_LVL_NEW,
|
||||
value,
|
||||
aniState->iniDef.cycpwrThr1);
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
ath_dbg(common, ANI,
|
||||
"** ch %d: level %d=>%d[def:%d] cycpwrThr1Ext[level]=%d ini=%d\n",
|
||||
chan->channel,
|
||||
aniState->spurImmunityLevel,
|
||||
|
@ -1036,8 +1036,7 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah,
|
|||
REG_RMW_FIELD(ah, AR_PHY_MRC_CCK_CTRL,
|
||||
AR_PHY_MRC_CCK_MUX_REG, is_on);
|
||||
if (!is_on != aniState->mrcCCKOff) {
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
"** ch %d: MRC CCK: %s=>%s\n",
|
||||
ath_dbg(common, ANI, "** ch %d: MRC CCK: %s=>%s\n",
|
||||
chan->channel,
|
||||
!aniState->mrcCCKOff ? "on" : "off",
|
||||
is_on ? "on" : "off");
|
||||
|
@ -1052,11 +1051,11 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah,
|
|||
case ATH9K_ANI_PRESENT:
|
||||
break;
|
||||
default:
|
||||
ath_dbg(common, ATH_DBG_ANI, "invalid cmd %u\n", cmd);
|
||||
ath_dbg(common, ANI, "invalid cmd %u\n", cmd);
|
||||
return false;
|
||||
}
|
||||
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
ath_dbg(common, ANI,
|
||||
"ANI parameters: SI=%d, ofdmWS=%s FS=%d MRCcck=%s listenTime=%d ofdmErrs=%d cckErrs=%d\n",
|
||||
aniState->spurImmunityLevel,
|
||||
!aniState->ofdmWeakSigDetectOff ? "on" : "off",
|
||||
|
@ -1125,8 +1124,7 @@ static void ar9003_hw_ani_cache_ini_regs(struct ath_hw *ah)
|
|||
aniState = &ah->curchan->ani;
|
||||
iniDef = &aniState->iniDef;
|
||||
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
"ver %d.%d opmode %u chan %d Mhz/0x%x\n",
|
||||
ath_dbg(common, ANI, "ver %d.%d opmode %u chan %d Mhz/0x%x\n",
|
||||
ah->hw_version.macVersion,
|
||||
ah->hw_version.macRev,
|
||||
ah->opmode,
|
||||
|
@ -1388,7 +1386,7 @@ void ar9003_hw_bb_watchdog_config(struct ath_hw *ah)
|
|||
~(AR_PHY_WATCHDOG_NON_IDLE_ENABLE |
|
||||
AR_PHY_WATCHDOG_IDLE_ENABLE));
|
||||
|
||||
ath_dbg(common, ATH_DBG_RESET, "Disabled BB Watchdog\n");
|
||||
ath_dbg(common, RESET, "Disabled BB Watchdog\n");
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -1424,8 +1422,7 @@ void ar9003_hw_bb_watchdog_config(struct ath_hw *ah)
|
|||
AR_PHY_WATCHDOG_IDLE_MASK |
|
||||
(AR_PHY_WATCHDOG_NON_IDLE_MASK & (idle_count << 2)));
|
||||
|
||||
ath_dbg(common, ATH_DBG_RESET,
|
||||
"Enabled BB Watchdog timeout (%u ms)\n",
|
||||
ath_dbg(common, RESET, "Enabled BB Watchdog timeout (%u ms)\n",
|
||||
idle_tmo_ms);
|
||||
}
|
||||
|
||||
|
@ -1454,9 +1451,9 @@ void ar9003_hw_bb_watchdog_dbg_info(struct ath_hw *ah)
|
|||
return;
|
||||
|
||||
status = ah->bb_watchdog_last_status;
|
||||
ath_dbg(common, ATH_DBG_RESET,
|
||||
ath_dbg(common, RESET,
|
||||
"\n==== BB update: BB status=0x%08x ====\n", status);
|
||||
ath_dbg(common, ATH_DBG_RESET,
|
||||
ath_dbg(common, RESET,
|
||||
"** BB state: wd=%u det=%u rdar=%u rOFDM=%d rCCK=%u tOFDM=%u tCCK=%u agc=%u src=%u **\n",
|
||||
MS(status, AR_PHY_WATCHDOG_INFO),
|
||||
MS(status, AR_PHY_WATCHDOG_DET_HANG),
|
||||
|
@ -1468,22 +1465,19 @@ void ar9003_hw_bb_watchdog_dbg_info(struct ath_hw *ah)
|
|||
MS(status, AR_PHY_WATCHDOG_AGC_SM),
|
||||
MS(status, AR_PHY_WATCHDOG_SRCH_SM));
|
||||
|
||||
ath_dbg(common, ATH_DBG_RESET,
|
||||
"** BB WD cntl: cntl1=0x%08x cntl2=0x%08x **\n",
|
||||
ath_dbg(common, RESET, "** BB WD cntl: cntl1=0x%08x cntl2=0x%08x **\n",
|
||||
REG_READ(ah, AR_PHY_WATCHDOG_CTL_1),
|
||||
REG_READ(ah, AR_PHY_WATCHDOG_CTL_2));
|
||||
ath_dbg(common, ATH_DBG_RESET,
|
||||
"** BB mode: BB_gen_controls=0x%08x **\n",
|
||||
ath_dbg(common, RESET, "** BB mode: BB_gen_controls=0x%08x **\n",
|
||||
REG_READ(ah, AR_PHY_GEN_CTRL));
|
||||
|
||||
#define PCT(_field) (common->cc_survey._field * 100 / common->cc_survey.cycles)
|
||||
if (common->cc_survey.cycles)
|
||||
ath_dbg(common, ATH_DBG_RESET,
|
||||
ath_dbg(common, RESET,
|
||||
"** BB busy times: rx_clear=%d%%, rx_frame=%d%%, tx_frame=%d%% **\n",
|
||||
PCT(rx_busy), PCT(rx_frame), PCT(tx_frame));
|
||||
|
||||
ath_dbg(common, ATH_DBG_RESET,
|
||||
"==== BB update: done ====\n\n");
|
||||
ath_dbg(common, RESET, "==== BB update: done ====\n\n");
|
||||
}
|
||||
EXPORT_SYMBOL(ar9003_hw_bb_watchdog_dbg_info);
|
||||
|
||||
|
|
|
@ -196,6 +196,7 @@ struct ath_txq {
|
|||
u8 txq_headidx;
|
||||
u8 txq_tailidx;
|
||||
int pending_frames;
|
||||
struct sk_buff_head complete_q;
|
||||
};
|
||||
|
||||
struct ath_atx_ac {
|
||||
|
|
|
@ -117,11 +117,10 @@ static void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb)
|
|||
memset(&txctl, 0, sizeof(struct ath_tx_control));
|
||||
txctl.txq = sc->beacon.cabq;
|
||||
|
||||
ath_dbg(common, ATH_DBG_XMIT,
|
||||
"transmitting CABQ packet, skb: %p\n", skb);
|
||||
ath_dbg(common, XMIT, "transmitting CABQ packet, skb: %p\n", skb);
|
||||
|
||||
if (ath_tx_start(hw, skb, &txctl) != 0) {
|
||||
ath_dbg(common, ATH_DBG_XMIT, "CABQ TX failed\n");
|
||||
ath_dbg(common, XMIT, "CABQ TX failed\n");
|
||||
dev_kfree_skb_any(skb);
|
||||
}
|
||||
}
|
||||
|
@ -204,7 +203,7 @@ static struct ath_buf *ath_beacon_generate(struct ieee80211_hw *hw,
|
|||
|
||||
if (skb && cabq_depth) {
|
||||
if (sc->nvifs > 1) {
|
||||
ath_dbg(common, ATH_DBG_BEACON,
|
||||
ath_dbg(common, BEACON,
|
||||
"Flushing previous cabq traffic\n");
|
||||
ath_draintxq(sc, cabq, false);
|
||||
}
|
||||
|
@ -297,7 +296,7 @@ int ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_vif *vif)
|
|||
tsfadjust = TU_TO_USEC(intval * avp->av_bslot) / ATH_BCBUF;
|
||||
avp->tsf_adjust = cpu_to_le64(tsfadjust);
|
||||
|
||||
ath_dbg(common, ATH_DBG_BEACON,
|
||||
ath_dbg(common, BEACON,
|
||||
"stagger beacons, bslot %d intval %u tsfadjust %llu\n",
|
||||
avp->av_bslot, intval, (unsigned long long)tsfadjust);
|
||||
|
||||
|
@ -371,15 +370,14 @@ void ath_beacon_tasklet(unsigned long data)
|
|||
sc->beacon.bmisscnt++;
|
||||
|
||||
if (sc->beacon.bmisscnt < BSTUCK_THRESH * sc->nbcnvifs) {
|
||||
ath_dbg(common, ATH_DBG_BSTUCK,
|
||||
ath_dbg(common, BSTUCK,
|
||||
"missed %u consecutive beacons\n",
|
||||
sc->beacon.bmisscnt);
|
||||
ath9k_hw_stop_dma_queue(ah, sc->beacon.beaconq);
|
||||
if (sc->beacon.bmisscnt > 3)
|
||||
ath9k_hw_bstuck_nfcal(ah);
|
||||
} else if (sc->beacon.bmisscnt >= BSTUCK_THRESH) {
|
||||
ath_dbg(common, ATH_DBG_BSTUCK,
|
||||
"beacon is officially stuck\n");
|
||||
ath_dbg(common, BSTUCK, "beacon is officially stuck\n");
|
||||
sc->sc_flags |= SC_OP_TSF_RESET;
|
||||
ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
|
||||
}
|
||||
|
@ -406,7 +404,7 @@ void ath_beacon_tasklet(unsigned long data)
|
|||
slot = (tsftu % (intval * ATH_BCBUF)) / intval;
|
||||
vif = sc->beacon.bslot[slot];
|
||||
|
||||
ath_dbg(common, ATH_DBG_BEACON,
|
||||
ath_dbg(common, BEACON,
|
||||
"slot %d [tsf %llu tsftu %u intval %u] vif %p\n",
|
||||
slot, tsf, tsftu / ATH_BCBUF, intval, vif);
|
||||
} else {
|
||||
|
@ -424,7 +422,7 @@ void ath_beacon_tasklet(unsigned long data)
|
|||
}
|
||||
|
||||
if (sc->beacon.bmisscnt != 0) {
|
||||
ath_dbg(common, ATH_DBG_BSTUCK,
|
||||
ath_dbg(common, BSTUCK,
|
||||
"resume beacon xmit after %u misses\n",
|
||||
sc->beacon.bmisscnt);
|
||||
sc->beacon.bmisscnt = 0;
|
||||
|
@ -541,7 +539,7 @@ static void ath_beacon_config_sta(struct ath_softc *sc,
|
|||
|
||||
/* No need to configure beacon if we are not associated */
|
||||
if (!common->curaid) {
|
||||
ath_dbg(common, ATH_DBG_BEACON,
|
||||
ath_dbg(common, BEACON,
|
||||
"STA is not yet associated..skipping beacon config\n");
|
||||
return;
|
||||
}
|
||||
|
@ -631,8 +629,8 @@ static void ath_beacon_config_sta(struct ath_softc *sc,
|
|||
/* TSF out of range threshold fixed at 1 second */
|
||||
bs.bs_tsfoor_threshold = ATH9K_TSFOOR_THRESHOLD;
|
||||
|
||||
ath_dbg(common, ATH_DBG_BEACON, "tsf: %llu tsftu: %u\n", tsf, tsftu);
|
||||
ath_dbg(common, ATH_DBG_BEACON,
|
||||
ath_dbg(common, BEACON, "tsf: %llu tsftu: %u\n", tsf, tsftu);
|
||||
ath_dbg(common, BEACON,
|
||||
"bmiss: %u sleep: %u cfp-period: %u maxdur: %u next: %u\n",
|
||||
bs.bs_bmissthreshold, bs.bs_sleepduration,
|
||||
bs.bs_cfpperiod, bs.bs_cfpmaxduration, bs.bs_cfpnext);
|
||||
|
@ -660,8 +658,7 @@ static void ath_beacon_config_adhoc(struct ath_softc *sc,
|
|||
tsf = roundup(ath9k_hw_gettsf32(ah) + TU_TO_USEC(FUDGE), intval);
|
||||
nexttbtt = tsf + intval;
|
||||
|
||||
ath_dbg(common, ATH_DBG_BEACON,
|
||||
"IBSS nexttbtt %u intval %u (%u)\n",
|
||||
ath_dbg(common, BEACON, "IBSS nexttbtt %u intval %u (%u)\n",
|
||||
nexttbtt, intval, conf->beacon_interval);
|
||||
|
||||
/*
|
||||
|
@ -699,9 +696,8 @@ static bool ath9k_allow_beacon_config(struct ath_softc *sc,
|
|||
(sc->nbcnvifs > 1) &&
|
||||
(vif->type == NL80211_IFTYPE_AP) &&
|
||||
(cur_conf->beacon_interval != bss_conf->beacon_int)) {
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
"Changing beacon interval of multiple \
|
||||
AP interfaces !\n");
|
||||
ath_dbg(common, CONFIG,
|
||||
"Changing beacon interval of multiple AP interfaces !\n");
|
||||
return false;
|
||||
}
|
||||
/*
|
||||
|
@ -710,7 +706,7 @@ static bool ath9k_allow_beacon_config(struct ath_softc *sc,
|
|||
*/
|
||||
if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) &&
|
||||
(vif->type != NL80211_IFTYPE_AP)) {
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
ath_dbg(common, CONFIG,
|
||||
"STA vif's beacon not allowed on AP mode\n");
|
||||
return false;
|
||||
}
|
||||
|
@ -722,7 +718,7 @@ static bool ath9k_allow_beacon_config(struct ath_softc *sc,
|
|||
(vif->type == NL80211_IFTYPE_STATION) &&
|
||||
(sc->sc_flags & SC_OP_BEACONS) &&
|
||||
!avp->primary_sta_vif) {
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
ath_dbg(common, CONFIG,
|
||||
"Beacon already configured for a station interface\n");
|
||||
return false;
|
||||
}
|
||||
|
@ -802,8 +798,7 @@ void ath_set_beacon(struct ath_softc *sc)
|
|||
ath_beacon_config_sta(sc, cur_conf);
|
||||
break;
|
||||
default:
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
"Unsupported beaconing mode\n");
|
||||
ath_dbg(common, CONFIG, "Unsupported beaconing mode\n");
|
||||
return;
|
||||
}
|
||||
|
||||
|
|
|
@ -68,6 +68,9 @@ void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum)
|
|||
u32 i, idx;
|
||||
bool rxclear_polarity = ath_bt_config.bt_rxclear_polarity;
|
||||
|
||||
if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE)
|
||||
return;
|
||||
|
||||
if (AR_SREV_9300_20_OR_LATER(ah))
|
||||
rxclear_polarity = !ath_bt_config.bt_rxclear_polarity;
|
||||
|
||||
|
@ -99,6 +102,9 @@ void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah)
|
|||
{
|
||||
struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
|
||||
|
||||
if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE)
|
||||
return;
|
||||
|
||||
/* connect bt_active to baseband */
|
||||
REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL,
|
||||
(AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_DEF |
|
||||
|
@ -121,6 +127,9 @@ void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah)
|
|||
{
|
||||
struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
|
||||
|
||||
if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE)
|
||||
return;
|
||||
|
||||
/* btcoex 3-wire */
|
||||
REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
|
||||
(AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB |
|
||||
|
@ -147,6 +156,9 @@ static void ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah)
|
|||
{
|
||||
struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
|
||||
|
||||
if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE)
|
||||
return;
|
||||
|
||||
/* Configure the desired GPIO port for TX_FRAME output */
|
||||
ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
|
||||
AR_GPIO_OUTPUT_MUX_AS_TX_FRAME);
|
||||
|
@ -158,6 +170,9 @@ void ath9k_hw_btcoex_set_weight(struct ath_hw *ah,
|
|||
{
|
||||
struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
|
||||
|
||||
if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE)
|
||||
return;
|
||||
|
||||
btcoex_hw->bt_coex_weights = SM(bt_weight, AR_BTCOEX_BT_WGHT) |
|
||||
SM(wlan_weight, AR_BTCOEX_WL_WGHT);
|
||||
}
|
||||
|
@ -219,9 +234,9 @@ void ath9k_hw_btcoex_enable(struct ath_hw *ah)
|
|||
{
|
||||
struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
|
||||
|
||||
switch (btcoex_hw->scheme) {
|
||||
switch (ath9k_hw_get_btcoex_scheme(ah)) {
|
||||
case ATH_BTCOEX_CFG_NONE:
|
||||
break;
|
||||
return;
|
||||
case ATH_BTCOEX_CFG_2WIRE:
|
||||
ath9k_hw_btcoex_enable_2wire(ah);
|
||||
break;
|
||||
|
@ -246,6 +261,9 @@ void ath9k_hw_btcoex_disable(struct ath_hw *ah)
|
|||
struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
|
||||
int i;
|
||||
|
||||
if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE)
|
||||
return;
|
||||
|
||||
btcoex_hw->enabled = false;
|
||||
if (btcoex_hw->scheme == ATH_BTCOEX_CFG_MCI) {
|
||||
ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE);
|
||||
|
@ -294,6 +312,9 @@ static void ar9003_btcoex_bt_stomp(struct ath_hw *ah,
|
|||
void ath9k_hw_btcoex_bt_stomp(struct ath_hw *ah,
|
||||
enum ath_stomp_type stomp_type)
|
||||
{
|
||||
if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE)
|
||||
return;
|
||||
|
||||
if (AR_SREV_9300_20_OR_LATER(ah)) {
|
||||
ar9003_btcoex_bt_stomp(ah, stomp_type);
|
||||
return;
|
||||
|
@ -313,8 +334,7 @@ void ath9k_hw_btcoex_bt_stomp(struct ath_hw *ah,
|
|||
AR_STOMP_NONE_WLAN_WGHT);
|
||||
break;
|
||||
default:
|
||||
ath_dbg(ath9k_hw_common(ah), ATH_DBG_BTCOEX,
|
||||
"Invalid Stomptype\n");
|
||||
ath_dbg(ath9k_hw_common(ah), BTCOEX, "Invalid Stomptype\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
|
@ -116,7 +116,7 @@ static void ath9k_hw_update_nfcal_hist_buffer(struct ath_hw *ah,
|
|||
if (h[i].privNF > limit->max) {
|
||||
high_nf_mid = true;
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"NFmid[%d] (%d) > MAX (%d), %s\n",
|
||||
i, h[i].privNF, limit->max,
|
||||
(cal->nfcal_interference ?
|
||||
|
@ -199,8 +199,7 @@ bool ath9k_hw_reset_calvalid(struct ath_hw *ah)
|
|||
return true;
|
||||
|
||||
if (currCal->calState != CAL_DONE) {
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Calibration state incorrect, %d\n",
|
||||
ath_dbg(common, CALIBRATE, "Calibration state incorrect, %d\n",
|
||||
currCal->calState);
|
||||
return true;
|
||||
}
|
||||
|
@ -208,8 +207,7 @@ bool ath9k_hw_reset_calvalid(struct ath_hw *ah)
|
|||
if (!(ah->supp_cals & currCal->calData->calType))
|
||||
return true;
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Resetting Cal %d state for channel %u\n",
|
||||
ath_dbg(common, CALIBRATE, "Resetting Cal %d state for channel %u\n",
|
||||
currCal->calData->calType, conf->channel->center_freq);
|
||||
|
||||
ah->caldata->CalValid &= ~currCal->calData->calType;
|
||||
|
@ -302,7 +300,7 @@ void ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan)
|
|||
* noisefloor until the next calibration timer.
|
||||
*/
|
||||
if (j == 10000) {
|
||||
ath_dbg(common, ATH_DBG_ANY,
|
||||
ath_dbg(common, ANY,
|
||||
"Timeout while waiting for nf to load: AR_PHY_AGC_CONTROL=0x%x\n",
|
||||
REG_READ(ah, AR_PHY_AGC_CONTROL));
|
||||
return;
|
||||
|
@ -344,17 +342,17 @@ static void ath9k_hw_nf_sanitize(struct ath_hw *ah, s16 *nf)
|
|||
if (!nf[i])
|
||||
continue;
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"NF calibrated [%s] [chain %d] is %d\n",
|
||||
(i >= 3 ? "ext" : "ctl"), i % 3, nf[i]);
|
||||
|
||||
if (nf[i] > ATH9K_NF_TOO_HIGH) {
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"NF[%d] (%d) > MAX (%d), correcting to MAX\n",
|
||||
i, nf[i], ATH9K_NF_TOO_HIGH);
|
||||
nf[i] = limit->max;
|
||||
} else if (nf[i] < limit->min) {
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"NF[%d] (%d) < MIN (%d), correcting to NOM\n",
|
||||
i, nf[i], limit->min);
|
||||
nf[i] = limit->nominal;
|
||||
|
@ -373,7 +371,7 @@ bool ath9k_hw_getnf(struct ath_hw *ah, struct ath9k_channel *chan)
|
|||
|
||||
chan->channelFlags &= (~CHANNEL_CW_INT);
|
||||
if (REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF) {
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"NF did not complete in calibration window\n");
|
||||
return false;
|
||||
}
|
||||
|
@ -383,7 +381,7 @@ bool ath9k_hw_getnf(struct ath_hw *ah, struct ath9k_channel *chan)
|
|||
nf = nfarray[0];
|
||||
if (ath9k_hw_get_nf_thresh(ah, c->band, &nfThresh)
|
||||
&& nf > nfThresh) {
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"noise floor failed detected; detected %d, threshold %d\n",
|
||||
nf, nfThresh);
|
||||
chan->channelFlags |= CHANNEL_CW_INT;
|
||||
|
|
|
@ -66,7 +66,7 @@ ath9k_postprocess_radar_event(struct ath_softc *sc,
|
|||
u8 rssi;
|
||||
u16 dur;
|
||||
|
||||
ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_DFS,
|
||||
ath_dbg(ath9k_hw_common(sc->sc_ah), DFS,
|
||||
"pulse_bw_info=0x%x, pri,ext len/rssi=(%u/%u, %u/%u)\n",
|
||||
are->pulse_bw_info,
|
||||
are->pulse_length_pri, are->rssi,
|
||||
|
@ -161,7 +161,7 @@ void ath9k_dfs_process_phyerr(struct ath_softc *sc, void *data,
|
|||
|
||||
if ((!(rs->rs_phyerr != ATH9K_PHYERR_RADAR)) &&
|
||||
(!(rs->rs_phyerr != ATH9K_PHYERR_FALSE_RADAR_EXT))) {
|
||||
ath_dbg(common, ATH_DBG_DFS,
|
||||
ath_dbg(common, DFS,
|
||||
"Error: rs_phyer=0x%x not a radar error\n",
|
||||
rs->rs_phyerr);
|
||||
return;
|
||||
|
@ -190,7 +190,7 @@ void ath9k_dfs_process_phyerr(struct ath_softc *sc, void *data,
|
|||
ard.pulse_length_ext = vdata_end[-2];
|
||||
ard.pulse_length_pri = vdata_end[-3];
|
||||
|
||||
ath_dbg(common, ATH_DBG_DFS,
|
||||
ath_dbg(common, DFS,
|
||||
"bw_info=%d, length_pri=%d, length_ext=%d, "
|
||||
"rssi_pri=%d, rssi_ext=%d\n",
|
||||
ard.pulse_bw_info, ard.pulse_length_pri, ard.pulse_length_ext,
|
||||
|
@ -200,7 +200,7 @@ void ath9k_dfs_process_phyerr(struct ath_softc *sc, void *data,
|
|||
drp.ts = mactime;
|
||||
if (ath9k_postprocess_radar_event(sc, &ard, &drp)) {
|
||||
static u64 last_ts;
|
||||
ath_dbg(common, ATH_DBG_DFS,
|
||||
ath_dbg(common, DFS,
|
||||
"ath9k_dfs_process_phyerr: channel=%d, ts=%llu, "
|
||||
"width=%d, rssi=%d, delta_ts=%llu\n",
|
||||
drp.freq, drp.ts, drp.width, drp.rssi, drp.ts-last_ts);
|
||||
|
|
|
@ -16,8 +16,8 @@
|
|||
*/
|
||||
|
||||
|
||||
#ifndef DFS_DEBUG_H
|
||||
#define DFS_DEBUG_H
|
||||
#ifndef ATH9K_DFS_DEBUG_H
|
||||
#define ATH9K_DFS_DEBUG_H
|
||||
|
||||
#include "hw.h"
|
||||
|
||||
|
@ -54,4 +54,4 @@ static inline void ath9k_dfs_init_debug(struct ath_softc *sc) { }
|
|||
|
||||
#endif /* CONFIG_ATH9K_DFS_DEBUGFS */
|
||||
|
||||
#endif /* DFS_DEBUG_H */
|
||||
#endif /* ATH9K_DFS_DEBUG_H */
|
||||
|
|
|
@ -305,8 +305,7 @@ void ath9k_hw_update_regulatory_maxpower(struct ath_hw *ah)
|
|||
regulatory->max_power_level += INCREASE_MAXPOW_BY_THREE_CHAIN;
|
||||
break;
|
||||
default:
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
"Invalid chainmask configuration\n");
|
||||
ath_dbg(common, EEPROM, "Invalid chainmask configuration\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
|
@ -38,7 +38,7 @@ static bool __ath9k_hw_4k_fill_eeprom(struct ath_hw *ah)
|
|||
|
||||
for (addr = 0; addr < SIZE_EEPROM_4K; addr++) {
|
||||
if (!ath9k_hw_nvram_read(common, addr + eep_start_loc, eep_data)) {
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
ath_dbg(common, EEPROM,
|
||||
"Unable to read eeprom region\n");
|
||||
return false;
|
||||
}
|
||||
|
@ -62,8 +62,7 @@ static bool ath9k_hw_4k_fill_eeprom(struct ath_hw *ah)
|
|||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
|
||||
if (!ath9k_hw_use_flash(ah)) {
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
"Reading from EEPROM, not flash\n");
|
||||
ath_dbg(common, EEPROM, "Reading from EEPROM, not flash\n");
|
||||
}
|
||||
|
||||
if (common->bus_ops->ath_bus_type == ATH_USB)
|
||||
|
@ -204,8 +203,7 @@ static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah)
|
|||
return false;
|
||||
}
|
||||
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
"Read Magic = 0x%04X\n", magic);
|
||||
ath_dbg(common, EEPROM, "Read Magic = 0x%04X\n", magic);
|
||||
|
||||
if (magic != AR5416_EEPROM_MAGIC) {
|
||||
magic2 = swab16(magic);
|
||||
|
@ -227,7 +225,7 @@ static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah)
|
|||
}
|
||||
}
|
||||
|
||||
ath_dbg(common, ATH_DBG_EEPROM, "need_swap = %s.\n",
|
||||
ath_dbg(common, EEPROM, "need_swap = %s\n",
|
||||
need_swap ? "True" : "False");
|
||||
|
||||
if (need_swap)
|
||||
|
@ -249,7 +247,7 @@ static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah)
|
|||
u32 integer;
|
||||
u16 word;
|
||||
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
ath_dbg(common, EEPROM,
|
||||
"EEPROM Endianness is not native.. Changing\n");
|
||||
|
||||
word = swab16(eep->baseEepHeader.length);
|
||||
|
@ -435,11 +433,11 @@ static void ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah,
|
|||
reg32 = get_unaligned_le32(&pdadcValues[4 * j]);
|
||||
REG_WRITE(ah, regOffset, reg32);
|
||||
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
ath_dbg(common, EEPROM,
|
||||
"PDADC (%d,%4x): %4.4x %8.8x\n",
|
||||
i, regChainOffset, regOffset,
|
||||
reg32);
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
ath_dbg(common, EEPROM,
|
||||
"PDADC: Chain %d | "
|
||||
"PDADC %3d Value %3d | "
|
||||
"PDADC %3d Value %3d | "
|
||||
|
@ -1079,8 +1077,7 @@ static u16 ath9k_hw_4k_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz)
|
|||
|
||||
u16 spur_val = AR_NO_SPUR;
|
||||
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
"Getting spur idx:%d is2Ghz:%d val:%x\n",
|
||||
ath_dbg(common, ANI, "Getting spur idx:%d is2Ghz:%d val:%x\n",
|
||||
i, is2GHz, ah->config.spurchans[i][is2GHz]);
|
||||
|
||||
switch (ah->config.spurmode) {
|
||||
|
@ -1088,8 +1085,8 @@ static u16 ath9k_hw_4k_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz)
|
|||
break;
|
||||
case SPUR_ENABLE_IOCTL:
|
||||
spur_val = ah->config.spurchans[i][is2GHz];
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
"Getting spur val from new loc. %d\n", spur_val);
|
||||
ath_dbg(common, ANI, "Getting spur val from new loc. %d\n",
|
||||
spur_val);
|
||||
break;
|
||||
case SPUR_ENABLE_EEPROM:
|
||||
spur_val = EEP_MAP4K_SPURCHAN;
|
||||
|
|
|
@ -41,7 +41,7 @@ static bool __ath9k_hw_ar9287_fill_eeprom(struct ath_hw *ah)
|
|||
for (addr = 0; addr < SIZE_EEPROM_AR9287; addr++) {
|
||||
if (!ath9k_hw_nvram_read(common, addr + eep_start_loc,
|
||||
eep_data)) {
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
ath_dbg(common, EEPROM,
|
||||
"Unable to read eeprom region\n");
|
||||
return false;
|
||||
}
|
||||
|
@ -66,8 +66,7 @@ static bool ath9k_hw_ar9287_fill_eeprom(struct ath_hw *ah)
|
|||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
|
||||
if (!ath9k_hw_use_flash(ah)) {
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
"Reading from EEPROM, not flash\n");
|
||||
ath_dbg(common, EEPROM, "Reading from EEPROM, not flash\n");
|
||||
}
|
||||
|
||||
if (common->bus_ops->ath_bus_type == ATH_USB)
|
||||
|
@ -197,8 +196,7 @@ static int ath9k_hw_ar9287_check_eeprom(struct ath_hw *ah)
|
|||
return false;
|
||||
}
|
||||
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
"Read Magic = 0x%04X\n", magic);
|
||||
ath_dbg(common, EEPROM, "Read Magic = 0x%04X\n", magic);
|
||||
|
||||
if (magic != AR5416_EEPROM_MAGIC) {
|
||||
magic2 = swab16(magic);
|
||||
|
@ -220,7 +218,7 @@ static int ath9k_hw_ar9287_check_eeprom(struct ath_hw *ah)
|
|||
}
|
||||
}
|
||||
|
||||
ath_dbg(common, ATH_DBG_EEPROM, "need_swap = %s.\n",
|
||||
ath_dbg(common, EEPROM, "need_swap = %s\n",
|
||||
need_swap ? "True" : "False");
|
||||
|
||||
if (need_swap)
|
||||
|
@ -1041,8 +1039,7 @@ static u16 ath9k_hw_ar9287_get_spur_channel(struct ath_hw *ah,
|
|||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
u16 spur_val = AR_NO_SPUR;
|
||||
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
"Getting spur idx:%d is2Ghz:%d val:%x\n",
|
||||
ath_dbg(common, ANI, "Getting spur idx:%d is2Ghz:%d val:%x\n",
|
||||
i, is2GHz, ah->config.spurchans[i][is2GHz]);
|
||||
|
||||
switch (ah->config.spurmode) {
|
||||
|
@ -1050,8 +1047,8 @@ static u16 ath9k_hw_ar9287_get_spur_channel(struct ath_hw *ah,
|
|||
break;
|
||||
case SPUR_ENABLE_IOCTL:
|
||||
spur_val = ah->config.spurchans[i][is2GHz];
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
"Getting spur val from new loc. %d\n", spur_val);
|
||||
ath_dbg(common, ANI, "Getting spur val from new loc. %d\n",
|
||||
spur_val);
|
||||
break;
|
||||
case SPUR_ENABLE_EEPROM:
|
||||
spur_val = EEP_MAP9287_SPURCHAN;
|
||||
|
|
|
@ -121,8 +121,7 @@ static bool ath9k_hw_def_fill_eeprom(struct ath_hw *ah)
|
|||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
|
||||
if (!ath9k_hw_use_flash(ah)) {
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
"Reading from EEPROM, not flash\n");
|
||||
ath_dbg(common, EEPROM, "Reading from EEPROM, not flash\n");
|
||||
}
|
||||
|
||||
if (common->bus_ops->ath_bus_type == ATH_USB)
|
||||
|
@ -279,8 +278,7 @@ static int ath9k_hw_def_check_eeprom(struct ath_hw *ah)
|
|||
}
|
||||
|
||||
if (!ath9k_hw_use_flash(ah)) {
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
"Read Magic = 0x%04X\n", magic);
|
||||
ath_dbg(common, EEPROM, "Read Magic = 0x%04X\n", magic);
|
||||
|
||||
if (magic != AR5416_EEPROM_MAGIC) {
|
||||
magic2 = swab16(magic);
|
||||
|
@ -303,7 +301,7 @@ static int ath9k_hw_def_check_eeprom(struct ath_hw *ah)
|
|||
}
|
||||
}
|
||||
|
||||
ath_dbg(common, ATH_DBG_EEPROM, "need_swap = %s.\n",
|
||||
ath_dbg(common, EEPROM, "need_swap = %s\n",
|
||||
need_swap ? "True" : "False");
|
||||
|
||||
if (need_swap)
|
||||
|
@ -325,7 +323,7 @@ static int ath9k_hw_def_check_eeprom(struct ath_hw *ah)
|
|||
u32 integer, j;
|
||||
u16 word;
|
||||
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
ath_dbg(common, EEPROM,
|
||||
"EEPROM Endianness is not native.. Changing.\n");
|
||||
|
||||
word = swab16(eep->baseEepHeader.length);
|
||||
|
@ -965,15 +963,12 @@ static void ath9k_hw_set_def_power_cal_table(struct ath_hw *ah,
|
|||
reg32 = get_unaligned_le32(&pdadcValues[4 * j]);
|
||||
REG_WRITE(ah, regOffset, reg32);
|
||||
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
ath_dbg(common, EEPROM,
|
||||
"PDADC (%d,%4x): %4.4x %8.8x\n",
|
||||
i, regChainOffset, regOffset,
|
||||
reg32);
|
||||
ath_dbg(common, ATH_DBG_EEPROM,
|
||||
"PDADC: Chain %d | PDADC %3d "
|
||||
"Value %3d | PDADC %3d Value %3d | "
|
||||
"PDADC %3d Value %3d | PDADC %3d "
|
||||
"Value %3d |\n",
|
||||
ath_dbg(common, EEPROM,
|
||||
"PDADC: Chain %d | PDADC %3d Value %3d | PDADC %3d Value %3d | PDADC %3d Value %3d | PDADC %3d Value %3d |\n",
|
||||
i, 4 * j, pdadcValues[4 * j],
|
||||
4 * j + 1, pdadcValues[4 * j + 1],
|
||||
4 * j + 2, pdadcValues[4 * j + 2],
|
||||
|
@ -1278,7 +1273,7 @@ static void ath9k_hw_def_set_txpower(struct ath_hw *ah,
|
|||
regulatory->max_power_level += INCREASE_MAXPOW_BY_THREE_CHAIN;
|
||||
break;
|
||||
default:
|
||||
ath_dbg(ath9k_hw_common(ah), ATH_DBG_EEPROM,
|
||||
ath_dbg(ath9k_hw_common(ah), EEPROM,
|
||||
"Invalid chainmask configuration\n");
|
||||
break;
|
||||
}
|
||||
|
@ -1396,8 +1391,7 @@ static u16 ath9k_hw_def_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz)
|
|||
|
||||
u16 spur_val = AR_NO_SPUR;
|
||||
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
"Getting spur idx:%d is2Ghz:%d val:%x\n",
|
||||
ath_dbg(common, ANI, "Getting spur idx:%d is2Ghz:%d val:%x\n",
|
||||
i, is2GHz, ah->config.spurchans[i][is2GHz]);
|
||||
|
||||
switch (ah->config.spurmode) {
|
||||
|
@ -1405,8 +1399,8 @@ static u16 ath9k_hw_def_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz)
|
|||
break;
|
||||
case SPUR_ENABLE_IOCTL:
|
||||
spur_val = ah->config.spurchans[i][is2GHz];
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
"Getting spur val from new loc. %d\n", spur_val);
|
||||
ath_dbg(common, ANI, "Getting spur val from new loc. %d\n",
|
||||
spur_val);
|
||||
break;
|
||||
case SPUR_ENABLE_EEPROM:
|
||||
spur_val = EEP_DEF_SPURCHAN;
|
||||
|
|
|
@ -130,12 +130,12 @@ static void ath_detect_bt_priority(struct ath_softc *sc)
|
|||
sc->sc_flags &= ~(SC_OP_BT_PRIORITY_DETECTED | SC_OP_BT_SCAN);
|
||||
/* Detect if colocated bt started scanning */
|
||||
if (btcoex->bt_priority_cnt >= ATH_BT_CNT_SCAN_THRESHOLD) {
|
||||
ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_BTCOEX,
|
||||
ath_dbg(ath9k_hw_common(sc->sc_ah), BTCOEX,
|
||||
"BT scan detected\n");
|
||||
sc->sc_flags |= (SC_OP_BT_SCAN |
|
||||
SC_OP_BT_PRIORITY_DETECTED);
|
||||
} else if (btcoex->bt_priority_cnt >= ATH_BT_CNT_THRESHOLD) {
|
||||
ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_BTCOEX,
|
||||
ath_dbg(ath9k_hw_common(sc->sc_ah), BTCOEX,
|
||||
"BT priority traffic detected\n");
|
||||
sc->sc_flags |= SC_OP_BT_PRIORITY_DETECTED;
|
||||
}
|
||||
|
@ -230,8 +230,7 @@ static void ath_btcoex_no_stomp_timer(void *arg)
|
|||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
bool is_btscan = sc->sc_flags & SC_OP_BT_SCAN;
|
||||
|
||||
ath_dbg(common, ATH_DBG_BTCOEX,
|
||||
"no stomp timer running\n");
|
||||
ath_dbg(common, BTCOEX, "no stomp timer running\n");
|
||||
|
||||
ath9k_ps_wakeup(sc);
|
||||
spin_lock_bh(&btcoex->btcoex_lock);
|
||||
|
@ -250,6 +249,9 @@ int ath_init_btcoex_timer(struct ath_softc *sc)
|
|||
{
|
||||
struct ath_btcoex *btcoex = &sc->btcoex;
|
||||
|
||||
if (ath9k_hw_get_btcoex_scheme(sc->sc_ah) == ATH_BTCOEX_CFG_NONE)
|
||||
return 0;
|
||||
|
||||
btcoex->btcoex_period = ATH_BTCOEX_DEF_BT_PERIOD * 1000;
|
||||
btcoex->btcoex_no_stomp = (100 - ATH_BTCOEX_DEF_DUTY_CYCLE) *
|
||||
btcoex->btcoex_period / 100;
|
||||
|
@ -280,8 +282,10 @@ void ath9k_btcoex_timer_resume(struct ath_softc *sc)
|
|||
struct ath_btcoex *btcoex = &sc->btcoex;
|
||||
struct ath_hw *ah = sc->sc_ah;
|
||||
|
||||
ath_dbg(ath9k_hw_common(ah), ATH_DBG_BTCOEX,
|
||||
"Starting btcoex timers\n");
|
||||
ath_dbg(ath9k_hw_common(ah), BTCOEX, "Starting btcoex timers\n");
|
||||
|
||||
if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE)
|
||||
return;
|
||||
|
||||
/* make sure duty cycle timer is also stopped when resuming */
|
||||
if (btcoex->hw_timer_enabled)
|
||||
|
@ -303,6 +307,9 @@ void ath9k_btcoex_timer_pause(struct ath_softc *sc)
|
|||
struct ath_btcoex *btcoex = &sc->btcoex;
|
||||
struct ath_hw *ah = sc->sc_ah;
|
||||
|
||||
if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE)
|
||||
return;
|
||||
|
||||
del_timer_sync(&btcoex->period_timer);
|
||||
|
||||
if (btcoex->hw_timer_enabled)
|
||||
|
|
|
@ -167,9 +167,9 @@ static void ath9k_htc_beacon_config_sta(struct ath9k_htc_priv *priv,
|
|||
/* TSF out of range threshold fixed at 1 second */
|
||||
bs.bs_tsfoor_threshold = ATH9K_TSFOOR_THRESHOLD;
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG, "intval: %u tsf: %llu tsftu: %u\n",
|
||||
ath_dbg(common, CONFIG, "intval: %u tsf: %llu tsftu: %u\n",
|
||||
intval, tsf, tsftu);
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
ath_dbg(common, CONFIG,
|
||||
"bmiss: %u sleep: %u cfp-period: %u maxdur: %u next: %u\n",
|
||||
bs.bs_bmissthreshold, bs.bs_sleepduration,
|
||||
bs.bs_cfpperiod, bs.bs_cfpmaxduration, bs.bs_cfpnext);
|
||||
|
@ -224,9 +224,8 @@ static void ath9k_htc_beacon_config_ap(struct ath9k_htc_priv *priv,
|
|||
if (priv->op_flags & OP_ENABLE_BEACON)
|
||||
imask |= ATH9K_INT_SWBA;
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
"AP Beacon config, intval: %d, nexttbtt: %u, resp_time: %d "
|
||||
"imask: 0x%x\n",
|
||||
ath_dbg(common, CONFIG,
|
||||
"AP Beacon config, intval: %d, nexttbtt: %u, resp_time: %d imask: 0x%x\n",
|
||||
bss_conf->beacon_interval, nexttbtt,
|
||||
priv->ah->config.sw_beacon_response_time, imask);
|
||||
|
||||
|
@ -273,9 +272,8 @@ static void ath9k_htc_beacon_config_adhoc(struct ath9k_htc_priv *priv,
|
|||
if (priv->op_flags & OP_ENABLE_BEACON)
|
||||
imask |= ATH9K_INT_SWBA;
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
"IBSS Beacon config, intval: %d, nexttbtt: %u, "
|
||||
"resp_time: %d, imask: 0x%x\n",
|
||||
ath_dbg(common, CONFIG,
|
||||
"IBSS Beacon config, intval: %d, nexttbtt: %u, resp_time: %d, imask: 0x%x\n",
|
||||
bss_conf->beacon_interval, nexttbtt,
|
||||
priv->ah->config.sw_beacon_response_time, imask);
|
||||
|
||||
|
@ -323,7 +321,7 @@ static void ath9k_htc_send_buffered(struct ath9k_htc_priv *priv,
|
|||
|
||||
tx_slot = ath9k_htc_tx_get_slot(priv);
|
||||
if (tx_slot < 0) {
|
||||
ath_dbg(common, ATH_DBG_XMIT, "No free CAB slot\n");
|
||||
ath_dbg(common, XMIT, "No free CAB slot\n");
|
||||
dev_kfree_skb_any(skb);
|
||||
goto next;
|
||||
}
|
||||
|
@ -333,8 +331,7 @@ static void ath9k_htc_send_buffered(struct ath9k_htc_priv *priv,
|
|||
ath9k_htc_tx_clear_slot(priv, tx_slot);
|
||||
dev_kfree_skb_any(skb);
|
||||
|
||||
ath_dbg(common, ATH_DBG_XMIT,
|
||||
"Failed to send CAB frame\n");
|
||||
ath_dbg(common, XMIT, "Failed to send CAB frame\n");
|
||||
} else {
|
||||
spin_lock_bh(&priv->tx.tx_lock);
|
||||
priv->tx.queued_cnt++;
|
||||
|
@ -409,7 +406,7 @@ static void ath9k_htc_send_beacon(struct ath9k_htc_priv *priv,
|
|||
ret = htc_send(priv->htc, beacon);
|
||||
if (ret != 0) {
|
||||
if (ret == -ENOMEM) {
|
||||
ath_dbg(common, ATH_DBG_BSTUCK,
|
||||
ath_dbg(common, BSTUCK,
|
||||
"Failed to send beacon, no free TX buffer\n");
|
||||
}
|
||||
dev_kfree_skb_any(beacon);
|
||||
|
@ -434,7 +431,7 @@ static int ath9k_htc_choose_bslot(struct ath9k_htc_priv *priv,
|
|||
slot = ((tsftu % intval) * ATH9K_HTC_MAX_BCN_VIF) / intval;
|
||||
slot = ATH9K_HTC_MAX_BCN_VIF - slot - 1;
|
||||
|
||||
ath_dbg(common, ATH_DBG_BEACON,
|
||||
ath_dbg(common, BEACON,
|
||||
"Choose slot: %d, tsf: %llu, tsftu: %u, intval: %u\n",
|
||||
slot, tsf, tsftu, intval);
|
||||
|
||||
|
@ -450,8 +447,7 @@ void ath9k_htc_swba(struct ath9k_htc_priv *priv,
|
|||
if (swba->beacon_pending != 0) {
|
||||
priv->cur_beacon_conf.bmiss_cnt++;
|
||||
if (priv->cur_beacon_conf.bmiss_cnt > BSTUCK_THRESHOLD) {
|
||||
ath_dbg(common, ATH_DBG_BSTUCK,
|
||||
"Beacon stuck, HW reset\n");
|
||||
ath_dbg(common, BSTUCK, "Beacon stuck, HW reset\n");
|
||||
ieee80211_queue_work(priv->hw,
|
||||
&priv->fatal_work);
|
||||
}
|
||||
|
@ -459,7 +455,7 @@ void ath9k_htc_swba(struct ath9k_htc_priv *priv,
|
|||
}
|
||||
|
||||
if (priv->cur_beacon_conf.bmiss_cnt) {
|
||||
ath_dbg(common, ATH_DBG_BSTUCK,
|
||||
ath_dbg(common, BSTUCK,
|
||||
"Resuming beacon xmit after %u misses\n",
|
||||
priv->cur_beacon_conf.bmiss_cnt);
|
||||
priv->cur_beacon_conf.bmiss_cnt = 0;
|
||||
|
@ -495,8 +491,8 @@ void ath9k_htc_assign_bslot(struct ath9k_htc_priv *priv,
|
|||
priv->cur_beacon_conf.bslot[avp->bslot] = vif;
|
||||
spin_unlock_bh(&priv->beacon_lock);
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
"Added interface at beacon slot: %d\n", avp->bslot);
|
||||
ath_dbg(common, CONFIG, "Added interface at beacon slot: %d\n",
|
||||
avp->bslot);
|
||||
}
|
||||
|
||||
void ath9k_htc_remove_bslot(struct ath9k_htc_priv *priv,
|
||||
|
@ -509,8 +505,8 @@ void ath9k_htc_remove_bslot(struct ath9k_htc_priv *priv,
|
|||
priv->cur_beacon_conf.bslot[avp->bslot] = NULL;
|
||||
spin_unlock_bh(&priv->beacon_lock);
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
"Removed interface at beacon slot: %d\n", avp->bslot);
|
||||
ath_dbg(common, CONFIG, "Removed interface at beacon slot: %d\n",
|
||||
avp->bslot);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -536,8 +532,7 @@ void ath9k_htc_set_tsfadjust(struct ath9k_htc_priv *priv,
|
|||
tsfadjust = cur_conf->beacon_interval * avp->bslot / ATH9K_HTC_MAX_BCN_VIF;
|
||||
avp->tsfadjust = cpu_to_le64(TU_TO_USEC(tsfadjust));
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
"tsfadjust is: %llu for bslot: %d\n",
|
||||
ath_dbg(common, CONFIG, "tsfadjust is: %llu for bslot: %d\n",
|
||||
(unsigned long long)tsfadjust, avp->bslot);
|
||||
}
|
||||
|
||||
|
@ -568,7 +563,7 @@ static bool ath9k_htc_check_beacon_config(struct ath9k_htc_priv *priv,
|
|||
(priv->num_ap_vif > 1) &&
|
||||
(vif->type == NL80211_IFTYPE_AP) &&
|
||||
(cur_conf->beacon_interval != bss_conf->beacon_int)) {
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
ath_dbg(common, CONFIG,
|
||||
"Changing beacon interval of multiple AP interfaces !\n");
|
||||
return false;
|
||||
}
|
||||
|
@ -579,7 +574,7 @@ static bool ath9k_htc_check_beacon_config(struct ath9k_htc_priv *priv,
|
|||
*/
|
||||
if (priv->num_ap_vif &&
|
||||
(vif->type != NL80211_IFTYPE_AP)) {
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
ath_dbg(common, CONFIG,
|
||||
"HW in AP mode, cannot set STA beacon parameters\n");
|
||||
return false;
|
||||
}
|
||||
|
@ -597,7 +592,7 @@ static bool ath9k_htc_check_beacon_config(struct ath9k_htc_priv *priv,
|
|||
&beacon_configured);
|
||||
|
||||
if (beacon_configured) {
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
ath_dbg(common, CONFIG,
|
||||
"Beacon already configured for a station interface\n");
|
||||
return false;
|
||||
}
|
||||
|
@ -637,8 +632,7 @@ void ath9k_htc_beacon_config(struct ath9k_htc_priv *priv,
|
|||
ath9k_htc_beacon_config_ap(priv, cur_conf);
|
||||
break;
|
||||
default:
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
"Unsupported beaconing mode\n");
|
||||
ath_dbg(common, CONFIG, "Unsupported beaconing mode\n");
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
@ -659,8 +653,7 @@ void ath9k_htc_beacon_reconfig(struct ath9k_htc_priv *priv)
|
|||
ath9k_htc_beacon_config_ap(priv, cur_conf);
|
||||
break;
|
||||
default:
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
"Unsupported beaconing mode\n");
|
||||
ath_dbg(common, CONFIG, "Unsupported beaconing mode\n");
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
|
|
@ -36,12 +36,12 @@ static void ath_detect_bt_priority(struct ath9k_htc_priv *priv)
|
|||
priv->op_flags &= ~(OP_BT_PRIORITY_DETECTED | OP_BT_SCAN);
|
||||
/* Detect if colocated bt started scanning */
|
||||
if (btcoex->bt_priority_cnt >= ATH_BT_CNT_SCAN_THRESHOLD) {
|
||||
ath_dbg(ath9k_hw_common(ah), ATH_DBG_BTCOEX,
|
||||
ath_dbg(ath9k_hw_common(ah), BTCOEX,
|
||||
"BT scan detected\n");
|
||||
priv->op_flags |= (OP_BT_SCAN |
|
||||
OP_BT_PRIORITY_DETECTED);
|
||||
} else if (btcoex->bt_priority_cnt >= ATH_BT_CNT_THRESHOLD) {
|
||||
ath_dbg(ath9k_hw_common(ah), ATH_DBG_BTCOEX,
|
||||
ath_dbg(ath9k_hw_common(ah), BTCOEX,
|
||||
"BT priority traffic detected\n");
|
||||
priv->op_flags |= OP_BT_PRIORITY_DETECTED;
|
||||
}
|
||||
|
@ -102,8 +102,7 @@ static void ath_btcoex_duty_cycle_work(struct work_struct *work)
|
|||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
bool is_btscan = priv->op_flags & OP_BT_SCAN;
|
||||
|
||||
ath_dbg(common, ATH_DBG_BTCOEX,
|
||||
"time slice work for bt and wlan\n");
|
||||
ath_dbg(common, BTCOEX, "time slice work for bt and wlan\n");
|
||||
|
||||
if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_LOW || is_btscan)
|
||||
ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE);
|
||||
|
@ -116,6 +115,9 @@ void ath_htc_init_btcoex_work(struct ath9k_htc_priv *priv)
|
|||
{
|
||||
struct ath_btcoex *btcoex = &priv->btcoex;
|
||||
|
||||
if (ath9k_hw_get_btcoex_scheme(priv->ah) == ATH_BTCOEX_CFG_NONE)
|
||||
return;
|
||||
|
||||
btcoex->btcoex_period = ATH_BTCOEX_DEF_BT_PERIOD;
|
||||
btcoex->btcoex_no_stomp = (100 - ATH_BTCOEX_DEF_DUTY_CYCLE) *
|
||||
btcoex->btcoex_period / 100;
|
||||
|
@ -134,7 +136,10 @@ void ath_htc_resume_btcoex_work(struct ath9k_htc_priv *priv)
|
|||
struct ath_btcoex *btcoex = &priv->btcoex;
|
||||
struct ath_hw *ah = priv->ah;
|
||||
|
||||
ath_dbg(ath9k_hw_common(ah), ATH_DBG_BTCOEX, "Starting btcoex work\n");
|
||||
if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE)
|
||||
return;
|
||||
|
||||
ath_dbg(ath9k_hw_common(ah), BTCOEX, "Starting btcoex work\n");
|
||||
|
||||
btcoex->bt_priority_cnt = 0;
|
||||
btcoex->bt_priority_time = jiffies;
|
||||
|
@ -148,6 +153,9 @@ void ath_htc_resume_btcoex_work(struct ath9k_htc_priv *priv)
|
|||
*/
|
||||
void ath_htc_cancel_btcoex_work(struct ath9k_htc_priv *priv)
|
||||
{
|
||||
if (ath9k_hw_get_btcoex_scheme(priv->ah) == ATH_BTCOEX_CFG_NONE)
|
||||
return;
|
||||
|
||||
cancel_delayed_work_sync(&priv->coex_period_work);
|
||||
cancel_delayed_work_sync(&priv->duty_cycle_work);
|
||||
}
|
||||
|
|
|
@ -299,8 +299,7 @@ static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset)
|
|||
(u8 *) &val, sizeof(val),
|
||||
100);
|
||||
if (unlikely(r)) {
|
||||
ath_dbg(common, ATH_DBG_WMI,
|
||||
"REGISTER READ FAILED: (0x%04x, %d)\n",
|
||||
ath_dbg(common, WMI, "REGISTER READ FAILED: (0x%04x, %d)\n",
|
||||
reg_offset, r);
|
||||
return -EIO;
|
||||
}
|
||||
|
@ -327,7 +326,7 @@ static void ath9k_multi_regread(void *hw_priv, u32 *addr,
|
|||
(u8 *)tmpval, sizeof(u32) * count,
|
||||
100);
|
||||
if (unlikely(ret)) {
|
||||
ath_dbg(common, ATH_DBG_WMI,
|
||||
ath_dbg(common, WMI,
|
||||
"Multiple REGISTER READ FAILED (count: %d)\n", count);
|
||||
}
|
||||
|
||||
|
@ -352,8 +351,7 @@ static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
|
|||
(u8 *) &val, sizeof(val),
|
||||
100);
|
||||
if (unlikely(r)) {
|
||||
ath_dbg(common, ATH_DBG_WMI,
|
||||
"REGISTER WRITE FAILED:(0x%04x, %d)\n",
|
||||
ath_dbg(common, WMI, "REGISTER WRITE FAILED:(0x%04x, %d)\n",
|
||||
reg_offset, r);
|
||||
}
|
||||
}
|
||||
|
@ -384,7 +382,7 @@ static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset)
|
|||
(u8 *) &rsp_status, sizeof(rsp_status),
|
||||
100);
|
||||
if (unlikely(r)) {
|
||||
ath_dbg(common, ATH_DBG_WMI,
|
||||
ath_dbg(common, WMI,
|
||||
"REGISTER WRITE FAILED, multi len: %d\n",
|
||||
priv->wmi->multi_write_idx);
|
||||
}
|
||||
|
@ -434,7 +432,7 @@ static void ath9k_regwrite_flush(void *hw_priv)
|
|||
(u8 *) &rsp_status, sizeof(rsp_status),
|
||||
100);
|
||||
if (unlikely(r)) {
|
||||
ath_dbg(common, ATH_DBG_WMI,
|
||||
ath_dbg(common, WMI,
|
||||
"REGISTER WRITE FAILED, multi len: %d\n",
|
||||
priv->wmi->multi_write_idx);
|
||||
}
|
||||
|
@ -512,8 +510,7 @@ static void setup_ht_cap(struct ath9k_htc_priv *priv,
|
|||
tx_streams = ath9k_cmn_count_streams(priv->ah->txchainmask, 2);
|
||||
rx_streams = ath9k_cmn_count_streams(priv->ah->rxchainmask, 2);
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
"TX streams %d, RX streams: %d\n",
|
||||
ath_dbg(common, CONFIG, "TX streams %d, RX streams: %d\n",
|
||||
tx_streams, rx_streams);
|
||||
|
||||
if (tx_streams != rx_streams) {
|
||||
|
@ -610,7 +607,7 @@ static void ath9k_init_btcoex(struct ath9k_htc_priv *priv)
|
|||
{
|
||||
int qnum;
|
||||
|
||||
switch (priv->ah->btcoex_hw.scheme) {
|
||||
switch (ath9k_hw_get_btcoex_scheme(priv->ah)) {
|
||||
case ATH_BTCOEX_CFG_NONE:
|
||||
break;
|
||||
case ATH_BTCOEX_CFG_3WIRE:
|
||||
|
@ -704,6 +701,7 @@ static int ath9k_init_priv(struct ath9k_htc_priv *priv,
|
|||
|
||||
if (product && strncmp(product, ATH_HTC_BTCOEX_PRODUCT_ID, 5) == 0) {
|
||||
ah->btcoex_hw.scheme = ATH_BTCOEX_CFG_3WIRE;
|
||||
if (ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE)
|
||||
ath9k_init_btcoex(priv);
|
||||
}
|
||||
|
||||
|
@ -876,9 +874,8 @@ static int ath9k_init_device(struct ath9k_htc_priv *priv,
|
|||
goto err_world;
|
||||
}
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
"WMI:%d, BCN:%d, CAB:%d, UAPSD:%d, MGMT:%d, "
|
||||
"BE:%d, BK:%d, VI:%d, VO:%d\n",
|
||||
ath_dbg(common, CONFIG,
|
||||
"WMI:%d, BCN:%d, CAB:%d, UAPSD:%d, MGMT:%d, BE:%d, BK:%d, VI:%d, VO:%d\n",
|
||||
priv->wmi_cmd_ep,
|
||||
priv->beacon_ep,
|
||||
priv->cab_ep,
|
||||
|
|
|
@ -266,7 +266,7 @@ static int ath9k_htc_set_channel(struct ath9k_htc_priv *priv,
|
|||
|
||||
ath9k_wmi_event_drain(priv);
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
ath_dbg(common, CONFIG,
|
||||
"(%u MHz) -> (%u MHz), HT: %d, HT40: %d fastcc: %d\n",
|
||||
priv->ah->curchan->channel,
|
||||
channel->center_freq, conf_is_ht(conf), conf_is_ht40(conf),
|
||||
|
@ -415,7 +415,7 @@ static int ath9k_htc_add_monitor_interface(struct ath9k_htc_priv *priv)
|
|||
priv->vif_sta_pos[priv->mon_vif_idx] = sta_idx;
|
||||
priv->ah->is_monitoring = true;
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
ath_dbg(common, CONFIG,
|
||||
"Attached a monitor interface at idx: %d, sta idx: %d\n",
|
||||
priv->mon_vif_idx, sta_idx);
|
||||
|
||||
|
@ -427,7 +427,7 @@ err_sta:
|
|||
*/
|
||||
__ath9k_htc_remove_monitor_interface(priv);
|
||||
err_vif:
|
||||
ath_dbg(common, ATH_DBG_FATAL, "Unable to attach a monitor interface\n");
|
||||
ath_dbg(common, FATAL, "Unable to attach a monitor interface\n");
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
@ -452,7 +452,7 @@ static int ath9k_htc_remove_monitor_interface(struct ath9k_htc_priv *priv)
|
|||
priv->nstations--;
|
||||
priv->ah->is_monitoring = false;
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
ath_dbg(common, CONFIG,
|
||||
"Removed a monitor interface at idx: %d, sta idx: %d\n",
|
||||
priv->mon_vif_idx, sta_idx);
|
||||
|
||||
|
@ -512,11 +512,11 @@ static int ath9k_htc_add_station(struct ath9k_htc_priv *priv,
|
|||
}
|
||||
|
||||
if (sta) {
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
ath_dbg(common, CONFIG,
|
||||
"Added a station entry for: %pM (idx: %d)\n",
|
||||
sta->addr, tsta.sta_index);
|
||||
} else {
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
ath_dbg(common, CONFIG,
|
||||
"Added a station entry for VIF %d (idx: %d)\n",
|
||||
avp->index, tsta.sta_index);
|
||||
}
|
||||
|
@ -556,11 +556,11 @@ static int ath9k_htc_remove_station(struct ath9k_htc_priv *priv,
|
|||
}
|
||||
|
||||
if (sta) {
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
ath_dbg(common, CONFIG,
|
||||
"Removed a station entry for: %pM (idx: %d)\n",
|
||||
sta->addr, sta_idx);
|
||||
} else {
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
ath_dbg(common, CONFIG,
|
||||
"Removed a station entry for VIF %d (idx: %d)\n",
|
||||
avp->index, sta_idx);
|
||||
}
|
||||
|
@ -665,7 +665,7 @@ static void ath9k_htc_init_rate(struct ath9k_htc_priv *priv,
|
|||
ath9k_htc_setup_rate(priv, sta, &trate);
|
||||
ret = ath9k_htc_send_rate_cmd(priv, &trate);
|
||||
if (!ret)
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
ath_dbg(common, CONFIG,
|
||||
"Updated target sta: %pM, rate caps: 0x%X\n",
|
||||
sta->addr, be32_to_cpu(trate.capflags));
|
||||
}
|
||||
|
@ -692,7 +692,7 @@ static void ath9k_htc_update_rate(struct ath9k_htc_priv *priv,
|
|||
|
||||
ret = ath9k_htc_send_rate_cmd(priv, &trate);
|
||||
if (!ret)
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
ath_dbg(common, CONFIG,
|
||||
"Updated target sta: %pM, rate caps: 0x%X\n",
|
||||
bss_conf->bssid, be32_to_cpu(trate.capflags));
|
||||
}
|
||||
|
@ -721,11 +721,11 @@ static int ath9k_htc_tx_aggr_oper(struct ath9k_htc_priv *priv,
|
|||
|
||||
WMI_CMD_BUF(WMI_TX_AGGR_ENABLE_CMDID, &aggr);
|
||||
if (ret)
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
ath_dbg(common, CONFIG,
|
||||
"Unable to %s TX aggregation for (%pM, %d)\n",
|
||||
(aggr.aggr_enable) ? "start" : "stop", sta->addr, tid);
|
||||
else
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
ath_dbg(common, CONFIG,
|
||||
"%s TX aggregation for (%pM, %d)\n",
|
||||
(aggr.aggr_enable) ? "Starting" : "Stopping",
|
||||
sta->addr, tid);
|
||||
|
@ -784,7 +784,7 @@ void ath9k_htc_ani_work(struct work_struct *work)
|
|||
/* Long calibration runs independently of short calibration. */
|
||||
if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
|
||||
longcal = true;
|
||||
ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
|
||||
ath_dbg(common, ANI, "longcal @%lu\n", jiffies);
|
||||
common->ani.longcal_timer = timestamp;
|
||||
}
|
||||
|
||||
|
@ -793,8 +793,7 @@ void ath9k_htc_ani_work(struct work_struct *work)
|
|||
if ((timestamp - common->ani.shortcal_timer) >=
|
||||
short_cal_interval) {
|
||||
shortcal = true;
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
"shortcal @%lu\n", jiffies);
|
||||
ath_dbg(common, ANI, "shortcal @%lu\n", jiffies);
|
||||
common->ani.shortcal_timer = timestamp;
|
||||
common->ani.resetcal_timer = timestamp;
|
||||
}
|
||||
|
@ -866,7 +865,7 @@ static void ath9k_htc_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
|
|||
padsize = padpos & 3;
|
||||
if (padsize && skb->len > padpos) {
|
||||
if (skb_headroom(skb) < padsize) {
|
||||
ath_dbg(common, ATH_DBG_XMIT, "No room for padding\n");
|
||||
ath_dbg(common, XMIT, "No room for padding\n");
|
||||
goto fail_tx;
|
||||
}
|
||||
skb_push(skb, padsize);
|
||||
|
@ -875,13 +874,13 @@ static void ath9k_htc_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
|
|||
|
||||
slot = ath9k_htc_tx_get_slot(priv);
|
||||
if (slot < 0) {
|
||||
ath_dbg(common, ATH_DBG_XMIT, "No free TX slot\n");
|
||||
ath_dbg(common, XMIT, "No free TX slot\n");
|
||||
goto fail_tx;
|
||||
}
|
||||
|
||||
ret = ath9k_htc_tx_start(priv, skb, slot, false);
|
||||
if (ret != 0) {
|
||||
ath_dbg(common, ATH_DBG_XMIT, "Tx failed\n");
|
||||
ath_dbg(common, XMIT, "Tx failed\n");
|
||||
goto clear_slot;
|
||||
}
|
||||
|
||||
|
@ -909,7 +908,7 @@ static int ath9k_htc_start(struct ieee80211_hw *hw)
|
|||
|
||||
mutex_lock(&priv->mutex);
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
ath_dbg(common, CONFIG,
|
||||
"Starting driver with initial channel: %d MHz\n",
|
||||
curchan->center_freq);
|
||||
|
||||
|
@ -943,7 +942,7 @@ static int ath9k_htc_start(struct ieee80211_hw *hw)
|
|||
|
||||
ret = ath9k_htc_update_cap_target(priv, 0);
|
||||
if (ret)
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
ath_dbg(common, CONFIG,
|
||||
"Failed to update capability in target\n");
|
||||
|
||||
priv->op_flags &= ~OP_INVALID;
|
||||
|
@ -958,7 +957,7 @@ static int ath9k_htc_start(struct ieee80211_hw *hw)
|
|||
mod_timer(&priv->tx.cleanup_timer,
|
||||
jiffies + msecs_to_jiffies(ATH9K_HTC_TX_CLEANUP_INTERVAL));
|
||||
|
||||
if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE) {
|
||||
if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE) {
|
||||
ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
|
||||
AR_STOMP_LOW_WLAN_WGHT);
|
||||
ath9k_hw_btcoex_enable(ah);
|
||||
|
@ -980,7 +979,7 @@ static void ath9k_htc_stop(struct ieee80211_hw *hw)
|
|||
mutex_lock(&priv->mutex);
|
||||
|
||||
if (priv->op_flags & OP_INVALID) {
|
||||
ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
|
||||
ath_dbg(common, ANY, "Device not present\n");
|
||||
mutex_unlock(&priv->mutex);
|
||||
return;
|
||||
}
|
||||
|
@ -1010,7 +1009,8 @@ static void ath9k_htc_stop(struct ieee80211_hw *hw)
|
|||
|
||||
mutex_lock(&priv->mutex);
|
||||
|
||||
if (ah->btcoex_hw.enabled) {
|
||||
if (ah->btcoex_hw.enabled &&
|
||||
ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) {
|
||||
ath9k_hw_btcoex_disable(ah);
|
||||
if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
|
||||
ath_htc_cancel_btcoex_work(priv);
|
||||
|
@ -1027,7 +1027,7 @@ static void ath9k_htc_stop(struct ieee80211_hw *hw)
|
|||
|
||||
priv->op_flags |= OP_INVALID;
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
|
||||
ath_dbg(common, CONFIG, "Driver halt\n");
|
||||
mutex_unlock(&priv->mutex);
|
||||
}
|
||||
|
||||
|
@ -1120,8 +1120,8 @@ static int ath9k_htc_add_interface(struct ieee80211_hw *hw,
|
|||
ath9k_htc_start_ani(priv);
|
||||
}
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
"Attach a VIF of type: %d at idx: %d\n", vif->type, avp->index);
|
||||
ath_dbg(common, CONFIG, "Attach a VIF of type: %d at idx: %d\n",
|
||||
vif->type, avp->index);
|
||||
|
||||
out:
|
||||
ath9k_htc_ps_restore(priv);
|
||||
|
@ -1177,7 +1177,7 @@ static void ath9k_htc_remove_interface(struct ieee80211_hw *hw,
|
|||
ath9k_htc_stop_ani(priv);
|
||||
}
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface at idx: %d\n", avp->index);
|
||||
ath_dbg(common, CONFIG, "Detach Interface at idx: %d\n", avp->index);
|
||||
|
||||
ath9k_htc_ps_restore(priv);
|
||||
mutex_unlock(&priv->mutex);
|
||||
|
@ -1202,8 +1202,7 @@ static int ath9k_htc_config(struct ieee80211_hw *hw, u32 changed)
|
|||
mutex_unlock(&priv->htc_pm_lock);
|
||||
|
||||
if (enable_radio) {
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
"not-idle: enabling radio\n");
|
||||
ath_dbg(common, CONFIG, "not-idle: enabling radio\n");
|
||||
ath9k_htc_setpower(priv, ATH9K_PM_AWAKE);
|
||||
ath9k_htc_radio_enable(hw);
|
||||
}
|
||||
|
@ -1225,7 +1224,7 @@ static int ath9k_htc_config(struct ieee80211_hw *hw, u32 changed)
|
|||
struct ieee80211_channel *curchan = hw->conf.channel;
|
||||
int pos = curchan->hw_value;
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
|
||||
ath_dbg(common, CONFIG, "Set channel: %d MHz\n",
|
||||
curchan->center_freq);
|
||||
|
||||
ath9k_cmn_update_ichannel(&priv->ah->channels[pos],
|
||||
|
@ -1265,8 +1264,7 @@ static int ath9k_htc_config(struct ieee80211_hw *hw, u32 changed)
|
|||
}
|
||||
mutex_unlock(&priv->htc_pm_lock);
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
"idle: disabling radio\n");
|
||||
ath_dbg(common, CONFIG, "idle: disabling radio\n");
|
||||
ath9k_htc_radio_disable(hw);
|
||||
}
|
||||
|
||||
|
@ -1298,7 +1296,7 @@ static void ath9k_htc_configure_filter(struct ieee80211_hw *hw,
|
|||
*total_flags &= SUPPORTED_FILTERS;
|
||||
|
||||
if (priv->op_flags & OP_INVALID) {
|
||||
ath_dbg(ath9k_hw_common(priv->ah), ATH_DBG_ANY,
|
||||
ath_dbg(ath9k_hw_common(priv->ah), ANY,
|
||||
"Unable to configure filter on invalid state\n");
|
||||
mutex_unlock(&priv->mutex);
|
||||
return;
|
||||
|
@ -1309,8 +1307,8 @@ static void ath9k_htc_configure_filter(struct ieee80211_hw *hw,
|
|||
rfilt = ath9k_htc_calcrxfilter(priv);
|
||||
ath9k_hw_setrxfilter(priv->ah, rfilt);
|
||||
|
||||
ath_dbg(ath9k_hw_common(priv->ah), ATH_DBG_CONFIG,
|
||||
"Set HW RX filter: 0x%x\n", rfilt);
|
||||
ath_dbg(ath9k_hw_common(priv->ah), CONFIG, "Set HW RX filter: 0x%x\n",
|
||||
rfilt);
|
||||
|
||||
ath9k_htc_ps_restore(priv);
|
||||
mutex_unlock(&priv->mutex);
|
||||
|
@ -1377,7 +1375,7 @@ static int ath9k_htc_conf_tx(struct ieee80211_hw *hw,
|
|||
|
||||
qnum = get_hw_qnum(queue, priv->hwq_map);
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
ath_dbg(common, CONFIG,
|
||||
"Configure tx [queue/hwq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
|
||||
queue, qnum, params->aifs, params->cw_min,
|
||||
params->cw_max, params->txop);
|
||||
|
@ -1412,7 +1410,7 @@ static int ath9k_htc_set_key(struct ieee80211_hw *hw,
|
|||
return -ENOSPC;
|
||||
|
||||
mutex_lock(&priv->mutex);
|
||||
ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
|
||||
ath_dbg(common, CONFIG, "Set HW Key\n");
|
||||
ath9k_htc_ps_wakeup(priv);
|
||||
|
||||
switch (cmd) {
|
||||
|
@ -1448,8 +1446,7 @@ static void ath9k_htc_set_bssid(struct ath9k_htc_priv *priv)
|
|||
struct ath_common *common = ath9k_hw_common(priv->ah);
|
||||
|
||||
ath9k_hw_write_associd(priv->ah);
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
"BSSID: %pM aid: 0x%x\n",
|
||||
ath_dbg(common, CONFIG, "BSSID: %pM aid: 0x%x\n",
|
||||
common->curbssid, common->curaid);
|
||||
}
|
||||
|
||||
|
@ -1487,7 +1484,7 @@ static void ath9k_htc_bss_info_changed(struct ieee80211_hw *hw,
|
|||
ath9k_htc_ps_wakeup(priv);
|
||||
|
||||
if (changed & BSS_CHANGED_ASSOC) {
|
||||
ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
|
||||
ath_dbg(common, CONFIG, "BSS Changed ASSOC %d\n",
|
||||
bss_conf->assoc);
|
||||
|
||||
bss_conf->assoc ?
|
||||
|
@ -1512,8 +1509,8 @@ static void ath9k_htc_bss_info_changed(struct ieee80211_hw *hw,
|
|||
}
|
||||
|
||||
if ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon) {
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
"Beacon enabled for BSS: %pM\n", bss_conf->bssid);
|
||||
ath_dbg(common, CONFIG, "Beacon enabled for BSS: %pM\n",
|
||||
bss_conf->bssid);
|
||||
ath9k_htc_set_tsfadjust(priv, vif);
|
||||
priv->op_flags |= OP_ENABLE_BEACON;
|
||||
ath9k_htc_beacon_config(priv, vif);
|
||||
|
@ -1525,7 +1522,7 @@ static void ath9k_htc_bss_info_changed(struct ieee80211_hw *hw,
|
|||
* AP/IBSS interfaces.
|
||||
*/
|
||||
if ((priv->num_ap_vif <= 1) || priv->num_ibss_vif) {
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
ath_dbg(common, CONFIG,
|
||||
"Beacon disabled for BSS: %pM\n",
|
||||
bss_conf->bssid);
|
||||
priv->op_flags &= ~OP_ENABLE_BEACON;
|
||||
|
@ -1543,7 +1540,7 @@ static void ath9k_htc_bss_info_changed(struct ieee80211_hw *hw,
|
|||
(vif->type == NL80211_IFTYPE_AP)) {
|
||||
priv->op_flags |= OP_TSF_RESET;
|
||||
}
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
ath_dbg(common, CONFIG,
|
||||
"Beacon interval changed for BSS: %pM\n",
|
||||
bss_conf->bssid);
|
||||
ath9k_htc_beacon_config(priv, vif);
|
||||
|
@ -1733,8 +1730,7 @@ static int ath9k_htc_set_bitrate_mask(struct ieee80211_hw *hw,
|
|||
goto out;
|
||||
}
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
"Set bitrate masks: 0x%x, 0x%x\n",
|
||||
ath_dbg(common, CONFIG, "Set bitrate masks: 0x%x, 0x%x\n",
|
||||
mask->control[IEEE80211_BAND_2GHZ].legacy,
|
||||
mask->control[IEEE80211_BAND_5GHZ].legacy);
|
||||
out:
|
||||
|
|
|
@ -355,7 +355,7 @@ int ath9k_htc_tx_start(struct ath9k_htc_priv *priv,
|
|||
vif_idx = avp->index;
|
||||
} else {
|
||||
if (!priv->ah->is_monitoring) {
|
||||
ath_dbg(ath9k_hw_common(priv->ah), ATH_DBG_XMIT,
|
||||
ath_dbg(ath9k_hw_common(priv->ah), XMIT,
|
||||
"VIF is null, but no monitor interface !\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
@ -620,8 +620,7 @@ static struct sk_buff* ath9k_htc_tx_get_packet(struct ath9k_htc_priv *priv,
|
|||
}
|
||||
spin_unlock_irqrestore(&epid_queue->lock, flags);
|
||||
|
||||
ath_dbg(common, ATH_DBG_XMIT,
|
||||
"No matching packet for cookie: %d, epid: %d\n",
|
||||
ath_dbg(common, XMIT, "No matching packet for cookie: %d, epid: %d\n",
|
||||
txs->cookie, epid);
|
||||
|
||||
return NULL;
|
||||
|
@ -705,8 +704,7 @@ static inline bool check_packet(struct ath9k_htc_priv *priv, struct sk_buff *skb
|
|||
if (time_after(jiffies,
|
||||
tx_ctl->timestamp +
|
||||
msecs_to_jiffies(ATH9K_HTC_TX_TIMEOUT_INTERVAL))) {
|
||||
ath_dbg(common, ATH_DBG_XMIT,
|
||||
"Dropping a packet due to TX timeout\n");
|
||||
ath_dbg(common, XMIT, "Dropping a packet due to TX timeout\n");
|
||||
return true;
|
||||
}
|
||||
|
||||
|
@ -753,7 +751,7 @@ void ath9k_htc_tx_cleanup_timer(unsigned long data)
|
|||
|
||||
skb = ath9k_htc_tx_get_packet(priv, &event->txs);
|
||||
if (skb) {
|
||||
ath_dbg(common, ATH_DBG_XMIT,
|
||||
ath_dbg(common, XMIT,
|
||||
"Found packet for cookie: %d, epid: %d\n",
|
||||
event->txs.cookie,
|
||||
MS(event->txs.ts_rate, ATH9K_HTC_TXSTAT_EPID));
|
||||
|
@ -1167,8 +1165,7 @@ void ath9k_htc_rxep(void *drv_priv, struct sk_buff *skb,
|
|||
spin_unlock(&priv->rx.rxbuflock);
|
||||
|
||||
if (rxbuf == NULL) {
|
||||
ath_dbg(common, ATH_DBG_ANY,
|
||||
"No free RX buffer\n");
|
||||
ath_dbg(common, ANY, "No free RX buffer\n");
|
||||
goto err;
|
||||
}
|
||||
|
||||
|
|
|
@ -133,7 +133,7 @@ bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout)
|
|||
udelay(AH_TIME_QUANTUM);
|
||||
}
|
||||
|
||||
ath_dbg(ath9k_hw_common(ah), ATH_DBG_ANY,
|
||||
ath_dbg(ath9k_hw_common(ah), ANY,
|
||||
"timeout (%d us) on reg 0x%x: 0x%08x & 0x%08x != 0x%08x\n",
|
||||
timeout, reg, REG_READ(ah, reg), mask, val);
|
||||
|
||||
|
@ -491,8 +491,7 @@ static int ath9k_hw_post_init(struct ath_hw *ah)
|
|||
if (ecode != 0)
|
||||
return ecode;
|
||||
|
||||
ath_dbg(ath9k_hw_common(ah), ATH_DBG_CONFIG,
|
||||
"Eeprom VER: %d, REV: %d\n",
|
||||
ath_dbg(ath9k_hw_common(ah), CONFIG, "Eeprom VER: %d, REV: %d\n",
|
||||
ah->eep_ops->get_eeprom_ver(ah),
|
||||
ah->eep_ops->get_eeprom_rev(ah));
|
||||
|
||||
|
@ -567,7 +566,7 @@ static int __ath9k_hw_init(struct ath_hw *ah)
|
|||
}
|
||||
}
|
||||
|
||||
ath_dbg(common, ATH_DBG_RESET, "serialize_regmode is %d\n",
|
||||
ath_dbg(common, RESET, "serialize_regmode is %d\n",
|
||||
ah->config.serialize_regmode);
|
||||
|
||||
if (AR_SREV_9285(ah) || AR_SREV_9271(ah))
|
||||
|
@ -958,8 +957,8 @@ static void ath9k_hw_set_cts_timeout(struct ath_hw *ah, u32 us)
|
|||
static bool ath9k_hw_set_global_txtimeout(struct ath_hw *ah, u32 tu)
|
||||
{
|
||||
if (tu > 0xFFFF) {
|
||||
ath_dbg(ath9k_hw_common(ah), ATH_DBG_XMIT,
|
||||
"bad global tx timeout %u\n", tu);
|
||||
ath_dbg(ath9k_hw_common(ah), XMIT, "bad global tx timeout %u\n",
|
||||
tu);
|
||||
ah->globaltxtimeout = (u32) -1;
|
||||
return false;
|
||||
} else {
|
||||
|
@ -980,7 +979,7 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
|
|||
int rx_lat = 0, tx_lat = 0, eifs = 0;
|
||||
u32 reg;
|
||||
|
||||
ath_dbg(ath9k_hw_common(ah), ATH_DBG_RESET, "ah->misc_mode 0x%x\n",
|
||||
ath_dbg(ath9k_hw_common(ah), RESET, "ah->misc_mode 0x%x\n",
|
||||
ah->misc_mode);
|
||||
|
||||
if (!chan)
|
||||
|
@ -1275,7 +1274,7 @@ static bool ath9k_hw_set_reset(struct ath_hw *ah, int type)
|
|||
(npend || type == ATH9K_RESET_COLD)) {
|
||||
int reset_err = 0;
|
||||
|
||||
ath_dbg(ath9k_hw_common(ah), ATH_DBG_RESET,
|
||||
ath_dbg(ath9k_hw_common(ah), RESET,
|
||||
"reset MAC via external reset\n");
|
||||
|
||||
reset_err = ah->external_reset();
|
||||
|
@ -1298,8 +1297,7 @@ static bool ath9k_hw_set_reset(struct ath_hw *ah, int type)
|
|||
|
||||
REG_WRITE(ah, AR_RTC_RC, 0);
|
||||
if (!ath9k_hw_wait(ah, AR_RTC_RC, AR_RTC_RC_M, 0, AH_WAIT_TIMEOUT)) {
|
||||
ath_dbg(ath9k_hw_common(ah), ATH_DBG_RESET,
|
||||
"RTC stuck in MAC reset\n");
|
||||
ath_dbg(ath9k_hw_common(ah), RESET, "RTC stuck in MAC reset\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
|
@ -1344,8 +1342,7 @@ static bool ath9k_hw_set_reset_power_on(struct ath_hw *ah)
|
|||
AR_RTC_STATUS_M,
|
||||
AR_RTC_STATUS_ON,
|
||||
AH_WAIT_TIMEOUT)) {
|
||||
ath_dbg(ath9k_hw_common(ah), ATH_DBG_RESET,
|
||||
"RTC not waking up\n");
|
||||
ath_dbg(ath9k_hw_common(ah), RESET, "RTC not waking up\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
|
@ -1418,7 +1415,7 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah,
|
|||
|
||||
for (qnum = 0; qnum < AR_NUM_QCU; qnum++) {
|
||||
if (ath9k_hw_numtxpending(ah, qnum)) {
|
||||
ath_dbg(common, ATH_DBG_QUEUE,
|
||||
ath_dbg(common, QUEUE,
|
||||
"Transmit frames pending on queue %d\n", qnum);
|
||||
return false;
|
||||
}
|
||||
|
@ -1536,7 +1533,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
|
|||
if (mci_hw->bt_state == MCI_BT_CAL_START) {
|
||||
u32 payload[4] = {0, 0, 0, 0};
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI stop rx for BT CAL");
|
||||
ath_dbg(common, MCI, "MCI stop rx for BT CAL\n");
|
||||
|
||||
mci_hw->bt_state = MCI_BT_CAL;
|
||||
|
||||
|
@ -1548,23 +1545,22 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
|
|||
|
||||
ar9003_mci_disable_interrupt(ah);
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI, "send WLAN_CAL_GRANT");
|
||||
ath_dbg(common, MCI, "send WLAN_CAL_GRANT\n");
|
||||
MCI_GPM_SET_CAL_TYPE(payload, MCI_GPM_WLAN_CAL_GRANT);
|
||||
ar9003_mci_send_message(ah, MCI_GPM, 0, payload,
|
||||
16, true, false);
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI, "\nMCI BT is calibrating");
|
||||
ath_dbg(common, MCI, "\nMCI BT is calibrating\n");
|
||||
|
||||
/* Wait BT calibration to be completed for 25ms */
|
||||
|
||||
if (ar9003_mci_wait_for_gpm(ah, MCI_GPM_BT_CAL_DONE,
|
||||
0, 25000))
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
ath_dbg(common, MCI,
|
||||
"MCI got BT_CAL_DONE\n");
|
||||
else
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI ### BT cal takes to long, force"
|
||||
"bt_state to be bt_awake\n");
|
||||
ath_dbg(common, MCI,
|
||||
"MCI ### BT cal takes to long, force bt_state to be bt_awake\n");
|
||||
mci_hw->bt_state = MCI_BT_AWAKE;
|
||||
/* MCI FIX: enable mci interrupt here */
|
||||
ar9003_mci_enable_interrupt(ah);
|
||||
|
@ -1825,14 +1821,13 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
|
|||
* message exchanges again and recal.
|
||||
*/
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI BT wakes up"
|
||||
"during WLAN calibration\n");
|
||||
ath_dbg(common, MCI,
|
||||
"MCI BT wakes up during WLAN calibration\n");
|
||||
|
||||
REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_RAW,
|
||||
AR_MCI_INTERRUPT_RX_MSG_REMOTE_RESET |
|
||||
AR_MCI_INTERRUPT_RX_MSG_REQ_WAKE);
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI send"
|
||||
"REMOTE_RESET\n");
|
||||
ath_dbg(common, MCI, "MCI send REMOTE_RESET\n");
|
||||
ar9003_mci_remote_reset(ah, true);
|
||||
ar9003_mci_send_sys_waking(ah, true);
|
||||
udelay(1);
|
||||
|
@ -1841,7 +1836,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
|
|||
|
||||
mci_hw->bt_state = MCI_BT_AWAKE;
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI re-cal\n");
|
||||
ath_dbg(common, MCI, "MCI re-cal\n");
|
||||
|
||||
if (caldata) {
|
||||
caldata->done_txiqcal_once = false;
|
||||
|
@ -1871,14 +1866,14 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
|
|||
u32 mask;
|
||||
mask = REG_READ(ah, AR_CFG);
|
||||
if (mask & (AR_CFG_SWRB | AR_CFG_SWTB | AR_CFG_SWRG)) {
|
||||
ath_dbg(common, ATH_DBG_RESET,
|
||||
"CFG Byte Swap Set 0x%x\n", mask);
|
||||
ath_dbg(common, RESET, "CFG Byte Swap Set 0x%x\n",
|
||||
mask);
|
||||
} else {
|
||||
mask =
|
||||
INIT_CONFIG_STATUS | AR_CFG_SWRB | AR_CFG_SWTB;
|
||||
REG_WRITE(ah, AR_CFG, mask);
|
||||
ath_dbg(common, ATH_DBG_RESET,
|
||||
"Setting CFG 0x%x\n", REG_READ(ah, AR_CFG));
|
||||
ath_dbg(common, RESET, "Setting CFG 0x%x\n",
|
||||
REG_READ(ah, AR_CFG));
|
||||
}
|
||||
} else {
|
||||
if (common->bus_ops->ath_bus_type == ATH_USB) {
|
||||
|
@ -1896,7 +1891,8 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
|
|||
#endif
|
||||
}
|
||||
|
||||
if (ah->btcoex_hw.enabled)
|
||||
if (ah->btcoex_hw.enabled &&
|
||||
ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE)
|
||||
ath9k_hw_btcoex_enable(ah);
|
||||
|
||||
if (mci && mci_hw->ready) {
|
||||
|
@ -2090,7 +2086,7 @@ bool ath9k_hw_setpower(struct ath_hw *ah, enum ath9k_power_mode mode)
|
|||
if (ah->power_mode == mode)
|
||||
return status;
|
||||
|
||||
ath_dbg(common, ATH_DBG_RESET, "%s -> %s\n",
|
||||
ath_dbg(common, RESET, "%s -> %s\n",
|
||||
modes[ah->power_mode], modes[mode]);
|
||||
|
||||
switch (mode) {
|
||||
|
@ -2107,8 +2103,8 @@ bool ath9k_hw_setpower(struct ath_hw *ah, enum ath9k_power_mode mode)
|
|||
if (ar9003_mci_state(ah, MCI_STATE_ENABLE, NULL) &&
|
||||
(mci->bt_state != MCI_BT_SLEEP) &&
|
||||
!mci->halted_bt_gpm) {
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI halt BT GPM"
|
||||
"(full_sleep)");
|
||||
ath_dbg(common, MCI,
|
||||
"MCI halt BT GPM (full_sleep)\n");
|
||||
ar9003_mci_send_coex_halt_bt_gpm(ah,
|
||||
true, true);
|
||||
}
|
||||
|
@ -2174,9 +2170,8 @@ void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period)
|
|||
AR_TBTT_TIMER_EN | AR_DBA_TIMER_EN | AR_SWBA_TIMER_EN;
|
||||
break;
|
||||
default:
|
||||
ath_dbg(ath9k_hw_common(ah), ATH_DBG_BEACON,
|
||||
"%s: unsupported opmode: %d\n",
|
||||
__func__, ah->opmode);
|
||||
ath_dbg(ath9k_hw_common(ah), BEACON,
|
||||
"%s: unsupported opmode: %d\n", __func__, ah->opmode);
|
||||
return;
|
||||
break;
|
||||
}
|
||||
|
@ -2227,10 +2222,10 @@ void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah,
|
|||
else
|
||||
nextTbtt = bs->bs_nexttbtt;
|
||||
|
||||
ath_dbg(common, ATH_DBG_BEACON, "next DTIM %d\n", bs->bs_nextdtim);
|
||||
ath_dbg(common, ATH_DBG_BEACON, "next beacon %d\n", nextTbtt);
|
||||
ath_dbg(common, ATH_DBG_BEACON, "beacon period %d\n", beaconintval);
|
||||
ath_dbg(common, ATH_DBG_BEACON, "DTIM period %d\n", dtimperiod);
|
||||
ath_dbg(common, BEACON, "next DTIM %d\n", bs->bs_nextdtim);
|
||||
ath_dbg(common, BEACON, "next beacon %d\n", nextTbtt);
|
||||
ath_dbg(common, BEACON, "beacon period %d\n", beaconintval);
|
||||
ath_dbg(common, BEACON, "DTIM period %d\n", dtimperiod);
|
||||
|
||||
ENABLE_REGWRITE_BUFFER(ah);
|
||||
|
||||
|
@ -2322,8 +2317,8 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
|
|||
regulatory->current_rd += 5;
|
||||
else if (regulatory->current_rd == 0x41)
|
||||
regulatory->current_rd = 0x43;
|
||||
ath_dbg(common, ATH_DBG_REGULATORY,
|
||||
"regdomain mapped to 0x%x\n", regulatory->current_rd);
|
||||
ath_dbg(common, REGULATORY, "regdomain mapped to 0x%x\n",
|
||||
regulatory->current_rd);
|
||||
}
|
||||
|
||||
eeval = ah->eep_ops->get_eeprom(ah, EEP_OP_MODE);
|
||||
|
@ -2848,7 +2843,7 @@ void ath9k_hw_reset_tsf(struct ath_hw *ah)
|
|||
{
|
||||
if (!ath9k_hw_wait(ah, AR_SLP32_MODE, AR_SLP32_TSF_WRITE_STATUS, 0,
|
||||
AH_TSF_WRITE_TIMEOUT))
|
||||
ath_dbg(ath9k_hw_common(ah), ATH_DBG_RESET,
|
||||
ath_dbg(ath9k_hw_common(ah), RESET,
|
||||
"AR_SLP32_TSF_WRITE_STATUS limit exceeded\n");
|
||||
|
||||
REG_WRITE(ah, AR_RESET_TSF, AR_RESET_TSF_ONCE);
|
||||
|
@ -2973,7 +2968,7 @@ void ath9k_hw_gen_timer_start(struct ath_hw *ah,
|
|||
|
||||
timer_next = tsf + trig_timeout;
|
||||
|
||||
ath_dbg(ath9k_hw_common(ah), ATH_DBG_HWTIMER,
|
||||
ath_dbg(ath9k_hw_common(ah), HWTIMER,
|
||||
"current tsf %x period %x timer_next %x\n",
|
||||
tsf, timer_period, timer_next);
|
||||
|
||||
|
@ -3062,8 +3057,8 @@ void ath_gen_timer_isr(struct ath_hw *ah)
|
|||
index = rightmost_index(timer_table, &thresh_mask);
|
||||
timer = timer_table->timers[index];
|
||||
BUG_ON(!timer);
|
||||
ath_dbg(common, ATH_DBG_HWTIMER,
|
||||
"TSF overflow for Gen timer %d\n", index);
|
||||
ath_dbg(common, HWTIMER, "TSF overflow for Gen timer %d\n",
|
||||
index);
|
||||
timer->overflow(timer->arg);
|
||||
}
|
||||
|
||||
|
@ -3071,7 +3066,7 @@ void ath_gen_timer_isr(struct ath_hw *ah)
|
|||
index = rightmost_index(timer_table, &trigger_mask);
|
||||
timer = timer_table->timers[index];
|
||||
BUG_ON(!timer);
|
||||
ath_dbg(common, ATH_DBG_HWTIMER,
|
||||
ath_dbg(common, HWTIMER,
|
||||
"Gen timer[%d] trigger\n", index);
|
||||
timer->trigger(timer->arg);
|
||||
}
|
||||
|
|
|
@ -209,7 +209,11 @@ enum ath9k_hw_caps {
|
|||
ATH9K_HW_CAP_5GHZ = BIT(12),
|
||||
ATH9K_HW_CAP_APM = BIT(13),
|
||||
ATH9K_HW_CAP_RTT = BIT(14),
|
||||
#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
|
||||
ATH9K_HW_CAP_MCI = BIT(15),
|
||||
#else
|
||||
ATH9K_HW_CAP_MCI = 0,
|
||||
#endif
|
||||
ATH9K_HW_CAP_DFS = BIT(16),
|
||||
};
|
||||
|
||||
|
@ -1228,6 +1232,16 @@ void ar9003_mci_sync_bt_state(struct ath_hw *ah);
|
|||
void ar9003_mci_get_interrupt(struct ath_hw *ah, u32 *raw_intr,
|
||||
u32 *rx_msg_intr);
|
||||
|
||||
#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
|
||||
static inline enum ath_btcoex_scheme
|
||||
ath9k_hw_get_btcoex_scheme(struct ath_hw *ah)
|
||||
{
|
||||
return ah->btcoex_hw.scheme;
|
||||
}
|
||||
#else
|
||||
#define ath9k_hw_get_btcoex_scheme(...) ATH_BTCOEX_CFG_NONE
|
||||
#endif
|
||||
|
||||
#define ATH9K_CLOCK_RATE_CCK 22
|
||||
#define ATH9K_CLOCK_RATE_5GHZ_OFDM 40
|
||||
#define ATH9K_CLOCK_RATE_2GHZ_OFDM 44
|
||||
|
|
|
@ -276,8 +276,7 @@ static void setup_ht_cap(struct ath_softc *sc,
|
|||
tx_streams = ath9k_cmn_count_streams(ah->txchainmask, max_streams);
|
||||
rx_streams = ath9k_cmn_count_streams(ah->rxchainmask, max_streams);
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
"TX streams %d, RX streams: %d\n",
|
||||
ath_dbg(common, CONFIG, "TX streams %d, RX streams: %d\n",
|
||||
tx_streams, rx_streams);
|
||||
|
||||
if (tx_streams != rx_streams) {
|
||||
|
@ -329,7 +328,7 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
|
|||
struct ath_buf *bf;
|
||||
int i, bsize, error, desc_len;
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG, "%s DMA: %u buffers %u desc/buf\n",
|
||||
ath_dbg(common, CONFIG, "%s DMA: %u buffers %u desc/buf\n",
|
||||
name, nbuf, ndesc);
|
||||
|
||||
INIT_LIST_HEAD(head);
|
||||
|
@ -375,7 +374,7 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
|
|||
goto fail;
|
||||
}
|
||||
ds = (u8 *) dd->dd_desc;
|
||||
ath_dbg(common, ATH_DBG_CONFIG, "%s DMA map: %p (%u) -> %llx (%u)\n",
|
||||
ath_dbg(common, CONFIG, "%s DMA map: %p (%u) -> %llx (%u)\n",
|
||||
name, ds, (u32) dd->dd_desc_len,
|
||||
ito64(dd->dd_desc_paddr), /*XXX*/(u32) dd->dd_desc_len);
|
||||
|
||||
|
@ -426,7 +425,7 @@ static int ath9k_init_btcoex(struct ath_softc *sc)
|
|||
struct ath_hw *ah = sc->sc_ah;
|
||||
int r;
|
||||
|
||||
switch (sc->sc_ah->btcoex_hw.scheme) {
|
||||
switch (ath9k_hw_get_btcoex_scheme(sc->sc_ah)) {
|
||||
case ATH_BTCOEX_CFG_NONE:
|
||||
break;
|
||||
case ATH_BTCOEX_CFG_2WIRE:
|
||||
|
@ -881,10 +880,10 @@ static void ath9k_deinit_softc(struct ath_softc *sc)
|
|||
kfree(sc->sbands[IEEE80211_BAND_5GHZ].channels);
|
||||
|
||||
if ((sc->btcoex.no_stomp_timer) &&
|
||||
sc->sc_ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
|
||||
ath9k_hw_get_btcoex_scheme(sc->sc_ah) == ATH_BTCOEX_CFG_3WIRE)
|
||||
ath_gen_timer_free(sc->sc_ah, sc->btcoex.no_stomp_timer);
|
||||
|
||||
if (sc->sc_ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_MCI)
|
||||
if (ath9k_hw_get_btcoex_scheme(sc->sc_ah) == ATH_BTCOEX_CFG_MCI)
|
||||
ath_mci_cleanup(sc);
|
||||
|
||||
for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
|
||||
|
|
|
@ -21,7 +21,7 @@
|
|||
static void ath9k_hw_set_txq_interrupts(struct ath_hw *ah,
|
||||
struct ath9k_tx_queue_info *qi)
|
||||
{
|
||||
ath_dbg(ath9k_hw_common(ah), ATH_DBG_INTERRUPT,
|
||||
ath_dbg(ath9k_hw_common(ah), INTERRUPT,
|
||||
"tx ok 0x%x err 0x%x desc 0x%x eol 0x%x urn 0x%x\n",
|
||||
ah->txok_interrupt_mask, ah->txerr_interrupt_mask,
|
||||
ah->txdesc_interrupt_mask, ah->txeol_interrupt_mask,
|
||||
|
@ -57,8 +57,7 @@ EXPORT_SYMBOL(ath9k_hw_puttxbuf);
|
|||
|
||||
void ath9k_hw_txstart(struct ath_hw *ah, u32 q)
|
||||
{
|
||||
ath_dbg(ath9k_hw_common(ah), ATH_DBG_QUEUE,
|
||||
"Enable TXE on queue: %u\n", q);
|
||||
ath_dbg(ath9k_hw_common(ah), QUEUE, "Enable TXE on queue: %u\n", q);
|
||||
REG_WRITE(ah, AR_Q_TXE, 1 << q);
|
||||
}
|
||||
EXPORT_SYMBOL(ath9k_hw_txstart);
|
||||
|
@ -202,12 +201,12 @@ bool ath9k_hw_set_txq_props(struct ath_hw *ah, int q,
|
|||
|
||||
qi = &ah->txq[q];
|
||||
if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
|
||||
ath_dbg(common, ATH_DBG_QUEUE,
|
||||
ath_dbg(common, QUEUE,
|
||||
"Set TXQ properties, inactive queue: %u\n", q);
|
||||
return false;
|
||||
}
|
||||
|
||||
ath_dbg(common, ATH_DBG_QUEUE, "Set queue properties for: %u\n", q);
|
||||
ath_dbg(common, QUEUE, "Set queue properties for: %u\n", q);
|
||||
|
||||
qi->tqi_ver = qinfo->tqi_ver;
|
||||
qi->tqi_subtype = qinfo->tqi_subtype;
|
||||
|
@ -266,7 +265,7 @@ bool ath9k_hw_get_txq_props(struct ath_hw *ah, int q,
|
|||
|
||||
qi = &ah->txq[q];
|
||||
if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
|
||||
ath_dbg(common, ATH_DBG_QUEUE,
|
||||
ath_dbg(common, QUEUE,
|
||||
"Get TXQ properties, inactive queue: %u\n", q);
|
||||
return false;
|
||||
}
|
||||
|
@ -325,7 +324,7 @@ int ath9k_hw_setuptxqueue(struct ath_hw *ah, enum ath9k_tx_queue type,
|
|||
return -1;
|
||||
}
|
||||
|
||||
ath_dbg(common, ATH_DBG_QUEUE, "Setup TX queue: %u\n", q);
|
||||
ath_dbg(common, QUEUE, "Setup TX queue: %u\n", q);
|
||||
|
||||
qi = &ah->txq[q];
|
||||
if (qi->tqi_type != ATH9K_TX_QUEUE_INACTIVE) {
|
||||
|
@ -348,12 +347,11 @@ bool ath9k_hw_releasetxqueue(struct ath_hw *ah, u32 q)
|
|||
|
||||
qi = &ah->txq[q];
|
||||
if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
|
||||
ath_dbg(common, ATH_DBG_QUEUE,
|
||||
"Release TXQ, inactive queue: %u\n", q);
|
||||
ath_dbg(common, QUEUE, "Release TXQ, inactive queue: %u\n", q);
|
||||
return false;
|
||||
}
|
||||
|
||||
ath_dbg(common, ATH_DBG_QUEUE, "Release TX queue: %u\n", q);
|
||||
ath_dbg(common, QUEUE, "Release TX queue: %u\n", q);
|
||||
|
||||
qi->tqi_type = ATH9K_TX_QUEUE_INACTIVE;
|
||||
ah->txok_interrupt_mask &= ~(1 << q);
|
||||
|
@ -376,12 +374,11 @@ bool ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q)
|
|||
|
||||
qi = &ah->txq[q];
|
||||
if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
|
||||
ath_dbg(common, ATH_DBG_QUEUE,
|
||||
"Reset TXQ, inactive queue: %u\n", q);
|
||||
ath_dbg(common, QUEUE, "Reset TXQ, inactive queue: %u\n", q);
|
||||
return true;
|
||||
}
|
||||
|
||||
ath_dbg(common, ATH_DBG_QUEUE, "Reset TX queue: %u\n", q);
|
||||
ath_dbg(common, QUEUE, "Reset TX queue: %u\n", q);
|
||||
|
||||
if (qi->tqi_cwmin == ATH9K_TXQ_USEDEFAULT) {
|
||||
if (chan && IS_CHAN_B(chan))
|
||||
|
@ -784,7 +781,7 @@ void ath9k_hw_disable_interrupts(struct ath_hw *ah)
|
|||
else
|
||||
atomic_dec(&ah->intr_ref_cnt);
|
||||
|
||||
ath_dbg(common, ATH_DBG_INTERRUPT, "disable IER\n");
|
||||
ath_dbg(common, INTERRUPT, "disable IER\n");
|
||||
REG_WRITE(ah, AR_IER, AR_IER_DISABLE);
|
||||
(void) REG_READ(ah, AR_IER);
|
||||
if (!AR_SREV_9100(ah)) {
|
||||
|
@ -807,8 +804,7 @@ void ath9k_hw_enable_interrupts(struct ath_hw *ah)
|
|||
return;
|
||||
|
||||
if (!atomic_inc_and_test(&ah->intr_ref_cnt)) {
|
||||
ath_dbg(common, ATH_DBG_INTERRUPT,
|
||||
"Do not enable IER ref count %d\n",
|
||||
ath_dbg(common, INTERRUPT, "Do not enable IER ref count %d\n",
|
||||
atomic_read(&ah->intr_ref_cnt));
|
||||
return;
|
||||
}
|
||||
|
@ -821,7 +817,7 @@ void ath9k_hw_enable_interrupts(struct ath_hw *ah)
|
|||
if (ah->imask & ATH9K_INT_MCI)
|
||||
async_mask |= AR_INTR_ASYNC_MASK_MCI;
|
||||
|
||||
ath_dbg(common, ATH_DBG_INTERRUPT, "enable IER\n");
|
||||
ath_dbg(common, INTERRUPT, "enable IER\n");
|
||||
REG_WRITE(ah, AR_IER, AR_IER_ENABLE);
|
||||
if (!AR_SREV_9100(ah)) {
|
||||
REG_WRITE(ah, AR_INTR_ASYNC_ENABLE, async_mask);
|
||||
|
@ -830,7 +826,7 @@ void ath9k_hw_enable_interrupts(struct ath_hw *ah)
|
|||
REG_WRITE(ah, AR_INTR_SYNC_ENABLE, sync_default);
|
||||
REG_WRITE(ah, AR_INTR_SYNC_MASK, sync_default);
|
||||
}
|
||||
ath_dbg(common, ATH_DBG_INTERRUPT, "AR_IMR 0x%x IER 0x%x\n",
|
||||
ath_dbg(common, INTERRUPT, "AR_IMR 0x%x IER 0x%x\n",
|
||||
REG_READ(ah, AR_IMR), REG_READ(ah, AR_IER));
|
||||
}
|
||||
EXPORT_SYMBOL(ath9k_hw_enable_interrupts);
|
||||
|
@ -845,7 +841,7 @@ void ath9k_hw_set_interrupts(struct ath_hw *ah)
|
|||
if (!(ints & ATH9K_INT_GLOBAL))
|
||||
ath9k_hw_disable_interrupts(ah);
|
||||
|
||||
ath_dbg(common, ATH_DBG_INTERRUPT, "New interrupt mask 0x%x\n", ints);
|
||||
ath_dbg(common, INTERRUPT, "New interrupt mask 0x%x\n", ints);
|
||||
|
||||
mask = ints & ATH9K_INT_COMMON;
|
||||
mask2 = 0;
|
||||
|
@ -908,7 +904,7 @@ void ath9k_hw_set_interrupts(struct ath_hw *ah)
|
|||
mask2 |= AR_IMR_S2_CST;
|
||||
}
|
||||
|
||||
ath_dbg(common, ATH_DBG_INTERRUPT, "new IMR 0x%x\n", mask);
|
||||
ath_dbg(common, INTERRUPT, "new IMR 0x%x\n", mask);
|
||||
REG_WRITE(ah, AR_IMR, mask);
|
||||
ah->imrs2_reg &= ~(AR_IMR_S2_TIM | AR_IMR_S2_DTIM | AR_IMR_S2_DTIMSYNC |
|
||||
AR_IMR_S2_CABEND | AR_IMR_S2_CABTO |
|
||||
|
|
|
@ -339,8 +339,7 @@ static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
|
|||
if (!ath_prepare_reset(sc, retry_tx, flush))
|
||||
fastcc = false;
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
"Reset to %u MHz, HT40: %d fastcc: %d\n",
|
||||
ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
|
||||
hchan->channel, !!(hchan->channelFlags & (CHANNEL_HT40MINUS |
|
||||
CHANNEL_HT40PLUS)),
|
||||
fastcc);
|
||||
|
@ -429,7 +428,7 @@ static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int
|
|||
txctl.paprd = BIT(chain);
|
||||
|
||||
if (ath_tx_start(hw, skb, &txctl) != 0) {
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE, "PAPRD TX failed\n");
|
||||
ath_dbg(common, CALIBRATE, "PAPRD TX failed\n");
|
||||
dev_kfree_skb_any(skb);
|
||||
return false;
|
||||
}
|
||||
|
@ -438,7 +437,7 @@ static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int
|
|||
msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
|
||||
|
||||
if (!time_left)
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"Timeout waiting for paprd training on TX chain %d\n",
|
||||
chain);
|
||||
|
||||
|
@ -487,27 +486,27 @@ void ath_paprd_calibrate(struct work_struct *work)
|
|||
|
||||
chain_ok = 0;
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
"Sending PAPRD frame for thermal measurement "
|
||||
"on chain %d\n", chain);
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"Sending PAPRD frame for thermal measurement on chain %d\n",
|
||||
chain);
|
||||
if (!ath_paprd_send_frame(sc, skb, chain))
|
||||
goto fail_paprd;
|
||||
|
||||
ar9003_paprd_setup_gain_table(ah, chain);
|
||||
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"Sending PAPRD training frame on chain %d\n", chain);
|
||||
if (!ath_paprd_send_frame(sc, skb, chain))
|
||||
goto fail_paprd;
|
||||
|
||||
if (!ar9003_paprd_is_done(ah)) {
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"PAPRD not yet done on chain %d\n", chain);
|
||||
break;
|
||||
}
|
||||
|
||||
if (ar9003_paprd_create_curve(ah, caldata, chain)) {
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
ath_dbg(common, CALIBRATE,
|
||||
"PAPRD create curve failed on chain %d\n",
|
||||
chain);
|
||||
break;
|
||||
|
@ -604,8 +603,9 @@ void ath_ani_calibrate(unsigned long data)
|
|||
ah->rxchainmask, longcal);
|
||||
}
|
||||
|
||||
ath_dbg(common, ATH_DBG_ANI,
|
||||
"Calibration @%lu finished: %s %s %s, caldone: %s\n", jiffies,
|
||||
ath_dbg(common, ANI,
|
||||
"Calibration @%lu finished: %s %s %s, caldone: %s\n",
|
||||
jiffies,
|
||||
longcal ? "long" : "", shortcal ? "short" : "",
|
||||
aniflag ? "ani" : "", common->ani.caldone ? "true" : "false");
|
||||
|
||||
|
@ -715,8 +715,7 @@ void ath9k_tasklet(unsigned long data)
|
|||
* TSF sync does not look correct; remain awake to sync with
|
||||
* the next Beacon.
|
||||
*/
|
||||
ath_dbg(common, ATH_DBG_PS,
|
||||
"TSFOOR - Sync with next Beacon\n");
|
||||
ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
|
||||
sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
|
||||
}
|
||||
|
||||
|
@ -742,11 +741,11 @@ void ath9k_tasklet(unsigned long data)
|
|||
ath_tx_tasklet(sc);
|
||||
}
|
||||
|
||||
if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
|
||||
if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
|
||||
if (status & ATH9K_INT_GENTIMER)
|
||||
ath_gen_timer_isr(sc->sc_ah);
|
||||
|
||||
if (status & ATH9K_INT_MCI)
|
||||
if ((status & ATH9K_INT_MCI) && ATH9K_HW_CAP_MCI)
|
||||
ath_mci_intr(sc);
|
||||
|
||||
out:
|
||||
|
@ -936,8 +935,8 @@ void ath_hw_check(struct work_struct *work)
|
|||
busy = ath_update_survey_stats(sc);
|
||||
spin_unlock_irqrestore(&common->cc_lock, flags);
|
||||
|
||||
ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
|
||||
"busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
|
||||
ath_dbg(common, RESET, "Possible baseband hang, busy=%d (try %d)\n",
|
||||
busy, sc->hw_busy_count + 1);
|
||||
if (busy >= 99) {
|
||||
if (++sc->hw_busy_count >= 3) {
|
||||
RESET_STAT_INC(sc, RESET_TYPE_BB_HANG);
|
||||
|
@ -960,8 +959,7 @@ static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
|
|||
count++;
|
||||
if (count == 3) {
|
||||
/* Rx is hung for more than 500ms. Reset it */
|
||||
ath_dbg(common, ATH_DBG_RESET,
|
||||
"Possible RX hang, resetting");
|
||||
ath_dbg(common, RESET, "Possible RX hang, resetting\n");
|
||||
RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG);
|
||||
ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
|
||||
count = 0;
|
||||
|
@ -1001,7 +999,7 @@ static int ath9k_start(struct ieee80211_hw *hw)
|
|||
struct ath9k_channel *init_channel;
|
||||
int r;
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
ath_dbg(common, CONFIG,
|
||||
"Starting driver with initial channel: %d MHz\n",
|
||||
curchan->center_freq);
|
||||
|
||||
|
@ -1083,14 +1081,14 @@ static int ath9k_start(struct ieee80211_hw *hw)
|
|||
|
||||
spin_unlock_bh(&sc->sc_pcu_lock);
|
||||
|
||||
if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
|
||||
if ((ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) &&
|
||||
!ah->btcoex_hw.enabled) {
|
||||
if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI))
|
||||
ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
|
||||
AR_STOMP_LOW_WLAN_WGHT);
|
||||
ath9k_hw_btcoex_enable(ah);
|
||||
|
||||
if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
|
||||
if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
|
||||
ath9k_btcoex_timer_resume(sc);
|
||||
}
|
||||
|
||||
|
@ -1120,7 +1118,7 @@ static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
|
|||
if (ieee80211_is_data(hdr->frame_control) &&
|
||||
!ieee80211_is_nullfunc(hdr->frame_control) &&
|
||||
!ieee80211_has_pm(hdr->frame_control)) {
|
||||
ath_dbg(common, ATH_DBG_PS,
|
||||
ath_dbg(common, PS,
|
||||
"Add PM=1 for a TX frame while in PS mode\n");
|
||||
hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
|
||||
}
|
||||
|
@ -1143,12 +1141,11 @@ static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
|
|||
if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
|
||||
ath9k_hw_setrxabort(sc->sc_ah, 0);
|
||||
if (ieee80211_is_pspoll(hdr->frame_control)) {
|
||||
ath_dbg(common, ATH_DBG_PS,
|
||||
ath_dbg(common, PS,
|
||||
"Sending PS-Poll to pick a buffered frame\n");
|
||||
sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
|
||||
} else {
|
||||
ath_dbg(common, ATH_DBG_PS,
|
||||
"Wake up to complete TX\n");
|
||||
ath_dbg(common, PS, "Wake up to complete TX\n");
|
||||
sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
|
||||
}
|
||||
/*
|
||||
|
@ -1162,10 +1159,10 @@ static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
|
|||
memset(&txctl, 0, sizeof(struct ath_tx_control));
|
||||
txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
|
||||
|
||||
ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
|
||||
ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
|
||||
|
||||
if (ath_tx_start(hw, skb, &txctl) != 0) {
|
||||
ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
|
||||
ath_dbg(common, XMIT, "TX failed\n");
|
||||
goto exit;
|
||||
}
|
||||
|
||||
|
@ -1186,7 +1183,7 @@ static void ath9k_stop(struct ieee80211_hw *hw)
|
|||
ath_cancel_work(sc);
|
||||
|
||||
if (sc->sc_flags & SC_OP_INVALID) {
|
||||
ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
|
||||
ath_dbg(common, ANY, "Device not present\n");
|
||||
mutex_unlock(&sc->mutex);
|
||||
return;
|
||||
}
|
||||
|
@ -1194,9 +1191,10 @@ static void ath9k_stop(struct ieee80211_hw *hw)
|
|||
/* Ensure HW is awake when we try to shut it down. */
|
||||
ath9k_ps_wakeup(sc);
|
||||
|
||||
if (ah->btcoex_hw.enabled) {
|
||||
if (ah->btcoex_hw.enabled &&
|
||||
ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) {
|
||||
ath9k_hw_btcoex_disable(ah);
|
||||
if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
|
||||
if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
|
||||
ath9k_btcoex_timer_pause(sc);
|
||||
ath_mci_flush_profile(&sc->btcoex.mci);
|
||||
}
|
||||
|
@ -1252,7 +1250,7 @@ static void ath9k_stop(struct ieee80211_hw *hw)
|
|||
|
||||
mutex_unlock(&sc->mutex);
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
|
||||
ath_dbg(common, CONFIG, "Driver halt\n");
|
||||
}
|
||||
|
||||
bool ath9k_uses_beacons(int type)
|
||||
|
@ -1467,8 +1465,7 @@ static int ath9k_add_interface(struct ieee80211_hw *hw,
|
|||
goto out;
|
||||
}
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
"Attach a VIF of type: %d\n", vif->type);
|
||||
ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
|
||||
|
||||
sc->nvifs++;
|
||||
|
||||
|
@ -1488,7 +1485,7 @@ static int ath9k_change_interface(struct ieee80211_hw *hw,
|
|||
struct ath_common *common = ath9k_hw_common(sc->sc_ah);
|
||||
int ret = 0;
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
|
||||
ath_dbg(common, CONFIG, "Change Interface\n");
|
||||
mutex_lock(&sc->mutex);
|
||||
ath9k_ps_wakeup(sc);
|
||||
|
||||
|
@ -1531,7 +1528,7 @@ static void ath9k_remove_interface(struct ieee80211_hw *hw,
|
|||
struct ath_softc *sc = hw->priv;
|
||||
struct ath_common *common = ath9k_hw_common(sc->sc_ah);
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
|
||||
ath_dbg(common, CONFIG, "Detach Interface\n");
|
||||
|
||||
ath9k_ps_wakeup(sc);
|
||||
mutex_lock(&sc->mutex);
|
||||
|
@ -1622,12 +1619,10 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
|
|||
|
||||
if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
|
||||
if (conf->flags & IEEE80211_CONF_MONITOR) {
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
"Monitor mode is enabled\n");
|
||||
ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
|
||||
sc->sc_ah->is_monitoring = true;
|
||||
} else {
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
"Monitor mode is disabled\n");
|
||||
ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
|
||||
sc->sc_ah->is_monitoring = false;
|
||||
}
|
||||
}
|
||||
|
@ -1647,8 +1642,7 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
|
|||
else
|
||||
sc->sc_flags &= ~SC_OP_OFFCHANNEL;
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
"Set channel: %d MHz type: %d\n",
|
||||
ath_dbg(common, CONFIG, "Set channel: %d MHz type: %d\n",
|
||||
curchan->center_freq, conf->channel_type);
|
||||
|
||||
/* update survey stats for the old channel before switching */
|
||||
|
@ -1705,8 +1699,7 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
|
|||
}
|
||||
|
||||
if (changed & IEEE80211_CONF_CHANGE_POWER) {
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
"Set power: %d\n", conf->power_level);
|
||||
ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
|
||||
sc->config.txpowlimit = 2 * conf->power_level;
|
||||
ath9k_cmn_update_txpow(ah, sc->curtxpow,
|
||||
sc->config.txpowlimit, &sc->curtxpow);
|
||||
|
@ -1746,8 +1739,8 @@ static void ath9k_configure_filter(struct ieee80211_hw *hw,
|
|||
ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
|
||||
ath9k_ps_restore(sc);
|
||||
|
||||
ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
|
||||
"Set HW RX filter: 0x%x\n", rfilt);
|
||||
ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
|
||||
rfilt);
|
||||
}
|
||||
|
||||
static int ath9k_sta_add(struct ieee80211_hw *hw,
|
||||
|
@ -1841,7 +1834,7 @@ static int ath9k_conf_tx(struct ieee80211_hw *hw,
|
|||
qi.tqi_cwmax = params->cw_max;
|
||||
qi.tqi_burstTime = params->txop;
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
ath_dbg(common, CONFIG,
|
||||
"Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
|
||||
queue, txq->axq_qnum, params->aifs, params->cw_min,
|
||||
params->cw_max, params->txop);
|
||||
|
@ -1890,7 +1883,7 @@ static int ath9k_set_key(struct ieee80211_hw *hw,
|
|||
|
||||
mutex_lock(&sc->mutex);
|
||||
ath9k_ps_wakeup(sc);
|
||||
ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
|
||||
ath_dbg(common, CONFIG, "Set HW Key\n");
|
||||
|
||||
switch (cmd) {
|
||||
case SET_KEY:
|
||||
|
@ -1942,8 +1935,7 @@ static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
|
|||
memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
|
||||
common->curaid = bss_conf->aid;
|
||||
ath9k_hw_write_associd(sc->sc_ah);
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
"Bss Info ASSOC %d, bssid: %pM\n",
|
||||
ath_dbg(common, CONFIG, "Bss Info ASSOC %d, bssid: %pM\n",
|
||||
bss_conf->aid, common->curbssid);
|
||||
ath_beacon_config(sc, vif);
|
||||
/*
|
||||
|
@ -1975,8 +1967,7 @@ static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
|
|||
|
||||
/* Reconfigure bss info */
|
||||
if (avp->primary_sta_vif && !bss_conf->assoc) {
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
"Bss Info DISASSOC %d, bssid %pM\n",
|
||||
ath_dbg(common, CONFIG, "Bss Info DISASSOC %d, bssid %pM\n",
|
||||
common->curaid, common->curbssid);
|
||||
sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
|
||||
avp->primary_sta_vif = false;
|
||||
|
@ -2018,7 +2009,7 @@ static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
|
|||
if (changed & BSS_CHANGED_BSSID) {
|
||||
ath9k_config_bss(sc, vif);
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
|
||||
ath_dbg(common, CONFIG, "BSSID: %pM aid: 0x%x\n",
|
||||
common->curbssid, common->curaid);
|
||||
}
|
||||
|
||||
|
@ -2096,7 +2087,7 @@ static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
|
|||
}
|
||||
|
||||
if (changed & BSS_CHANGED_ERP_PREAMBLE) {
|
||||
ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
|
||||
ath_dbg(common, CONFIG, "BSS Changed PREAMBLE %d\n",
|
||||
bss_conf->use_short_preamble);
|
||||
if (bss_conf->use_short_preamble)
|
||||
sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
|
||||
|
@ -2105,7 +2096,7 @@ static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
|
|||
}
|
||||
|
||||
if (changed & BSS_CHANGED_ERP_CTS_PROT) {
|
||||
ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
|
||||
ath_dbg(common, CONFIG, "BSS Changed CTS PROT %d\n",
|
||||
bss_conf->use_cts_prot);
|
||||
if (bss_conf->use_cts_prot &&
|
||||
hw->conf.channel->band != IEEE80211_BAND_5GHZ)
|
||||
|
@ -2271,13 +2262,13 @@ static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
|
|||
cancel_delayed_work_sync(&sc->tx_complete_work);
|
||||
|
||||
if (ah->ah_flags & AH_UNPLUGGED) {
|
||||
ath_dbg(common, ATH_DBG_ANY, "Device has been unplugged!\n");
|
||||
ath_dbg(common, ANY, "Device has been unplugged!\n");
|
||||
mutex_unlock(&sc->mutex);
|
||||
return;
|
||||
}
|
||||
|
||||
if (sc->sc_flags & SC_OP_INVALID) {
|
||||
ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
|
||||
ath_dbg(common, ANY, "Device not present\n");
|
||||
mutex_unlock(&sc->mutex);
|
||||
return;
|
||||
}
|
||||
|
|
|
@ -43,14 +43,14 @@ static bool ath_mci_add_profile(struct ath_common *common,
|
|||
|
||||
if ((mci->num_sco == ATH_MCI_MAX_SCO_PROFILE) &&
|
||||
(info->type == MCI_GPM_COEX_PROFILE_VOICE)) {
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
ath_dbg(common, MCI,
|
||||
"Too many SCO profile, failed to add new profile\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
if (((NUM_PROF(mci) - mci->num_sco) == ATH_MCI_MAX_ACL_PROFILE) &&
|
||||
(info->type != MCI_GPM_COEX_PROFILE_VOICE)) {
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
ath_dbg(common, MCI,
|
||||
"Too many ACL profile, failed to add new profile\n");
|
||||
return false;
|
||||
}
|
||||
|
@ -80,8 +80,7 @@ static void ath_mci_del_profile(struct ath_common *common,
|
|||
entry = ath_mci_find_profile(mci, info);
|
||||
|
||||
if (!entry) {
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"Profile to be deleted not found\n");
|
||||
ath_dbg(common, MCI, "Profile to be deleted not found\n");
|
||||
return;
|
||||
}
|
||||
DEC_PROF(mci, entry);
|
||||
|
@ -132,30 +131,30 @@ static void ath_mci_update_scheme(struct ath_softc *sc)
|
|||
list);
|
||||
if (mci->num_sco && info->T == 12) {
|
||||
mci->aggr_limit = 8;
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
ath_dbg(common, MCI,
|
||||
"Single SCO, aggregation limit 2 ms\n");
|
||||
} else if ((info->type == MCI_GPM_COEX_PROFILE_BNEP) &&
|
||||
!info->master) {
|
||||
btcoex->btcoex_period = 60;
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
ath_dbg(common, MCI,
|
||||
"Single slave PAN/FTP, bt period 60 ms\n");
|
||||
} else if ((info->type == MCI_GPM_COEX_PROFILE_HID) &&
|
||||
(info->T > 0 && info->T < 50) &&
|
||||
(info->A > 1 || info->W > 1)) {
|
||||
btcoex->duty_cycle = 30;
|
||||
mci->aggr_limit = 8;
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
ath_dbg(common, MCI,
|
||||
"Multiple attempt/timeout single HID "
|
||||
"aggregation limit 2 ms dutycycle 30%%\n");
|
||||
}
|
||||
} else if ((num_profile == 2) && (mci->num_hid == 2)) {
|
||||
btcoex->duty_cycle = 30;
|
||||
mci->aggr_limit = 8;
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
ath_dbg(common, MCI,
|
||||
"Two HIDs aggregation limit 2 ms dutycycle 30%%\n");
|
||||
} else if (num_profile > 3) {
|
||||
mci->aggr_limit = 6;
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
ath_dbg(common, MCI,
|
||||
"Three or more profiles aggregation limit 1.5 ms\n");
|
||||
}
|
||||
|
||||
|
@ -194,42 +193,41 @@ static void ath_mci_cal_msg(struct ath_softc *sc, u8 opcode, u8 *rx_payload)
|
|||
switch (opcode) {
|
||||
case MCI_GPM_BT_CAL_REQ:
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI received BT_CAL_REQ\n");
|
||||
ath_dbg(common, MCI, "MCI received BT_CAL_REQ\n");
|
||||
|
||||
if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_AWAKE) {
|
||||
ar9003_mci_state(ah, MCI_STATE_SET_BT_CAL_START, NULL);
|
||||
ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
|
||||
} else
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI State mismatches: %d\n",
|
||||
ath_dbg(common, MCI, "MCI State mismatches: %d\n",
|
||||
ar9003_mci_state(ah, MCI_STATE_BT, NULL));
|
||||
|
||||
break;
|
||||
|
||||
case MCI_GPM_BT_CAL_DONE:
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI received BT_CAL_DONE\n");
|
||||
ath_dbg(common, MCI, "MCI received BT_CAL_DONE\n");
|
||||
|
||||
if (ar9003_mci_state(ah, MCI_STATE_BT, NULL) == MCI_BT_CAL)
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI error illegal!\n");
|
||||
ath_dbg(common, MCI, "MCI error illegal!\n");
|
||||
else
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI BT not in CAL state\n");
|
||||
ath_dbg(common, MCI, "MCI BT not in CAL state\n");
|
||||
|
||||
break;
|
||||
|
||||
case MCI_GPM_BT_CAL_GRANT:
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI received BT_CAL_GRANT\n");
|
||||
ath_dbg(common, MCI, "MCI received BT_CAL_GRANT\n");
|
||||
|
||||
/* Send WLAN_CAL_DONE for now */
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI send WLAN_CAL_DONE\n");
|
||||
ath_dbg(common, MCI, "MCI send WLAN_CAL_DONE\n");
|
||||
MCI_GPM_SET_CAL_TYPE(payload, MCI_GPM_WLAN_CAL_DONE);
|
||||
ar9003_mci_send_message(sc->sc_ah, MCI_GPM, 0, payload,
|
||||
16, false, true);
|
||||
break;
|
||||
|
||||
default:
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI Unknown GPM CAL message\n");
|
||||
ath_dbg(common, MCI, "MCI Unknown GPM CAL message\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -272,8 +270,7 @@ static void ath_mci_process_status(struct ath_softc *sc,
|
|||
|
||||
/* Link status type are not handled */
|
||||
if (status->is_link) {
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"Skip link type status update\n");
|
||||
ath_dbg(common, MCI, "Skip link type status update\n");
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -281,14 +278,13 @@ static void ath_mci_process_status(struct ath_softc *sc,
|
|||
|
||||
info.conn_handle = status->conn_handle;
|
||||
if (ath_mci_find_profile(mci, &info)) {
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
ath_dbg(common, MCI,
|
||||
"Skip non link state update for existing profile %d\n",
|
||||
status->conn_handle);
|
||||
return;
|
||||
}
|
||||
if (status->conn_handle >= ATH_MCI_MAX_PROFILE) {
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"Ignore too many non-link update\n");
|
||||
ath_dbg(common, MCI, "Ignore too many non-link update\n");
|
||||
return;
|
||||
}
|
||||
if (status->is_critical)
|
||||
|
@ -320,35 +316,32 @@ static void ath_mci_msg(struct ath_softc *sc, u8 opcode, u8 *rx_payload)
|
|||
switch (opcode) {
|
||||
|
||||
case MCI_GPM_COEX_VERSION_QUERY:
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI Recv GPM COEX Version Query.\n");
|
||||
ath_dbg(common, MCI, "MCI Recv GPM COEX Version Query\n");
|
||||
version = ar9003_mci_state(ah,
|
||||
MCI_STATE_SEND_WLAN_COEX_VERSION, NULL);
|
||||
break;
|
||||
|
||||
case MCI_GPM_COEX_VERSION_RESPONSE:
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI Recv GPM COEX Version Response.\n");
|
||||
ath_dbg(common, MCI, "MCI Recv GPM COEX Version Response\n");
|
||||
major = *(rx_payload + MCI_GPM_COEX_B_MAJOR_VERSION);
|
||||
minor = *(rx_payload + MCI_GPM_COEX_B_MINOR_VERSION);
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI BT Coex version: %d.%d\n", major, minor);
|
||||
ath_dbg(common, MCI, "MCI BT Coex version: %d.%d\n",
|
||||
major, minor);
|
||||
version = (major << 8) + minor;
|
||||
version = ar9003_mci_state(ah,
|
||||
MCI_STATE_SET_BT_COEX_VERSION, &version);
|
||||
break;
|
||||
|
||||
case MCI_GPM_COEX_STATUS_QUERY:
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI Recv GPM COEX Status Query = 0x%02x.\n",
|
||||
ath_dbg(common, MCI,
|
||||
"MCI Recv GPM COEX Status Query = 0x%02x\n",
|
||||
*(rx_payload + MCI_GPM_COEX_B_WLAN_BITMAP));
|
||||
ar9003_mci_state(ah,
|
||||
MCI_STATE_SEND_WLAN_CHANNELS, NULL);
|
||||
break;
|
||||
|
||||
case MCI_GPM_COEX_BT_PROFILE_INFO:
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI Recv GPM Coex BT profile info\n");
|
||||
ath_dbg(common, MCI, "MCI Recv GPM Coex BT profile info\n");
|
||||
memcpy(&profile_info,
|
||||
(rx_payload + MCI_GPM_COEX_B_PROFILE_TYPE), 10);
|
||||
|
||||
|
@ -356,9 +349,9 @@ static void ath_mci_msg(struct ath_softc *sc, u8 opcode, u8 *rx_payload)
|
|||
|| (profile_info.type >=
|
||||
MCI_GPM_COEX_PROFILE_MAX)) {
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"illegal profile type = %d,"
|
||||
"state = %d\n", profile_info.type,
|
||||
ath_dbg(common, MCI,
|
||||
"illegal profile type = %d, state = %d\n",
|
||||
profile_info.type,
|
||||
profile_info.start);
|
||||
break;
|
||||
}
|
||||
|
@ -375,9 +368,8 @@ static void ath_mci_msg(struct ath_softc *sc, u8 opcode, u8 *rx_payload)
|
|||
MCI_GPM_COEX_B_STATUS_STATE);
|
||||
|
||||
seq_num = *((u32 *)(rx_payload + 12));
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI Recv GPM COEX BT_Status_Update: "
|
||||
"is_link=%d, linkId=%d, state=%d, SEQ=%d\n",
|
||||
ath_dbg(common, MCI,
|
||||
"MCI Recv GPM COEX BT_Status_Update: is_link=%d, linkId=%d, state=%d, SEQ=%d\n",
|
||||
profile_status.is_link, profile_status.conn_handle,
|
||||
profile_status.is_critical, seq_num);
|
||||
|
||||
|
@ -385,8 +377,8 @@ static void ath_mci_msg(struct ath_softc *sc, u8 opcode, u8 *rx_payload)
|
|||
break;
|
||||
|
||||
default:
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI Unknown GPM COEX message = 0x%02x\n", opcode);
|
||||
ath_dbg(common, MCI, "MCI Unknown GPM COEX message = 0x%02x\n",
|
||||
opcode);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -425,10 +417,13 @@ int ath_mci_setup(struct ath_softc *sc)
|
|||
struct ath_mci_coex *mci = &sc->mci_coex;
|
||||
int error = 0;
|
||||
|
||||
if (!ATH9K_HW_CAP_MCI)
|
||||
return 0;
|
||||
|
||||
mci->sched_buf.bf_len = ATH_MCI_SCHED_BUF_SIZE + ATH_MCI_GPM_BUF_SIZE;
|
||||
|
||||
if (ath_mci_buf_alloc(sc, &mci->sched_buf)) {
|
||||
ath_dbg(common, ATH_DBG_FATAL, "MCI buffer alloc failed\n");
|
||||
ath_dbg(common, FATAL, "MCI buffer alloc failed\n");
|
||||
error = -ENOMEM;
|
||||
goto fail;
|
||||
}
|
||||
|
@ -458,6 +453,9 @@ void ath_mci_cleanup(struct ath_softc *sc)
|
|||
struct ath_hw *ah = sc->sc_ah;
|
||||
struct ath_mci_coex *mci = &sc->mci_coex;
|
||||
|
||||
if (!ATH9K_HW_CAP_MCI)
|
||||
return;
|
||||
|
||||
/*
|
||||
* both schedule and gpm buffers will be released
|
||||
*/
|
||||
|
@ -476,15 +474,17 @@ void ath_mci_intr(struct ath_softc *sc)
|
|||
u32 more_data = MCI_GPM_MORE;
|
||||
bool skip_gpm = false;
|
||||
|
||||
if (!ATH9K_HW_CAP_MCI)
|
||||
return;
|
||||
|
||||
ar9003_mci_get_interrupt(sc->sc_ah, &mci_int, &mci_int_rxmsg);
|
||||
|
||||
if (ar9003_mci_state(ah, MCI_STATE_ENABLE, NULL) == 0) {
|
||||
|
||||
ar9003_mci_state(sc->sc_ah, MCI_STATE_INIT_GPM_OFFSET, NULL);
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI interrupt but MCI disabled\n");
|
||||
ath_dbg(common, MCI, "MCI interrupt but MCI disabled\n");
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
ath_dbg(common, MCI,
|
||||
"MCI interrupt: intr = 0x%x, intr_rxmsg = 0x%x\n",
|
||||
mci_int, mci_int_rxmsg);
|
||||
return;
|
||||
|
@ -499,11 +499,11 @@ void ath_mci_intr(struct ath_softc *sc)
|
|||
* only when BT wake up. Now they are always sent, as a
|
||||
* recovery method to reset BT MCI's RX alignment.
|
||||
*/
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI interrupt send REMOTE_RESET\n");
|
||||
ath_dbg(common, MCI, "MCI interrupt send REMOTE_RESET\n");
|
||||
|
||||
ar9003_mci_send_message(ah, MCI_REMOTE_RESET, 0,
|
||||
payload, 16, true, false);
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI interrupt send SYS_WAKING\n");
|
||||
ath_dbg(common, MCI, "MCI interrupt send SYS_WAKING\n");
|
||||
ar9003_mci_send_message(ah, MCI_SYS_WAKING, 0,
|
||||
NULL, 0, true, false);
|
||||
|
||||
|
@ -513,7 +513,7 @@ void ath_mci_intr(struct ath_softc *sc)
|
|||
/*
|
||||
* always do this for recovery and 2G/5G toggling and LNA_TRANS
|
||||
*/
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI Set BT state to AWAKE.\n");
|
||||
ath_dbg(common, MCI, "MCI Set BT state to AWAKE\n");
|
||||
ar9003_mci_state(ah, MCI_STATE_SET_BT_AWAKE, NULL);
|
||||
}
|
||||
|
||||
|
@ -525,17 +525,16 @@ void ath_mci_intr(struct ath_softc *sc)
|
|||
|
||||
if (ar9003_mci_state(ah, MCI_STATE_REMOTE_SLEEP, NULL)
|
||||
== MCI_BT_SLEEP)
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
ath_dbg(common, MCI,
|
||||
"MCI BT stays in sleep mode\n");
|
||||
else {
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI Set BT state to AWAKE.\n");
|
||||
ath_dbg(common, MCI,
|
||||
"MCI Set BT state to AWAKE\n");
|
||||
ar9003_mci_state(ah,
|
||||
MCI_STATE_SET_BT_AWAKE, NULL);
|
||||
}
|
||||
} else
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI BT stays in AWAKE mode.\n");
|
||||
ath_dbg(common, MCI, "MCI BT stays in AWAKE mode\n");
|
||||
}
|
||||
|
||||
if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_SYS_SLEEPING) {
|
||||
|
@ -546,23 +545,22 @@ void ath_mci_intr(struct ath_softc *sc)
|
|||
|
||||
if (ar9003_mci_state(ah, MCI_STATE_REMOTE_SLEEP, NULL)
|
||||
== MCI_BT_AWAKE)
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI BT stays in AWAKE mode.\n");
|
||||
ath_dbg(common, MCI,
|
||||
"MCI BT stays in AWAKE mode\n");
|
||||
else {
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
ath_dbg(common, MCI,
|
||||
"MCI SetBT state to SLEEP\n");
|
||||
ar9003_mci_state(ah, MCI_STATE_SET_BT_SLEEP,
|
||||
NULL);
|
||||
}
|
||||
} else
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI BT stays in SLEEP mode\n");
|
||||
ath_dbg(common, MCI, "MCI BT stays in SLEEP mode\n");
|
||||
}
|
||||
|
||||
if ((mci_int & AR_MCI_INTERRUPT_RX_INVALID_HDR) ||
|
||||
(mci_int & AR_MCI_INTERRUPT_CONT_INFO_TIMEOUT)) {
|
||||
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI RX broken, skip GPM msgs\n");
|
||||
ath_dbg(common, MCI, "MCI RX broken, skip GPM msgs\n");
|
||||
ar9003_mci_state(ah, MCI_STATE_RECOVER_RX, NULL);
|
||||
skip_gpm = true;
|
||||
}
|
||||
|
@ -624,7 +622,7 @@ void ath_mci_intr(struct ath_softc *sc)
|
|||
|
||||
if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_LNA_INFO) {
|
||||
mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_LNA_INFO;
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI LNA_INFO\n");
|
||||
ath_dbg(common, MCI, "MCI LNA_INFO\n");
|
||||
}
|
||||
|
||||
if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_CONT_INFO) {
|
||||
|
@ -635,16 +633,14 @@ void ath_mci_intr(struct ath_softc *sc)
|
|||
mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_CONT_INFO;
|
||||
|
||||
if (ar9003_mci_state(ah, MCI_STATE_CONT_TXRX, NULL))
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI CONT_INFO: "
|
||||
"(tx) pri = %d, pwr = %d dBm\n",
|
||||
ath_dbg(common, MCI,
|
||||
"MCI CONT_INFO: (tx) pri = %d, pwr = %d dBm\n",
|
||||
ar9003_mci_state(ah,
|
||||
MCI_STATE_CONT_PRIORITY, NULL),
|
||||
value_dbm);
|
||||
else
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI CONT_INFO:"
|
||||
"(rx) pri = %d,pwr = %d dBm\n",
|
||||
ath_dbg(common, MCI,
|
||||
"MCI CONT_INFO: (rx) pri = %d,pwr = %d dBm\n",
|
||||
ar9003_mci_state(ah,
|
||||
MCI_STATE_CONT_PRIORITY, NULL),
|
||||
value_dbm);
|
||||
|
@ -652,12 +648,12 @@ void ath_mci_intr(struct ath_softc *sc)
|
|||
|
||||
if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_CONT_NACK) {
|
||||
mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_CONT_NACK;
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI CONT_NACK\n");
|
||||
ath_dbg(common, MCI, "MCI CONT_NACK\n");
|
||||
}
|
||||
|
||||
if (mci_int_rxmsg & AR_MCI_INTERRUPT_RX_MSG_CONT_RST) {
|
||||
mci_int_rxmsg &= ~AR_MCI_INTERRUPT_RX_MSG_CONT_RST;
|
||||
ath_dbg(common, ATH_DBG_MCI, "MCI CONT_RST\n");
|
||||
ath_dbg(common, MCI, "MCI CONT_RST\n");
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -667,7 +663,6 @@ void ath_mci_intr(struct ath_softc *sc)
|
|||
AR_MCI_INTERRUPT_CONT_INFO_TIMEOUT);
|
||||
|
||||
if (mci_int_rxmsg & 0xfffffffe)
|
||||
ath_dbg(common, ATH_DBG_MCI,
|
||||
"MCI not processed mci_int_rxmsg = 0x%x\n",
|
||||
ath_dbg(common, MCI, "MCI not processed mci_int_rxmsg = 0x%x\n",
|
||||
mci_int_rxmsg);
|
||||
}
|
||||
|
|
|
@ -121,7 +121,7 @@ static void ath_pci_aspm_init(struct ath_common *common)
|
|||
if (!parent)
|
||||
return;
|
||||
|
||||
if (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) {
|
||||
if (ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) {
|
||||
/* Bluetooth coexistance requires disabling ASPM. */
|
||||
pci_read_config_byte(pdev, pos + PCI_EXP_LNKCTL, &aspm);
|
||||
aspm &= ~(PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1);
|
||||
|
|
|
@ -1199,7 +1199,7 @@ struct ath_rate_table *ath_choose_rate_table(struct ath_softc *sc,
|
|||
return &ar5416_11na_ratetable;
|
||||
return &ar5416_11a_ratetable;
|
||||
default:
|
||||
ath_dbg(common, ATH_DBG_CONFIG, "Invalid band\n");
|
||||
ath_dbg(common, CONFIG, "Invalid band\n");
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
@ -1276,8 +1276,7 @@ static void ath_rc_init(struct ath_softc *sc,
|
|||
ath_rc_priv->valid_rate_index[k-1];
|
||||
ath_rc_priv->rate_table = rate_table;
|
||||
|
||||
ath_dbg(common, ATH_DBG_CONFIG,
|
||||
"RC Initialized with capabilities: 0x%x\n",
|
||||
ath_dbg(common, CONFIG, "RC Initialized with capabilities: 0x%x\n",
|
||||
ath_rc_priv->ht_cap);
|
||||
}
|
||||
|
||||
|
@ -1474,7 +1473,7 @@ static void ath_rate_update(void *priv, struct ieee80211_supported_band *sband,
|
|||
oper_cw40, oper_sgi);
|
||||
ath_rc_init(sc, priv_sta, sband, sta, rate_table);
|
||||
|
||||
ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
|
||||
ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG,
|
||||
"Operating HT Bandwidth changed to: %d\n",
|
||||
sc->hw->conf.channel_type);
|
||||
}
|
||||
|
|
|
@ -172,7 +172,7 @@ static void ath_rx_addbuffer_edma(struct ath_softc *sc,
|
|||
u32 nbuf = 0;
|
||||
|
||||
if (list_empty(&sc->rx.rxbuf)) {
|
||||
ath_dbg(common, ATH_DBG_QUEUE, "No free rx buf available\n");
|
||||
ath_dbg(common, QUEUE, "No free rx buf available\n");
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -337,7 +337,7 @@ int ath_rx_init(struct ath_softc *sc, int nbufs)
|
|||
if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
|
||||
return ath_rx_edma_init(sc, nbufs);
|
||||
} else {
|
||||
ath_dbg(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
|
||||
ath_dbg(common, CONFIG, "cachelsz %u rxbufsize %u\n",
|
||||
common->cachelsz, common->rx_bufsize);
|
||||
|
||||
/* Initialize rx descriptors */
|
||||
|
@ -591,7 +591,7 @@ static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
|
|||
|
||||
if (sc->ps_flags & PS_BEACON_SYNC) {
|
||||
sc->ps_flags &= ~PS_BEACON_SYNC;
|
||||
ath_dbg(common, ATH_DBG_PS,
|
||||
ath_dbg(common, PS,
|
||||
"Reconfigure Beacon timers based on timestamp from the AP\n");
|
||||
ath_set_beacon(sc);
|
||||
}
|
||||
|
@ -604,7 +604,7 @@ static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
|
|||
* a backup trigger for returning into NETWORK SLEEP state,
|
||||
* so we are waiting for it as well.
|
||||
*/
|
||||
ath_dbg(common, ATH_DBG_PS,
|
||||
ath_dbg(common, PS,
|
||||
"Received DTIM beacon indicating buffered broadcast/multicast frame(s)\n");
|
||||
sc->ps_flags |= PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON;
|
||||
return;
|
||||
|
@ -617,8 +617,7 @@ static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
|
|||
* been delivered.
|
||||
*/
|
||||
sc->ps_flags &= ~PS_WAIT_FOR_CAB;
|
||||
ath_dbg(common, ATH_DBG_PS,
|
||||
"PS wait for CAB frames timed out\n");
|
||||
ath_dbg(common, PS, "PS wait for CAB frames timed out\n");
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -643,13 +642,13 @@ static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb, bool mybeacon)
|
|||
* point.
|
||||
*/
|
||||
sc->ps_flags &= ~(PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON);
|
||||
ath_dbg(common, ATH_DBG_PS,
|
||||
ath_dbg(common, PS,
|
||||
"All PS CAB frames received, back to sleep\n");
|
||||
} else if ((sc->ps_flags & PS_WAIT_FOR_PSPOLL_DATA) &&
|
||||
!is_multicast_ether_addr(hdr->addr1) &&
|
||||
!ieee80211_has_morefrags(hdr->frame_control)) {
|
||||
sc->ps_flags &= ~PS_WAIT_FOR_PSPOLL_DATA;
|
||||
ath_dbg(common, ATH_DBG_PS,
|
||||
ath_dbg(common, PS,
|
||||
"Going back to sleep after having received PS-Poll data (0x%lx)\n",
|
||||
sc->ps_flags & (PS_WAIT_FOR_BEACON |
|
||||
PS_WAIT_FOR_CAB |
|
||||
|
@ -932,7 +931,7 @@ static int ath9k_process_rate(struct ath_common *common,
|
|||
* No valid hardware bitrate found -- we should not get here
|
||||
* because hardware has already validated this frame as OK.
|
||||
*/
|
||||
ath_dbg(common, ATH_DBG_ANY,
|
||||
ath_dbg(common, ANY,
|
||||
"unsupported hw bitrate detected 0x%02x using 1 Mbit\n",
|
||||
rx_stats->rs_rate);
|
||||
|
||||
|
|
|
@ -187,7 +187,7 @@ void ath9k_fatal_work(struct work_struct *work)
|
|||
fatal_work);
|
||||
struct ath_common *common = ath9k_hw_common(priv->ah);
|
||||
|
||||
ath_dbg(common, ATH_DBG_FATAL, "FATAL Event received, resetting device\n");
|
||||
ath_dbg(common, FATAL, "FATAL Event received, resetting device\n");
|
||||
ath9k_htc_reset(priv);
|
||||
}
|
||||
|
||||
|
@ -330,8 +330,7 @@ int ath9k_wmi_cmd(struct wmi *wmi, enum wmi_cmd_id cmd_id,
|
|||
|
||||
time_left = wait_for_completion_timeout(&wmi->cmd_wait, timeout);
|
||||
if (!time_left) {
|
||||
ath_dbg(common, ATH_DBG_WMI,
|
||||
"Timeout waiting for WMI command: %s\n",
|
||||
ath_dbg(common, WMI, "Timeout waiting for WMI command: %s\n",
|
||||
wmi_cmd_to_name(cmd_id));
|
||||
mutex_unlock(&wmi->op_mutex);
|
||||
return -ETIMEDOUT;
|
||||
|
@ -342,8 +341,7 @@ int ath9k_wmi_cmd(struct wmi *wmi, enum wmi_cmd_id cmd_id,
|
|||
return 0;
|
||||
|
||||
out:
|
||||
ath_dbg(common, ATH_DBG_WMI,
|
||||
"WMI failure for: %s\n", wmi_cmd_to_name(cmd_id));
|
||||
ath_dbg(common, WMI, "WMI failure for: %s\n", wmi_cmd_to_name(cmd_id));
|
||||
mutex_unlock(&wmi->op_mutex);
|
||||
kfree_skb(skb);
|
||||
|
||||
|
|
|
@ -104,6 +104,29 @@ static int ath_max_4ms_framelen[4][32] = {
|
|||
/* Aggregation logic */
|
||||
/*********************/
|
||||
|
||||
static void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq)
|
||||
{
|
||||
spin_lock_bh(&txq->axq_lock);
|
||||
}
|
||||
|
||||
static void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq)
|
||||
{
|
||||
spin_unlock_bh(&txq->axq_lock);
|
||||
}
|
||||
|
||||
static void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq)
|
||||
{
|
||||
struct sk_buff_head q;
|
||||
struct sk_buff *skb;
|
||||
|
||||
__skb_queue_head_init(&q);
|
||||
skb_queue_splice_init(&txq->complete_q, &q);
|
||||
spin_unlock_bh(&txq->axq_lock);
|
||||
|
||||
while ((skb = __skb_dequeue(&q)))
|
||||
ieee80211_tx_status(sc->hw, skb);
|
||||
}
|
||||
|
||||
static void ath_tx_queue_tid(struct ath_txq *txq, struct ath_atx_tid *tid)
|
||||
{
|
||||
struct ath_atx_ac *ac = tid->ac;
|
||||
|
@ -130,7 +153,7 @@ static void ath_tx_resume_tid(struct ath_softc *sc, struct ath_atx_tid *tid)
|
|||
|
||||
WARN_ON(!tid->paused);
|
||||
|
||||
spin_lock_bh(&txq->axq_lock);
|
||||
ath_txq_lock(sc, txq);
|
||||
tid->paused = false;
|
||||
|
||||
if (skb_queue_empty(&tid->buf_q))
|
||||
|
@ -139,7 +162,7 @@ static void ath_tx_resume_tid(struct ath_softc *sc, struct ath_atx_tid *tid)
|
|||
ath_tx_queue_tid(txq, tid);
|
||||
ath_txq_schedule(sc, txq);
|
||||
unlock:
|
||||
spin_unlock_bh(&txq->axq_lock);
|
||||
ath_txq_unlock_complete(sc, txq);
|
||||
}
|
||||
|
||||
static struct ath_frame_info *get_frame_info(struct sk_buff *skb)
|
||||
|
@ -189,8 +212,11 @@ static void ath_tx_flush_tid(struct ath_softc *sc, struct ath_atx_tid *tid)
|
|||
tid->state &= ~AGGR_CLEANUP;
|
||||
}
|
||||
|
||||
if (sendbar)
|
||||
if (sendbar) {
|
||||
ath_txq_unlock(sc, txq);
|
||||
ath_send_bar(tid, tid->seq_start);
|
||||
ath_txq_lock(sc, txq);
|
||||
}
|
||||
}
|
||||
|
||||
static void ath_tx_update_baw(struct ath_softc *sc, struct ath_atx_tid *tid,
|
||||
|
@ -554,13 +580,6 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
|
|||
bf = bf_next;
|
||||
}
|
||||
|
||||
if (bar_index >= 0) {
|
||||
u16 bar_seq = ATH_BA_INDEX2SEQ(seq_first, bar_index);
|
||||
ath_send_bar(tid, ATH_BA_INDEX2SEQ(seq_first, bar_index + 1));
|
||||
if (BAW_WITHIN(tid->seq_start, tid->baw_size, bar_seq))
|
||||
tid->bar_index = ATH_BA_INDEX(tid->seq_start, bar_seq);
|
||||
}
|
||||
|
||||
/* prepend un-acked frames to the beginning of the pending frame queue */
|
||||
if (!skb_queue_empty(&bf_pending)) {
|
||||
if (an->sleeping)
|
||||
|
@ -575,6 +594,17 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
|
|||
}
|
||||
}
|
||||
|
||||
if (bar_index >= 0) {
|
||||
u16 bar_seq = ATH_BA_INDEX2SEQ(seq_first, bar_index);
|
||||
|
||||
if (BAW_WITHIN(tid->seq_start, tid->baw_size, bar_seq))
|
||||
tid->bar_index = ATH_BA_INDEX(tid->seq_start, bar_seq);
|
||||
|
||||
ath_txq_unlock(sc, txq);
|
||||
ath_send_bar(tid, ATH_BA_INDEX2SEQ(seq_first, bar_index + 1));
|
||||
ath_txq_lock(sc, txq);
|
||||
}
|
||||
|
||||
if (tid->state & AGGR_CLEANUP)
|
||||
ath_tx_flush_tid(sc, tid);
|
||||
|
||||
|
@ -1172,7 +1202,7 @@ void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid)
|
|||
return;
|
||||
}
|
||||
|
||||
spin_lock_bh(&txq->axq_lock);
|
||||
ath_txq_lock(sc, txq);
|
||||
txtid->paused = true;
|
||||
|
||||
/*
|
||||
|
@ -1187,7 +1217,7 @@ void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid)
|
|||
txtid->state &= ~AGGR_ADDBA_COMPLETE;
|
||||
|
||||
ath_tx_flush_tid(sc, txtid);
|
||||
spin_unlock_bh(&txq->axq_lock);
|
||||
ath_txq_unlock_complete(sc, txq);
|
||||
}
|
||||
|
||||
void ath_tx_aggr_sleep(struct ieee80211_sta *sta, struct ath_softc *sc,
|
||||
|
@ -1208,7 +1238,7 @@ void ath_tx_aggr_sleep(struct ieee80211_sta *sta, struct ath_softc *sc,
|
|||
ac = tid->ac;
|
||||
txq = ac->txq;
|
||||
|
||||
spin_lock_bh(&txq->axq_lock);
|
||||
ath_txq_lock(sc, txq);
|
||||
|
||||
buffered = !skb_queue_empty(&tid->buf_q);
|
||||
|
||||
|
@ -1220,7 +1250,7 @@ void ath_tx_aggr_sleep(struct ieee80211_sta *sta, struct ath_softc *sc,
|
|||
list_del(&ac->list);
|
||||
}
|
||||
|
||||
spin_unlock_bh(&txq->axq_lock);
|
||||
ath_txq_unlock(sc, txq);
|
||||
|
||||
ieee80211_sta_set_buffered(sta, tidno, buffered);
|
||||
}
|
||||
|
@ -1239,7 +1269,7 @@ void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an)
|
|||
ac = tid->ac;
|
||||
txq = ac->txq;
|
||||
|
||||
spin_lock_bh(&txq->axq_lock);
|
||||
ath_txq_lock(sc, txq);
|
||||
ac->clear_ps_filter = true;
|
||||
|
||||
if (!skb_queue_empty(&tid->buf_q) && !tid->paused) {
|
||||
|
@ -1247,7 +1277,7 @@ void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an)
|
|||
ath_txq_schedule(sc, txq);
|
||||
}
|
||||
|
||||
spin_unlock_bh(&txq->axq_lock);
|
||||
ath_txq_unlock_complete(sc, txq);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -1347,6 +1377,7 @@ struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype)
|
|||
txq->axq_qnum = axq_qnum;
|
||||
txq->mac80211_qnum = -1;
|
||||
txq->axq_link = NULL;
|
||||
__skb_queue_head_init(&txq->complete_q);
|
||||
INIT_LIST_HEAD(&txq->axq_q);
|
||||
INIT_LIST_HEAD(&txq->axq_acq);
|
||||
spin_lock_init(&txq->axq_lock);
|
||||
|
@ -1471,7 +1502,8 @@ static void ath_drain_txq_list(struct ath_softc *sc, struct ath_txq *txq,
|
|||
*/
|
||||
void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq, bool retry_tx)
|
||||
{
|
||||
spin_lock_bh(&txq->axq_lock);
|
||||
ath_txq_lock(sc, txq);
|
||||
|
||||
if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
|
||||
int idx = txq->txq_tailidx;
|
||||
|
||||
|
@ -1492,7 +1524,7 @@ void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq, bool retry_tx)
|
|||
if ((sc->sc_flags & SC_OP_TXAGGR) && !retry_tx)
|
||||
ath_txq_drain_pending_buffers(sc, txq);
|
||||
|
||||
spin_unlock_bh(&txq->axq_lock);
|
||||
ath_txq_unlock_complete(sc, txq);
|
||||
}
|
||||
|
||||
bool ath_drain_all_txq(struct ath_softc *sc, bool retry_tx)
|
||||
|
@ -1626,8 +1658,8 @@ static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq,
|
|||
bf = list_first_entry(head, struct ath_buf, list);
|
||||
bf_last = list_entry(head->prev, struct ath_buf, list);
|
||||
|
||||
ath_dbg(common, ATH_DBG_QUEUE,
|
||||
"qnum: %d, txq depth: %d\n", txq->axq_qnum, txq->axq_depth);
|
||||
ath_dbg(common, QUEUE, "qnum: %d, txq depth: %d\n",
|
||||
txq->axq_qnum, txq->axq_depth);
|
||||
|
||||
if (edma && list_empty(&txq->txq_fifo[txq->txq_headidx])) {
|
||||
list_splice_tail_init(head, &txq->txq_fifo[txq->txq_headidx]);
|
||||
|
@ -1638,8 +1670,7 @@ static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq,
|
|||
|
||||
if (txq->axq_link) {
|
||||
ath9k_hw_set_desc_link(ah, txq->axq_link, bf->bf_daddr);
|
||||
ath_dbg(common, ATH_DBG_XMIT,
|
||||
"link[%u] (%p)=%llx (%p)\n",
|
||||
ath_dbg(common, XMIT, "link[%u] (%p)=%llx (%p)\n",
|
||||
txq->axq_qnum, txq->axq_link,
|
||||
ito64(bf->bf_daddr), bf->bf_desc);
|
||||
} else if (!edma)
|
||||
|
@ -1651,7 +1682,7 @@ static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq,
|
|||
if (puttxbuf) {
|
||||
TX_STAT_INC(txq->axq_qnum, puttxbuf);
|
||||
ath9k_hw_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
|
||||
ath_dbg(common, ATH_DBG_XMIT, "TXDP[%u] = %llx (%p)\n",
|
||||
ath_dbg(common, XMIT, "TXDP[%u] = %llx (%p)\n",
|
||||
txq->axq_qnum, ito64(bf->bf_daddr), bf->bf_desc);
|
||||
}
|
||||
|
||||
|
@ -1793,7 +1824,7 @@ static struct ath_buf *ath_tx_setup_buffer(struct ath_softc *sc,
|
|||
|
||||
bf = ath_tx_get_buffer(sc);
|
||||
if (!bf) {
|
||||
ath_dbg(common, ATH_DBG_XMIT, "TX buffers are full\n");
|
||||
ath_dbg(common, XMIT, "TX buffers are full\n");
|
||||
goto error;
|
||||
}
|
||||
|
||||
|
@ -1925,7 +1956,8 @@ int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
|
|||
*/
|
||||
|
||||
q = skb_get_queue_mapping(skb);
|
||||
spin_lock_bh(&txq->axq_lock);
|
||||
|
||||
ath_txq_lock(sc, txq);
|
||||
if (txq == sc->tx.txq_map[q] &&
|
||||
++txq->pending_frames > ATH_MAX_QDEPTH && !txq->stopped) {
|
||||
ieee80211_stop_queue(sc->hw, q);
|
||||
|
@ -1934,7 +1966,7 @@ int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
|
|||
|
||||
ath_tx_start_dma(sc, skb, txctl);
|
||||
|
||||
spin_unlock_bh(&txq->axq_lock);
|
||||
ath_txq_unlock(sc, txq);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -1946,13 +1978,12 @@ int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
|
|||
static void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
|
||||
int tx_flags, struct ath_txq *txq)
|
||||
{
|
||||
struct ieee80211_hw *hw = sc->hw;
|
||||
struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
|
||||
struct ath_common *common = ath9k_hw_common(sc->sc_ah);
|
||||
struct ieee80211_hdr * hdr = (struct ieee80211_hdr *)skb->data;
|
||||
int q, padpos, padsize;
|
||||
|
||||
ath_dbg(common, ATH_DBG_XMIT, "TX complete: skb: %p\n", skb);
|
||||
ath_dbg(common, XMIT, "TX complete: skb: %p\n", skb);
|
||||
|
||||
if (!(tx_flags & ATH_TX_ERROR))
|
||||
/* Frame was ACKed */
|
||||
|
@ -1971,7 +2002,7 @@ static void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
|
|||
|
||||
if ((sc->ps_flags & PS_WAIT_FOR_TX_ACK) && !txq->axq_depth) {
|
||||
sc->ps_flags &= ~PS_WAIT_FOR_TX_ACK;
|
||||
ath_dbg(common, ATH_DBG_PS,
|
||||
ath_dbg(common, PS,
|
||||
"Going back to sleep after having received TX status (0x%lx)\n",
|
||||
sc->ps_flags & (PS_WAIT_FOR_BEACON |
|
||||
PS_WAIT_FOR_CAB |
|
||||
|
@ -1990,7 +2021,7 @@ static void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
|
|||
}
|
||||
}
|
||||
|
||||
ieee80211_tx_status(hw, skb);
|
||||
__skb_queue_tail(&txq->complete_q, skb);
|
||||
}
|
||||
|
||||
static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf,
|
||||
|
@ -2122,11 +2153,11 @@ static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
|
|||
struct ath_tx_status ts;
|
||||
int status;
|
||||
|
||||
ath_dbg(common, ATH_DBG_QUEUE, "tx queue %d (%x), link %p\n",
|
||||
ath_dbg(common, QUEUE, "tx queue %d (%x), link %p\n",
|
||||
txq->axq_qnum, ath9k_hw_gettxbuf(sc->sc_ah, txq->axq_qnum),
|
||||
txq->axq_link);
|
||||
|
||||
spin_lock_bh(&txq->axq_lock);
|
||||
ath_txq_lock(sc, txq);
|
||||
for (;;) {
|
||||
if (work_pending(&sc->hw_reset_work))
|
||||
break;
|
||||
|
@ -2185,7 +2216,7 @@ static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
|
|||
|
||||
ath_tx_process_buffer(sc, txq, &ts, bf, &bf_head);
|
||||
}
|
||||
spin_unlock_bh(&txq->axq_lock);
|
||||
ath_txq_unlock_complete(sc, txq);
|
||||
}
|
||||
|
||||
static void ath_tx_complete_poll_work(struct work_struct *work)
|
||||
|
@ -2202,21 +2233,21 @@ static void ath_tx_complete_poll_work(struct work_struct *work)
|
|||
for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
|
||||
if (ATH_TXQ_SETUP(sc, i)) {
|
||||
txq = &sc->tx.txq[i];
|
||||
spin_lock_bh(&txq->axq_lock);
|
||||
ath_txq_lock(sc, txq);
|
||||
if (txq->axq_depth) {
|
||||
if (txq->axq_tx_inprogress) {
|
||||
needreset = true;
|
||||
spin_unlock_bh(&txq->axq_lock);
|
||||
ath_txq_unlock(sc, txq);
|
||||
break;
|
||||
} else {
|
||||
txq->axq_tx_inprogress = true;
|
||||
}
|
||||
}
|
||||
spin_unlock_bh(&txq->axq_lock);
|
||||
ath_txq_unlock_complete(sc, txq);
|
||||
}
|
||||
|
||||
if (needreset) {
|
||||
ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_RESET,
|
||||
ath_dbg(ath9k_hw_common(sc->sc_ah), RESET,
|
||||
"tx hung, resetting the chip\n");
|
||||
RESET_STAT_INC(sc, RESET_TYPE_TX_HANG);
|
||||
ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
|
||||
|
@ -2259,8 +2290,7 @@ void ath_tx_edma_tasklet(struct ath_softc *sc)
|
|||
if (status == -EINPROGRESS)
|
||||
break;
|
||||
if (status == -EIO) {
|
||||
ath_dbg(common, ATH_DBG_XMIT,
|
||||
"Error processing tx status\n");
|
||||
ath_dbg(common, XMIT, "Error processing tx status\n");
|
||||
break;
|
||||
}
|
||||
|
||||
|
@ -2270,10 +2300,10 @@ void ath_tx_edma_tasklet(struct ath_softc *sc)
|
|||
|
||||
txq = &sc->tx.txq[ts.qid];
|
||||
|
||||
spin_lock_bh(&txq->axq_lock);
|
||||
ath_txq_lock(sc, txq);
|
||||
|
||||
if (list_empty(&txq->txq_fifo[txq->txq_tailidx])) {
|
||||
spin_unlock_bh(&txq->axq_lock);
|
||||
ath_txq_unlock(sc, txq);
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -2299,7 +2329,7 @@ void ath_tx_edma_tasklet(struct ath_softc *sc)
|
|||
}
|
||||
|
||||
ath_tx_process_buffer(sc, txq, &ts, bf, &bf_head);
|
||||
spin_unlock_bh(&txq->axq_lock);
|
||||
ath_txq_unlock_complete(sc, txq);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -2437,7 +2467,7 @@ void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an)
|
|||
ac = tid->ac;
|
||||
txq = ac->txq;
|
||||
|
||||
spin_lock_bh(&txq->axq_lock);
|
||||
ath_txq_lock(sc, txq);
|
||||
|
||||
if (tid->sched) {
|
||||
list_del(&tid->list);
|
||||
|
@ -2453,6 +2483,6 @@ void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an)
|
|||
tid->state &= ~AGGR_ADDBA_COMPLETE;
|
||||
tid->state &= ~AGGR_CLEANUP;
|
||||
|
||||
spin_unlock_bh(&txq->axq_lock);
|
||||
ath_txq_unlock(sc, txq);
|
||||
}
|
||||
}
|
||||
|
|
|
@ -143,7 +143,7 @@ static bool ath_hw_set_keycache_entry(struct ath_common *common, u16 entry,
|
|||
break;
|
||||
case ATH_CIPHER_AES_CCM:
|
||||
if (!(common->crypt_caps & ATH_CRYPT_CAP_CIPHER_AESCCM)) {
|
||||
ath_dbg(common, ATH_DBG_ANY,
|
||||
ath_dbg(common, ANY,
|
||||
"AES-CCM not supported by this mac rev\n");
|
||||
return false;
|
||||
}
|
||||
|
@ -152,15 +152,15 @@ static bool ath_hw_set_keycache_entry(struct ath_common *common, u16 entry,
|
|||
case ATH_CIPHER_TKIP:
|
||||
keyType = AR_KEYTABLE_TYPE_TKIP;
|
||||
if (entry + 64 >= common->keymax) {
|
||||
ath_dbg(common, ATH_DBG_ANY,
|
||||
ath_dbg(common, ANY,
|
||||
"entry %u inappropriate for TKIP\n", entry);
|
||||
return false;
|
||||
}
|
||||
break;
|
||||
case ATH_CIPHER_WEP:
|
||||
if (k->kv_len < WLAN_KEY_LEN_WEP40) {
|
||||
ath_dbg(common, ATH_DBG_ANY,
|
||||
"WEP key length %u too small\n", k->kv_len);
|
||||
ath_dbg(common, ANY, "WEP key length %u too small\n",
|
||||
k->kv_len);
|
||||
return false;
|
||||
}
|
||||
if (k->kv_len <= WLAN_KEY_LEN_WEP40)
|
||||
|
|
|
@ -667,6 +667,7 @@ struct b43_key {
|
|||
};
|
||||
|
||||
/* SHM offsets to the QOS data structures for the 4 different queues. */
|
||||
#define B43_QOS_QUEUE_NUM 4
|
||||
#define B43_QOS_PARAMS(queue) (B43_SHM_SH_EDCFQ + \
|
||||
(B43_NR_QOSPARAMS * sizeof(u16) * (queue)))
|
||||
#define B43_QOS_BACKGROUND B43_QOS_PARAMS(0)
|
||||
|
@ -904,7 +905,7 @@ struct b43_wl {
|
|||
struct work_struct beacon_update_trigger;
|
||||
|
||||
/* The current QOS parameters for the 4 queues. */
|
||||
struct b43_qos_params qos_params[4];
|
||||
struct b43_qos_params qos_params[B43_QOS_QUEUE_NUM];
|
||||
|
||||
/* Work for adjustment of the transmission power.
|
||||
* This is scheduled when we determine that the actual TX output
|
||||
|
@ -913,8 +914,12 @@ struct b43_wl {
|
|||
|
||||
/* Packet transmit work */
|
||||
struct work_struct tx_work;
|
||||
|
||||
/* Queue of packets to be transmitted. */
|
||||
struct sk_buff_head tx_queue;
|
||||
struct sk_buff_head tx_queue[B43_QOS_QUEUE_NUM];
|
||||
|
||||
/* Flag that implement the queues stopping. */
|
||||
bool tx_queue_stopped[B43_QOS_QUEUE_NUM];
|
||||
|
||||
/* The device LEDs. */
|
||||
struct b43_leds leds;
|
||||
|
|
|
@ -1465,7 +1465,9 @@ int b43_dma_tx(struct b43_wldev *dev, struct sk_buff *skb)
|
|||
if ((free_slots(ring) < TX_SLOTS_PER_FRAME) ||
|
||||
should_inject_overflow(ring)) {
|
||||
/* This TX ring is full. */
|
||||
ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb));
|
||||
unsigned int skb_mapping = skb_get_queue_mapping(skb);
|
||||
ieee80211_stop_queue(dev->wl->hw, skb_mapping);
|
||||
dev->wl->tx_queue_stopped[skb_mapping] = 1;
|
||||
ring->stopped = true;
|
||||
if (b43_debug(dev, B43_DBG_DMAVERBOSE)) {
|
||||
b43dbg(dev->wl, "Stopped TX ring %d\n", ring->index);
|
||||
|
@ -1584,12 +1586,21 @@ void b43_dma_handle_txstatus(struct b43_wldev *dev,
|
|||
}
|
||||
if (ring->stopped) {
|
||||
B43_WARN_ON(free_slots(ring) < TX_SLOTS_PER_FRAME);
|
||||
ieee80211_wake_queue(dev->wl->hw, ring->queue_prio);
|
||||
ring->stopped = false;
|
||||
}
|
||||
|
||||
if (dev->wl->tx_queue_stopped[ring->queue_prio]) {
|
||||
dev->wl->tx_queue_stopped[ring->queue_prio] = 0;
|
||||
} else {
|
||||
/* If the driver queue is running wake the corresponding
|
||||
* mac80211 queue. */
|
||||
ieee80211_wake_queue(dev->wl->hw, ring->queue_prio);
|
||||
if (b43_debug(dev, B43_DBG_DMAVERBOSE)) {
|
||||
b43dbg(dev->wl, "Woke up TX ring %d\n", ring->index);
|
||||
}
|
||||
}
|
||||
/* Add work to the queue. */
|
||||
ieee80211_queue_work(dev->wl->hw, &dev->wl->tx_work);
|
||||
}
|
||||
|
||||
static void dma_rx(struct b43_dmaring *ring, int *slot)
|
||||
|
|
|
@ -3378,6 +3378,7 @@ static void b43_tx_work(struct work_struct *work)
|
|||
struct b43_wl *wl = container_of(work, struct b43_wl, tx_work);
|
||||
struct b43_wldev *dev;
|
||||
struct sk_buff *skb;
|
||||
int queue_num;
|
||||
int err = 0;
|
||||
|
||||
mutex_lock(&wl->mutex);
|
||||
|
@ -3387,15 +3388,26 @@ static void b43_tx_work(struct work_struct *work)
|
|||
return;
|
||||
}
|
||||
|
||||
while (skb_queue_len(&wl->tx_queue)) {
|
||||
skb = skb_dequeue(&wl->tx_queue);
|
||||
|
||||
for (queue_num = 0; queue_num < B43_QOS_QUEUE_NUM; queue_num++) {
|
||||
while (skb_queue_len(&wl->tx_queue[queue_num])) {
|
||||
skb = skb_dequeue(&wl->tx_queue[queue_num]);
|
||||
if (b43_using_pio_transfers(dev))
|
||||
err = b43_pio_tx(dev, skb);
|
||||
else
|
||||
err = b43_dma_tx(dev, skb);
|
||||
if (err == -ENOSPC) {
|
||||
wl->tx_queue_stopped[queue_num] = 1;
|
||||
ieee80211_stop_queue(wl->hw, queue_num);
|
||||
skb_queue_head(&wl->tx_queue[queue_num], skb);
|
||||
break;
|
||||
}
|
||||
if (unlikely(err))
|
||||
dev_kfree_skb(skb); /* Drop it */
|
||||
err = 0;
|
||||
}
|
||||
|
||||
if (!err)
|
||||
wl->tx_queue_stopped[queue_num] = 0;
|
||||
}
|
||||
|
||||
#if B43_DEBUG
|
||||
|
@ -3416,8 +3428,12 @@ static void b43_op_tx(struct ieee80211_hw *hw,
|
|||
}
|
||||
B43_WARN_ON(skb_shinfo(skb)->nr_frags);
|
||||
|
||||
skb_queue_tail(&wl->tx_queue, skb);
|
||||
skb_queue_tail(&wl->tx_queue[skb->queue_mapping], skb);
|
||||
if (!wl->tx_queue_stopped[skb->queue_mapping]) {
|
||||
ieee80211_queue_work(wl->hw, &wl->tx_work);
|
||||
} else {
|
||||
ieee80211_stop_queue(wl->hw, skb->queue_mapping);
|
||||
}
|
||||
}
|
||||
|
||||
static void b43_qos_params_upload(struct b43_wldev *dev,
|
||||
|
@ -4147,6 +4163,7 @@ static struct b43_wldev * b43_wireless_core_stop(struct b43_wldev *dev)
|
|||
struct b43_wl *wl;
|
||||
struct b43_wldev *orig_dev;
|
||||
u32 mask;
|
||||
int queue_num;
|
||||
|
||||
if (!dev)
|
||||
return NULL;
|
||||
|
@ -4199,9 +4216,11 @@ redo:
|
|||
mask = b43_read32(dev, B43_MMIO_GEN_IRQ_MASK);
|
||||
B43_WARN_ON(mask != 0xFFFFFFFF && mask);
|
||||
|
||||
/* Drain the TX queue */
|
||||
while (skb_queue_len(&wl->tx_queue))
|
||||
dev_kfree_skb(skb_dequeue(&wl->tx_queue));
|
||||
/* Drain all TX queues. */
|
||||
for (queue_num = 0; queue_num < B43_QOS_QUEUE_NUM; queue_num++) {
|
||||
while (skb_queue_len(&wl->tx_queue[queue_num]))
|
||||
dev_kfree_skb(skb_dequeue(&wl->tx_queue[queue_num]));
|
||||
}
|
||||
|
||||
b43_mac_suspend(dev);
|
||||
b43_leds_exit(dev);
|
||||
|
@ -5245,6 +5264,7 @@ static struct b43_wl *b43_wireless_init(struct b43_bus_dev *dev)
|
|||
struct ieee80211_hw *hw;
|
||||
struct b43_wl *wl;
|
||||
char chip_name[6];
|
||||
int queue_num;
|
||||
|
||||
hw = ieee80211_alloc_hw(sizeof(*wl), &b43_hw_ops);
|
||||
if (!hw) {
|
||||
|
@ -5264,7 +5284,7 @@ static struct b43_wl *b43_wireless_init(struct b43_bus_dev *dev)
|
|||
BIT(NL80211_IFTYPE_WDS) |
|
||||
BIT(NL80211_IFTYPE_ADHOC);
|
||||
|
||||
hw->queues = modparam_qos ? 4 : 1;
|
||||
hw->queues = modparam_qos ? B43_QOS_QUEUE_NUM : 1;
|
||||
wl->mac80211_initially_registered_queues = hw->queues;
|
||||
hw->max_rates = 2;
|
||||
SET_IEEE80211_DEV(hw, dev->dev);
|
||||
|
@ -5281,7 +5301,12 @@ static struct b43_wl *b43_wireless_init(struct b43_bus_dev *dev)
|
|||
INIT_WORK(&wl->beacon_update_trigger, b43_beacon_update_trigger_work);
|
||||
INIT_WORK(&wl->txpower_adjust_work, b43_phy_txpower_adjust_work);
|
||||
INIT_WORK(&wl->tx_work, b43_tx_work);
|
||||
skb_queue_head_init(&wl->tx_queue);
|
||||
|
||||
/* Initialize queues and flags. */
|
||||
for (queue_num = 0; queue_num < B43_QOS_QUEUE_NUM; queue_num++) {
|
||||
skb_queue_head_init(&wl->tx_queue[queue_num]);
|
||||
wl->tx_queue_stopped[queue_num] = 0;
|
||||
}
|
||||
|
||||
snprintf(chip_name, ARRAY_SIZE(chip_name),
|
||||
(dev->chip_id > 0x9999) ? "%d" : "%04X", dev->chip_id);
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -17,16 +17,26 @@ config BRCMSMAC
|
|||
|
||||
config BRCMFMAC
|
||||
tristate "Broadcom IEEE802.11n embedded FullMAC WLAN driver"
|
||||
depends on MMC
|
||||
depends on CFG80211
|
||||
select BRCMUTIL
|
||||
select FW_LOADER
|
||||
---help---
|
||||
This module adds support for embedded wireless adapters based on
|
||||
Broadcom IEEE802.11n FullMAC chipsets. This driver uses the kernel's
|
||||
wireless extensions subsystem. If you choose to build a module,
|
||||
Broadcom IEEE802.11n FullMAC chipsets. It has to work with at least
|
||||
one of the bus interface support. If you choose to build a module,
|
||||
it'll be called brcmfmac.ko.
|
||||
|
||||
config BRCMFMAC_SDIO
|
||||
bool "SDIO bus interface support for FullMAC"
|
||||
depends on MMC
|
||||
depends on BRCMFMAC
|
||||
select FW_LOADER
|
||||
default y
|
||||
---help---
|
||||
This option enables the SDIO bus interface support for Broadcom
|
||||
FullMAC WLAN driver.
|
||||
Say Y if you want to use brcmfmac for a compatible SDIO interface
|
||||
wireless card.
|
||||
|
||||
config BRCMDBG
|
||||
bool "Broadcom driver debug functions"
|
||||
depends on BRCMSMAC || BRCMFMAC
|
||||
|
|
|
@ -19,16 +19,16 @@ ccflags-y += \
|
|||
-Idrivers/net/wireless/brcm80211/brcmfmac \
|
||||
-Idrivers/net/wireless/brcm80211/include
|
||||
|
||||
DHDOFILES = \
|
||||
obj-$(CONFIG_BRCMFMAC) += brcmfmac.o
|
||||
brcmfmac-objs += \
|
||||
wl_cfg80211.o \
|
||||
dhd_cdc.o \
|
||||
dhd_common.o \
|
||||
dhd_linux.o
|
||||
brcmfmac-$(CONFIG_BRCMFMAC_SDIO) += \
|
||||
dhd_sdio.o \
|
||||
dhd_linux.o \
|
||||
bcmsdh.o \
|
||||
bcmsdh_sdmmc.o \
|
||||
sdio_chip.o
|
||||
|
||||
obj-$(CONFIG_BRCMFMAC) += brcmfmac.o
|
||||
brcmfmac-objs += $(DHDOFILES)
|
||||
ccflags-y += -D__CHECK_ENDIAN__
|
||||
|
|
|
@ -31,7 +31,6 @@
|
|||
#include <brcmu_utils.h>
|
||||
#include <brcmu_wifi.h>
|
||||
#include <soc.h>
|
||||
#include "dhd.h"
|
||||
#include "dhd_bus.h"
|
||||
#include "dhd_dbg.h"
|
||||
#include "sdio_host.h"
|
||||
|
@ -51,12 +50,18 @@ static void brcmf_sdioh_irqhandler(struct sdio_func *func)
|
|||
sdio_claim_host(func);
|
||||
}
|
||||
|
||||
/* dummy handler for SDIO function 2 interrupt */
|
||||
static void brcmf_sdioh_dummy_irq_handler(struct sdio_func *func)
|
||||
{
|
||||
}
|
||||
|
||||
int brcmf_sdcard_intr_reg(struct brcmf_sdio_dev *sdiodev)
|
||||
{
|
||||
brcmf_dbg(TRACE, "Entering\n");
|
||||
|
||||
sdio_claim_host(sdiodev->func[1]);
|
||||
sdio_claim_irq(sdiodev->func[1], brcmf_sdioh_irqhandler);
|
||||
sdio_claim_irq(sdiodev->func[2], brcmf_sdioh_dummy_irq_handler);
|
||||
sdio_release_host(sdiodev->func[1]);
|
||||
|
||||
return 0;
|
||||
|
@ -67,6 +72,7 @@ int brcmf_sdcard_intr_dereg(struct brcmf_sdio_dev *sdiodev)
|
|||
brcmf_dbg(TRACE, "Entering\n");
|
||||
|
||||
sdio_claim_host(sdiodev->func[1]);
|
||||
sdio_release_irq(sdiodev->func[2]);
|
||||
sdio_release_irq(sdiodev->func[1]);
|
||||
sdio_release_host(sdiodev->func[1]);
|
||||
|
||||
|
|
|
@ -31,9 +31,8 @@
|
|||
#include <brcmu_utils.h>
|
||||
#include <brcmu_wifi.h>
|
||||
#include "sdio_host.h"
|
||||
#include "dhd.h"
|
||||
#include "dhd_dbg.h"
|
||||
#include "wl_cfg80211.h"
|
||||
#include "dhd_bus.h"
|
||||
|
||||
#define SDIO_VENDOR_ID_BROADCOM 0x02d0
|
||||
|
||||
|
@ -488,6 +487,7 @@ static int brcmf_ops_sdio_probe(struct sdio_func *func,
|
|||
sdiodev->bus_if = bus_if;
|
||||
bus_if->bus_priv = sdiodev;
|
||||
bus_if->type = SDIO_BUS;
|
||||
bus_if->align = BRCMF_SDALIGN;
|
||||
dev_set_drvdata(&func->card->dev, sdiodev);
|
||||
|
||||
atomic_set(&sdiodev->suspend, false);
|
||||
|
|
|
@ -156,18 +156,6 @@ struct brcmf_event {
|
|||
struct brcmf_event_msg msg;
|
||||
} __packed;
|
||||
|
||||
struct dngl_stats {
|
||||
unsigned long rx_packets; /* total packets received */
|
||||
unsigned long tx_packets; /* total packets transmitted */
|
||||
unsigned long rx_bytes; /* total bytes received */
|
||||
unsigned long tx_bytes; /* total bytes transmitted */
|
||||
unsigned long rx_errors; /* bad packets received */
|
||||
unsigned long tx_errors; /* packet transmit problems */
|
||||
unsigned long rx_dropped; /* packets dropped by dongle */
|
||||
unsigned long tx_dropped; /* packets dropped by dongle */
|
||||
unsigned long multicast; /* multicast packets received */
|
||||
};
|
||||
|
||||
/* event codes sent by the dongle to this driver */
|
||||
#define BRCMF_E_SET_SSID 0
|
||||
#define BRCMF_E_JOIN 1
|
||||
|
@ -317,13 +305,6 @@ struct dngl_stats {
|
|||
#define BRCMF_E_LINK_ASSOC_REC 3
|
||||
#define BRCMF_E_LINK_BSSCFG_DIS 4
|
||||
|
||||
/* The level of bus communication with the dongle */
|
||||
enum brcmf_bus_state {
|
||||
BRCMF_BUS_DOWN, /* Not ready for frame transfers */
|
||||
BRCMF_BUS_LOAD, /* Download access only (CPU reset) */
|
||||
BRCMF_BUS_DATA /* Ready for frame transfers */
|
||||
};
|
||||
|
||||
/* Pattern matching filter. Specifies an offset within received packets to
|
||||
* start matching, the pattern to match, the size of the pattern, and a bitmask
|
||||
* that indicates which bits within the pattern should be matched.
|
||||
|
@ -571,33 +552,20 @@ struct brcmf_dcmd {
|
|||
uint needed; /* bytes needed (optional) */
|
||||
};
|
||||
|
||||
struct brcmf_bus {
|
||||
u8 type; /* bus type */
|
||||
void *bus_priv; /* pointer to bus private structure */
|
||||
enum brcmf_bus_state state;
|
||||
};
|
||||
|
||||
/* Forward decls for struct brcmf_pub (see below) */
|
||||
struct brcmf_sdio; /* device bus info */
|
||||
struct brcmf_proto; /* device communication protocol info */
|
||||
struct brcmf_info; /* device driver info */
|
||||
struct brcmf_cfg80211_dev; /* cfg80211 device info */
|
||||
|
||||
/* Common structure for module and instance linkage */
|
||||
struct brcmf_pub {
|
||||
/* Linkage ponters */
|
||||
struct brcmf_sdio *bus;
|
||||
struct brcmf_bus *bus_if;
|
||||
struct brcmf_proto *prot;
|
||||
struct brcmf_info *info;
|
||||
struct brcmf_cfg80211_dev *config;
|
||||
struct device *dev; /* fullmac dongle device pointer */
|
||||
|
||||
/* Internal brcmf items */
|
||||
bool up; /* Driver up/down (to OS) */
|
||||
bool txoff; /* Transmit flow-controlled */
|
||||
uint hdrlen; /* Total BRCMF header length (proto + bus) */
|
||||
uint maxctl; /* Max size rxctl request from proto to bus */
|
||||
uint rxsz; /* Rx buffer size bus module should use */
|
||||
u8 wme_dp; /* wme discard priority */
|
||||
|
||||
|
@ -605,48 +573,21 @@ struct brcmf_pub {
|
|||
bool iswl; /* Dongle-resident driver is wl */
|
||||
unsigned long drv_version; /* Version of dongle-resident driver */
|
||||
u8 mac[ETH_ALEN]; /* MAC address obtained from dongle */
|
||||
struct dngl_stats dstats; /* Stats for dongle-based data */
|
||||
|
||||
/* Additional stats for the bus level */
|
||||
|
||||
/* Data packets sent to dongle */
|
||||
unsigned long tx_packets;
|
||||
/* Multicast data packets sent to dongle */
|
||||
unsigned long tx_multicast;
|
||||
/* Errors in sending data to dongle */
|
||||
unsigned long tx_errors;
|
||||
/* Control packets sent to dongle */
|
||||
unsigned long tx_ctlpkts;
|
||||
/* Errors sending control frames to dongle */
|
||||
unsigned long tx_ctlerrs;
|
||||
/* Packets sent up the network interface */
|
||||
unsigned long rx_packets;
|
||||
/* Multicast packets sent up the network interface */
|
||||
unsigned long rx_multicast;
|
||||
/* Errors processing rx data packets */
|
||||
unsigned long rx_errors;
|
||||
/* Control frames processed from dongle */
|
||||
unsigned long rx_ctlpkts;
|
||||
|
||||
/* Errors in processing rx control frames */
|
||||
unsigned long rx_ctlerrs;
|
||||
/* Packets dropped locally (no memory) */
|
||||
unsigned long rx_dropped;
|
||||
/* Packets flushed due to unscheduled sendup thread */
|
||||
unsigned long rx_flushed;
|
||||
/* Number of times dpc scheduled by watchdog timer */
|
||||
unsigned long wd_dpc_sched;
|
||||
|
||||
/* Number of packets where header read-ahead was used. */
|
||||
unsigned long rx_readahead_cnt;
|
||||
/* Number of tx packets we had to realloc for headroom */
|
||||
unsigned long tx_realloc;
|
||||
/* Number of flow control pkts recvd */
|
||||
unsigned long fc_packets;
|
||||
|
||||
/* Last error return */
|
||||
int bcmerror;
|
||||
uint tickcnt;
|
||||
|
||||
/* Last error from dongle */
|
||||
int dongle_error;
|
||||
|
@ -663,6 +604,15 @@ struct brcmf_pub {
|
|||
|
||||
u8 country_code[BRCM_CNTRY_BUF_SZ];
|
||||
char eventmask[BRCMF_EVENTING_MASK_LEN];
|
||||
|
||||
struct brcmf_if *iflist[BRCMF_MAX_IFS];
|
||||
|
||||
struct mutex proto_block;
|
||||
|
||||
struct work_struct setmacaddr_work;
|
||||
struct work_struct multicast_work;
|
||||
u8 macvalue[ETH_ALEN];
|
||||
atomic_t pend_8021x_cnt;
|
||||
};
|
||||
|
||||
struct brcmf_if_event {
|
||||
|
@ -682,73 +632,33 @@ extern const struct bcmevent_name bcmevent_names[];
|
|||
extern uint brcmf_c_mkiovar(char *name, char *data, uint datalen,
|
||||
char *buf, uint len);
|
||||
|
||||
/* Indication from bus module regarding presence/insertion of dongle.
|
||||
* Return struct brcmf_pub pointer, used as handle to OS module in later calls.
|
||||
* Returned structure should have bus and prot pointers filled in.
|
||||
* bus_hdrlen specifies required headroom for bus module header.
|
||||
*/
|
||||
extern struct brcmf_pub *brcmf_attach(struct brcmf_sdio *bus,
|
||||
uint bus_hdrlen, struct device *dev);
|
||||
extern int brcmf_net_attach(struct brcmf_pub *drvr, int idx);
|
||||
extern int brcmf_netdev_wait_pend8021x(struct net_device *ndev);
|
||||
|
||||
extern s32 brcmf_exec_dcmd(struct net_device *dev, u32 cmd, void *arg, u32 len);
|
||||
|
||||
/* Indication from bus module regarding removal/absence of dongle */
|
||||
extern void brcmf_detach(struct brcmf_pub *drvr);
|
||||
|
||||
/* Indication from bus module to change flow-control state */
|
||||
extern void brcmf_txflowcontrol(struct brcmf_pub *drvr, int ifidx, bool on);
|
||||
|
||||
extern bool brcmf_c_prec_enq(struct brcmf_pub *drvr, struct pktq *q,
|
||||
struct sk_buff *pkt, int prec);
|
||||
|
||||
/* Receive frame for delivery to OS. Callee disposes of rxp. */
|
||||
extern void brcmf_rx_frame(struct brcmf_pub *drvr, int ifidx,
|
||||
struct sk_buff_head *rxlist);
|
||||
static inline void brcmf_rx_packet(struct brcmf_pub *drvr, int ifidx,
|
||||
struct sk_buff *pkt)
|
||||
{
|
||||
struct sk_buff_head q;
|
||||
|
||||
skb_queue_head_init(&q);
|
||||
skb_queue_tail(&q, pkt);
|
||||
brcmf_rx_frame(drvr, ifidx, &q);
|
||||
}
|
||||
|
||||
/* Return pointer to interface name */
|
||||
extern char *brcmf_ifname(struct brcmf_pub *drvr, int idx);
|
||||
|
||||
/* Notify tx completion */
|
||||
extern void brcmf_txcomplete(struct brcmf_pub *drvr, struct sk_buff *txp,
|
||||
bool success);
|
||||
|
||||
/* Query dongle */
|
||||
extern int brcmf_proto_cdc_query_dcmd(struct brcmf_pub *drvr, int ifidx,
|
||||
uint cmd, void *buf, uint len);
|
||||
|
||||
/* OS independent layer functions */
|
||||
extern int brcmf_os_proto_block(struct brcmf_pub *drvr);
|
||||
extern int brcmf_os_proto_unblock(struct brcmf_pub *drvr);
|
||||
#ifdef BCMDBG
|
||||
extern int brcmf_write_to_file(struct brcmf_pub *drvr, const u8 *buf, int size);
|
||||
#endif /* BCMDBG */
|
||||
|
||||
extern int brcmf_ifname2idx(struct brcmf_info *drvr_priv, char *name);
|
||||
extern int brcmf_c_host_event(struct brcmf_info *drvr_priv, int *idx,
|
||||
extern int brcmf_ifname2idx(struct brcmf_pub *drvr, char *name);
|
||||
extern int brcmf_c_host_event(struct brcmf_pub *drvr, int *idx,
|
||||
void *pktdata, struct brcmf_event_msg *,
|
||||
void **data_ptr);
|
||||
|
||||
extern int brcmf_add_if(struct brcmf_info *drvr_priv, int ifidx,
|
||||
char *name, u8 *mac_addr);
|
||||
extern void brcmf_del_if(struct brcmf_info *drvr_priv, int ifidx);
|
||||
extern void brcmf_del_if(struct brcmf_pub *drvr, int ifidx);
|
||||
|
||||
/* Send packet to dongle via data channel */
|
||||
extern int brcmf_sendpkt(struct brcmf_pub *drvr, int ifidx,\
|
||||
struct sk_buff *pkt);
|
||||
|
||||
extern int brcmf_bus_start(struct brcmf_pub *drvr);
|
||||
|
||||
extern void brcmf_c_pktfilter_offload_set(struct brcmf_pub *drvr, char *arg);
|
||||
extern void brcmf_c_pktfilter_offload_enable(struct brcmf_pub *drvr, char *arg,
|
||||
int enable, int master_mode);
|
||||
|
@ -757,25 +667,4 @@ extern void brcmf_c_pktfilter_offload_enable(struct brcmf_pub *drvr, char *arg,
|
|||
#define BRCMF_DCMD_MEDLEN 1536 /* "med" cmd buffer required */
|
||||
#define BRCMF_DCMD_MAXLEN 8192 /* max length cmd buffer required */
|
||||
|
||||
/* message levels */
|
||||
#define BRCMF_ERROR_VAL 0x0001
|
||||
#define BRCMF_TRACE_VAL 0x0002
|
||||
#define BRCMF_INFO_VAL 0x0004
|
||||
#define BRCMF_DATA_VAL 0x0008
|
||||
#define BRCMF_CTL_VAL 0x0010
|
||||
#define BRCMF_TIMER_VAL 0x0020
|
||||
#define BRCMF_HDRS_VAL 0x0040
|
||||
#define BRCMF_BYTES_VAL 0x0080
|
||||
#define BRCMF_INTR_VAL 0x0100
|
||||
#define BRCMF_GLOM_VAL 0x0400
|
||||
#define BRCMF_EVENT_VAL 0x0800
|
||||
#define BRCMF_BTA_VAL 0x1000
|
||||
#define BRCMF_ISCAN_VAL 0x2000
|
||||
|
||||
/* Enter idle immediately (no timeout) */
|
||||
#define BRCMF_IDLE_IMMEDIATE (-1)
|
||||
#define BRCMF_IDLE_ACTIVE 0 /* Do not request any SD clock change
|
||||
when idle */
|
||||
#define BRCMF_IDLE_INTERVAL 1
|
||||
|
||||
#endif /* _BRCMF_H_ */
|
||||
|
|
|
@ -17,34 +17,89 @@
|
|||
#ifndef _BRCMF_BUS_H_
|
||||
#define _BRCMF_BUS_H_
|
||||
|
||||
/* Packet alignment for most efficient SDIO (can change based on platform) */
|
||||
#define BRCMF_SDALIGN (1 << 6)
|
||||
/* The level of bus communication with the dongle */
|
||||
enum brcmf_bus_state {
|
||||
BRCMF_BUS_DOWN, /* Not ready for frame transfers */
|
||||
BRCMF_BUS_LOAD, /* Download access only (CPU reset) */
|
||||
BRCMF_BUS_DATA /* Ready for frame transfers */
|
||||
};
|
||||
|
||||
/* watchdog polling interval in ms */
|
||||
#define BRCMF_WD_POLL_MS 10
|
||||
struct dngl_stats {
|
||||
unsigned long rx_packets; /* total packets received */
|
||||
unsigned long tx_packets; /* total packets transmitted */
|
||||
unsigned long rx_bytes; /* total bytes received */
|
||||
unsigned long tx_bytes; /* total bytes transmitted */
|
||||
unsigned long rx_errors; /* bad packets received */
|
||||
unsigned long tx_errors; /* packet transmit problems */
|
||||
unsigned long rx_dropped; /* packets dropped by dongle */
|
||||
unsigned long tx_dropped; /* packets dropped by dongle */
|
||||
unsigned long multicast; /* multicast packets received */
|
||||
};
|
||||
|
||||
/*
|
||||
* Exported from brcmf bus module (brcmf_usb, brcmf_sdio)
|
||||
*/
|
||||
/* interface structure between common and bus layer */
|
||||
struct brcmf_bus {
|
||||
u8 type; /* bus type */
|
||||
void *bus_priv; /* pointer to bus private structure */
|
||||
void *drvr; /* pointer to driver pub structure brcmf_pub */
|
||||
enum brcmf_bus_state state;
|
||||
uint maxctl; /* Max size rxctl request from proto to bus */
|
||||
bool drvr_up; /* Status flag of driver up/down */
|
||||
unsigned long tx_realloc; /* Tx packets realloced for headroom */
|
||||
struct dngl_stats dstats; /* Stats for dongle-based data */
|
||||
u8 align; /* bus alignment requirement */
|
||||
|
||||
/* interface functions pointers */
|
||||
/* Stop bus module: clear pending frames, disable data flow */
|
||||
extern void brcmf_sdbrcm_bus_stop(struct device *dev);
|
||||
|
||||
void (*brcmf_bus_stop)(struct device *);
|
||||
/* Initialize bus module: prepare for communication w/dongle */
|
||||
extern int brcmf_sdbrcm_bus_init(struct device *dev);
|
||||
|
||||
int (*brcmf_bus_init)(struct device *);
|
||||
/* Send a data frame to the dongle. Callee disposes of txp. */
|
||||
extern int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *txp);
|
||||
|
||||
int (*brcmf_bus_txdata)(struct device *, struct sk_buff *);
|
||||
/* Send/receive a control message to/from the dongle.
|
||||
* Expects caller to enforce a single outstanding transaction.
|
||||
*/
|
||||
extern int
|
||||
brcmf_sdbrcm_bus_txctl(struct device *dev, unsigned char *msg, uint msglen);
|
||||
int (*brcmf_bus_txctl)(struct device *, unsigned char *, uint);
|
||||
int (*brcmf_bus_rxctl)(struct device *, unsigned char *, uint);
|
||||
};
|
||||
|
||||
extern int
|
||||
brcmf_sdbrcm_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen);
|
||||
/*
|
||||
* interface functions from common layer
|
||||
*/
|
||||
|
||||
extern void brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick);
|
||||
/* Remove any protocol-specific data header. */
|
||||
extern int brcmf_proto_hdrpull(struct device *dev, int *ifidx,
|
||||
struct sk_buff *rxp);
|
||||
|
||||
extern bool brcmf_c_prec_enq(struct device *dev, struct pktq *q,
|
||||
struct sk_buff *pkt, int prec);
|
||||
|
||||
/* Receive frame for delivery to OS. Callee disposes of rxp. */
|
||||
extern void brcmf_rx_frame(struct device *dev, int ifidx,
|
||||
struct sk_buff_head *rxlist);
|
||||
static inline void brcmf_rx_packet(struct device *dev, int ifidx,
|
||||
struct sk_buff *pkt)
|
||||
{
|
||||
struct sk_buff_head q;
|
||||
|
||||
skb_queue_head_init(&q);
|
||||
skb_queue_tail(&q, pkt);
|
||||
brcmf_rx_frame(dev, ifidx, &q);
|
||||
}
|
||||
|
||||
/* Indication from bus module regarding presence/insertion of dongle. */
|
||||
extern int brcmf_attach(uint bus_hdrlen, struct device *dev);
|
||||
/* Indication from bus module regarding removal/absence of dongle */
|
||||
extern void brcmf_detach(struct device *dev);
|
||||
|
||||
/* Indication from bus module to change flow-control state */
|
||||
extern void brcmf_txflowcontrol(struct device *dev, int ifidx, bool on);
|
||||
|
||||
/* Notify tx completion */
|
||||
extern void brcmf_txcomplete(struct device *dev, struct sk_buff *txp,
|
||||
bool success);
|
||||
|
||||
extern int brcmf_bus_start(struct device *dev);
|
||||
|
||||
extern int brcmf_add_if(struct device *dev, int ifidx,
|
||||
char *name, u8 *mac_addr);
|
||||
#endif /* _BRCMF_BUS_H_ */
|
||||
|
|
|
@ -82,13 +82,14 @@ struct brcmf_proto_bdc_header {
|
|||
|
||||
|
||||
#define RETRIES 2 /* # of retries to retrieve matching dcmd response */
|
||||
#define BUS_HEADER_LEN (16+BRCMF_SDALIGN) /* Must be atleast SDPCM_RESERVE
|
||||
#define BUS_HEADER_LEN (16+64) /* Must be atleast SDPCM_RESERVE
|
||||
* (amount of header tha might be added)
|
||||
* plus any space that might be needed
|
||||
* for alignment padding.
|
||||
* for bus alignment padding.
|
||||
*/
|
||||
#define ROUND_UP_MARGIN 2048 /* Biggest SDIO block size possible for
|
||||
#define ROUND_UP_MARGIN 2048 /* Biggest bus block size possible for
|
||||
* round off at the end of buffer
|
||||
* Currently is SDIO
|
||||
*/
|
||||
|
||||
struct brcmf_proto {
|
||||
|
@ -116,7 +117,8 @@ static int brcmf_proto_cdc_msg(struct brcmf_pub *drvr)
|
|||
len = CDC_MAX_MSG_SIZE;
|
||||
|
||||
/* Send request */
|
||||
return brcmf_sdbrcm_bus_txctl(drvr->dev, (unsigned char *)&prot->msg,
|
||||
return drvr->bus_if->brcmf_bus_txctl(drvr->dev,
|
||||
(unsigned char *)&prot->msg,
|
||||
len);
|
||||
}
|
||||
|
||||
|
@ -128,7 +130,7 @@ static int brcmf_proto_cdc_cmplt(struct brcmf_pub *drvr, u32 id, u32 len)
|
|||
brcmf_dbg(TRACE, "Enter\n");
|
||||
|
||||
do {
|
||||
ret = brcmf_sdbrcm_bus_rxctl(drvr->dev,
|
||||
ret = drvr->bus_if->brcmf_bus_rxctl(drvr->dev,
|
||||
(unsigned char *)&prot->msg,
|
||||
len + sizeof(struct brcmf_proto_cdc_dcmd));
|
||||
if (ret < 0)
|
||||
|
@ -284,7 +286,7 @@ brcmf_proto_dcmd(struct brcmf_pub *drvr, int ifidx, struct brcmf_dcmd *dcmd,
|
|||
brcmf_dbg(ERROR, "bus is down. we have nothing to do.\n");
|
||||
return ret;
|
||||
}
|
||||
brcmf_os_proto_block(drvr);
|
||||
mutex_lock(&drvr->proto_block);
|
||||
|
||||
brcmf_dbg(TRACE, "Enter\n");
|
||||
|
||||
|
@ -338,7 +340,7 @@ brcmf_proto_dcmd(struct brcmf_pub *drvr, int ifidx, struct brcmf_dcmd *dcmd,
|
|||
prot->pending = false;
|
||||
|
||||
done:
|
||||
brcmf_os_proto_unblock(drvr);
|
||||
mutex_unlock(&drvr->proto_block);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
@ -376,10 +378,12 @@ void brcmf_proto_hdrpush(struct brcmf_pub *drvr, int ifidx,
|
|||
BDC_SET_IF_IDX(h, ifidx);
|
||||
}
|
||||
|
||||
int brcmf_proto_hdrpull(struct brcmf_pub *drvr, int *ifidx,
|
||||
int brcmf_proto_hdrpull(struct device *dev, int *ifidx,
|
||||
struct sk_buff *pktbuf)
|
||||
{
|
||||
struct brcmf_proto_bdc_header *h;
|
||||
struct brcmf_bus *bus_if = dev_get_drvdata(dev);
|
||||
struct brcmf_pub *drvr = bus_if->drvr;
|
||||
|
||||
brcmf_dbg(TRACE, "Enter\n");
|
||||
|
||||
|
@ -435,7 +439,7 @@ int brcmf_proto_attach(struct brcmf_pub *drvr)
|
|||
|
||||
drvr->prot = cdc;
|
||||
drvr->hdrlen += BDC_HEADER_LEN;
|
||||
drvr->maxctl = BRCMF_DCMD_MAXLEN +
|
||||
drvr->bus_if->maxctl = BRCMF_DCMD_MAXLEN +
|
||||
sizeof(struct brcmf_proto_cdc_dcmd) + ROUND_UP_MARGIN;
|
||||
return 0;
|
||||
|
||||
|
@ -451,18 +455,6 @@ void brcmf_proto_detach(struct brcmf_pub *drvr)
|
|||
drvr->prot = NULL;
|
||||
}
|
||||
|
||||
void brcmf_proto_dstats(struct brcmf_pub *drvr)
|
||||
{
|
||||
/* No stats from dongle added yet, copy bus stats */
|
||||
drvr->dstats.tx_packets = drvr->tx_packets;
|
||||
drvr->dstats.tx_errors = drvr->tx_errors;
|
||||
drvr->dstats.rx_packets = drvr->rx_packets;
|
||||
drvr->dstats.rx_errors = drvr->rx_errors;
|
||||
drvr->dstats.rx_dropped = drvr->rx_dropped;
|
||||
drvr->dstats.multicast = drvr->rx_multicast;
|
||||
return;
|
||||
}
|
||||
|
||||
int brcmf_proto_init(struct brcmf_pub *drvr)
|
||||
{
|
||||
int ret = 0;
|
||||
|
@ -470,19 +462,19 @@ int brcmf_proto_init(struct brcmf_pub *drvr)
|
|||
|
||||
brcmf_dbg(TRACE, "Enter\n");
|
||||
|
||||
brcmf_os_proto_block(drvr);
|
||||
mutex_lock(&drvr->proto_block);
|
||||
|
||||
/* Get the device MAC address */
|
||||
strcpy(buf, "cur_etheraddr");
|
||||
ret = brcmf_proto_cdc_query_dcmd(drvr, 0, BRCMF_C_GET_VAR,
|
||||
buf, sizeof(buf));
|
||||
if (ret < 0) {
|
||||
brcmf_os_proto_unblock(drvr);
|
||||
mutex_unlock(&drvr->proto_block);
|
||||
return ret;
|
||||
}
|
||||
memcpy(drvr->mac, buf, ETH_ALEN);
|
||||
|
||||
brcmf_os_proto_unblock(drvr);
|
||||
mutex_unlock(&drvr->proto_block);
|
||||
|
||||
ret = brcmf_c_preinit_dcmds(drvr);
|
||||
|
||||
|
|
|
@ -83,12 +83,14 @@ brcmf_c_mkiovar(char *name, char *data, uint datalen, char *buf, uint buflen)
|
|||
return len;
|
||||
}
|
||||
|
||||
bool brcmf_c_prec_enq(struct brcmf_pub *drvr, struct pktq *q,
|
||||
bool brcmf_c_prec_enq(struct device *dev, struct pktq *q,
|
||||
struct sk_buff *pkt, int prec)
|
||||
{
|
||||
struct sk_buff *p;
|
||||
int eprec = -1; /* precedence to evict from */
|
||||
bool discard_oldest;
|
||||
struct brcmf_bus *bus_if = dev_get_drvdata(dev);
|
||||
struct brcmf_pub *drvr = bus_if->drvr;
|
||||
|
||||
/* Fast case, precedence queue is not full and we are also not
|
||||
* exceeding total queue length
|
||||
|
@ -431,7 +433,7 @@ brcmf_c_show_host_event(struct brcmf_event_msg *event, void *event_data)
|
|||
#endif /* BCMDBG */
|
||||
|
||||
int
|
||||
brcmf_c_host_event(struct brcmf_info *drvr_priv, int *ifidx, void *pktdata,
|
||||
brcmf_c_host_event(struct brcmf_pub *drvr, int *ifidx, void *pktdata,
|
||||
struct brcmf_event_msg *event, void **data_ptr)
|
||||
{
|
||||
/* check whether packet is a BRCM event pkt */
|
||||
|
@ -473,18 +475,18 @@ brcmf_c_host_event(struct brcmf_info *drvr_priv, int *ifidx, void *pktdata,
|
|||
|
||||
if (ifevent->ifidx > 0 && ifevent->ifidx < BRCMF_MAX_IFS) {
|
||||
if (ifevent->action == BRCMF_E_IF_ADD)
|
||||
brcmf_add_if(drvr_priv, ifevent->ifidx,
|
||||
brcmf_add_if(drvr->dev, ifevent->ifidx,
|
||||
event->ifname,
|
||||
pvt_data->eth.h_dest);
|
||||
else
|
||||
brcmf_del_if(drvr_priv, ifevent->ifidx);
|
||||
brcmf_del_if(drvr, ifevent->ifidx);
|
||||
} else {
|
||||
brcmf_dbg(ERROR, "Invalid ifidx %d for %s\n",
|
||||
ifevent->ifidx, event->ifname);
|
||||
}
|
||||
|
||||
/* send up the if event: btamp user needs it */
|
||||
*ifidx = brcmf_ifname2idx(drvr_priv, event->ifname);
|
||||
*ifidx = brcmf_ifname2idx(drvr, event->ifname);
|
||||
break;
|
||||
|
||||
/* These are what external supplicant/authenticator wants */
|
||||
|
@ -496,7 +498,7 @@ brcmf_c_host_event(struct brcmf_info *drvr_priv, int *ifidx, void *pktdata,
|
|||
default:
|
||||
/* Fall through: this should get _everything_ */
|
||||
|
||||
*ifidx = brcmf_ifname2idx(drvr_priv, event->ifname);
|
||||
*ifidx = brcmf_ifname2idx(drvr, event->ifname);
|
||||
brcmf_dbg(TRACE, "MAC event %d, flags %x, status %x\n",
|
||||
type, flags, status);
|
||||
|
||||
|
@ -796,7 +798,7 @@ int brcmf_c_preinit_dcmds(struct brcmf_pub *drvr)
|
|||
"event_msgs" + '\0' + bitvec */
|
||||
uint up = 0;
|
||||
char buf[128], *ptr;
|
||||
u32 dongle_align = BRCMF_SDALIGN;
|
||||
u32 dongle_align = drvr->bus_if->align;
|
||||
u32 glom = 0;
|
||||
u32 roaming = 1;
|
||||
uint bcn_timeout = 3;
|
||||
|
@ -804,7 +806,7 @@ int brcmf_c_preinit_dcmds(struct brcmf_pub *drvr)
|
|||
int scan_unassoc_time = 40;
|
||||
int i;
|
||||
|
||||
brcmf_os_proto_block(drvr);
|
||||
mutex_lock(&drvr->proto_block);
|
||||
|
||||
/* Set Country code */
|
||||
if (drvr->country_code[0] != 0) {
|
||||
|
@ -873,7 +875,7 @@ int brcmf_c_preinit_dcmds(struct brcmf_pub *drvr)
|
|||
0, true);
|
||||
}
|
||||
|
||||
brcmf_os_proto_unblock(drvr);
|
||||
mutex_unlock(&drvr->proto_block);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -17,6 +17,21 @@
|
|||
#ifndef _BRCMF_DBG_H_
|
||||
#define _BRCMF_DBG_H_
|
||||
|
||||
/* message levels */
|
||||
#define BRCMF_ERROR_VAL 0x0001
|
||||
#define BRCMF_TRACE_VAL 0x0002
|
||||
#define BRCMF_INFO_VAL 0x0004
|
||||
#define BRCMF_DATA_VAL 0x0008
|
||||
#define BRCMF_CTL_VAL 0x0010
|
||||
#define BRCMF_TIMER_VAL 0x0020
|
||||
#define BRCMF_HDRS_VAL 0x0040
|
||||
#define BRCMF_BYTES_VAL 0x0080
|
||||
#define BRCMF_INTR_VAL 0x0100
|
||||
#define BRCMF_GLOM_VAL 0x0400
|
||||
#define BRCMF_EVENT_VAL 0x0800
|
||||
#define BRCMF_BTA_VAL 0x1000
|
||||
#define BRCMF_ISCAN_VAL 0x2000
|
||||
|
||||
#if defined(BCMDBG)
|
||||
|
||||
#define brcmf_dbg(level, fmt, ...) \
|
||||
|
|
|
@ -52,7 +52,7 @@ MODULE_LICENSE("Dual BSD/GPL");
|
|||
|
||||
/* Interface control information */
|
||||
struct brcmf_if {
|
||||
struct brcmf_info *info; /* back pointer to brcmf_info */
|
||||
struct brcmf_pub *drvr; /* back pointer to brcmf_pub */
|
||||
/* OS/stack specifics */
|
||||
struct net_device *ndev;
|
||||
struct net_device_stats stats;
|
||||
|
@ -60,26 +60,11 @@ struct brcmf_if {
|
|||
u8 mac_addr[ETH_ALEN]; /* assigned MAC address */
|
||||
};
|
||||
|
||||
/* Local private structure (extension of pub) */
|
||||
struct brcmf_info {
|
||||
struct brcmf_pub pub;
|
||||
|
||||
/* OS/stack specifics */
|
||||
struct brcmf_if *iflist[BRCMF_MAX_IFS];
|
||||
|
||||
struct mutex proto_block;
|
||||
|
||||
struct work_struct setmacaddr_work;
|
||||
struct work_struct multicast_work;
|
||||
u8 macvalue[ETH_ALEN];
|
||||
atomic_t pend_8021x_cnt;
|
||||
};
|
||||
|
||||
/* Error bits */
|
||||
int brcmf_msg_level = BRCMF_ERROR_VAL;
|
||||
module_param(brcmf_msg_level, int, 0);
|
||||
|
||||
int brcmf_ifname2idx(struct brcmf_info *drvr_priv, char *name)
|
||||
int brcmf_ifname2idx(struct brcmf_pub *drvr, char *name)
|
||||
{
|
||||
int i = BRCMF_MAX_IFS;
|
||||
struct brcmf_if *ifp;
|
||||
|
@ -88,7 +73,7 @@ int brcmf_ifname2idx(struct brcmf_info *drvr_priv, char *name)
|
|||
return 0;
|
||||
|
||||
while (--i > 0) {
|
||||
ifp = drvr_priv->iflist[i];
|
||||
ifp = drvr->iflist[i];
|
||||
if (ifp && !strncmp(ifp->ndev->name, name, IFNAMSIZ))
|
||||
break;
|
||||
}
|
||||
|
@ -100,20 +85,18 @@ int brcmf_ifname2idx(struct brcmf_info *drvr_priv, char *name)
|
|||
|
||||
char *brcmf_ifname(struct brcmf_pub *drvr, int ifidx)
|
||||
{
|
||||
struct brcmf_info *drvr_priv = drvr->info;
|
||||
|
||||
if (ifidx < 0 || ifidx >= BRCMF_MAX_IFS) {
|
||||
brcmf_dbg(ERROR, "ifidx %d out of range\n", ifidx);
|
||||
return "<if_bad>";
|
||||
}
|
||||
|
||||
if (drvr_priv->iflist[ifidx] == NULL) {
|
||||
if (drvr->iflist[ifidx] == NULL) {
|
||||
brcmf_dbg(ERROR, "null i/f %d\n", ifidx);
|
||||
return "<if_null>";
|
||||
}
|
||||
|
||||
if (drvr_priv->iflist[ifidx]->ndev)
|
||||
return drvr_priv->iflist[ifidx]->ndev->name;
|
||||
if (drvr->iflist[ifidx]->ndev)
|
||||
return drvr->iflist[ifidx]->ndev->name;
|
||||
|
||||
return "<if_none>";
|
||||
}
|
||||
|
@ -131,10 +114,10 @@ static void _brcmf_set_multicast_list(struct work_struct *work)
|
|||
uint buflen;
|
||||
int ret;
|
||||
|
||||
struct brcmf_info *drvr_priv = container_of(work, struct brcmf_info,
|
||||
struct brcmf_pub *drvr = container_of(work, struct brcmf_pub,
|
||||
multicast_work);
|
||||
|
||||
ndev = drvr_priv->iflist[0]->ndev;
|
||||
ndev = drvr->iflist[0]->ndev;
|
||||
cnt = netdev_mc_count(ndev);
|
||||
|
||||
/* Determine initial value of allmulti flag */
|
||||
|
@ -168,10 +151,10 @@ static void _brcmf_set_multicast_list(struct work_struct *work)
|
|||
dcmd.len = buflen;
|
||||
dcmd.set = true;
|
||||
|
||||
ret = brcmf_proto_dcmd(&drvr_priv->pub, 0, &dcmd, dcmd.len);
|
||||
ret = brcmf_proto_dcmd(drvr, 0, &dcmd, dcmd.len);
|
||||
if (ret < 0) {
|
||||
brcmf_dbg(ERROR, "%s: set mcast_list failed, cnt %d\n",
|
||||
brcmf_ifname(&drvr_priv->pub, 0), cnt);
|
||||
brcmf_ifname(drvr, 0), cnt);
|
||||
dcmd_value = cnt ? true : dcmd_value;
|
||||
}
|
||||
|
||||
|
@ -193,7 +176,7 @@ static void _brcmf_set_multicast_list(struct work_struct *work)
|
|||
("allmulti", (void *)&dcmd_le_value,
|
||||
sizeof(dcmd_le_value), buf, buflen)) {
|
||||
brcmf_dbg(ERROR, "%s: mkiovar failed for allmulti, datalen %d buflen %u\n",
|
||||
brcmf_ifname(&drvr_priv->pub, 0),
|
||||
brcmf_ifname(drvr, 0),
|
||||
(int)sizeof(dcmd_value), buflen);
|
||||
kfree(buf);
|
||||
return;
|
||||
|
@ -205,10 +188,10 @@ static void _brcmf_set_multicast_list(struct work_struct *work)
|
|||
dcmd.len = buflen;
|
||||
dcmd.set = true;
|
||||
|
||||
ret = brcmf_proto_dcmd(&drvr_priv->pub, 0, &dcmd, dcmd.len);
|
||||
ret = brcmf_proto_dcmd(drvr, 0, &dcmd, dcmd.len);
|
||||
if (ret < 0) {
|
||||
brcmf_dbg(ERROR, "%s: set allmulti %d failed\n",
|
||||
brcmf_ifname(&drvr_priv->pub, 0),
|
||||
brcmf_ifname(drvr, 0),
|
||||
le32_to_cpu(dcmd_le_value));
|
||||
}
|
||||
|
||||
|
@ -226,10 +209,10 @@ static void _brcmf_set_multicast_list(struct work_struct *work)
|
|||
dcmd.len = sizeof(dcmd_le_value);
|
||||
dcmd.set = true;
|
||||
|
||||
ret = brcmf_proto_dcmd(&drvr_priv->pub, 0, &dcmd, dcmd.len);
|
||||
ret = brcmf_proto_dcmd(drvr, 0, &dcmd, dcmd.len);
|
||||
if (ret < 0) {
|
||||
brcmf_dbg(ERROR, "%s: set promisc %d failed\n",
|
||||
brcmf_ifname(&drvr_priv->pub, 0),
|
||||
brcmf_ifname(drvr, 0),
|
||||
le32_to_cpu(dcmd_le_value));
|
||||
}
|
||||
}
|
||||
|
@ -241,14 +224,14 @@ _brcmf_set_mac_address(struct work_struct *work)
|
|||
struct brcmf_dcmd dcmd;
|
||||
int ret;
|
||||
|
||||
struct brcmf_info *drvr_priv = container_of(work, struct brcmf_info,
|
||||
struct brcmf_pub *drvr = container_of(work, struct brcmf_pub,
|
||||
setmacaddr_work);
|
||||
|
||||
brcmf_dbg(TRACE, "enter\n");
|
||||
if (!brcmf_c_mkiovar("cur_etheraddr", (char *)drvr_priv->macvalue,
|
||||
if (!brcmf_c_mkiovar("cur_etheraddr", (char *)drvr->macvalue,
|
||||
ETH_ALEN, buf, 32)) {
|
||||
brcmf_dbg(ERROR, "%s: mkiovar failed for cur_etheraddr\n",
|
||||
brcmf_ifname(&drvr_priv->pub, 0));
|
||||
brcmf_ifname(drvr, 0));
|
||||
return;
|
||||
}
|
||||
memset(&dcmd, 0, sizeof(dcmd));
|
||||
|
@ -257,13 +240,13 @@ _brcmf_set_mac_address(struct work_struct *work)
|
|||
dcmd.len = 32;
|
||||
dcmd.set = true;
|
||||
|
||||
ret = brcmf_proto_dcmd(&drvr_priv->pub, 0, &dcmd, dcmd.len);
|
||||
ret = brcmf_proto_dcmd(drvr, 0, &dcmd, dcmd.len);
|
||||
if (ret < 0)
|
||||
brcmf_dbg(ERROR, "%s: set cur_etheraddr failed\n",
|
||||
brcmf_ifname(&drvr_priv->pub, 0));
|
||||
brcmf_ifname(drvr, 0));
|
||||
else
|
||||
memcpy(drvr_priv->iflist[0]->ndev->dev_addr,
|
||||
drvr_priv->macvalue, ETH_ALEN);
|
||||
memcpy(drvr->iflist[0]->ndev->dev_addr,
|
||||
drvr->macvalue, ETH_ALEN);
|
||||
|
||||
return;
|
||||
}
|
||||
|
@ -271,28 +254,26 @@ _brcmf_set_mac_address(struct work_struct *work)
|
|||
static int brcmf_netdev_set_mac_address(struct net_device *ndev, void *addr)
|
||||
{
|
||||
struct brcmf_if *ifp = netdev_priv(ndev);
|
||||
struct brcmf_info *drvr_priv = ifp->info;
|
||||
struct brcmf_pub *drvr = ifp->drvr;
|
||||
struct sockaddr *sa = (struct sockaddr *)addr;
|
||||
|
||||
memcpy(&drvr_priv->macvalue, sa->sa_data, ETH_ALEN);
|
||||
schedule_work(&drvr_priv->setmacaddr_work);
|
||||
memcpy(&drvr->macvalue, sa->sa_data, ETH_ALEN);
|
||||
schedule_work(&drvr->setmacaddr_work);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void brcmf_netdev_set_multicast_list(struct net_device *ndev)
|
||||
{
|
||||
struct brcmf_if *ifp = netdev_priv(ndev);
|
||||
struct brcmf_info *drvr_priv = ifp->info;
|
||||
struct brcmf_pub *drvr = ifp->drvr;
|
||||
|
||||
schedule_work(&drvr_priv->multicast_work);
|
||||
schedule_work(&drvr->multicast_work);
|
||||
}
|
||||
|
||||
int brcmf_sendpkt(struct brcmf_pub *drvr, int ifidx, struct sk_buff *pktbuf)
|
||||
{
|
||||
struct brcmf_info *drvr_priv = drvr->info;
|
||||
|
||||
/* Reject if down */
|
||||
if (!drvr->up || (drvr->bus_if->state == BRCMF_BUS_DOWN))
|
||||
if (!drvr->bus_if->drvr_up || (drvr->bus_if->state == BRCMF_BUS_DOWN))
|
||||
return -ENODEV;
|
||||
|
||||
/* Update multicast statistic */
|
||||
|
@ -303,112 +284,113 @@ int brcmf_sendpkt(struct brcmf_pub *drvr, int ifidx, struct sk_buff *pktbuf)
|
|||
if (is_multicast_ether_addr(eh->h_dest))
|
||||
drvr->tx_multicast++;
|
||||
if (ntohs(eh->h_proto) == ETH_P_PAE)
|
||||
atomic_inc(&drvr_priv->pend_8021x_cnt);
|
||||
atomic_inc(&drvr->pend_8021x_cnt);
|
||||
}
|
||||
|
||||
/* If the protocol uses a data header, apply it */
|
||||
brcmf_proto_hdrpush(drvr, ifidx, pktbuf);
|
||||
|
||||
/* Use bus module to send data frame */
|
||||
return brcmf_sdbrcm_bus_txdata(drvr->dev, pktbuf);
|
||||
return drvr->bus_if->brcmf_bus_txdata(drvr->dev, pktbuf);
|
||||
}
|
||||
|
||||
static int brcmf_netdev_start_xmit(struct sk_buff *skb, struct net_device *ndev)
|
||||
{
|
||||
int ret;
|
||||
struct brcmf_if *ifp = netdev_priv(ndev);
|
||||
struct brcmf_info *drvr_priv = ifp->info;
|
||||
struct brcmf_pub *drvr = ifp->drvr;
|
||||
|
||||
brcmf_dbg(TRACE, "Enter\n");
|
||||
|
||||
/* Reject if down */
|
||||
if (!drvr_priv->pub.up ||
|
||||
(drvr_priv->pub.bus_if->state == BRCMF_BUS_DOWN)) {
|
||||
brcmf_dbg(ERROR, "xmit rejected pub.up=%d state=%d\n",
|
||||
drvr_priv->pub.up,
|
||||
drvr_priv->pub.bus_if->state);
|
||||
if (!drvr->bus_if->drvr_up ||
|
||||
(drvr->bus_if->state == BRCMF_BUS_DOWN)) {
|
||||
brcmf_dbg(ERROR, "xmit rejected drvup=%d state=%d\n",
|
||||
drvr->bus_if->drvr_up,
|
||||
drvr->bus_if->state);
|
||||
netif_stop_queue(ndev);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
if (!drvr_priv->iflist[ifp->idx]) {
|
||||
if (!drvr->iflist[ifp->idx]) {
|
||||
brcmf_dbg(ERROR, "bad ifidx %d\n", ifp->idx);
|
||||
netif_stop_queue(ndev);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
/* Make sure there's enough room for any header */
|
||||
if (skb_headroom(skb) < drvr_priv->pub.hdrlen) {
|
||||
if (skb_headroom(skb) < drvr->hdrlen) {
|
||||
struct sk_buff *skb2;
|
||||
|
||||
brcmf_dbg(INFO, "%s: insufficient headroom\n",
|
||||
brcmf_ifname(&drvr_priv->pub, ifp->idx));
|
||||
drvr_priv->pub.tx_realloc++;
|
||||
skb2 = skb_realloc_headroom(skb, drvr_priv->pub.hdrlen);
|
||||
brcmf_ifname(drvr, ifp->idx));
|
||||
drvr->bus_if->tx_realloc++;
|
||||
skb2 = skb_realloc_headroom(skb, drvr->hdrlen);
|
||||
dev_kfree_skb(skb);
|
||||
skb = skb2;
|
||||
if (skb == NULL) {
|
||||
brcmf_dbg(ERROR, "%s: skb_realloc_headroom failed\n",
|
||||
brcmf_ifname(&drvr_priv->pub, ifp->idx));
|
||||
brcmf_ifname(drvr, ifp->idx));
|
||||
ret = -ENOMEM;
|
||||
goto done;
|
||||
}
|
||||
}
|
||||
|
||||
ret = brcmf_sendpkt(&drvr_priv->pub, ifp->idx, skb);
|
||||
ret = brcmf_sendpkt(drvr, ifp->idx, skb);
|
||||
|
||||
done:
|
||||
if (ret)
|
||||
drvr_priv->pub.dstats.tx_dropped++;
|
||||
drvr->bus_if->dstats.tx_dropped++;
|
||||
else
|
||||
drvr_priv->pub.tx_packets++;
|
||||
drvr->bus_if->dstats.tx_packets++;
|
||||
|
||||
/* Return ok: we always eat the packet */
|
||||
return 0;
|
||||
}
|
||||
|
||||
void brcmf_txflowcontrol(struct brcmf_pub *drvr, int ifidx, bool state)
|
||||
void brcmf_txflowcontrol(struct device *dev, int ifidx, bool state)
|
||||
{
|
||||
struct net_device *ndev;
|
||||
struct brcmf_info *drvr_priv = drvr->info;
|
||||
struct brcmf_bus *bus_if = dev_get_drvdata(dev);
|
||||
struct brcmf_pub *drvr = bus_if->drvr;
|
||||
|
||||
brcmf_dbg(TRACE, "Enter\n");
|
||||
|
||||
drvr->txoff = state;
|
||||
ndev = drvr_priv->iflist[ifidx]->ndev;
|
||||
ndev = drvr->iflist[ifidx]->ndev;
|
||||
if (state == ON)
|
||||
netif_stop_queue(ndev);
|
||||
else
|
||||
netif_wake_queue(ndev);
|
||||
}
|
||||
|
||||
static int brcmf_host_event(struct brcmf_info *drvr_priv, int *ifidx,
|
||||
static int brcmf_host_event(struct brcmf_pub *drvr, int *ifidx,
|
||||
void *pktdata, struct brcmf_event_msg *event,
|
||||
void **data)
|
||||
{
|
||||
int bcmerror = 0;
|
||||
|
||||
bcmerror = brcmf_c_host_event(drvr_priv, ifidx, pktdata, event, data);
|
||||
bcmerror = brcmf_c_host_event(drvr, ifidx, pktdata, event, data);
|
||||
if (bcmerror != 0)
|
||||
return bcmerror;
|
||||
|
||||
if (drvr_priv->iflist[*ifidx]->ndev)
|
||||
brcmf_cfg80211_event(drvr_priv->iflist[*ifidx]->ndev,
|
||||
if (drvr->iflist[*ifidx]->ndev)
|
||||
brcmf_cfg80211_event(drvr->iflist[*ifidx]->ndev,
|
||||
event, *data);
|
||||
|
||||
return bcmerror;
|
||||
}
|
||||
|
||||
void brcmf_rx_frame(struct brcmf_pub *drvr, int ifidx,
|
||||
void brcmf_rx_frame(struct device *dev, int ifidx,
|
||||
struct sk_buff_head *skb_list)
|
||||
{
|
||||
struct brcmf_info *drvr_priv = drvr->info;
|
||||
unsigned char *eth;
|
||||
uint len;
|
||||
void *data;
|
||||
struct sk_buff *skb, *pnext;
|
||||
struct brcmf_if *ifp;
|
||||
struct brcmf_event_msg event;
|
||||
struct brcmf_bus *bus_if = dev_get_drvdata(dev);
|
||||
struct brcmf_pub *drvr = bus_if->drvr;
|
||||
|
||||
brcmf_dbg(TRACE, "Enter\n");
|
||||
|
||||
|
@ -430,9 +412,9 @@ void brcmf_rx_frame(struct brcmf_pub *drvr, int ifidx,
|
|||
eth = skb->data;
|
||||
len = skb->len;
|
||||
|
||||
ifp = drvr_priv->iflist[ifidx];
|
||||
ifp = drvr->iflist[ifidx];
|
||||
if (ifp == NULL)
|
||||
ifp = drvr_priv->iflist[0];
|
||||
ifp = drvr->iflist[0];
|
||||
|
||||
if (!ifp || !ifp->ndev ||
|
||||
ifp->ndev->reg_state != NETREG_REGISTERED) {
|
||||
|
@ -444,7 +426,7 @@ void brcmf_rx_frame(struct brcmf_pub *drvr, int ifidx,
|
|||
skb->protocol = eth_type_trans(skb, skb->dev);
|
||||
|
||||
if (skb->pkt_type == PACKET_MULTICAST)
|
||||
drvr_priv->pub.rx_multicast++;
|
||||
bus_if->dstats.multicast++;
|
||||
|
||||
skb->data = eth;
|
||||
skb->len = len;
|
||||
|
@ -454,17 +436,17 @@ void brcmf_rx_frame(struct brcmf_pub *drvr, int ifidx,
|
|||
|
||||
/* Process special event packets and then discard them */
|
||||
if (ntohs(skb->protocol) == ETH_P_LINK_CTL)
|
||||
brcmf_host_event(drvr_priv, &ifidx,
|
||||
brcmf_host_event(drvr, &ifidx,
|
||||
skb_mac_header(skb),
|
||||
&event, &data);
|
||||
|
||||
if (drvr_priv->iflist[ifidx]) {
|
||||
ifp = drvr_priv->iflist[ifidx];
|
||||
if (drvr->iflist[ifidx]) {
|
||||
ifp = drvr->iflist[ifidx];
|
||||
ifp->ndev->last_rx = jiffies;
|
||||
}
|
||||
|
||||
drvr->dstats.rx_bytes += skb->len;
|
||||
drvr->rx_packets++; /* Local count */
|
||||
bus_if->dstats.rx_bytes += skb->len;
|
||||
bus_if->dstats.rx_packets++; /* Local count */
|
||||
|
||||
if (in_interrupt())
|
||||
netif_rx(skb);
|
||||
|
@ -479,51 +461,48 @@ void brcmf_rx_frame(struct brcmf_pub *drvr, int ifidx,
|
|||
}
|
||||
}
|
||||
|
||||
void brcmf_txcomplete(struct brcmf_pub *drvr, struct sk_buff *txp, bool success)
|
||||
void brcmf_txcomplete(struct device *dev, struct sk_buff *txp, bool success)
|
||||
{
|
||||
uint ifidx;
|
||||
struct brcmf_info *drvr_priv = drvr->info;
|
||||
struct ethhdr *eh;
|
||||
u16 type;
|
||||
struct brcmf_bus *bus_if = dev_get_drvdata(dev);
|
||||
struct brcmf_pub *drvr = bus_if->drvr;
|
||||
|
||||
brcmf_proto_hdrpull(drvr, &ifidx, txp);
|
||||
brcmf_proto_hdrpull(dev, &ifidx, txp);
|
||||
|
||||
eh = (struct ethhdr *)(txp->data);
|
||||
type = ntohs(eh->h_proto);
|
||||
|
||||
if (type == ETH_P_PAE)
|
||||
atomic_dec(&drvr_priv->pend_8021x_cnt);
|
||||
atomic_dec(&drvr->pend_8021x_cnt);
|
||||
|
||||
}
|
||||
|
||||
static struct net_device_stats *brcmf_netdev_get_stats(struct net_device *ndev)
|
||||
{
|
||||
struct brcmf_if *ifp = netdev_priv(ndev);
|
||||
struct brcmf_info *drvr_priv = ifp->info;
|
||||
struct brcmf_bus *bus_if = ifp->drvr->bus_if;
|
||||
|
||||
brcmf_dbg(TRACE, "Enter\n");
|
||||
|
||||
if (drvr_priv->pub.up)
|
||||
/* Use the protocol to get dongle stats */
|
||||
brcmf_proto_dstats(&drvr_priv->pub);
|
||||
|
||||
/* Copy dongle stats to net device stats */
|
||||
ifp->stats.rx_packets = drvr_priv->pub.dstats.rx_packets;
|
||||
ifp->stats.tx_packets = drvr_priv->pub.dstats.tx_packets;
|
||||
ifp->stats.rx_bytes = drvr_priv->pub.dstats.rx_bytes;
|
||||
ifp->stats.tx_bytes = drvr_priv->pub.dstats.tx_bytes;
|
||||
ifp->stats.rx_errors = drvr_priv->pub.dstats.rx_errors;
|
||||
ifp->stats.tx_errors = drvr_priv->pub.dstats.tx_errors;
|
||||
ifp->stats.rx_dropped = drvr_priv->pub.dstats.rx_dropped;
|
||||
ifp->stats.tx_dropped = drvr_priv->pub.dstats.tx_dropped;
|
||||
ifp->stats.multicast = drvr_priv->pub.dstats.multicast;
|
||||
ifp->stats.rx_packets = bus_if->dstats.rx_packets;
|
||||
ifp->stats.tx_packets = bus_if->dstats.tx_packets;
|
||||
ifp->stats.rx_bytes = bus_if->dstats.rx_bytes;
|
||||
ifp->stats.tx_bytes = bus_if->dstats.tx_bytes;
|
||||
ifp->stats.rx_errors = bus_if->dstats.rx_errors;
|
||||
ifp->stats.tx_errors = bus_if->dstats.tx_errors;
|
||||
ifp->stats.rx_dropped = bus_if->dstats.rx_dropped;
|
||||
ifp->stats.tx_dropped = bus_if->dstats.tx_dropped;
|
||||
ifp->stats.multicast = bus_if->dstats.multicast;
|
||||
|
||||
return &ifp->stats;
|
||||
}
|
||||
|
||||
/* Retrieve current toe component enables, which are kept
|
||||
as a bitmap in toe_ol iovar */
|
||||
static int brcmf_toe_get(struct brcmf_info *drvr_priv, int ifidx, u32 *toe_ol)
|
||||
static int brcmf_toe_get(struct brcmf_pub *drvr, int ifidx, u32 *toe_ol)
|
||||
{
|
||||
struct brcmf_dcmd dcmd;
|
||||
__le32 toe_le;
|
||||
|
@ -538,17 +517,17 @@ static int brcmf_toe_get(struct brcmf_info *drvr_priv, int ifidx, u32 *toe_ol)
|
|||
dcmd.set = false;
|
||||
|
||||
strcpy(buf, "toe_ol");
|
||||
ret = brcmf_proto_dcmd(&drvr_priv->pub, ifidx, &dcmd, dcmd.len);
|
||||
ret = brcmf_proto_dcmd(drvr, ifidx, &dcmd, dcmd.len);
|
||||
if (ret < 0) {
|
||||
/* Check for older dongle image that doesn't support toe_ol */
|
||||
if (ret == -EIO) {
|
||||
brcmf_dbg(ERROR, "%s: toe not supported by device\n",
|
||||
brcmf_ifname(&drvr_priv->pub, ifidx));
|
||||
brcmf_ifname(drvr, ifidx));
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
brcmf_dbg(INFO, "%s: could not get toe_ol: ret=%d\n",
|
||||
brcmf_ifname(&drvr_priv->pub, ifidx), ret);
|
||||
brcmf_ifname(drvr, ifidx), ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -559,7 +538,7 @@ static int brcmf_toe_get(struct brcmf_info *drvr_priv, int ifidx, u32 *toe_ol)
|
|||
|
||||
/* Set current toe component enables in toe_ol iovar,
|
||||
and set toe global enable iovar */
|
||||
static int brcmf_toe_set(struct brcmf_info *drvr_priv, int ifidx, u32 toe_ol)
|
||||
static int brcmf_toe_set(struct brcmf_pub *drvr, int ifidx, u32 toe_ol)
|
||||
{
|
||||
struct brcmf_dcmd dcmd;
|
||||
char buf[32];
|
||||
|
@ -577,10 +556,10 @@ static int brcmf_toe_set(struct brcmf_info *drvr_priv, int ifidx, u32 toe_ol)
|
|||
strcpy(buf, "toe_ol");
|
||||
memcpy(&buf[sizeof("toe_ol")], &toe_le, sizeof(u32));
|
||||
|
||||
ret = brcmf_proto_dcmd(&drvr_priv->pub, ifidx, &dcmd, dcmd.len);
|
||||
ret = brcmf_proto_dcmd(drvr, ifidx, &dcmd, dcmd.len);
|
||||
if (ret < 0) {
|
||||
brcmf_dbg(ERROR, "%s: could not set toe_ol: ret=%d\n",
|
||||
brcmf_ifname(&drvr_priv->pub, ifidx), ret);
|
||||
brcmf_ifname(drvr, ifidx), ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -590,10 +569,10 @@ static int brcmf_toe_set(struct brcmf_info *drvr_priv, int ifidx, u32 toe_ol)
|
|||
strcpy(buf, "toe");
|
||||
memcpy(&buf[sizeof("toe")], &toe_le, sizeof(u32));
|
||||
|
||||
ret = brcmf_proto_dcmd(&drvr_priv->pub, ifidx, &dcmd, dcmd.len);
|
||||
ret = brcmf_proto_dcmd(drvr, ifidx, &dcmd, dcmd.len);
|
||||
if (ret < 0) {
|
||||
brcmf_dbg(ERROR, "%s: could not set toe: ret=%d\n",
|
||||
brcmf_ifname(&drvr_priv->pub, ifidx), ret);
|
||||
brcmf_ifname(drvr, ifidx), ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -604,18 +583,18 @@ static void brcmf_ethtool_get_drvinfo(struct net_device *ndev,
|
|||
struct ethtool_drvinfo *info)
|
||||
{
|
||||
struct brcmf_if *ifp = netdev_priv(ndev);
|
||||
struct brcmf_info *drvr_priv = ifp->info;
|
||||
struct brcmf_pub *drvr = ifp->drvr;
|
||||
|
||||
sprintf(info->driver, KBUILD_MODNAME);
|
||||
sprintf(info->version, "%lu", drvr_priv->pub.drv_version);
|
||||
sprintf(info->bus_info, "%s", dev_name(drvr_priv->pub.dev));
|
||||
sprintf(info->version, "%lu", drvr->drv_version);
|
||||
sprintf(info->bus_info, "%s", dev_name(drvr->dev));
|
||||
}
|
||||
|
||||
static struct ethtool_ops brcmf_ethtool_ops = {
|
||||
.get_drvinfo = brcmf_ethtool_get_drvinfo
|
||||
};
|
||||
|
||||
static int brcmf_ethtool(struct brcmf_info *drvr_priv, void __user *uaddr)
|
||||
static int brcmf_ethtool(struct brcmf_pub *drvr, void __user *uaddr)
|
||||
{
|
||||
struct ethtool_drvinfo info;
|
||||
char drvname[sizeof(info.driver)];
|
||||
|
@ -649,18 +628,18 @@ static int brcmf_ethtool(struct brcmf_info *drvr_priv, void __user *uaddr)
|
|||
}
|
||||
|
||||
/* otherwise, require dongle to be up */
|
||||
else if (!drvr_priv->pub.up) {
|
||||
else if (!drvr->bus_if->drvr_up) {
|
||||
brcmf_dbg(ERROR, "dongle is not up\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
/* finally, report dongle driver type */
|
||||
else if (drvr_priv->pub.iswl)
|
||||
else if (drvr->iswl)
|
||||
sprintf(info.driver, "wl");
|
||||
else
|
||||
sprintf(info.driver, "xx");
|
||||
|
||||
sprintf(info.version, "%lu", drvr_priv->pub.drv_version);
|
||||
sprintf(info.version, "%lu", drvr->drv_version);
|
||||
if (copy_to_user(uaddr, &info, sizeof(info)))
|
||||
return -EFAULT;
|
||||
brcmf_dbg(CTL, "given %*s, returning %s\n",
|
||||
|
@ -670,7 +649,7 @@ static int brcmf_ethtool(struct brcmf_info *drvr_priv, void __user *uaddr)
|
|||
/* Get toe offload components from dongle */
|
||||
case ETHTOOL_GRXCSUM:
|
||||
case ETHTOOL_GTXCSUM:
|
||||
ret = brcmf_toe_get(drvr_priv, 0, &toe_cmpnt);
|
||||
ret = brcmf_toe_get(drvr, 0, &toe_cmpnt);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
|
@ -691,7 +670,7 @@ static int brcmf_ethtool(struct brcmf_info *drvr_priv, void __user *uaddr)
|
|||
return -EFAULT;
|
||||
|
||||
/* Read the current settings, update and write back */
|
||||
ret = brcmf_toe_get(drvr_priv, 0, &toe_cmpnt);
|
||||
ret = brcmf_toe_get(drvr, 0, &toe_cmpnt);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
|
@ -703,17 +682,17 @@ static int brcmf_ethtool(struct brcmf_info *drvr_priv, void __user *uaddr)
|
|||
else
|
||||
toe_cmpnt &= ~csum_dir;
|
||||
|
||||
ret = brcmf_toe_set(drvr_priv, 0, toe_cmpnt);
|
||||
ret = brcmf_toe_set(drvr, 0, toe_cmpnt);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
/* If setting TX checksum mode, tell Linux the new mode */
|
||||
if (cmd == ETHTOOL_STXCSUM) {
|
||||
if (edata.data)
|
||||
drvr_priv->iflist[0]->ndev->features |=
|
||||
drvr->iflist[0]->ndev->features |=
|
||||
NETIF_F_IP_CSUM;
|
||||
else
|
||||
drvr_priv->iflist[0]->ndev->features &=
|
||||
drvr->iflist[0]->ndev->features &=
|
||||
~NETIF_F_IP_CSUM;
|
||||
}
|
||||
|
||||
|
@ -730,15 +709,15 @@ static int brcmf_netdev_ioctl_entry(struct net_device *ndev, struct ifreq *ifr,
|
|||
int cmd)
|
||||
{
|
||||
struct brcmf_if *ifp = netdev_priv(ndev);
|
||||
struct brcmf_info *drvr_priv = ifp->info;
|
||||
struct brcmf_pub *drvr = ifp->drvr;
|
||||
|
||||
brcmf_dbg(TRACE, "ifidx %d, cmd 0x%04x\n", ifp->idx, cmd);
|
||||
|
||||
if (!drvr_priv->iflist[ifp->idx])
|
||||
if (!drvr->iflist[ifp->idx])
|
||||
return -1;
|
||||
|
||||
if (cmd == SIOCETHTOOL)
|
||||
return brcmf_ethtool(drvr_priv, ifr->ifr_data);
|
||||
return brcmf_ethtool(drvr, ifr->ifr_data);
|
||||
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
@ -751,7 +730,7 @@ s32 brcmf_exec_dcmd(struct net_device *ndev, u32 cmd, void *arg, u32 len)
|
|||
int buflen = 0;
|
||||
bool is_set_key_cmd;
|
||||
struct brcmf_if *ifp = netdev_priv(ndev);
|
||||
struct brcmf_info *drvr_priv = ifp->info;
|
||||
struct brcmf_pub *drvr = ifp->drvr;
|
||||
|
||||
memset(&dcmd, 0, sizeof(dcmd));
|
||||
dcmd.cmd = cmd;
|
||||
|
@ -762,13 +741,13 @@ s32 brcmf_exec_dcmd(struct net_device *ndev, u32 cmd, void *arg, u32 len)
|
|||
buflen = min_t(uint, dcmd.len, BRCMF_DCMD_MAXLEN);
|
||||
|
||||
/* send to dongle (must be up, and wl) */
|
||||
if ((drvr_priv->pub.bus_if->state != BRCMF_BUS_DATA)) {
|
||||
if ((drvr->bus_if->state != BRCMF_BUS_DATA)) {
|
||||
brcmf_dbg(ERROR, "DONGLE_DOWN\n");
|
||||
err = -EIO;
|
||||
goto done;
|
||||
}
|
||||
|
||||
if (!drvr_priv->pub.iswl) {
|
||||
if (!drvr->iswl) {
|
||||
err = -EIO;
|
||||
goto done;
|
||||
}
|
||||
|
@ -785,7 +764,7 @@ s32 brcmf_exec_dcmd(struct net_device *ndev, u32 cmd, void *arg, u32 len)
|
|||
if (is_set_key_cmd)
|
||||
brcmf_netdev_wait_pend8021x(ndev);
|
||||
|
||||
err = brcmf_proto_dcmd(&drvr_priv->pub, ifp->idx, &dcmd, buflen);
|
||||
err = brcmf_proto_dcmd(drvr, ifp->idx, &dcmd, buflen);
|
||||
|
||||
done:
|
||||
if (err > 0)
|
||||
|
@ -797,15 +776,15 @@ done:
|
|||
static int brcmf_netdev_stop(struct net_device *ndev)
|
||||
{
|
||||
struct brcmf_if *ifp = netdev_priv(ndev);
|
||||
struct brcmf_pub *drvr = &ifp->info->pub;
|
||||
struct brcmf_pub *drvr = ifp->drvr;
|
||||
|
||||
brcmf_dbg(TRACE, "Enter\n");
|
||||
brcmf_cfg80211_down(drvr->config);
|
||||
if (drvr->up == 0)
|
||||
if (drvr->bus_if->drvr_up == 0)
|
||||
return 0;
|
||||
|
||||
/* Set state and stop OS transmissions */
|
||||
drvr->up = false;
|
||||
drvr->bus_if->drvr_up = false;
|
||||
netif_stop_queue(ndev);
|
||||
|
||||
return 0;
|
||||
|
@ -814,7 +793,7 @@ static int brcmf_netdev_stop(struct net_device *ndev)
|
|||
static int brcmf_netdev_open(struct net_device *ndev)
|
||||
{
|
||||
struct brcmf_if *ifp = netdev_priv(ndev);
|
||||
struct brcmf_info *drvr_priv = ifp->info;
|
||||
struct brcmf_pub *drvr = ifp->drvr;
|
||||
u32 toe_ol;
|
||||
s32 ret = 0;
|
||||
|
||||
|
@ -822,28 +801,28 @@ static int brcmf_netdev_open(struct net_device *ndev)
|
|||
|
||||
if (ifp->idx == 0) { /* do it only for primary eth0 */
|
||||
/* try to bring up bus */
|
||||
ret = brcmf_bus_start(&drvr_priv->pub);
|
||||
ret = brcmf_bus_start(drvr->dev);
|
||||
if (ret != 0) {
|
||||
brcmf_dbg(ERROR, "failed with code %d\n", ret);
|
||||
return -1;
|
||||
}
|
||||
atomic_set(&drvr_priv->pend_8021x_cnt, 0);
|
||||
atomic_set(&drvr->pend_8021x_cnt, 0);
|
||||
|
||||
memcpy(ndev->dev_addr, drvr_priv->pub.mac, ETH_ALEN);
|
||||
memcpy(ndev->dev_addr, drvr->mac, ETH_ALEN);
|
||||
|
||||
/* Get current TOE mode from dongle */
|
||||
if (brcmf_toe_get(drvr_priv, ifp->idx, &toe_ol) >= 0
|
||||
if (brcmf_toe_get(drvr, ifp->idx, &toe_ol) >= 0
|
||||
&& (toe_ol & TOE_TX_CSUM_OL) != 0)
|
||||
drvr_priv->iflist[ifp->idx]->ndev->features |=
|
||||
drvr->iflist[ifp->idx]->ndev->features |=
|
||||
NETIF_F_IP_CSUM;
|
||||
else
|
||||
drvr_priv->iflist[ifp->idx]->ndev->features &=
|
||||
drvr->iflist[ifp->idx]->ndev->features &=
|
||||
~NETIF_F_IP_CSUM;
|
||||
}
|
||||
/* Allow transmit calls */
|
||||
netif_start_queue(ndev);
|
||||
drvr_priv->pub.up = true;
|
||||
if (brcmf_cfg80211_up(drvr_priv->pub.config)) {
|
||||
drvr->bus_if->drvr_up = true;
|
||||
if (brcmf_cfg80211_up(drvr->config)) {
|
||||
brcmf_dbg(ERROR, "failed to bring up cfg80211\n");
|
||||
return -1;
|
||||
}
|
||||
|
@ -862,14 +841,16 @@ static const struct net_device_ops brcmf_netdev_ops_pri = {
|
|||
};
|
||||
|
||||
int
|
||||
brcmf_add_if(struct brcmf_info *drvr_priv, int ifidx, char *name, u8 *mac_addr)
|
||||
brcmf_add_if(struct device *dev, int ifidx, char *name, u8 *mac_addr)
|
||||
{
|
||||
struct brcmf_if *ifp;
|
||||
struct net_device *ndev;
|
||||
struct brcmf_bus *bus_if = dev_get_drvdata(dev);
|
||||
struct brcmf_pub *drvr = bus_if->drvr;
|
||||
|
||||
brcmf_dbg(TRACE, "idx %d\n", ifidx);
|
||||
|
||||
ifp = drvr_priv->iflist[ifidx];
|
||||
ifp = drvr->iflist[ifidx];
|
||||
/*
|
||||
* Delete the existing interface before overwriting it
|
||||
* in case we missed the BRCMF_E_IF_DEL event.
|
||||
|
@ -880,7 +861,7 @@ brcmf_add_if(struct brcmf_info *drvr_priv, int ifidx, char *name, u8 *mac_addr)
|
|||
netif_stop_queue(ifp->ndev);
|
||||
unregister_netdev(ifp->ndev);
|
||||
free_netdev(ifp->ndev);
|
||||
drvr_priv->iflist[ifidx] = NULL;
|
||||
drvr->iflist[ifidx] = NULL;
|
||||
}
|
||||
|
||||
/* Allocate netdev, including space for private structure */
|
||||
|
@ -892,16 +873,16 @@ brcmf_add_if(struct brcmf_info *drvr_priv, int ifidx, char *name, u8 *mac_addr)
|
|||
|
||||
ifp = netdev_priv(ndev);
|
||||
ifp->ndev = ndev;
|
||||
ifp->info = drvr_priv;
|
||||
drvr_priv->iflist[ifidx] = ifp;
|
||||
ifp->drvr = drvr;
|
||||
drvr->iflist[ifidx] = ifp;
|
||||
ifp->idx = ifidx;
|
||||
if (mac_addr != NULL)
|
||||
memcpy(&ifp->mac_addr, mac_addr, ETH_ALEN);
|
||||
|
||||
if (brcmf_net_attach(&drvr_priv->pub, ifp->idx)) {
|
||||
if (brcmf_net_attach(drvr, ifp->idx)) {
|
||||
brcmf_dbg(ERROR, "brcmf_net_attach failed");
|
||||
free_netdev(ifp->ndev);
|
||||
drvr_priv->iflist[ifidx] = NULL;
|
||||
drvr->iflist[ifidx] = NULL;
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
|
@ -911,13 +892,13 @@ brcmf_add_if(struct brcmf_info *drvr_priv, int ifidx, char *name, u8 *mac_addr)
|
|||
return 0;
|
||||
}
|
||||
|
||||
void brcmf_del_if(struct brcmf_info *drvr_priv, int ifidx)
|
||||
void brcmf_del_if(struct brcmf_pub *drvr, int ifidx)
|
||||
{
|
||||
struct brcmf_if *ifp;
|
||||
|
||||
brcmf_dbg(TRACE, "idx %d\n", ifidx);
|
||||
|
||||
ifp = drvr_priv->iflist[ifidx];
|
||||
ifp = drvr->iflist[ifidx];
|
||||
if (!ifp) {
|
||||
brcmf_dbg(ERROR, "Null interface\n");
|
||||
return;
|
||||
|
@ -934,72 +915,70 @@ void brcmf_del_if(struct brcmf_info *drvr_priv, int ifidx)
|
|||
}
|
||||
|
||||
unregister_netdev(ifp->ndev);
|
||||
drvr_priv->iflist[ifidx] = NULL;
|
||||
drvr->iflist[ifidx] = NULL;
|
||||
if (ifidx == 0)
|
||||
brcmf_cfg80211_detach(drvr_priv->pub.config);
|
||||
brcmf_cfg80211_detach(drvr->config);
|
||||
free_netdev(ifp->ndev);
|
||||
}
|
||||
}
|
||||
|
||||
struct brcmf_pub *brcmf_attach(struct brcmf_sdio *bus, uint bus_hdrlen,
|
||||
struct device *dev)
|
||||
int brcmf_attach(uint bus_hdrlen, struct device *dev)
|
||||
{
|
||||
struct brcmf_info *drvr_priv = NULL;
|
||||
struct brcmf_pub *drvr = NULL;
|
||||
int ret = 0;
|
||||
|
||||
brcmf_dbg(TRACE, "Enter\n");
|
||||
|
||||
/* Allocate primary brcmf_info */
|
||||
drvr_priv = kzalloc(sizeof(struct brcmf_info), GFP_ATOMIC);
|
||||
if (!drvr_priv)
|
||||
goto fail;
|
||||
drvr = kzalloc(sizeof(struct brcmf_pub), GFP_ATOMIC);
|
||||
if (!drvr)
|
||||
return -ENOMEM;
|
||||
|
||||
mutex_init(&drvr_priv->proto_block);
|
||||
|
||||
/* Link to info module */
|
||||
drvr_priv->pub.info = drvr_priv;
|
||||
mutex_init(&drvr->proto_block);
|
||||
|
||||
/* Link to bus module */
|
||||
drvr_priv->pub.bus = bus;
|
||||
drvr_priv->pub.hdrlen = bus_hdrlen;
|
||||
drvr_priv->pub.bus_if = dev_get_drvdata(dev);
|
||||
drvr_priv->pub.dev = dev;
|
||||
drvr->hdrlen = bus_hdrlen;
|
||||
drvr->bus_if = dev_get_drvdata(dev);
|
||||
drvr->bus_if->drvr = drvr;
|
||||
drvr->dev = dev;
|
||||
|
||||
/* Attach and link in the protocol */
|
||||
if (brcmf_proto_attach(&drvr_priv->pub) != 0) {
|
||||
ret = brcmf_proto_attach(drvr);
|
||||
if (ret != 0) {
|
||||
brcmf_dbg(ERROR, "brcmf_prot_attach failed\n");
|
||||
goto fail;
|
||||
}
|
||||
|
||||
INIT_WORK(&drvr_priv->setmacaddr_work, _brcmf_set_mac_address);
|
||||
INIT_WORK(&drvr_priv->multicast_work, _brcmf_set_multicast_list);
|
||||
INIT_WORK(&drvr->setmacaddr_work, _brcmf_set_mac_address);
|
||||
INIT_WORK(&drvr->multicast_work, _brcmf_set_multicast_list);
|
||||
|
||||
return &drvr_priv->pub;
|
||||
return ret;
|
||||
|
||||
fail:
|
||||
if (drvr_priv)
|
||||
brcmf_detach(&drvr_priv->pub);
|
||||
brcmf_detach(dev);
|
||||
|
||||
return NULL;
|
||||
return ret;
|
||||
}
|
||||
|
||||
int brcmf_bus_start(struct brcmf_pub *drvr)
|
||||
int brcmf_bus_start(struct device *dev)
|
||||
{
|
||||
int ret = -1;
|
||||
struct brcmf_info *drvr_priv = drvr->info;
|
||||
/* Room for "event_msgs" + '\0' + bitvec */
|
||||
char iovbuf[BRCMF_EVENTING_MASK_LEN + 12];
|
||||
struct brcmf_bus *bus_if = dev_get_drvdata(dev);
|
||||
struct brcmf_pub *drvr = bus_if->drvr;
|
||||
|
||||
brcmf_dbg(TRACE, "\n");
|
||||
|
||||
/* Bring up the bus */
|
||||
ret = brcmf_sdbrcm_bus_init(drvr_priv->pub.dev);
|
||||
ret = bus_if->brcmf_bus_init(dev);
|
||||
if (ret != 0) {
|
||||
brcmf_dbg(ERROR, "brcmf_sdbrcm_bus_init failed %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* If bus is not ready, can't come up */
|
||||
if (drvr_priv->pub.bus_if->state != BRCMF_BUS_DATA) {
|
||||
if (bus_if->state != BRCMF_BUS_DATA) {
|
||||
brcmf_dbg(ERROR, "failed bus is not ready\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
@ -1036,7 +1015,7 @@ int brcmf_bus_start(struct brcmf_pub *drvr)
|
|||
drvr->pktfilter[0] = "100 0 0 0 0x01 0x00";
|
||||
|
||||
/* Bus is ready, do any protocol initialization */
|
||||
ret = brcmf_proto_init(&drvr_priv->pub);
|
||||
ret = brcmf_proto_init(drvr);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
|
@ -1045,14 +1024,13 @@ int brcmf_bus_start(struct brcmf_pub *drvr)
|
|||
|
||||
int brcmf_net_attach(struct brcmf_pub *drvr, int ifidx)
|
||||
{
|
||||
struct brcmf_info *drvr_priv = drvr->info;
|
||||
struct net_device *ndev;
|
||||
u8 temp_addr[ETH_ALEN] = {
|
||||
0x00, 0x90, 0x4c, 0x11, 0x22, 0x33};
|
||||
|
||||
brcmf_dbg(TRACE, "ifidx %d\n", ifidx);
|
||||
|
||||
ndev = drvr_priv->iflist[ifidx]->ndev;
|
||||
ndev = drvr->iflist[ifidx]->ndev;
|
||||
ndev->netdev_ops = &brcmf_netdev_ops_pri;
|
||||
|
||||
/*
|
||||
|
@ -1060,7 +1038,7 @@ int brcmf_net_attach(struct brcmf_pub *drvr, int ifidx)
|
|||
*/
|
||||
if (ifidx != 0) {
|
||||
/* for virtual interfaces use the primary MAC */
|
||||
memcpy(temp_addr, drvr_priv->pub.mac, ETH_ALEN);
|
||||
memcpy(temp_addr, drvr->mac, ETH_ALEN);
|
||||
|
||||
}
|
||||
|
||||
|
@ -1071,11 +1049,11 @@ int brcmf_net_attach(struct brcmf_pub *drvr, int ifidx)
|
|||
- Locally Administered address */
|
||||
|
||||
}
|
||||
ndev->hard_header_len = ETH_HLEN + drvr_priv->pub.hdrlen;
|
||||
ndev->hard_header_len = ETH_HLEN + drvr->hdrlen;
|
||||
ndev->ethtool_ops = &brcmf_ethtool_ops;
|
||||
|
||||
drvr_priv->pub.rxsz = ndev->mtu + ndev->hard_header_len +
|
||||
drvr_priv->pub.hdrlen;
|
||||
drvr->rxsz = ndev->mtu + ndev->hard_header_len +
|
||||
drvr->hdrlen;
|
||||
|
||||
memcpy(ndev->dev_addr, temp_addr, ETH_ALEN);
|
||||
|
||||
|
@ -1104,77 +1082,46 @@ fail:
|
|||
|
||||
static void brcmf_bus_detach(struct brcmf_pub *drvr)
|
||||
{
|
||||
struct brcmf_info *drvr_priv;
|
||||
|
||||
brcmf_dbg(TRACE, "Enter\n");
|
||||
|
||||
if (drvr) {
|
||||
drvr_priv = drvr->info;
|
||||
if (drvr_priv) {
|
||||
/* Stop the protocol module */
|
||||
brcmf_proto_stop(&drvr_priv->pub);
|
||||
brcmf_proto_stop(drvr);
|
||||
|
||||
/* Stop the bus module */
|
||||
brcmf_sdbrcm_bus_stop(drvr_priv->pub.dev);
|
||||
}
|
||||
drvr->bus_if->brcmf_bus_stop(drvr->dev);
|
||||
}
|
||||
}
|
||||
|
||||
void brcmf_detach(struct brcmf_pub *drvr)
|
||||
void brcmf_detach(struct device *dev)
|
||||
{
|
||||
struct brcmf_info *drvr_priv;
|
||||
int i;
|
||||
struct brcmf_bus *bus_if = dev_get_drvdata(dev);
|
||||
struct brcmf_pub *drvr = bus_if->drvr;
|
||||
|
||||
brcmf_dbg(TRACE, "Enter\n");
|
||||
|
||||
if (drvr) {
|
||||
drvr_priv = drvr->info;
|
||||
if (drvr_priv) {
|
||||
int i;
|
||||
|
||||
/* make sure primary interface removed last */
|
||||
for (i = BRCMF_MAX_IFS-1; i > -1; i--)
|
||||
if (drvr_priv->iflist[i])
|
||||
brcmf_del_if(drvr_priv, i);
|
||||
if (drvr->iflist[i])
|
||||
brcmf_del_if(drvr, i);
|
||||
|
||||
cancel_work_sync(&drvr_priv->setmacaddr_work);
|
||||
cancel_work_sync(&drvr_priv->multicast_work);
|
||||
cancel_work_sync(&drvr->setmacaddr_work);
|
||||
cancel_work_sync(&drvr->multicast_work);
|
||||
|
||||
brcmf_bus_detach(drvr);
|
||||
|
||||
if (drvr->prot)
|
||||
brcmf_proto_detach(drvr);
|
||||
|
||||
kfree(drvr_priv);
|
||||
}
|
||||
}
|
||||
bus_if->drvr = NULL;
|
||||
kfree(drvr);
|
||||
}
|
||||
|
||||
int brcmf_os_proto_block(struct brcmf_pub *drvr)
|
||||
static int brcmf_get_pend_8021x_cnt(struct brcmf_pub *drvr)
|
||||
{
|
||||
struct brcmf_info *drvr_priv = drvr->info;
|
||||
|
||||
if (drvr_priv) {
|
||||
mutex_lock(&drvr_priv->proto_block);
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
int brcmf_os_proto_unblock(struct brcmf_pub *drvr)
|
||||
{
|
||||
struct brcmf_info *drvr_priv = drvr->info;
|
||||
|
||||
if (drvr_priv) {
|
||||
mutex_unlock(&drvr_priv->proto_block);
|
||||
return 1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int brcmf_get_pend_8021x_cnt(struct brcmf_info *drvr_priv)
|
||||
{
|
||||
return atomic_read(&drvr_priv->pend_8021x_cnt);
|
||||
return atomic_read(&drvr->pend_8021x_cnt);
|
||||
}
|
||||
|
||||
#define MAX_WAIT_FOR_8021X_TX 10
|
||||
|
@ -1182,10 +1129,10 @@ static int brcmf_get_pend_8021x_cnt(struct brcmf_info *drvr_priv)
|
|||
int brcmf_netdev_wait_pend8021x(struct net_device *ndev)
|
||||
{
|
||||
struct brcmf_if *ifp = netdev_priv(ndev);
|
||||
struct brcmf_info *drvr_priv = ifp->info;
|
||||
struct brcmf_pub *drvr = ifp->drvr;
|
||||
int timeout = 10 * HZ / 1000;
|
||||
int ntimes = MAX_WAIT_FOR_8021X_TX;
|
||||
int pend = brcmf_get_pend_8021x_cnt(drvr_priv);
|
||||
int pend = brcmf_get_pend_8021x_cnt(drvr);
|
||||
|
||||
while (ntimes && pend) {
|
||||
if (pend) {
|
||||
|
@ -1194,7 +1141,7 @@ int brcmf_netdev_wait_pend8021x(struct net_device *ndev)
|
|||
set_current_state(TASK_RUNNING);
|
||||
ntimes--;
|
||||
}
|
||||
pend = brcmf_get_pend_8021x_cnt(drvr_priv);
|
||||
pend = brcmf_get_pend_8021x_cnt(drvr);
|
||||
}
|
||||
return pend;
|
||||
}
|
||||
|
|
|
@ -41,17 +41,10 @@ extern void brcmf_proto_stop(struct brcmf_pub *drvr);
|
|||
extern void brcmf_proto_hdrpush(struct brcmf_pub *, int ifidx,
|
||||
struct sk_buff *txp);
|
||||
|
||||
/* Remove any protocol-specific data header. */
|
||||
extern int brcmf_proto_hdrpull(struct brcmf_pub *, int *ifidx,
|
||||
struct sk_buff *rxp);
|
||||
|
||||
/* Use protocol to issue command to dongle */
|
||||
extern int brcmf_proto_dcmd(struct brcmf_pub *drvr, int ifidx,
|
||||
struct brcmf_dcmd *dcmd, int len);
|
||||
|
||||
/* Update local copy of dongle statistics */
|
||||
extern void brcmf_proto_dstats(struct brcmf_pub *drvr);
|
||||
|
||||
extern int brcmf_c_preinit_dcmds(struct brcmf_pub *drvr);
|
||||
|
||||
extern int brcmf_proto_cdc_set_dcmd(struct brcmf_pub *drvr, int ifidx,
|
||||
|
|
|
@ -87,9 +87,7 @@ struct rte_console {
|
|||
#endif /* BCMDBG */
|
||||
#include <chipcommon.h>
|
||||
|
||||
#include "dhd.h"
|
||||
#include "dhd_bus.h"
|
||||
#include "dhd_proto.h"
|
||||
#include "dhd_dbg.h"
|
||||
|
||||
#define TXQLEN 2048 /* bulk tx queue length */
|
||||
|
@ -314,6 +312,12 @@ struct rte_console {
|
|||
MODULE_FIRMWARE(BRCMFMAC_FW_NAME);
|
||||
MODULE_FIRMWARE(BRCMFMAC_NV_NAME);
|
||||
|
||||
#define BRCMF_IDLE_IMMEDIATE (-1) /* Enter idle immediately */
|
||||
#define BRCMF_IDLE_ACTIVE 0 /* Do not request any SD clock change
|
||||
* when idle
|
||||
*/
|
||||
#define BRCMF_IDLE_INTERVAL 1
|
||||
|
||||
/*
|
||||
* Conversion of 802.1D priority to precedence level
|
||||
*/
|
||||
|
@ -450,8 +454,6 @@ struct sdpcm_shared_le {
|
|||
/* misc chip info needed by some of the routines */
|
||||
/* Private data for SDIO bus interaction */
|
||||
struct brcmf_sdio {
|
||||
struct brcmf_pub *drvr;
|
||||
|
||||
struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
|
||||
struct chip_info *ci; /* Chip info struct */
|
||||
char *vars; /* Variables (from CIS and/or other) */
|
||||
|
@ -546,6 +548,13 @@ struct brcmf_sdio {
|
|||
uint f2rxdata; /* Number of frame data reads */
|
||||
uint f2txdata; /* Number of f2 frame writes */
|
||||
uint f1regdata; /* Number of f1 register accesses */
|
||||
uint tickcnt; /* Number of watchdog been schedule */
|
||||
unsigned long tx_ctlerrs; /* Err of sending ctrl frames */
|
||||
unsigned long tx_ctlpkts; /* Ctrl frames sent to dongle */
|
||||
unsigned long rx_ctlerrs; /* Err of processing rx ctrl frames */
|
||||
unsigned long rx_ctlpkts; /* Ctrl frames processed from dongle */
|
||||
unsigned long rx_readahead_cnt; /* Number of packets where header
|
||||
* read-ahead was used. */
|
||||
|
||||
u8 *ctrl_frame_buf;
|
||||
u32 ctrl_frame_len;
|
||||
|
@ -568,6 +577,8 @@ struct brcmf_sdio {
|
|||
|
||||
const struct firmware *firmware;
|
||||
u32 fw_ptr;
|
||||
|
||||
bool txoff; /* Transmit flow-controlled */
|
||||
};
|
||||
|
||||
/* clkstate */
|
||||
|
@ -1068,7 +1079,7 @@ static void brcmf_sdbrcm_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
|
|||
|
||||
/* If we can't reach the device, signal failure */
|
||||
if (err || brcmf_sdcard_regfail(bus->sdiodev))
|
||||
bus->drvr->bus_if->state = BRCMF_BUS_DOWN;
|
||||
bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
|
||||
}
|
||||
|
||||
/* copy a buffer into a pkt buffer chain */
|
||||
|
@ -1256,7 +1267,7 @@ static u8 brcmf_sdbrcm_rxglom(struct brcmf_sdio *bus, u8 rxseq)
|
|||
if (errcode < 0) {
|
||||
brcmf_dbg(ERROR, "glom read of %d bytes failed: %d\n",
|
||||
dlen, errcode);
|
||||
bus->drvr->rx_errors++;
|
||||
bus->sdiodev->bus_if->dstats.rx_errors++;
|
||||
|
||||
if (bus->glomerr++ < 3) {
|
||||
brcmf_sdbrcm_rxfail(bus, true, true);
|
||||
|
@ -1437,10 +1448,10 @@ static u8 brcmf_sdbrcm_rxglom(struct brcmf_sdio *bus, u8 rxseq)
|
|||
skb_unlink(pfirst, &bus->glom);
|
||||
brcmu_pkt_buf_free_skb(pfirst);
|
||||
continue;
|
||||
} else if (brcmf_proto_hdrpull(bus->drvr, &ifidx,
|
||||
pfirst) != 0) {
|
||||
} else if (brcmf_proto_hdrpull(bus->sdiodev->dev,
|
||||
&ifidx, pfirst) != 0) {
|
||||
brcmf_dbg(ERROR, "rx protocol error\n");
|
||||
bus->drvr->rx_errors++;
|
||||
bus->sdiodev->bus_if->dstats.rx_errors++;
|
||||
skb_unlink(pfirst, &bus->glom);
|
||||
brcmu_pkt_buf_free_skb(pfirst);
|
||||
continue;
|
||||
|
@ -1461,7 +1472,7 @@ static u8 brcmf_sdbrcm_rxglom(struct brcmf_sdio *bus, u8 rxseq)
|
|||
/* sent any remaining packets up */
|
||||
if (bus->glom.qlen) {
|
||||
up(&bus->sdsem);
|
||||
brcmf_rx_frame(bus->drvr, ifidx, &bus->glom);
|
||||
brcmf_rx_frame(bus->sdiodev->dev, ifidx, &bus->glom);
|
||||
down(&bus->sdsem);
|
||||
}
|
||||
|
||||
|
@ -1527,7 +1538,7 @@ brcmf_sdbrcm_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
|
|||
if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
|
||||
pad = bus->blocksize - (rdlen % bus->blocksize);
|
||||
if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
|
||||
((len + pad) < bus->drvr->maxctl))
|
||||
((len + pad) < bus->sdiodev->bus_if->maxctl))
|
||||
rdlen += pad;
|
||||
} else if (rdlen % BRCMF_SDALIGN) {
|
||||
rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
|
||||
|
@ -1538,18 +1549,18 @@ brcmf_sdbrcm_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
|
|||
rdlen = roundup(rdlen, ALIGNMENT);
|
||||
|
||||
/* Drop if the read is too big or it exceeds our maximum */
|
||||
if ((rdlen + BRCMF_FIRSTREAD) > bus->drvr->maxctl) {
|
||||
if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
|
||||
brcmf_dbg(ERROR, "%d-byte control read exceeds %d-byte buffer\n",
|
||||
rdlen, bus->drvr->maxctl);
|
||||
bus->drvr->rx_errors++;
|
||||
rdlen, bus->sdiodev->bus_if->maxctl);
|
||||
bus->sdiodev->bus_if->dstats.rx_errors++;
|
||||
brcmf_sdbrcm_rxfail(bus, false, false);
|
||||
goto done;
|
||||
}
|
||||
|
||||
if ((len - doff) > bus->drvr->maxctl) {
|
||||
if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
|
||||
brcmf_dbg(ERROR, "%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
|
||||
len, len - doff, bus->drvr->maxctl);
|
||||
bus->drvr->rx_errors++;
|
||||
len, len - doff, bus->sdiodev->bus_if->maxctl);
|
||||
bus->sdiodev->bus_if->dstats.rx_errors++;
|
||||
bus->rx_toolong++;
|
||||
brcmf_sdbrcm_rxfail(bus, false, false);
|
||||
goto done;
|
||||
|
@ -1623,7 +1634,7 @@ brcmf_alloc_pkt_and_read(struct brcmf_sdio *bus, u16 rdlen,
|
|||
brcmf_dbg(ERROR, "(nextlen): read %d bytes failed: %d\n",
|
||||
rdlen, sdret);
|
||||
brcmu_pkt_buf_free_skb(*pkt);
|
||||
bus->drvr->rx_errors++;
|
||||
bus->sdiodev->bus_if->dstats.rx_errors++;
|
||||
/* Force retry w/normal header read.
|
||||
* Don't attempt NAK for
|
||||
* gSPI
|
||||
|
@ -1715,7 +1726,7 @@ brcmf_sdbrcm_readframes(struct brcmf_sdio *bus, uint maxframes, bool *finished)
|
|||
|
||||
for (rxseq = bus->rx_seq, rxleft = maxframes;
|
||||
!bus->rxskip && rxleft &&
|
||||
bus->drvr->bus_if->state != BRCMF_BUS_DOWN;
|
||||
bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN;
|
||||
rxseq++, rxleft--) {
|
||||
|
||||
/* Handle glomming separately */
|
||||
|
@ -1774,7 +1785,7 @@ brcmf_sdbrcm_readframes(struct brcmf_sdio *bus, uint maxframes, bool *finished)
|
|||
bus->nextlen = 0;
|
||||
}
|
||||
|
||||
bus->drvr->rx_readahead_cnt++;
|
||||
bus->rx_readahead_cnt++;
|
||||
|
||||
/* Handle Flow Control */
|
||||
fcbits = SDPCM_FCMASK_VALUE(
|
||||
|
@ -1972,7 +1983,7 @@ brcmf_sdbrcm_readframes(struct brcmf_sdio *bus, uint maxframes, bool *finished)
|
|||
/* Too long -- skip this frame */
|
||||
brcmf_dbg(ERROR, "too long: len %d rdlen %d\n",
|
||||
len, rdlen);
|
||||
bus->drvr->rx_errors++;
|
||||
bus->sdiodev->bus_if->dstats.rx_errors++;
|
||||
bus->rx_toolong++;
|
||||
brcmf_sdbrcm_rxfail(bus, false, false);
|
||||
continue;
|
||||
|
@ -1984,7 +1995,7 @@ brcmf_sdbrcm_readframes(struct brcmf_sdio *bus, uint maxframes, bool *finished)
|
|||
/* Give up on data, request rtx of events */
|
||||
brcmf_dbg(ERROR, "brcmu_pkt_buf_get_skb failed: rdlen %d chan %d\n",
|
||||
rdlen, chan);
|
||||
bus->drvr->rx_dropped++;
|
||||
bus->sdiodev->bus_if->dstats.rx_dropped++;
|
||||
brcmf_sdbrcm_rxfail(bus, false, RETRYCHAN(chan));
|
||||
continue;
|
||||
}
|
||||
|
@ -2004,7 +2015,7 @@ brcmf_sdbrcm_readframes(struct brcmf_sdio *bus, uint maxframes, bool *finished)
|
|||
: ((chan == SDPCM_DATA_CHANNEL) ? "data"
|
||||
: "test")), sdret);
|
||||
brcmu_pkt_buf_free_skb(pkt);
|
||||
bus->drvr->rx_errors++;
|
||||
bus->sdiodev->bus_if->dstats.rx_errors++;
|
||||
brcmf_sdbrcm_rxfail(bus, true, RETRYCHAN(chan));
|
||||
continue;
|
||||
}
|
||||
|
@ -2053,16 +2064,17 @@ deliver:
|
|||
if (pkt->len == 0) {
|
||||
brcmu_pkt_buf_free_skb(pkt);
|
||||
continue;
|
||||
} else if (brcmf_proto_hdrpull(bus->drvr, &ifidx, pkt) != 0) {
|
||||
} else if (brcmf_proto_hdrpull(bus->sdiodev->dev, &ifidx,
|
||||
pkt) != 0) {
|
||||
brcmf_dbg(ERROR, "rx protocol error\n");
|
||||
brcmu_pkt_buf_free_skb(pkt);
|
||||
bus->drvr->rx_errors++;
|
||||
bus->sdiodev->bus_if->dstats.rx_errors++;
|
||||
continue;
|
||||
}
|
||||
|
||||
/* Unlock during rx call */
|
||||
up(&bus->sdsem);
|
||||
brcmf_rx_packet(bus->drvr, ifidx, pkt);
|
||||
brcmf_rx_packet(bus->sdiodev->dev, ifidx, pkt);
|
||||
down(&bus->sdsem);
|
||||
}
|
||||
rxcount = maxframes - rxleft;
|
||||
|
@ -2122,7 +2134,7 @@ static int brcmf_sdbrcm_txpkt(struct brcmf_sdio *bus, struct sk_buff *pkt,
|
|||
if (skb_headroom(pkt) < pad) {
|
||||
brcmf_dbg(INFO, "insufficient headroom %d for %d pad\n",
|
||||
skb_headroom(pkt), pad);
|
||||
bus->drvr->tx_realloc++;
|
||||
bus->sdiodev->bus_if->tx_realloc++;
|
||||
new = brcmu_pkt_buf_get_skb(pkt->len + BRCMF_SDALIGN);
|
||||
if (!new) {
|
||||
brcmf_dbg(ERROR, "couldn't allocate new %d-byte packet\n",
|
||||
|
@ -2230,7 +2242,7 @@ done:
|
|||
/* restore pkt buffer pointer before calling tx complete routine */
|
||||
skb_pull(pkt, SDPCM_HDRLEN + pad);
|
||||
up(&bus->sdsem);
|
||||
brcmf_txcomplete(bus->drvr, pkt, ret != 0);
|
||||
brcmf_txcomplete(bus->sdiodev->dev, pkt, ret != 0);
|
||||
down(&bus->sdsem);
|
||||
|
||||
if (free_pkt)
|
||||
|
@ -2249,8 +2261,6 @@ static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes)
|
|||
uint datalen;
|
||||
u8 tx_prec_map;
|
||||
|
||||
struct brcmf_pub *drvr = bus->drvr;
|
||||
|
||||
brcmf_dbg(TRACE, "Enter\n");
|
||||
|
||||
tx_prec_map = ~bus->flowcontrol;
|
||||
|
@ -2268,9 +2278,9 @@ static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes)
|
|||
|
||||
ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
|
||||
if (ret)
|
||||
bus->drvr->tx_errors++;
|
||||
bus->sdiodev->bus_if->dstats.tx_errors++;
|
||||
else
|
||||
bus->drvr->dstats.tx_bytes += datalen;
|
||||
bus->sdiodev->bus_if->dstats.tx_bytes += datalen;
|
||||
|
||||
/* In poll mode, need to check for other events */
|
||||
if (!bus->intr && cnt) {
|
||||
|
@ -2287,13 +2297,97 @@ static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes)
|
|||
}
|
||||
|
||||
/* Deflow-control stack if needed */
|
||||
if (drvr->up && (drvr->bus_if->state == BRCMF_BUS_DATA) &&
|
||||
drvr->txoff && (pktq_len(&bus->txq) < TXLOW))
|
||||
brcmf_txflowcontrol(drvr, 0, OFF);
|
||||
if (bus->sdiodev->bus_if->drvr_up &&
|
||||
(bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
|
||||
bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
|
||||
bus->txoff = OFF;
|
||||
brcmf_txflowcontrol(bus->sdiodev->dev, 0, OFF);
|
||||
}
|
||||
|
||||
return cnt;
|
||||
}
|
||||
|
||||
static void brcmf_sdbrcm_bus_stop(struct device *dev)
|
||||
{
|
||||
u32 local_hostintmask;
|
||||
u8 saveclk;
|
||||
uint retries;
|
||||
int err;
|
||||
struct brcmf_bus *bus_if = dev_get_drvdata(dev);
|
||||
struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv;
|
||||
struct brcmf_sdio *bus = sdiodev->bus;
|
||||
|
||||
brcmf_dbg(TRACE, "Enter\n");
|
||||
|
||||
if (bus->watchdog_tsk) {
|
||||
send_sig(SIGTERM, bus->watchdog_tsk, 1);
|
||||
kthread_stop(bus->watchdog_tsk);
|
||||
bus->watchdog_tsk = NULL;
|
||||
}
|
||||
|
||||
if (bus->dpc_tsk && bus->dpc_tsk != current) {
|
||||
send_sig(SIGTERM, bus->dpc_tsk, 1);
|
||||
kthread_stop(bus->dpc_tsk);
|
||||
bus->dpc_tsk = NULL;
|
||||
}
|
||||
|
||||
down(&bus->sdsem);
|
||||
|
||||
bus_wake(bus);
|
||||
|
||||
/* Enable clock for device interrupts */
|
||||
brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
|
||||
|
||||
/* Disable and clear interrupts at the chip level also */
|
||||
w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask), &retries);
|
||||
local_hostintmask = bus->hostintmask;
|
||||
bus->hostintmask = 0;
|
||||
|
||||
/* Change our idea of bus state */
|
||||
bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
|
||||
|
||||
/* Force clocks on backplane to be sure F2 interrupt propagates */
|
||||
saveclk = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
|
||||
SBSDIO_FUNC1_CHIPCLKCSR, &err);
|
||||
if (!err) {
|
||||
brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
|
||||
SBSDIO_FUNC1_CHIPCLKCSR,
|
||||
(saveclk | SBSDIO_FORCE_HT), &err);
|
||||
}
|
||||
if (err)
|
||||
brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);
|
||||
|
||||
/* Turn off the bus (F2), free any pending packets */
|
||||
brcmf_dbg(INTR, "disable SDIO interrupts\n");
|
||||
brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
|
||||
SDIO_FUNC_ENABLE_1, NULL);
|
||||
|
||||
/* Clear any pending interrupts now that F2 is disabled */
|
||||
w_sdreg32(bus, local_hostintmask,
|
||||
offsetof(struct sdpcmd_regs, intstatus), &retries);
|
||||
|
||||
/* Turn off the backplane clock (only) */
|
||||
brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
|
||||
|
||||
/* Clear the data packet queues */
|
||||
brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
|
||||
|
||||
/* Clear any held glomming stuff */
|
||||
if (bus->glomd)
|
||||
brcmu_pkt_buf_free_skb(bus->glomd);
|
||||
brcmf_sdbrcm_free_glom(bus);
|
||||
|
||||
/* Clear rx control and wake any waiters */
|
||||
bus->rxlen = 0;
|
||||
brcmf_sdbrcm_dcmd_resp_wake(bus);
|
||||
|
||||
/* Reset some F2 state stuff */
|
||||
bus->rxskip = false;
|
||||
bus->tx_seq = bus->rx_seq = 0;
|
||||
|
||||
up(&bus->sdsem);
|
||||
}
|
||||
|
||||
static bool brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)
|
||||
{
|
||||
u32 intstatus, newstatus = 0;
|
||||
|
@ -2322,7 +2416,7 @@ static bool brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)
|
|||
SBSDIO_DEVICE_CTL, &err);
|
||||
if (err) {
|
||||
brcmf_dbg(ERROR, "error reading DEVCTL: %d\n", err);
|
||||
bus->drvr->bus_if->state = BRCMF_BUS_DOWN;
|
||||
bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
|
||||
}
|
||||
#endif /* BCMDBG */
|
||||
|
||||
|
@ -2332,7 +2426,7 @@ static bool brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)
|
|||
if (err) {
|
||||
brcmf_dbg(ERROR, "error reading CSR: %d\n",
|
||||
err);
|
||||
bus->drvr->bus_if->state = BRCMF_BUS_DOWN;
|
||||
bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
|
||||
}
|
||||
|
||||
brcmf_dbg(INFO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
|
||||
|
@ -2345,7 +2439,7 @@ static bool brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)
|
|||
if (err) {
|
||||
brcmf_dbg(ERROR, "error reading DEVCTL: %d\n",
|
||||
err);
|
||||
bus->drvr->bus_if->state = BRCMF_BUS_DOWN;
|
||||
bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
|
||||
}
|
||||
devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
|
||||
brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
|
||||
|
@ -2353,7 +2447,7 @@ static bool brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)
|
|||
if (err) {
|
||||
brcmf_dbg(ERROR, "error writing DEVCTL: %d\n",
|
||||
err);
|
||||
bus->drvr->bus_if->state = BRCMF_BUS_DOWN;
|
||||
bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
|
||||
}
|
||||
bus->clkstate = CLK_AVAIL;
|
||||
} else {
|
||||
|
@ -2509,11 +2603,11 @@ clkwait:
|
|||
else await next interrupt */
|
||||
/* On failed register access, all bets are off:
|
||||
no resched or interrupts */
|
||||
if ((bus->drvr->bus_if->state == BRCMF_BUS_DOWN) ||
|
||||
if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) ||
|
||||
brcmf_sdcard_regfail(bus->sdiodev)) {
|
||||
brcmf_dbg(ERROR, "failed backplane access over SDIO, halting operation %d\n",
|
||||
brcmf_sdcard_regfail(bus->sdiodev));
|
||||
bus->drvr->bus_if->state = BRCMF_BUS_DOWN;
|
||||
bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
|
||||
bus->intstatus = 0;
|
||||
} else if (bus->clkstate == CLK_PENDING) {
|
||||
brcmf_dbg(INFO, "rescheduled due to CLK_PENDING awaiting I_CHIPACTIVE interrupt\n");
|
||||
|
@ -2550,7 +2644,7 @@ static int brcmf_sdbrcm_dpc_thread(void *data)
|
|||
if (!wait_for_completion_interruptible(&bus->dpc_wait)) {
|
||||
/* Call bus dpc unless it indicated down
|
||||
(then clean stop) */
|
||||
if (bus->drvr->bus_if->state != BRCMF_BUS_DOWN) {
|
||||
if (bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN) {
|
||||
if (brcmf_sdbrcm_dpc(bus))
|
||||
complete(&bus->dpc_wait);
|
||||
} else {
|
||||
|
@ -2565,7 +2659,7 @@ static int brcmf_sdbrcm_dpc_thread(void *data)
|
|||
return 0;
|
||||
}
|
||||
|
||||
int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt)
|
||||
static int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt)
|
||||
{
|
||||
int ret = -EBADE;
|
||||
uint datalen, prec;
|
||||
|
@ -2590,9 +2684,10 @@ int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt)
|
|||
|
||||
/* Priority based enq */
|
||||
spin_lock_bh(&bus->txqlock);
|
||||
if (brcmf_c_prec_enq(bus->drvr, &bus->txq, pkt, prec) == false) {
|
||||
if (brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec) ==
|
||||
false) {
|
||||
skb_pull(pkt, SDPCM_HDRLEN);
|
||||
brcmf_txcomplete(bus->drvr, pkt, false);
|
||||
brcmf_txcomplete(bus->sdiodev->dev, pkt, false);
|
||||
brcmu_pkt_buf_free_skb(pkt);
|
||||
brcmf_dbg(ERROR, "out of bus->txq !!!\n");
|
||||
ret = -ENOSR;
|
||||
|
@ -2601,8 +2696,10 @@ int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt)
|
|||
}
|
||||
spin_unlock_bh(&bus->txqlock);
|
||||
|
||||
if (pktq_len(&bus->txq) >= TXHI)
|
||||
brcmf_txflowcontrol(bus->drvr, 0, ON);
|
||||
if (pktq_len(&bus->txq) >= TXHI) {
|
||||
bus->txoff = ON;
|
||||
brcmf_txflowcontrol(bus->sdiodev->dev, 0, ON);
|
||||
}
|
||||
|
||||
#ifdef BCMDBG
|
||||
if (pktq_plen(&bus->txq, prec) > qcount[prec])
|
||||
|
@ -2799,7 +2896,7 @@ static int brcmf_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
|
|||
return ret;
|
||||
}
|
||||
|
||||
int
|
||||
static int
|
||||
brcmf_sdbrcm_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
|
||||
{
|
||||
u8 *frame;
|
||||
|
@ -2910,14 +3007,14 @@ brcmf_sdbrcm_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
|
|||
up(&bus->sdsem);
|
||||
|
||||
if (ret)
|
||||
bus->drvr->tx_ctlerrs++;
|
||||
bus->tx_ctlerrs++;
|
||||
else
|
||||
bus->drvr->tx_ctlpkts++;
|
||||
bus->tx_ctlpkts++;
|
||||
|
||||
return ret ? -EIO : 0;
|
||||
}
|
||||
|
||||
int
|
||||
static int
|
||||
brcmf_sdbrcm_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
|
||||
{
|
||||
int timeleft;
|
||||
|
@ -2951,9 +3048,9 @@ brcmf_sdbrcm_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
|
|||
}
|
||||
|
||||
if (rxlen)
|
||||
bus->drvr->rx_ctlpkts++;
|
||||
bus->rx_ctlpkts++;
|
||||
else
|
||||
bus->drvr->rx_ctlerrs++;
|
||||
bus->rx_ctlerrs++;
|
||||
|
||||
return rxlen ? (int)rxlen : -ETIMEDOUT;
|
||||
}
|
||||
|
@ -2965,7 +3062,7 @@ static int brcmf_sdbrcm_downloadvars(struct brcmf_sdio *bus, void *arg, int len)
|
|||
brcmf_dbg(TRACE, "Enter\n");
|
||||
|
||||
/* Basic sanity checks */
|
||||
if (bus->drvr->up) {
|
||||
if (bus->sdiodev->bus_if->drvr_up) {
|
||||
bcmerror = -EISCONN;
|
||||
goto err;
|
||||
}
|
||||
|
@ -3121,7 +3218,7 @@ static int brcmf_sdbrcm_download_state(struct brcmf_sdio *bus, bool enter)
|
|||
/* Allow HT Clock now that the ARM is running. */
|
||||
bus->alp_only = false;
|
||||
|
||||
bus->drvr->bus_if->state = BRCMF_BUS_LOAD;
|
||||
bus->sdiodev->bus_if->state = BRCMF_BUS_LOAD;
|
||||
}
|
||||
fail:
|
||||
return bcmerror;
|
||||
|
@ -3330,88 +3427,7 @@ brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
|
|||
return ret;
|
||||
}
|
||||
|
||||
void brcmf_sdbrcm_bus_stop(struct device *dev)
|
||||
{
|
||||
u32 local_hostintmask;
|
||||
u8 saveclk;
|
||||
uint retries;
|
||||
int err;
|
||||
struct brcmf_bus *bus_if = dev_get_drvdata(dev);
|
||||
struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv;
|
||||
struct brcmf_sdio *bus = sdiodev->bus;
|
||||
|
||||
brcmf_dbg(TRACE, "Enter\n");
|
||||
|
||||
if (bus->watchdog_tsk) {
|
||||
send_sig(SIGTERM, bus->watchdog_tsk, 1);
|
||||
kthread_stop(bus->watchdog_tsk);
|
||||
bus->watchdog_tsk = NULL;
|
||||
}
|
||||
|
||||
if (bus->dpc_tsk && bus->dpc_tsk != current) {
|
||||
send_sig(SIGTERM, bus->dpc_tsk, 1);
|
||||
kthread_stop(bus->dpc_tsk);
|
||||
bus->dpc_tsk = NULL;
|
||||
}
|
||||
|
||||
down(&bus->sdsem);
|
||||
|
||||
bus_wake(bus);
|
||||
|
||||
/* Enable clock for device interrupts */
|
||||
brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
|
||||
|
||||
/* Disable and clear interrupts at the chip level also */
|
||||
w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask), &retries);
|
||||
local_hostintmask = bus->hostintmask;
|
||||
bus->hostintmask = 0;
|
||||
|
||||
/* Change our idea of bus state */
|
||||
bus->drvr->bus_if->state = BRCMF_BUS_DOWN;
|
||||
|
||||
/* Force clocks on backplane to be sure F2 interrupt propagates */
|
||||
saveclk = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
|
||||
SBSDIO_FUNC1_CHIPCLKCSR, &err);
|
||||
if (!err) {
|
||||
brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
|
||||
SBSDIO_FUNC1_CHIPCLKCSR,
|
||||
(saveclk | SBSDIO_FORCE_HT), &err);
|
||||
}
|
||||
if (err)
|
||||
brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);
|
||||
|
||||
/* Turn off the bus (F2), free any pending packets */
|
||||
brcmf_dbg(INTR, "disable SDIO interrupts\n");
|
||||
brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
|
||||
SDIO_FUNC_ENABLE_1, NULL);
|
||||
|
||||
/* Clear any pending interrupts now that F2 is disabled */
|
||||
w_sdreg32(bus, local_hostintmask,
|
||||
offsetof(struct sdpcmd_regs, intstatus), &retries);
|
||||
|
||||
/* Turn off the backplane clock (only) */
|
||||
brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
|
||||
|
||||
/* Clear the data packet queues */
|
||||
brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
|
||||
|
||||
/* Clear any held glomming stuff */
|
||||
if (bus->glomd)
|
||||
brcmu_pkt_buf_free_skb(bus->glomd);
|
||||
brcmf_sdbrcm_free_glom(bus);
|
||||
|
||||
/* Clear rx control and wake any waiters */
|
||||
bus->rxlen = 0;
|
||||
brcmf_sdbrcm_dcmd_resp_wake(bus);
|
||||
|
||||
/* Reset some F2 state stuff */
|
||||
bus->rxskip = false;
|
||||
bus->tx_seq = bus->rx_seq = 0;
|
||||
|
||||
up(&bus->sdsem);
|
||||
}
|
||||
|
||||
int brcmf_sdbrcm_bus_init(struct device *dev)
|
||||
static int brcmf_sdbrcm_bus_init(struct device *dev)
|
||||
{
|
||||
struct brcmf_bus *bus_if = dev_get_drvdata(dev);
|
||||
struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv;
|
||||
|
@ -3430,11 +3446,11 @@ int brcmf_sdbrcm_bus_init(struct device *dev)
|
|||
return -1;
|
||||
}
|
||||
|
||||
if (!bus->drvr)
|
||||
if (!bus->sdiodev->bus_if->drvr)
|
||||
return 0;
|
||||
|
||||
/* Start the watchdog timer */
|
||||
bus->drvr->tickcnt = 0;
|
||||
bus->tickcnt = 0;
|
||||
brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
|
||||
|
||||
down(&bus->sdsem);
|
||||
|
@ -3526,7 +3542,7 @@ void brcmf_sdbrcm_isr(void *arg)
|
|||
return;
|
||||
}
|
||||
|
||||
if (bus->drvr->bus_if->state == BRCMF_BUS_DOWN) {
|
||||
if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
|
||||
brcmf_dbg(ERROR, "bus is down. we have nothing to do\n");
|
||||
return;
|
||||
}
|
||||
|
@ -3657,9 +3673,9 @@ static bool brcmf_sdbrcm_probe_malloc(struct brcmf_sdio *bus)
|
|||
{
|
||||
brcmf_dbg(TRACE, "Enter\n");
|
||||
|
||||
if (bus->drvr->maxctl) {
|
||||
if (bus->sdiodev->bus_if->maxctl) {
|
||||
bus->rxblen =
|
||||
roundup((bus->drvr->maxctl + SDPCM_HDRLEN),
|
||||
roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
|
||||
ALIGNMENT) + BRCMF_SDALIGN;
|
||||
bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
|
||||
if (!(bus->rxbuf))
|
||||
|
@ -3782,7 +3798,7 @@ static bool brcmf_sdbrcm_probe_init(struct brcmf_sdio *bus)
|
|||
brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
|
||||
SDIO_FUNC_ENABLE_1, NULL);
|
||||
|
||||
bus->drvr->bus_if->state = BRCMF_BUS_DOWN;
|
||||
bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
|
||||
bus->sleeping = false;
|
||||
bus->rxflow = false;
|
||||
|
||||
|
@ -3819,7 +3835,7 @@ brcmf_sdbrcm_watchdog_thread(void *data)
|
|||
if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
|
||||
brcmf_sdbrcm_bus_watchdog(bus);
|
||||
/* Count the tick for reference */
|
||||
bus->drvr->tickcnt++;
|
||||
bus->tickcnt++;
|
||||
} else
|
||||
break;
|
||||
}
|
||||
|
@ -3865,10 +3881,9 @@ static void brcmf_sdbrcm_release(struct brcmf_sdio *bus)
|
|||
/* De-register interrupt handler */
|
||||
brcmf_sdcard_intr_dereg(bus->sdiodev);
|
||||
|
||||
if (bus->drvr) {
|
||||
brcmf_detach(bus->drvr);
|
||||
if (bus->sdiodev->bus_if->drvr) {
|
||||
brcmf_detach(bus->sdiodev->dev);
|
||||
brcmf_sdbrcm_release_dongle(bus);
|
||||
bus->drvr = NULL;
|
||||
}
|
||||
|
||||
brcmf_sdbrcm_release_malloc(bus);
|
||||
|
@ -3941,9 +3956,15 @@ void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev)
|
|||
bus->dpc_tsk = NULL;
|
||||
}
|
||||
|
||||
/* Assign bus interface call back */
|
||||
bus->sdiodev->bus_if->brcmf_bus_stop = brcmf_sdbrcm_bus_stop;
|
||||
bus->sdiodev->bus_if->brcmf_bus_init = brcmf_sdbrcm_bus_init;
|
||||
bus->sdiodev->bus_if->brcmf_bus_txdata = brcmf_sdbrcm_bus_txdata;
|
||||
bus->sdiodev->bus_if->brcmf_bus_txctl = brcmf_sdbrcm_bus_txctl;
|
||||
bus->sdiodev->bus_if->brcmf_bus_rxctl = brcmf_sdbrcm_bus_rxctl;
|
||||
/* Attach to the brcmf/OS/network interface */
|
||||
bus->drvr = brcmf_attach(bus, SDPCM_RESERVE, bus->sdiodev->dev);
|
||||
if (!bus->drvr) {
|
||||
ret = brcmf_attach(SDPCM_RESERVE, bus->sdiodev->dev);
|
||||
if (ret != 0) {
|
||||
brcmf_dbg(ERROR, "brcmf_attach failed\n");
|
||||
goto fail;
|
||||
}
|
||||
|
@ -3971,7 +3992,7 @@ void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev)
|
|||
brcmf_dbg(INFO, "completed!!\n");
|
||||
|
||||
/* if firmware path present try to download and bring up bus */
|
||||
ret = brcmf_bus_start(bus->drvr);
|
||||
ret = brcmf_bus_start(bus->sdiodev->dev);
|
||||
if (ret != 0) {
|
||||
if (ret == -ENOLINK) {
|
||||
brcmf_dbg(ERROR, "dongle is not responding\n");
|
||||
|
@ -3980,7 +4001,7 @@ void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev)
|
|||
}
|
||||
|
||||
/* add interface and open for business */
|
||||
if (brcmf_add_if((struct brcmf_info *)bus->drvr, 0, "wlan%d", NULL)) {
|
||||
if (brcmf_add_if(bus->sdiodev->dev, 0, "wlan%d", NULL)) {
|
||||
brcmf_dbg(ERROR, "Add primary net device interface failed!!\n");
|
||||
goto fail;
|
||||
}
|
||||
|
@ -4016,7 +4037,7 @@ brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
|
|||
}
|
||||
|
||||
/* don't start the wd until fw is loaded */
|
||||
if (bus->drvr->bus_if->state == BRCMF_BUS_DOWN)
|
||||
if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN)
|
||||
return;
|
||||
|
||||
if (wdtick) {
|
||||
|
|
|
@ -26,7 +26,6 @@
|
|||
#include <brcmu_wifi.h>
|
||||
#include <brcmu_utils.h>
|
||||
#include <soc.h>
|
||||
#include "dhd.h"
|
||||
#include "dhd_dbg.h"
|
||||
#include "sdio_host.h"
|
||||
#include "sdio_chip.h"
|
||||
|
|
|
@ -116,12 +116,20 @@
|
|||
#define SUCCESS 0
|
||||
#define ERROR 1
|
||||
|
||||
/* Packet alignment for most efficient SDIO (can change based on platform) */
|
||||
#define BRCMF_SDALIGN (1 << 6)
|
||||
|
||||
/* watchdog polling interval in ms */
|
||||
#define BRCMF_WD_POLL_MS 10
|
||||
|
||||
struct brcmf_sdreg {
|
||||
int func;
|
||||
int offset;
|
||||
int value;
|
||||
};
|
||||
|
||||
struct brcmf_sdio;
|
||||
|
||||
struct brcmf_sdio_dev {
|
||||
struct sdio_func *func[SDIO_MAX_FUNCS];
|
||||
u8 num_funcs; /* Supported funcs on client */
|
||||
|
@ -262,4 +270,6 @@ extern void brcmf_sdio_wdtmr_enable(struct brcmf_sdio_dev *sdiodev,
|
|||
extern void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev);
|
||||
extern void brcmf_sdbrcm_disconnect(void *ptr);
|
||||
extern void brcmf_sdbrcm_isr(void *arg);
|
||||
|
||||
extern void brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick);
|
||||
#endif /* _BRCM_SDH_H_ */
|
||||
|
|
|
@ -124,10 +124,10 @@ static int iwl1000_hw_set_hw_params(struct iwl_priv *priv)
|
|||
{
|
||||
if (iwlagn_mod_params.num_of_queues >= IWL_MIN_NUM_QUEUES &&
|
||||
iwlagn_mod_params.num_of_queues <= IWLAGN_NUM_QUEUES)
|
||||
priv->cfg->base_params->num_of_queues =
|
||||
cfg(priv)->base_params->num_of_queues =
|
||||
iwlagn_mod_params.num_of_queues;
|
||||
|
||||
hw_params(priv).max_txq_num = priv->cfg->base_params->num_of_queues;
|
||||
hw_params(priv).max_txq_num = cfg(priv)->base_params->num_of_queues;
|
||||
priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id = IWLAGN_BROADCAST_ID;
|
||||
|
||||
hw_params(priv).max_data_size = IWLAGN_RTC_DATA_SIZE;
|
||||
|
@ -135,14 +135,14 @@ static int iwl1000_hw_set_hw_params(struct iwl_priv *priv)
|
|||
|
||||
hw_params(priv).ht40_channel = BIT(IEEE80211_BAND_2GHZ);
|
||||
|
||||
hw_params(priv).tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant);
|
||||
if (priv->cfg->rx_with_siso_diversity)
|
||||
hw_params(priv).tx_chains_num = num_of_ant(cfg(priv)->valid_tx_ant);
|
||||
if (cfg(priv)->rx_with_siso_diversity)
|
||||
hw_params(priv).rx_chains_num = 1;
|
||||
else
|
||||
hw_params(priv).rx_chains_num =
|
||||
num_of_ant(priv->cfg->valid_rx_ant);
|
||||
hw_params(priv).valid_tx_ant = priv->cfg->valid_tx_ant;
|
||||
hw_params(priv).valid_rx_ant = priv->cfg->valid_rx_ant;
|
||||
num_of_ant(cfg(priv)->valid_rx_ant);
|
||||
hw_params(priv).valid_tx_ant = cfg(priv)->valid_tx_ant;
|
||||
hw_params(priv).valid_rx_ant = cfg(priv)->valid_rx_ant;
|
||||
|
||||
iwl1000_set_ct_threshold(priv);
|
||||
|
||||
|
|
|
@ -86,7 +86,7 @@ static void iwl2000_nic_config(struct iwl_priv *priv)
|
|||
{
|
||||
iwl_rf_config(priv);
|
||||
|
||||
if (priv->cfg->iq_invert)
|
||||
if (cfg(priv)->iq_invert)
|
||||
iwl_set_bit(bus(priv), CSR_GP_DRIVER_REG,
|
||||
CSR_GP_DRIVER_REG_BIT_RADIO_IQ_INVER);
|
||||
}
|
||||
|
@ -120,10 +120,10 @@ static int iwl2000_hw_set_hw_params(struct iwl_priv *priv)
|
|||
{
|
||||
if (iwlagn_mod_params.num_of_queues >= IWL_MIN_NUM_QUEUES &&
|
||||
iwlagn_mod_params.num_of_queues <= IWLAGN_NUM_QUEUES)
|
||||
priv->cfg->base_params->num_of_queues =
|
||||
cfg(priv)->base_params->num_of_queues =
|
||||
iwlagn_mod_params.num_of_queues;
|
||||
|
||||
hw_params(priv).max_txq_num = priv->cfg->base_params->num_of_queues;
|
||||
hw_params(priv).max_txq_num = cfg(priv)->base_params->num_of_queues;
|
||||
priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id = IWLAGN_BROADCAST_ID;
|
||||
|
||||
hw_params(priv).max_data_size = IWL60_RTC_DATA_SIZE;
|
||||
|
@ -131,14 +131,14 @@ static int iwl2000_hw_set_hw_params(struct iwl_priv *priv)
|
|||
|
||||
hw_params(priv).ht40_channel = BIT(IEEE80211_BAND_2GHZ);
|
||||
|
||||
hw_params(priv).tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant);
|
||||
if (priv->cfg->rx_with_siso_diversity)
|
||||
hw_params(priv).tx_chains_num = num_of_ant(cfg(priv)->valid_tx_ant);
|
||||
if (cfg(priv)->rx_with_siso_diversity)
|
||||
hw_params(priv).rx_chains_num = 1;
|
||||
else
|
||||
hw_params(priv).rx_chains_num =
|
||||
num_of_ant(priv->cfg->valid_rx_ant);
|
||||
hw_params(priv).valid_tx_ant = priv->cfg->valid_tx_ant;
|
||||
hw_params(priv).valid_rx_ant = priv->cfg->valid_rx_ant;
|
||||
num_of_ant(cfg(priv)->valid_rx_ant);
|
||||
hw_params(priv).valid_tx_ant = cfg(priv)->valid_tx_ant;
|
||||
hw_params(priv).valid_rx_ant = cfg(priv)->valid_rx_ant;
|
||||
|
||||
iwl2000_set_ct_threshold(priv);
|
||||
|
||||
|
@ -254,13 +254,13 @@ static struct iwl_bt_params iwl2030_bt_params = {
|
|||
.iq_invert = true \
|
||||
|
||||
struct iwl_cfg iwl2000_2bgn_cfg = {
|
||||
.name = "2000 Series 2x2 BGN",
|
||||
.name = "Intel(R) Centrino(R) Wireless-N 2200 BGN",
|
||||
IWL_DEVICE_2000,
|
||||
.ht_params = &iwl2000_ht_params,
|
||||
};
|
||||
|
||||
struct iwl_cfg iwl2000_2bgn_d_cfg = {
|
||||
.name = "2000D Series 2x2 BGN",
|
||||
.name = "Intel(R) Centrino(R) Wireless-N 2200D BGN",
|
||||
IWL_DEVICE_2000,
|
||||
.ht_params = &iwl2000_ht_params,
|
||||
};
|
||||
|
@ -282,7 +282,7 @@ struct iwl_cfg iwl2000_2bgn_d_cfg = {
|
|||
.iq_invert = true \
|
||||
|
||||
struct iwl_cfg iwl2030_2bgn_cfg = {
|
||||
.name = "2000 Series 2x2 BGN/BT",
|
||||
.name = "Intel(R) Centrino(R) Wireless-N 2230 BGN",
|
||||
IWL_DEVICE_2030,
|
||||
.ht_params = &iwl2000_ht_params,
|
||||
};
|
||||
|
@ -304,13 +304,13 @@ struct iwl_cfg iwl2030_2bgn_cfg = {
|
|||
.iq_invert = true \
|
||||
|
||||
struct iwl_cfg iwl105_bgn_cfg = {
|
||||
.name = "105 Series 1x1 BGN",
|
||||
.name = "Intel(R) Centrino(R) Wireless-N 105 BGN",
|
||||
IWL_DEVICE_105,
|
||||
.ht_params = &iwl2000_ht_params,
|
||||
};
|
||||
|
||||
struct iwl_cfg iwl105_bgn_d_cfg = {
|
||||
.name = "105D Series 1x1 BGN",
|
||||
.name = "Intel(R) Centrino(R) Wireless-N 105D BGN",
|
||||
IWL_DEVICE_105,
|
||||
.ht_params = &iwl2000_ht_params,
|
||||
};
|
||||
|
@ -333,7 +333,7 @@ struct iwl_cfg iwl105_bgn_d_cfg = {
|
|||
.iq_invert = true \
|
||||
|
||||
struct iwl_cfg iwl135_bgn_cfg = {
|
||||
.name = "135 Series 1x1 BGN/BT",
|
||||
.name = "Intel(R) Centrino(R) Wireless-N 135 BGN",
|
||||
IWL_DEVICE_135,
|
||||
.ht_params = &iwl2000_ht_params,
|
||||
};
|
||||
|
|
|
@ -166,10 +166,10 @@ static int iwl5000_hw_set_hw_params(struct iwl_priv *priv)
|
|||
{
|
||||
if (iwlagn_mod_params.num_of_queues >= IWL_MIN_NUM_QUEUES &&
|
||||
iwlagn_mod_params.num_of_queues <= IWLAGN_NUM_QUEUES)
|
||||
priv->cfg->base_params->num_of_queues =
|
||||
cfg(priv)->base_params->num_of_queues =
|
||||
iwlagn_mod_params.num_of_queues;
|
||||
|
||||
hw_params(priv).max_txq_num = priv->cfg->base_params->num_of_queues;
|
||||
hw_params(priv).max_txq_num = cfg(priv)->base_params->num_of_queues;
|
||||
priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id = IWLAGN_BROADCAST_ID;
|
||||
|
||||
hw_params(priv).max_data_size = IWLAGN_RTC_DATA_SIZE;
|
||||
|
@ -178,10 +178,10 @@ static int iwl5000_hw_set_hw_params(struct iwl_priv *priv)
|
|||
hw_params(priv).ht40_channel = BIT(IEEE80211_BAND_2GHZ) |
|
||||
BIT(IEEE80211_BAND_5GHZ);
|
||||
|
||||
hw_params(priv).tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant);
|
||||
hw_params(priv).rx_chains_num = num_of_ant(priv->cfg->valid_rx_ant);
|
||||
hw_params(priv).valid_tx_ant = priv->cfg->valid_tx_ant;
|
||||
hw_params(priv).valid_rx_ant = priv->cfg->valid_rx_ant;
|
||||
hw_params(priv).tx_chains_num = num_of_ant(cfg(priv)->valid_tx_ant);
|
||||
hw_params(priv).rx_chains_num = num_of_ant(cfg(priv)->valid_rx_ant);
|
||||
hw_params(priv).valid_tx_ant = cfg(priv)->valid_tx_ant;
|
||||
hw_params(priv).valid_rx_ant = cfg(priv)->valid_rx_ant;
|
||||
|
||||
iwl5000_set_ct_threshold(priv);
|
||||
|
||||
|
@ -195,10 +195,10 @@ static int iwl5150_hw_set_hw_params(struct iwl_priv *priv)
|
|||
{
|
||||
if (iwlagn_mod_params.num_of_queues >= IWL_MIN_NUM_QUEUES &&
|
||||
iwlagn_mod_params.num_of_queues <= IWLAGN_NUM_QUEUES)
|
||||
priv->cfg->base_params->num_of_queues =
|
||||
cfg(priv)->base_params->num_of_queues =
|
||||
iwlagn_mod_params.num_of_queues;
|
||||
|
||||
hw_params(priv).max_txq_num = priv->cfg->base_params->num_of_queues;
|
||||
hw_params(priv).max_txq_num = cfg(priv)->base_params->num_of_queues;
|
||||
priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id = IWLAGN_BROADCAST_ID;
|
||||
|
||||
hw_params(priv).max_data_size = IWLAGN_RTC_DATA_SIZE;
|
||||
|
@ -207,10 +207,10 @@ static int iwl5150_hw_set_hw_params(struct iwl_priv *priv)
|
|||
hw_params(priv).ht40_channel = BIT(IEEE80211_BAND_2GHZ) |
|
||||
BIT(IEEE80211_BAND_5GHZ);
|
||||
|
||||
hw_params(priv).tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant);
|
||||
hw_params(priv).rx_chains_num = num_of_ant(priv->cfg->valid_rx_ant);
|
||||
hw_params(priv).valid_tx_ant = priv->cfg->valid_tx_ant;
|
||||
hw_params(priv).valid_rx_ant = priv->cfg->valid_rx_ant;
|
||||
hw_params(priv).tx_chains_num = num_of_ant(cfg(priv)->valid_tx_ant);
|
||||
hw_params(priv).rx_chains_num = num_of_ant(cfg(priv)->valid_rx_ant);
|
||||
hw_params(priv).valid_tx_ant = cfg(priv)->valid_tx_ant;
|
||||
hw_params(priv).valid_rx_ant = cfg(priv)->valid_rx_ant;
|
||||
|
||||
iwl5150_set_ct_threshold(priv);
|
||||
|
||||
|
|
|
@ -102,14 +102,14 @@ static void iwl6000_nic_config(struct iwl_priv *priv)
|
|||
iwl_rf_config(priv);
|
||||
|
||||
/* no locking required for register write */
|
||||
if (priv->cfg->pa_type == IWL_PA_INTERNAL) {
|
||||
if (cfg(priv)->pa_type == IWL_PA_INTERNAL) {
|
||||
/* 2x2 IPA phy type */
|
||||
iwl_write32(bus(priv), CSR_GP_DRIVER_REG,
|
||||
CSR_GP_DRIVER_REG_BIT_RADIO_SKU_2x2_IPA);
|
||||
}
|
||||
/* do additional nic configuration if needed */
|
||||
if (priv->cfg->additional_nic_config)
|
||||
priv->cfg->additional_nic_config(priv);
|
||||
if (cfg(priv)->additional_nic_config)
|
||||
cfg(priv)->additional_nic_config(priv);
|
||||
}
|
||||
|
||||
static struct iwl_sensitivity_ranges iwl6000_sensitivity = {
|
||||
|
@ -141,10 +141,10 @@ static int iwl6000_hw_set_hw_params(struct iwl_priv *priv)
|
|||
{
|
||||
if (iwlagn_mod_params.num_of_queues >= IWL_MIN_NUM_QUEUES &&
|
||||
iwlagn_mod_params.num_of_queues <= IWLAGN_NUM_QUEUES)
|
||||
priv->cfg->base_params->num_of_queues =
|
||||
cfg(priv)->base_params->num_of_queues =
|
||||
iwlagn_mod_params.num_of_queues;
|
||||
|
||||
hw_params(priv).max_txq_num = priv->cfg->base_params->num_of_queues;
|
||||
hw_params(priv).max_txq_num = cfg(priv)->base_params->num_of_queues;
|
||||
priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id = IWLAGN_BROADCAST_ID;
|
||||
|
||||
hw_params(priv).max_data_size = IWL60_RTC_DATA_SIZE;
|
||||
|
@ -153,14 +153,14 @@ static int iwl6000_hw_set_hw_params(struct iwl_priv *priv)
|
|||
hw_params(priv).ht40_channel = BIT(IEEE80211_BAND_2GHZ) |
|
||||
BIT(IEEE80211_BAND_5GHZ);
|
||||
|
||||
hw_params(priv).tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant);
|
||||
if (priv->cfg->rx_with_siso_diversity)
|
||||
hw_params(priv).tx_chains_num = num_of_ant(cfg(priv)->valid_tx_ant);
|
||||
if (cfg(priv)->rx_with_siso_diversity)
|
||||
hw_params(priv).rx_chains_num = 1;
|
||||
else
|
||||
hw_params(priv).rx_chains_num =
|
||||
num_of_ant(priv->cfg->valid_rx_ant);
|
||||
hw_params(priv).valid_tx_ant = priv->cfg->valid_tx_ant;
|
||||
hw_params(priv).valid_rx_ant = priv->cfg->valid_rx_ant;
|
||||
num_of_ant(cfg(priv)->valid_rx_ant);
|
||||
hw_params(priv).valid_tx_ant = cfg(priv)->valid_tx_ant;
|
||||
hw_params(priv).valid_rx_ant = cfg(priv)->valid_rx_ant;
|
||||
|
||||
iwl6000_set_ct_threshold(priv);
|
||||
|
||||
|
@ -423,7 +423,7 @@ struct iwl_cfg iwl6030_2bg_cfg = {
|
|||
};
|
||||
|
||||
struct iwl_cfg iwl6035_2agn_cfg = {
|
||||
.name = "6035 Series 2x2 AGN/BT",
|
||||
.name = "Intel(R) Centrino(R) Advanced-N 6235 AGN",
|
||||
IWL_DEVICE_6030,
|
||||
.ht_params = &iwl6000_ht_params,
|
||||
};
|
||||
|
|
|
@ -513,7 +513,7 @@ static int iwl_enhance_sensitivity_write(struct iwl_priv *priv)
|
|||
|
||||
iwl_prepare_legacy_sensitivity_tbl(priv, data, &cmd.enhance_table[0]);
|
||||
|
||||
if (priv->cfg->base_params->hd_v2) {
|
||||
if (cfg(priv)->base_params->hd_v2) {
|
||||
cmd.enhance_table[HD_INA_NON_SQUARE_DET_OFDM_INDEX] =
|
||||
HD_INA_NON_SQUARE_DET_OFDM_DATA_V2;
|
||||
cmd.enhance_table[HD_INA_NON_SQUARE_DET_CCK_INDEX] =
|
||||
|
@ -847,7 +847,7 @@ static void iwl_find_disconn_antenna(struct iwl_priv *priv, u32* average_sig,
|
|||
* connect the first valid tx chain
|
||||
*/
|
||||
first_chain =
|
||||
find_first_chain(priv->cfg->valid_tx_ant);
|
||||
find_first_chain(cfg(priv)->valid_tx_ant);
|
||||
data->disconn_array[first_chain] = 0;
|
||||
active_chains |= BIT(first_chain);
|
||||
IWL_DEBUG_CALIB(priv,
|
||||
|
@ -890,7 +890,7 @@ static void iwlagn_gain_computation(struct iwl_priv *priv,
|
|||
continue;
|
||||
}
|
||||
|
||||
delta_g = (priv->cfg->base_params->chain_noise_scale *
|
||||
delta_g = (cfg(priv)->base_params->chain_noise_scale *
|
||||
((s32)average_noise[default_chain] -
|
||||
(s32)average_noise[i])) / 1500;
|
||||
|
||||
|
@ -1047,8 +1047,8 @@ void iwl_chain_noise_calibration(struct iwl_priv *priv)
|
|||
return;
|
||||
|
||||
/* Analyze signal for disconnected antenna */
|
||||
if (priv->cfg->bt_params &&
|
||||
priv->cfg->bt_params->advanced_bt_coexist) {
|
||||
if (cfg(priv)->bt_params &&
|
||||
cfg(priv)->bt_params->advanced_bt_coexist) {
|
||||
/* Disable disconnected antenna algorithm for advanced
|
||||
bt coex, assuming valid antennas are connected */
|
||||
data->active_chains = hw_params(priv).valid_rx_ant;
|
||||
|
@ -1082,7 +1082,7 @@ void iwl_chain_noise_calibration(struct iwl_priv *priv)
|
|||
|
||||
iwlagn_gain_computation(priv, average_noise,
|
||||
min_average_noise_antenna_i, min_average_noise,
|
||||
find_first_chain(priv->cfg->valid_rx_ant));
|
||||
find_first_chain(cfg(priv)->valid_rx_ant));
|
||||
|
||||
/* Some power changes may have been made during the calibration.
|
||||
* Update and commit the RXON
|
||||
|
|
|
@ -32,6 +32,7 @@
|
|||
#include <linux/init.h>
|
||||
#include <linux/sched.h>
|
||||
|
||||
#include "iwl-wifi.h"
|
||||
#include "iwl-dev.h"
|
||||
#include "iwl-core.h"
|
||||
#include "iwl-io.h"
|
||||
|
@ -150,7 +151,7 @@ static u32 eeprom_indirect_address(const struct iwl_shared *shrd, u32 address)
|
|||
const u8 *iwl_eeprom_query_addr(const struct iwl_shared *shrd, size_t offset)
|
||||
{
|
||||
u32 address = eeprom_indirect_address(shrd, offset);
|
||||
BUG_ON(address >= shrd->priv->cfg->base_params->eeprom_size);
|
||||
BUG_ON(address >= shrd->cfg->base_params->eeprom_size);
|
||||
return &shrd->eeprom[address];
|
||||
}
|
||||
|
||||
|
@ -232,7 +233,7 @@ int iwlagn_txfifo_flush(struct iwl_priv *priv, u16 flush_control)
|
|||
IWL_PAN_SCD_BK_MSK | IWL_PAN_SCD_MGMT_MSK |
|
||||
IWL_PAN_SCD_MULTICAST_MSK;
|
||||
|
||||
if (priv->cfg->sku & EEPROM_SKU_CAP_11N_ENABLE)
|
||||
if (cfg(priv)->sku & EEPROM_SKU_CAP_11N_ENABLE)
|
||||
flush_cmd.fifo_control |= IWL_AGG_TX_QUEUE_MSK;
|
||||
|
||||
IWL_DEBUG_INFO(priv, "fifo queue control: 0X%x\n",
|
||||
|
@ -374,15 +375,15 @@ void iwlagn_send_advance_bt_config(struct iwl_priv *priv)
|
|||
BUILD_BUG_ON(sizeof(iwlagn_def_3w_lookup) !=
|
||||
sizeof(basic.bt3_lookup_table));
|
||||
|
||||
if (priv->cfg->bt_params) {
|
||||
if (priv->cfg->bt_params->bt_session_2) {
|
||||
if (cfg(priv)->bt_params) {
|
||||
if (cfg(priv)->bt_params->bt_session_2) {
|
||||
bt_cmd_2000.prio_boost = cpu_to_le32(
|
||||
priv->cfg->bt_params->bt_prio_boost);
|
||||
cfg(priv)->bt_params->bt_prio_boost);
|
||||
bt_cmd_2000.tx_prio_boost = 0;
|
||||
bt_cmd_2000.rx_prio_boost = 0;
|
||||
} else {
|
||||
bt_cmd_6000.prio_boost =
|
||||
priv->cfg->bt_params->bt_prio_boost;
|
||||
cfg(priv)->bt_params->bt_prio_boost;
|
||||
bt_cmd_6000.tx_prio_boost = 0;
|
||||
bt_cmd_6000.rx_prio_boost = 0;
|
||||
}
|
||||
|
@ -430,7 +431,7 @@ void iwlagn_send_advance_bt_config(struct iwl_priv *priv)
|
|||
priv->bt_full_concurrent ?
|
||||
"full concurrency" : "3-wire");
|
||||
|
||||
if (priv->cfg->bt_params->bt_session_2) {
|
||||
if (cfg(priv)->bt_params->bt_session_2) {
|
||||
memcpy(&bt_cmd_2000.basic, &basic,
|
||||
sizeof(basic));
|
||||
ret = iwl_trans_send_cmd_pdu(trans(priv), REPLY_BT_CONFIG,
|
||||
|
@ -799,8 +800,8 @@ static bool is_single_rx_stream(struct iwl_priv *priv)
|
|||
*/
|
||||
static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
|
||||
{
|
||||
if (priv->cfg->bt_params &&
|
||||
priv->cfg->bt_params->advanced_bt_coexist &&
|
||||
if (cfg(priv)->bt_params &&
|
||||
cfg(priv)->bt_params->advanced_bt_coexist &&
|
||||
(priv->bt_full_concurrent ||
|
||||
priv->bt_traffic_load >= IWL_BT_COEX_TRAFFIC_LOAD_HIGH)) {
|
||||
/*
|
||||
|
@ -871,8 +872,8 @@ void iwlagn_set_rxon_chain(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
|
|||
else
|
||||
active_chains = hw_params(priv).valid_rx_ant;
|
||||
|
||||
if (priv->cfg->bt_params &&
|
||||
priv->cfg->bt_params->advanced_bt_coexist &&
|
||||
if (cfg(priv)->bt_params &&
|
||||
cfg(priv)->bt_params->advanced_bt_coexist &&
|
||||
(priv->bt_full_concurrent ||
|
||||
priv->bt_traffic_load >= IWL_BT_COEX_TRAFFIC_LOAD_HIGH)) {
|
||||
/*
|
||||
|
@ -1158,7 +1159,7 @@ int iwlagn_suspend(struct iwl_priv *priv,
|
|||
* since the uCode will add 0x10 before using the value.
|
||||
*/
|
||||
for (i = 0; i < IWL_MAX_TID_COUNT; i++) {
|
||||
seq = priv->shrd->tid_data[IWL_AP_ID][i].seq_number;
|
||||
seq = priv->tid_data[IWL_AP_ID][i].seq_number;
|
||||
seq -= 0x10;
|
||||
wakeup_filter_cmd.qos_seq[i] = cpu_to_le16(seq);
|
||||
}
|
||||
|
@ -1195,7 +1196,7 @@ int iwlagn_suspend(struct iwl_priv *priv,
|
|||
|
||||
priv->shrd->wowlan = true;
|
||||
|
||||
ret = iwlagn_load_ucode_wait_alive(priv, IWL_UCODE_WOWLAN);
|
||||
ret = iwl_load_ucode_wait_alive(trans(priv), IWL_UCODE_WOWLAN);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
|
|
|
@ -1086,7 +1086,7 @@ done:
|
|||
(priv->tm_fixed_rate != lq_sta->dbg_fixed_rate))
|
||||
rs_program_fix_rate(priv, lq_sta);
|
||||
#endif
|
||||
if (priv->cfg->bt_params && priv->cfg->bt_params->advanced_bt_coexist)
|
||||
if (cfg(priv)->bt_params && cfg(priv)->bt_params->advanced_bt_coexist)
|
||||
rs_bt_update_lq(priv, ctx, lq_sta);
|
||||
}
|
||||
|
||||
|
@ -2273,7 +2273,7 @@ static void rs_rate_scale_perform(struct iwl_priv *priv,
|
|||
tid = rs_tl_add_packet(lq_sta, hdr);
|
||||
if ((tid != IWL_MAX_TID_COUNT) &&
|
||||
(lq_sta->tx_agg_tid_en & (1 << tid))) {
|
||||
tid_data = &priv->shrd->tid_data[lq_sta->lq.sta_id][tid];
|
||||
tid_data = &priv->tid_data[lq_sta->lq.sta_id][tid];
|
||||
if (tid_data->agg.state == IWL_AGG_OFF)
|
||||
lq_sta->is_agg = 0;
|
||||
else
|
||||
|
@ -2645,8 +2645,7 @@ lq_update:
|
|||
(lq_sta->tx_agg_tid_en & (1 << tid)) &&
|
||||
(tid != IWL_MAX_TID_COUNT)) {
|
||||
u8 sta_id = lq_sta->lq.sta_id;
|
||||
tid_data =
|
||||
&priv->shrd->tid_data[sta_id][tid];
|
||||
tid_data = &priv->tid_data[sta_id][tid];
|
||||
if (tid_data->agg.state == IWL_AGG_OFF) {
|
||||
IWL_DEBUG_RATE(priv,
|
||||
"try to aggregate tid %d\n",
|
||||
|
@ -3055,11 +3054,11 @@ static void rs_fill_link_cmd(struct iwl_priv *priv,
|
|||
* overwrite if needed, pass aggregation time limit
|
||||
* to uCode in uSec
|
||||
*/
|
||||
if (priv && priv->cfg->bt_params &&
|
||||
priv->cfg->bt_params->agg_time_limit &&
|
||||
if (priv && cfg(priv)->bt_params &&
|
||||
cfg(priv)->bt_params->agg_time_limit &&
|
||||
priv->bt_traffic_load >= IWL_BT_COEX_TRAFFIC_LOAD_HIGH)
|
||||
lq_cmd->agg_params.agg_time_limit =
|
||||
cpu_to_le16(priv->cfg->bt_params->agg_time_limit);
|
||||
cpu_to_le16(cfg(priv)->bt_params->agg_time_limit);
|
||||
}
|
||||
|
||||
static void *rs_alloc(struct ieee80211_hw *hw, struct dentry *debugfsdir)
|
||||
|
|
|
@ -318,7 +318,7 @@ static bool iwlagn_good_plcp_health(struct iwl_priv *priv,
|
|||
unsigned int msecs)
|
||||
{
|
||||
int delta;
|
||||
int threshold = priv->cfg->base_params->plcp_delta_threshold;
|
||||
int threshold = cfg(priv)->base_params->plcp_delta_threshold;
|
||||
|
||||
if (threshold == IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE) {
|
||||
IWL_DEBUG_RADIO(priv, "plcp_err check disabled\n");
|
||||
|
@ -583,8 +583,8 @@ static int iwlagn_rx_statistics(struct iwl_priv *priv,
|
|||
iwlagn_rx_calc_noise(priv);
|
||||
queue_work(priv->shrd->workqueue, &priv->run_time_calib_work);
|
||||
}
|
||||
if (priv->cfg->lib->temperature && change)
|
||||
priv->cfg->lib->temperature(priv);
|
||||
if (cfg(priv)->lib->temperature && change)
|
||||
cfg(priv)->lib->temperature(priv);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -1136,8 +1136,8 @@ void iwl_setup_rx_handlers(struct iwl_priv *priv)
|
|||
init_waitqueue_head(&priv->shrd->notif_waitq);
|
||||
|
||||
/* Set up BT Rx handlers */
|
||||
if (priv->cfg->lib->bt_rx_handler_setup)
|
||||
priv->cfg->lib->bt_rx_handler_setup(priv);
|
||||
if (cfg(priv)->lib->bt_rx_handler_setup)
|
||||
cfg(priv)->lib->bt_rx_handler_setup(priv);
|
||||
|
||||
}
|
||||
|
||||
|
|
|
@ -296,9 +296,9 @@ static int iwlagn_rxon_connect(struct iwl_priv *priv,
|
|||
}
|
||||
|
||||
if (ctx->vif && ctx->vif->type == NL80211_IFTYPE_STATION &&
|
||||
priv->cfg->ht_params && priv->cfg->ht_params->smps_mode)
|
||||
cfg(priv)->ht_params && cfg(priv)->ht_params->smps_mode)
|
||||
ieee80211_request_smps(ctx->vif,
|
||||
priv->cfg->ht_params->smps_mode);
|
||||
cfg(priv)->ht_params->smps_mode);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -445,8 +445,8 @@ int iwlagn_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
|
|||
* force CTS-to-self frames protection if RTS-CTS is not preferred
|
||||
* one aggregation protection method
|
||||
*/
|
||||
if (!(priv->cfg->ht_params &&
|
||||
priv->cfg->ht_params->use_rts_for_aggregation))
|
||||
if (!(cfg(priv)->ht_params &&
|
||||
cfg(priv)->ht_params->use_rts_for_aggregation))
|
||||
ctx->staging.flags |= RXON_FLG_SELF_CTS_EN;
|
||||
|
||||
if ((ctx->vif && ctx->vif->bss_conf.use_short_slot) ||
|
||||
|
|
|
@ -130,25 +130,15 @@ int iwl_add_sta_callback(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb,
|
|||
return iwl_process_add_sta_resp(priv, addsta, pkt);
|
||||
}
|
||||
|
||||
static u16 iwlagn_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
|
||||
{
|
||||
u16 size = (u16)sizeof(struct iwl_addsta_cmd);
|
||||
struct iwl_addsta_cmd *addsta = (struct iwl_addsta_cmd *)data;
|
||||
memcpy(addsta, cmd, size);
|
||||
/* resrved in agn */
|
||||
addsta->legacy_reserved = cpu_to_le16(0);
|
||||
return size;
|
||||
}
|
||||
|
||||
int iwl_send_add_sta(struct iwl_priv *priv,
|
||||
struct iwl_addsta_cmd *sta, u8 flags)
|
||||
{
|
||||
int ret = 0;
|
||||
u8 data[sizeof(*sta)];
|
||||
struct iwl_host_cmd cmd = {
|
||||
.id = REPLY_ADD_STA,
|
||||
.flags = flags,
|
||||
.data = { data, },
|
||||
.data = { sta, },
|
||||
.len = { sizeof(*sta), },
|
||||
};
|
||||
u8 sta_id __maybe_unused = sta->sta.sta_id;
|
||||
|
||||
|
@ -160,7 +150,6 @@ int iwl_send_add_sta(struct iwl_priv *priv,
|
|||
might_sleep();
|
||||
}
|
||||
|
||||
cmd.len[0] = iwlagn_build_addsta_hcmd(sta, data);
|
||||
ret = iwl_trans_send_cmd(trans(priv), &cmd);
|
||||
|
||||
if (ret || (flags & CMD_ASYNC))
|
||||
|
@ -463,6 +452,7 @@ int iwl_remove_station(struct iwl_priv *priv, const u8 sta_id,
|
|||
const u8 *addr)
|
||||
{
|
||||
unsigned long flags;
|
||||
u8 tid;
|
||||
|
||||
if (!iwl_is_ready(priv->shrd)) {
|
||||
IWL_DEBUG_INFO(priv,
|
||||
|
@ -501,6 +491,10 @@ int iwl_remove_station(struct iwl_priv *priv, const u8 sta_id,
|
|||
priv->stations[sta_id].lq = NULL;
|
||||
}
|
||||
|
||||
for (tid = 0; tid < IWL_MAX_TID_COUNT; tid++)
|
||||
memset(&priv->tid_data[sta_id][tid], 0,
|
||||
sizeof(priv->tid_data[sta_id][tid]));
|
||||
|
||||
priv->stations[sta_id].used &= ~IWL_STA_DRIVER_ACTIVE;
|
||||
|
||||
priv->num_stations--;
|
||||
|
|
|
@ -633,7 +633,7 @@ void iwl_tt_initialize(struct iwl_priv *priv)
|
|||
INIT_WORK(&priv->ct_enter, iwl_bg_ct_enter);
|
||||
INIT_WORK(&priv->ct_exit, iwl_bg_ct_exit);
|
||||
|
||||
if (priv->cfg->base_params->adv_thermal_throttle) {
|
||||
if (cfg(priv)->base_params->adv_thermal_throttle) {
|
||||
IWL_DEBUG_TEMP(priv, "Advanced Thermal Throttling\n");
|
||||
tt->restriction = kcalloc(IWL_TI_STATE_MAX,
|
||||
sizeof(struct iwl_tt_restriction),
|
||||
|
|
|
@ -74,8 +74,8 @@ static void iwlagn_tx_cmd_build_basic(struct iwl_priv *priv,
|
|||
else if (ieee80211_is_back_req(fc))
|
||||
tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
|
||||
else if (info->band == IEEE80211_BAND_2GHZ &&
|
||||
priv->cfg->bt_params &&
|
||||
priv->cfg->bt_params->advanced_bt_coexist &&
|
||||
cfg(priv)->bt_params &&
|
||||
cfg(priv)->bt_params->advanced_bt_coexist &&
|
||||
(ieee80211_is_auth(fc) || ieee80211_is_assoc_req(fc) ||
|
||||
ieee80211_is_reassoc_req(fc) ||
|
||||
skb->protocol == cpu_to_be16(ETH_P_PAE)))
|
||||
|
@ -191,8 +191,8 @@ static void iwlagn_tx_cmd_build_rate(struct iwl_priv *priv,
|
|||
rate_flags |= RATE_MCS_CCK_MSK;
|
||||
|
||||
/* Set up antennas */
|
||||
if (priv->cfg->bt_params &&
|
||||
priv->cfg->bt_params->advanced_bt_coexist &&
|
||||
if (cfg(priv)->bt_params &&
|
||||
cfg(priv)->bt_params->advanced_bt_coexist &&
|
||||
priv->bt_full_concurrent) {
|
||||
/* operated as 1x1 in full concurrency mode */
|
||||
priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
|
||||
|
@ -262,8 +262,8 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
|
|||
|
||||
__le16 fc;
|
||||
u8 hdr_len;
|
||||
u16 len;
|
||||
u8 sta_id;
|
||||
u16 len, seq_number = 0;
|
||||
u8 sta_id, tid = IWL_MAX_TID_COUNT;
|
||||
unsigned long flags;
|
||||
bool is_agg = false;
|
||||
|
||||
|
@ -368,8 +368,50 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
|
|||
info->driver_data[0] = ctx;
|
||||
info->driver_data[1] = dev_cmd;
|
||||
|
||||
if (iwl_trans_tx(trans(priv), skb, dev_cmd, ctx->ctxid, sta_id))
|
||||
if (ieee80211_is_data_qos(fc) && !ieee80211_is_qos_nullfunc(fc)) {
|
||||
u8 *qc = NULL;
|
||||
struct iwl_tid_data *tid_data;
|
||||
qc = ieee80211_get_qos_ctl(hdr);
|
||||
tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
|
||||
if (WARN_ON_ONCE(tid >= IWL_MAX_TID_COUNT))
|
||||
goto drop_unlock_sta;
|
||||
tid_data = &priv->tid_data[sta_id][tid];
|
||||
|
||||
/* aggregation is on for this <sta,tid> */
|
||||
if (info->flags & IEEE80211_TX_CTL_AMPDU &&
|
||||
tid_data->agg.state != IWL_AGG_ON) {
|
||||
IWL_ERR(priv, "TX_CTL_AMPDU while not in AGG:"
|
||||
" Tx flags = 0x%08x, agg.state = %d",
|
||||
info->flags, tid_data->agg.state);
|
||||
IWL_ERR(priv, "sta_id = %d, tid = %d seq_num = %d",
|
||||
sta_id, tid, SEQ_TO_SN(tid_data->seq_number));
|
||||
goto drop_unlock_sta;
|
||||
}
|
||||
|
||||
/* We can receive packets from the stack in IWL_AGG_{ON,OFF}
|
||||
* only. Check this here.
|
||||
*/
|
||||
if (WARN_ONCE(tid_data->agg.state != IWL_AGG_ON &&
|
||||
tid_data->agg.state != IWL_AGG_OFF,
|
||||
"Tx while agg.state = %d", tid_data->agg.state))
|
||||
goto drop_unlock_sta;
|
||||
|
||||
seq_number = tid_data->seq_number;
|
||||
seq_number &= IEEE80211_SCTL_SEQ;
|
||||
hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
|
||||
hdr->seq_ctrl |= cpu_to_le16(seq_number);
|
||||
seq_number += 0x10;
|
||||
}
|
||||
|
||||
/* Copy MAC header from skb into command buffer */
|
||||
memcpy(tx_cmd->hdr, hdr, hdr_len);
|
||||
|
||||
if (iwl_trans_tx(trans(priv), skb, dev_cmd, ctx->ctxid, sta_id, tid))
|
||||
goto drop_unlock_sta;
|
||||
|
||||
if (ieee80211_is_data_qos(fc) && !ieee80211_is_qos_nullfunc(fc) &&
|
||||
!ieee80211_has_morefrags(fc))
|
||||
priv->tid_data[sta_id][tid].seq_number = seq_number;
|
||||
|
||||
spin_unlock(&priv->shrd->sta_lock);
|
||||
spin_unlock_irqrestore(&priv->shrd->lock, flags);
|
||||
|
@ -395,10 +437,81 @@ drop_unlock_priv:
|
|||
return -1;
|
||||
}
|
||||
|
||||
int iwlagn_tx_agg_stop(struct iwl_priv *priv, struct ieee80211_vif *vif,
|
||||
struct ieee80211_sta *sta, u16 tid)
|
||||
{
|
||||
struct iwl_tid_data *tid_data;
|
||||
unsigned long flags;
|
||||
int sta_id;
|
||||
|
||||
sta_id = iwl_sta_id(sta);
|
||||
|
||||
if (sta_id == IWL_INVALID_STATION) {
|
||||
IWL_ERR(priv, "Invalid station for AGG tid %d\n", tid);
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
spin_lock_irqsave(&priv->shrd->sta_lock, flags);
|
||||
|
||||
tid_data = &priv->tid_data[sta_id][tid];
|
||||
|
||||
switch (priv->tid_data[sta_id][tid].agg.state) {
|
||||
case IWL_EMPTYING_HW_QUEUE_ADDBA:
|
||||
/*
|
||||
* This can happen if the peer stops aggregation
|
||||
* again before we've had a chance to drain the
|
||||
* queue we selected previously, i.e. before the
|
||||
* session was really started completely.
|
||||
*/
|
||||
IWL_DEBUG_HT(priv, "AGG stop before setup done\n");
|
||||
goto turn_off;
|
||||
case IWL_AGG_ON:
|
||||
break;
|
||||
default:
|
||||
IWL_WARN(priv, "Stopping AGG while state not ON "
|
||||
"or starting for %d on %d (%d)\n", sta_id, tid,
|
||||
priv->tid_data[sta_id][tid].agg.state);
|
||||
spin_unlock_irqrestore(&priv->shrd->sta_lock, flags);
|
||||
return 0;
|
||||
}
|
||||
|
||||
tid_data->agg.ssn = SEQ_TO_SN(tid_data->seq_number);
|
||||
|
||||
/* There are still packets for this RA / TID in the HW */
|
||||
if (tid_data->agg.ssn != tid_data->next_reclaimed) {
|
||||
IWL_DEBUG_TX_QUEUES(priv, "Can't proceed: ssn %d, "
|
||||
"next_recl = %d",
|
||||
tid_data->agg.ssn,
|
||||
tid_data->next_reclaimed);
|
||||
priv->tid_data[sta_id][tid].agg.state =
|
||||
IWL_EMPTYING_HW_QUEUE_DELBA;
|
||||
spin_unlock_irqrestore(&priv->shrd->sta_lock, flags);
|
||||
return 0;
|
||||
}
|
||||
|
||||
IWL_DEBUG_TX_QUEUES(priv, "Can proceed: ssn = next_recl = %d",
|
||||
tid_data->agg.ssn);
|
||||
turn_off:
|
||||
priv->tid_data[sta_id][tid].agg.state = IWL_AGG_OFF;
|
||||
|
||||
/* do not restore/save irqs */
|
||||
spin_unlock(&priv->shrd->sta_lock);
|
||||
spin_lock(&priv->shrd->lock);
|
||||
|
||||
iwl_trans_tx_agg_disable(trans(priv), sta_id, tid);
|
||||
|
||||
spin_unlock_irqrestore(&priv->shrd->lock, flags);
|
||||
|
||||
ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int iwlagn_tx_agg_start(struct iwl_priv *priv, struct ieee80211_vif *vif,
|
||||
struct ieee80211_sta *sta, u16 tid, u16 *ssn)
|
||||
{
|
||||
struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
|
||||
struct iwl_tid_data *tid_data;
|
||||
unsigned long flags;
|
||||
int sta_id;
|
||||
int ret;
|
||||
|
||||
|
@ -413,7 +526,7 @@ int iwlagn_tx_agg_start(struct iwl_priv *priv, struct ieee80211_vif *vif,
|
|||
if (unlikely(tid >= IWL_MAX_TID_COUNT))
|
||||
return -EINVAL;
|
||||
|
||||
if (priv->shrd->tid_data[sta_id][tid].agg.state != IWL_AGG_OFF) {
|
||||
if (priv->tid_data[sta_id][tid].agg.state != IWL_AGG_OFF) {
|
||||
IWL_ERR(priv, "Start AGG when state is not IWL_AGG_OFF !\n");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
@ -422,27 +535,136 @@ int iwlagn_tx_agg_start(struct iwl_priv *priv, struct ieee80211_vif *vif,
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = iwl_trans_tx_agg_alloc(trans(priv), vif_priv->ctx->ctxid, sta_id,
|
||||
tid, ssn);
|
||||
spin_lock_irqsave(&priv->shrd->sta_lock, flags);
|
||||
|
||||
tid_data = &priv->tid_data[sta_id][tid];
|
||||
tid_data->agg.ssn = SEQ_TO_SN(tid_data->seq_number);
|
||||
|
||||
*ssn = tid_data->agg.ssn;
|
||||
|
||||
ret = iwl_trans_tx_agg_alloc(trans(priv), sta_id, tid);
|
||||
if (ret) {
|
||||
spin_unlock_irqrestore(&priv->shrd->sta_lock, flags);
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (*ssn == tid_data->next_reclaimed) {
|
||||
IWL_DEBUG_TX_QUEUES(priv, "Can proceed: ssn = next_recl = %d",
|
||||
tid_data->agg.ssn);
|
||||
tid_data->agg.state = IWL_AGG_ON;
|
||||
ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
|
||||
} else {
|
||||
IWL_DEBUG_TX_QUEUES(priv, "Can't proceed: ssn %d, "
|
||||
"next_reclaimed = %d",
|
||||
tid_data->agg.ssn,
|
||||
tid_data->next_reclaimed);
|
||||
tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA;
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&priv->shrd->sta_lock, flags);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int iwlagn_tx_agg_stop(struct iwl_priv *priv, struct ieee80211_vif *vif,
|
||||
struct ieee80211_sta *sta, u16 tid)
|
||||
int iwlagn_tx_agg_oper(struct iwl_priv *priv, struct ieee80211_vif *vif,
|
||||
struct ieee80211_sta *sta, u16 tid, u8 buf_size)
|
||||
{
|
||||
int sta_id;
|
||||
struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
|
||||
struct iwl_station_priv *sta_priv = (void *) sta->drv_priv;
|
||||
struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
|
||||
unsigned long flags;
|
||||
u16 ssn;
|
||||
|
||||
sta_id = iwl_sta_id(sta);
|
||||
buf_size = min_t(int, buf_size, LINK_QUAL_AGG_FRAME_LIMIT_DEF);
|
||||
|
||||
if (sta_id == IWL_INVALID_STATION) {
|
||||
IWL_ERR(priv, "Invalid station for AGG tid %d\n", tid);
|
||||
return -ENXIO;
|
||||
spin_lock_irqsave(&priv->shrd->sta_lock, flags);
|
||||
ssn = priv->tid_data[sta_priv->sta_id][tid].agg.ssn;
|
||||
spin_unlock_irqrestore(&priv->shrd->sta_lock, flags);
|
||||
|
||||
iwl_trans_tx_agg_setup(trans(priv), ctx->ctxid, sta_priv->sta_id, tid,
|
||||
buf_size, ssn);
|
||||
|
||||
/*
|
||||
* If the limit is 0, then it wasn't initialised yet,
|
||||
* use the default. We can do that since we take the
|
||||
* minimum below, and we don't want to go above our
|
||||
* default due to hardware restrictions.
|
||||
*/
|
||||
if (sta_priv->max_agg_bufsize == 0)
|
||||
sta_priv->max_agg_bufsize =
|
||||
LINK_QUAL_AGG_FRAME_LIMIT_DEF;
|
||||
|
||||
/*
|
||||
* Even though in theory the peer could have different
|
||||
* aggregation reorder buffer sizes for different sessions,
|
||||
* our ucode doesn't allow for that and has a global limit
|
||||
* for each station. Therefore, use the minimum of all the
|
||||
* aggregation sessions and our default value.
|
||||
*/
|
||||
sta_priv->max_agg_bufsize =
|
||||
min(sta_priv->max_agg_bufsize, buf_size);
|
||||
|
||||
if (cfg(priv)->ht_params &&
|
||||
cfg(priv)->ht_params->use_rts_for_aggregation) {
|
||||
/*
|
||||
* switch to RTS/CTS if it is the prefer protection
|
||||
* method for HT traffic
|
||||
*/
|
||||
|
||||
sta_priv->lq_sta.lq.general_params.flags |=
|
||||
LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
|
||||
}
|
||||
priv->agg_tids_count++;
|
||||
IWL_DEBUG_HT(priv, "priv->agg_tids_count = %u\n",
|
||||
priv->agg_tids_count);
|
||||
|
||||
sta_priv->lq_sta.lq.agg_params.agg_frame_cnt_limit =
|
||||
sta_priv->max_agg_bufsize;
|
||||
|
||||
IWL_INFO(priv, "Tx aggregation enabled on ra = %pM tid = %d\n",
|
||||
sta->addr, tid);
|
||||
|
||||
return iwl_send_lq_cmd(priv, ctx,
|
||||
&sta_priv->lq_sta.lq, CMD_ASYNC, false);
|
||||
}
|
||||
|
||||
return iwl_trans_tx_agg_disable(trans(priv), vif_priv->ctx->ctxid,
|
||||
sta_id, tid);
|
||||
static void iwlagn_check_ratid_empty(struct iwl_priv *priv, int sta_id, u8 tid)
|
||||
{
|
||||
struct iwl_tid_data *tid_data = &priv->tid_data[sta_id][tid];
|
||||
enum iwl_rxon_context_id ctx;
|
||||
struct ieee80211_vif *vif;
|
||||
u8 *addr;
|
||||
|
||||
lockdep_assert_held(&priv->shrd->sta_lock);
|
||||
|
||||
addr = priv->stations[sta_id].sta.sta.addr;
|
||||
ctx = priv->stations[sta_id].ctxid;
|
||||
vif = priv->contexts[ctx].vif;
|
||||
|
||||
switch (priv->tid_data[sta_id][tid].agg.state) {
|
||||
case IWL_EMPTYING_HW_QUEUE_DELBA:
|
||||
/* There are no packets for this RA / TID in the HW any more */
|
||||
if (tid_data->agg.ssn == tid_data->next_reclaimed) {
|
||||
IWL_DEBUG_TX_QUEUES(priv,
|
||||
"Can continue DELBA flow ssn = next_recl ="
|
||||
" %d", tid_data->next_reclaimed);
|
||||
iwl_trans_tx_agg_disable(trans(priv), sta_id, tid);
|
||||
tid_data->agg.state = IWL_AGG_OFF;
|
||||
ieee80211_stop_tx_ba_cb_irqsafe(vif, addr, tid);
|
||||
}
|
||||
break;
|
||||
case IWL_EMPTYING_HW_QUEUE_ADDBA:
|
||||
/* There are no packets for this RA / TID in the HW any more */
|
||||
if (tid_data->agg.ssn == tid_data->next_reclaimed) {
|
||||
IWL_DEBUG_TX_QUEUES(priv,
|
||||
"Can continue ADDBA flow ssn = next_recl ="
|
||||
" %d", tid_data->next_reclaimed);
|
||||
tid_data->agg.state = IWL_AGG_ON;
|
||||
ieee80211_start_tx_ba_cb_irqsafe(vif, addr, tid);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static void iwlagn_non_agg_tx_status(struct iwl_priv *priv,
|
||||
|
@ -582,7 +804,7 @@ static void iwl_rx_reply_tx_agg(struct iwl_priv *priv,
|
|||
IWLAGN_TX_RES_TID_POS;
|
||||
int sta_id = (tx_resp->ra_tid & IWLAGN_TX_RES_RA_MSK) >>
|
||||
IWLAGN_TX_RES_RA_POS;
|
||||
struct iwl_ht_agg *agg = &priv->shrd->tid_data[sta_id][tid].agg;
|
||||
struct iwl_ht_agg *agg = &priv->tid_data[sta_id][tid].agg;
|
||||
u32 status = le16_to_cpu(tx_resp->status.status);
|
||||
int i;
|
||||
|
||||
|
@ -598,8 +820,8 @@ static void iwl_rx_reply_tx_agg(struct iwl_priv *priv,
|
|||
* notification again.
|
||||
*/
|
||||
if (tx_resp->bt_kill_count && tx_resp->frame_count == 1 &&
|
||||
priv->cfg->bt_params &&
|
||||
priv->cfg->bt_params->advanced_bt_coexist) {
|
||||
cfg(priv)->bt_params &&
|
||||
cfg(priv)->bt_params->advanced_bt_coexist) {
|
||||
IWL_DEBUG_COEX(priv, "receive reply tx w/ bt_kill\n");
|
||||
}
|
||||
|
||||
|
@ -772,7 +994,7 @@ int iwlagn_rx_reply_tx(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb,
|
|||
struct iwlagn_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
|
||||
struct ieee80211_hdr *hdr;
|
||||
u32 status = le16_to_cpu(tx_resp->status.status);
|
||||
u32 ssn = iwlagn_get_scd_ssn(tx_resp);
|
||||
u16 ssn = iwlagn_get_scd_ssn(tx_resp);
|
||||
int tid;
|
||||
int sta_id;
|
||||
int freed;
|
||||
|
@ -794,11 +1016,34 @@ int iwlagn_rx_reply_tx(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb,
|
|||
iwl_rx_reply_tx_agg(priv, tx_resp);
|
||||
|
||||
if (tx_resp->frame_count == 1) {
|
||||
IWL_DEBUG_TX_REPLY(priv, "Q %d, ssn %d", txq_id, ssn);
|
||||
u16 next_reclaimed = le16_to_cpu(tx_resp->seq_ctl);
|
||||
next_reclaimed = SEQ_TO_SN(next_reclaimed + 0x10);
|
||||
|
||||
if (is_agg) {
|
||||
/* If this is an aggregation queue, we can rely on the
|
||||
* ssn since the wifi sequence number corresponds to
|
||||
* the index in the TFD ring (%256).
|
||||
* The seq_ctl is the sequence control of the packet
|
||||
* to which this Tx response relates. But if there is a
|
||||
* hole in the bitmap of the BA we received, this Tx
|
||||
* response may allow to reclaim the hole and all the
|
||||
* subsequent packets that were already acked.
|
||||
* In that case, seq_ctl != ssn, and the next packet
|
||||
* to be reclaimed will be ssn and not seq_ctl.
|
||||
*/
|
||||
next_reclaimed = ssn;
|
||||
}
|
||||
|
||||
__skb_queue_head_init(&skbs);
|
||||
priv->tid_data[sta_id][tid].next_reclaimed = next_reclaimed;
|
||||
|
||||
IWL_DEBUG_TX_REPLY(priv, "Next reclaimed packet:%d",
|
||||
next_reclaimed);
|
||||
|
||||
/*we can free until ssn % q.n_bd not inclusive */
|
||||
iwl_trans_reclaim(trans(priv), sta_id, tid, txq_id,
|
||||
ssn, status, &skbs);
|
||||
WARN_ON(iwl_trans_reclaim(trans(priv), sta_id, tid, txq_id,
|
||||
ssn, status, &skbs));
|
||||
iwlagn_check_ratid_empty(priv, sta_id, tid);
|
||||
freed = 0;
|
||||
while (!skb_queue_empty(&skbs)) {
|
||||
skb = __skb_dequeue(&skbs);
|
||||
|
@ -893,24 +1138,10 @@ int iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv,
|
|||
|
||||
sta_id = ba_resp->sta_id;
|
||||
tid = ba_resp->tid;
|
||||
agg = &priv->shrd->tid_data[sta_id][tid].agg;
|
||||
agg = &priv->tid_data[sta_id][tid].agg;
|
||||
|
||||
spin_lock_irqsave(&priv->shrd->sta_lock, flags);
|
||||
|
||||
if (unlikely(agg->txq_id != scd_flow)) {
|
||||
/*
|
||||
* FIXME: this is a uCode bug which need to be addressed,
|
||||
* log the information and return for now!
|
||||
* since it is possible happen very often and in order
|
||||
* not to fill the syslog, don't enable the logging by default
|
||||
*/
|
||||
IWL_DEBUG_TX_REPLY(priv,
|
||||
"BA scd_flow %d does not match txq_id %d\n",
|
||||
scd_flow, agg->txq_id);
|
||||
spin_unlock_irqrestore(&priv->shrd->sta_lock, flags);
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (unlikely(!agg->wait_for_ba)) {
|
||||
if (unlikely(ba_resp->bitmap))
|
||||
IWL_ERR(priv, "Received BA when not expected\n");
|
||||
|
@ -918,6 +1149,17 @@ int iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv,
|
|||
return 0;
|
||||
}
|
||||
|
||||
__skb_queue_head_init(&reclaimed_skbs);
|
||||
|
||||
/* Release all TFDs before the SSN, i.e. all TFDs in front of
|
||||
* block-ack window (we assume that they've been successfully
|
||||
* transmitted ... if not, it's too late anyway). */
|
||||
if (iwl_trans_reclaim(trans(priv), sta_id, tid, scd_flow,
|
||||
ba_resp_scd_ssn, 0, &reclaimed_skbs)) {
|
||||
spin_unlock_irqrestore(&priv->shrd->sta_lock, flags);
|
||||
return 0;
|
||||
}
|
||||
|
||||
IWL_DEBUG_TX_REPLY(priv, "REPLY_COMPRESSED_BA [%d] Received from %pM, "
|
||||
"sta_id = %d\n",
|
||||
agg->wait_for_ba,
|
||||
|
@ -925,7 +1167,7 @@ int iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv,
|
|||
ba_resp->sta_id);
|
||||
IWL_DEBUG_TX_REPLY(priv, "TID = %d, SeqCtl = %d, bitmap = 0x%llx, "
|
||||
"scd_flow = %d, scd_ssn = %d\n",
|
||||
ba_resp->tid, ba_resp->seq_ctl,
|
||||
ba_resp->tid, le16_to_cpu(ba_resp->seq_ctl),
|
||||
(unsigned long long)le64_to_cpu(ba_resp->bitmap),
|
||||
scd_flow, ba_resp_scd_ssn);
|
||||
|
||||
|
@ -946,13 +1188,9 @@ int iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv,
|
|||
IWL_DEBUG_HT(priv, "agg frames sent:%d, acked:%d\n",
|
||||
ba_resp->txed, ba_resp->txed_2_done);
|
||||
|
||||
__skb_queue_head_init(&reclaimed_skbs);
|
||||
priv->tid_data[sta_id][tid].next_reclaimed = ba_resp_scd_ssn;
|
||||
|
||||
/* Release all TFDs before the SSN, i.e. all TFDs in front of
|
||||
* block-ack window (we assume that they've been successfully
|
||||
* transmitted ... if not, it's too late anyway). */
|
||||
iwl_trans_reclaim(trans(priv), sta_id, tid, scd_flow, ba_resp_scd_ssn,
|
||||
0, &reclaimed_skbs);
|
||||
iwlagn_check_ratid_empty(priv, sta_id, tid);
|
||||
freed = 0;
|
||||
while (!skb_queue_empty(&reclaimed_skbs)) {
|
||||
|
||||
|
|
|
@ -43,6 +43,7 @@
|
|||
#include <asm/div64.h>
|
||||
|
||||
#include "iwl-eeprom.h"
|
||||
#include "iwl-wifi.h"
|
||||
#include "iwl-dev.h"
|
||||
#include "iwl-core.h"
|
||||
#include "iwl-io.h"
|
||||
|
@ -515,7 +516,7 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
|
|||
|
||||
static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
|
||||
{
|
||||
const char *name_pre = priv->cfg->fw_name_pre;
|
||||
const char *name_pre = cfg(priv)->fw_name_pre;
|
||||
char tag[8];
|
||||
|
||||
if (first) {
|
||||
|
@ -524,14 +525,14 @@ static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
|
|||
strcpy(tag, UCODE_EXPERIMENTAL_TAG);
|
||||
} else if (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) {
|
||||
#endif
|
||||
priv->fw_index = priv->cfg->ucode_api_max;
|
||||
priv->fw_index = cfg(priv)->ucode_api_max;
|
||||
sprintf(tag, "%d", priv->fw_index);
|
||||
} else {
|
||||
priv->fw_index--;
|
||||
sprintf(tag, "%d", priv->fw_index);
|
||||
}
|
||||
|
||||
if (priv->fw_index < priv->cfg->ucode_api_min) {
|
||||
if (priv->fw_index < cfg(priv)->ucode_api_min) {
|
||||
IWL_ERR(priv, "no suitable firmware found!\n");
|
||||
return -ENOENT;
|
||||
}
|
||||
|
@ -836,9 +837,9 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
|
|||
struct iwl_ucode_header *ucode;
|
||||
int err;
|
||||
struct iwlagn_firmware_pieces pieces;
|
||||
const unsigned int api_max = priv->cfg->ucode_api_max;
|
||||
unsigned int api_ok = priv->cfg->ucode_api_ok;
|
||||
const unsigned int api_min = priv->cfg->ucode_api_min;
|
||||
const unsigned int api_max = cfg(priv)->ucode_api_max;
|
||||
unsigned int api_ok = cfg(priv)->ucode_api_ok;
|
||||
const unsigned int api_min = cfg(priv)->ucode_api_min;
|
||||
u32 api_ver;
|
||||
char buildstr[25];
|
||||
u32 build;
|
||||
|
@ -1027,14 +1028,14 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
|
|||
priv->init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
|
||||
else
|
||||
priv->init_evtlog_size =
|
||||
priv->cfg->base_params->max_event_log_size;
|
||||
cfg(priv)->base_params->max_event_log_size;
|
||||
priv->init_errlog_ptr = pieces.init_errlog_ptr;
|
||||
priv->inst_evtlog_ptr = pieces.inst_evtlog_ptr;
|
||||
if (pieces.inst_evtlog_size)
|
||||
priv->inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
|
||||
else
|
||||
priv->inst_evtlog_size =
|
||||
priv->cfg->base_params->max_event_log_size;
|
||||
cfg(priv)->base_params->max_event_log_size;
|
||||
priv->inst_errlog_ptr = pieces.inst_errlog_ptr;
|
||||
#ifndef CONFIG_IWLWIFI_P2P
|
||||
ucode_capa.flags &= ~IWL_UCODE_TLV_FLAGS_PAN;
|
||||
|
@ -1043,7 +1044,7 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
|
|||
priv->new_scan_threshold_behaviour =
|
||||
!!(ucode_capa.flags & IWL_UCODE_TLV_FLAGS_NEWSCAN);
|
||||
|
||||
if (!(priv->cfg->sku & EEPROM_SKU_CAP_IPAN_ENABLE))
|
||||
if (!(cfg(priv)->sku & EEPROM_SKU_CAP_IPAN_ENABLE))
|
||||
ucode_capa.flags &= ~IWL_UCODE_TLV_FLAGS_PAN;
|
||||
|
||||
/*
|
||||
|
@ -1124,7 +1125,7 @@ static void iwl_rf_kill_ct_config(struct iwl_priv *priv)
|
|||
spin_unlock_irqrestore(&priv->shrd->lock, flags);
|
||||
priv->thermal_throttle.ct_kill_toggle = false;
|
||||
|
||||
if (priv->cfg->base_params->support_ct_kill_exit) {
|
||||
if (cfg(priv)->base_params->support_ct_kill_exit) {
|
||||
adv_cmd.critical_temperature_enter =
|
||||
cpu_to_le32(hw_params(priv).ct_kill_threshold);
|
||||
adv_cmd.critical_temperature_exit =
|
||||
|
@ -1219,10 +1220,10 @@ int iwl_alive_start(struct iwl_priv *priv)
|
|||
return -ERFKILL;
|
||||
|
||||
/* download priority table before any calibration request */
|
||||
if (priv->cfg->bt_params &&
|
||||
priv->cfg->bt_params->advanced_bt_coexist) {
|
||||
if (cfg(priv)->bt_params &&
|
||||
cfg(priv)->bt_params->advanced_bt_coexist) {
|
||||
/* Configure Bluetooth device coexistence support */
|
||||
if (priv->cfg->bt_params->bt_sco_disable)
|
||||
if (cfg(priv)->bt_params->bt_sco_disable)
|
||||
priv->bt_enable_pspoll = false;
|
||||
else
|
||||
priv->bt_enable_pspoll = true;
|
||||
|
@ -1252,16 +1253,17 @@ int iwl_alive_start(struct iwl_priv *priv)
|
|||
iwl_send_bt_config(priv);
|
||||
}
|
||||
|
||||
if (hw_params(priv).calib_rt_cfg)
|
||||
iwlagn_send_calib_cfg_rt(priv,
|
||||
hw_params(priv).calib_rt_cfg);
|
||||
/*
|
||||
* Perform runtime calibrations, including DC calibration.
|
||||
*/
|
||||
iwlagn_send_calib_cfg_rt(priv, IWL_CALIB_CFG_DC_IDX);
|
||||
|
||||
ieee80211_wake_queues(priv->hw);
|
||||
|
||||
priv->active_rate = IWL_RATES_MASK;
|
||||
|
||||
/* Configure Tx antenna selection based on H/W config */
|
||||
iwlagn_send_tx_ant_config(priv, priv->cfg->valid_tx_ant);
|
||||
iwlagn_send_tx_ant_config(priv, cfg(priv)->valid_tx_ant);
|
||||
|
||||
if (iwl_is_associated_ctx(ctx) && !priv->shrd->wowlan) {
|
||||
struct iwl_rxon_cmd *active_rxon =
|
||||
|
@ -1330,9 +1332,9 @@ void __iwl_down(struct iwl_priv *priv)
|
|||
priv->bt_status = 0;
|
||||
priv->cur_rssi_ctx = NULL;
|
||||
priv->bt_is_sco = 0;
|
||||
if (priv->cfg->bt_params)
|
||||
if (cfg(priv)->bt_params)
|
||||
priv->bt_traffic_load =
|
||||
priv->cfg->bt_params->bt_init_traffic_load;
|
||||
cfg(priv)->bt_params->bt_init_traffic_load;
|
||||
else
|
||||
priv->bt_traffic_load = 0;
|
||||
priv->bt_full_concurrent = false;
|
||||
|
@ -1514,8 +1516,8 @@ static void iwl_setup_deferred_work(struct iwl_priv *priv)
|
|||
|
||||
iwl_setup_scan_deferred_work(priv);
|
||||
|
||||
if (priv->cfg->lib->bt_setup_deferred_work)
|
||||
priv->cfg->lib->bt_setup_deferred_work(priv);
|
||||
if (cfg(priv)->lib->bt_setup_deferred_work)
|
||||
cfg(priv)->lib->bt_setup_deferred_work(priv);
|
||||
|
||||
init_timer(&priv->statistics_periodic);
|
||||
priv->statistics_periodic.data = (unsigned long)priv;
|
||||
|
@ -1532,8 +1534,8 @@ static void iwl_setup_deferred_work(struct iwl_priv *priv)
|
|||
|
||||
static void iwl_cancel_deferred_work(struct iwl_priv *priv)
|
||||
{
|
||||
if (priv->cfg->lib->cancel_deferred_work)
|
||||
priv->cfg->lib->cancel_deferred_work(priv);
|
||||
if (cfg(priv)->lib->cancel_deferred_work)
|
||||
cfg(priv)->lib->cancel_deferred_work(priv);
|
||||
|
||||
cancel_work_sync(&priv->run_time_calib_work);
|
||||
cancel_work_sync(&priv->beacon_update);
|
||||
|
@ -1602,8 +1604,8 @@ static int iwl_init_drv(struct iwl_priv *priv)
|
|||
iwl_init_scan_params(priv);
|
||||
|
||||
/* init bt coex */
|
||||
if (priv->cfg->bt_params &&
|
||||
priv->cfg->bt_params->advanced_bt_coexist) {
|
||||
if (cfg(priv)->bt_params &&
|
||||
cfg(priv)->bt_params->advanced_bt_coexist) {
|
||||
priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
|
||||
priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
|
||||
priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
|
||||
|
@ -1667,18 +1669,18 @@ static int iwl_set_hw_params(struct iwl_priv *priv)
|
|||
hw_params(priv).rx_page_order =
|
||||
get_order(IWL_RX_BUF_SIZE_4K);
|
||||
|
||||
if (iwlagn_mod_params.disable_11n)
|
||||
priv->cfg->sku &= ~EEPROM_SKU_CAP_11N_ENABLE;
|
||||
if (iwlagn_mod_params.disable_11n & IWL_DISABLE_HT_ALL)
|
||||
cfg(priv)->sku &= ~EEPROM_SKU_CAP_11N_ENABLE;
|
||||
|
||||
hw_params(priv).num_ampdu_queues =
|
||||
priv->cfg->base_params->num_of_ampdu_queues;
|
||||
cfg(priv)->base_params->num_of_ampdu_queues;
|
||||
hw_params(priv).shadow_reg_enable =
|
||||
priv->cfg->base_params->shadow_reg_enable;
|
||||
hw_params(priv).sku = priv->cfg->sku;
|
||||
hw_params(priv).wd_timeout = priv->cfg->base_params->wd_timeout;
|
||||
cfg(priv)->base_params->shadow_reg_enable;
|
||||
hw_params(priv).sku = cfg(priv)->sku;
|
||||
hw_params(priv).wd_timeout = cfg(priv)->base_params->wd_timeout;
|
||||
|
||||
/* Device-specific setup */
|
||||
return priv->cfg->lib->set_hw_params(priv);
|
||||
return cfg(priv)->lib->set_hw_params(priv);
|
||||
}
|
||||
|
||||
|
||||
|
@ -1757,7 +1759,7 @@ int iwl_probe(struct iwl_bus *bus, const struct iwl_trans_ops *trans_ops,
|
|||
iwl_debug_config(priv);
|
||||
|
||||
IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
|
||||
priv->cfg = cfg;
|
||||
cfg(priv) = cfg;
|
||||
|
||||
/* is antenna coupling more than 35dB ? */
|
||||
priv->bt_ant_couple_ok =
|
||||
|
@ -1791,7 +1793,7 @@ int iwl_probe(struct iwl_bus *bus, const struct iwl_trans_ops *trans_ops,
|
|||
***********************/
|
||||
hw_rev = iwl_hw_detect(priv);
|
||||
IWL_INFO(priv, "Detected %s, REV=0x%X\n",
|
||||
priv->cfg->name, hw_rev);
|
||||
cfg(priv)->name, hw_rev);
|
||||
|
||||
err = iwl_trans_request_irq(trans(priv));
|
||||
if (err)
|
||||
|
@ -1915,12 +1917,7 @@ void __devexit iwl_remove(struct iwl_priv * priv)
|
|||
set_bit(STATUS_EXIT_PENDING, &priv->shrd->status);
|
||||
|
||||
iwl_testmode_cleanup(priv);
|
||||
iwl_leds_exit(priv);
|
||||
|
||||
if (priv->mac80211_registered) {
|
||||
ieee80211_unregister_hw(priv->hw);
|
||||
priv->mac80211_registered = 0;
|
||||
}
|
||||
iwlagn_mac_unregister(priv);
|
||||
|
||||
iwl_tt_exit(priv);
|
||||
|
||||
|
@ -1999,8 +1996,9 @@ module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
|
|||
MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
|
||||
module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
|
||||
MODULE_PARM_DESC(queues_num, "number of hw queues.");
|
||||
module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
|
||||
MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
|
||||
module_param_named(11n_disable, iwlagn_mod_params.disable_11n, uint, S_IRUGO);
|
||||
MODULE_PARM_DESC(11n_disable,
|
||||
"disable 11n functionality, bitmap: 1: full, 2: agg TX, 4: agg RX");
|
||||
module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
|
||||
int, S_IRUGO);
|
||||
MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
|
||||
|
|
|
@ -91,6 +91,7 @@ void iwlagn_prepare_restart(struct iwl_priv *priv);
|
|||
struct ieee80211_hw *iwl_alloc_all(void);
|
||||
int iwlagn_mac_setup_register(struct iwl_priv *priv,
|
||||
struct iwlagn_ucode_capabilities *capa);
|
||||
void iwlagn_mac_unregister(struct iwl_priv *priv);
|
||||
|
||||
/* RXON */
|
||||
int iwlagn_set_pan_params(struct iwl_priv *priv);
|
||||
|
@ -108,11 +109,6 @@ void iwlagn_config_ht40(struct ieee80211_conf *conf,
|
|||
int iwlagn_rx_calib_result(struct iwl_priv *priv,
|
||||
struct iwl_rx_mem_buffer *rxb,
|
||||
struct iwl_device_cmd *cmd);
|
||||
int iwl_send_bt_env(struct iwl_trans *trans, u8 action, u8 type);
|
||||
void iwl_send_prio_tbl(struct iwl_trans *trans);
|
||||
int iwlagn_run_init_ucode(struct iwl_priv *priv);
|
||||
int iwlagn_load_ucode_wait_alive(struct iwl_priv *priv,
|
||||
enum iwl_ucode_type ucode_type);
|
||||
|
||||
/* lib */
|
||||
int iwlagn_send_tx_power(struct iwl_priv *priv);
|
||||
|
@ -137,6 +133,8 @@ void iwl_setup_rx_handlers(struct iwl_priv *priv);
|
|||
int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb);
|
||||
int iwlagn_tx_agg_start(struct iwl_priv *priv, struct ieee80211_vif *vif,
|
||||
struct ieee80211_sta *sta, u16 tid, u16 *ssn);
|
||||
int iwlagn_tx_agg_oper(struct iwl_priv *priv, struct ieee80211_vif *vif,
|
||||
struct ieee80211_sta *sta, u16 tid, u8 buf_size);
|
||||
int iwlagn_tx_agg_stop(struct iwl_priv *priv, struct ieee80211_vif *vif,
|
||||
struct ieee80211_sta *sta, u16 tid);
|
||||
int iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv,
|
||||
|
@ -356,7 +354,6 @@ static inline __le32 iwl_hw_set_rate_n_flags(u8 rate, u32 flags)
|
|||
void iwl_eeprom_enhanced_txpower(struct iwl_priv *priv);
|
||||
void iwl_eeprom_get_mac(const struct iwl_shared *shrd, u8 *mac);
|
||||
|
||||
extern int iwlagn_init_alive_start(struct iwl_priv *priv);
|
||||
extern int iwl_alive_start(struct iwl_priv *priv);
|
||||
/* svtool */
|
||||
#ifdef CONFIG_IWLWIFI_DEVICE_TESTMODE
|
||||
|
|
|
@ -122,7 +122,8 @@ struct iwl_bus;
|
|||
* struct iwl_bus_ops - bus specific operations
|
||||
* @get_pm_support: must returns true if the bus can go to sleep
|
||||
* @apm_config: will be called during the config of the APM
|
||||
* @get_hw_id: prints the hw_id in the provided buffer
|
||||
* @get_hw_id_string: prints the hw_id in the provided buffer
|
||||
* @get_hw_id: get hw_id in u32
|
||||
* @write8: write a byte to register at offset ofs
|
||||
* @write32: write a dword to register at offset ofs
|
||||
* @wread32: read a dword at register at offset ofs
|
||||
|
@ -130,7 +131,8 @@ struct iwl_bus;
|
|||
struct iwl_bus_ops {
|
||||
bool (*get_pm_support)(struct iwl_bus *bus);
|
||||
void (*apm_config)(struct iwl_bus *bus);
|
||||
void (*get_hw_id)(struct iwl_bus *bus, char buf[], int buf_len);
|
||||
void (*get_hw_id_string)(struct iwl_bus *bus, char buf[], int buf_len);
|
||||
u32 (*get_hw_id)(struct iwl_bus *bus);
|
||||
void (*write8)(struct iwl_bus *bus, u32 ofs, u8 val);
|
||||
void (*write32)(struct iwl_bus *bus, u32 ofs, u32 val);
|
||||
u32 (*read32)(struct iwl_bus *bus, u32 ofs);
|
||||
|
@ -172,9 +174,15 @@ static inline void bus_apm_config(struct iwl_bus *bus)
|
|||
bus->ops->apm_config(bus);
|
||||
}
|
||||
|
||||
static inline void bus_get_hw_id(struct iwl_bus *bus, char buf[], int buf_len)
|
||||
static inline void bus_get_hw_id_string(struct iwl_bus *bus, char buf[],
|
||||
int buf_len)
|
||||
{
|
||||
bus->ops->get_hw_id(bus, buf, buf_len);
|
||||
bus->ops->get_hw_id_string(bus, buf, buf_len);
|
||||
}
|
||||
|
||||
static inline u32 bus_get_hw_id(struct iwl_bus *bus)
|
||||
{
|
||||
return bus->ops->get_hw_id(bus);
|
||||
}
|
||||
|
||||
static inline void bus_write8(struct iwl_bus *bus, u32 ofs, u8 val)
|
||||
|
|
|
@ -60,8 +60,8 @@ static void iwl_init_ht_hw_capab(const struct iwl_priv *priv,
|
|||
|
||||
ht_info->ht_supported = true;
|
||||
|
||||
if (priv->cfg->ht_params &&
|
||||
priv->cfg->ht_params->ht_greenfield_support)
|
||||
if (cfg(priv)->ht_params &&
|
||||
cfg(priv)->ht_params->ht_greenfield_support)
|
||||
ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
|
||||
ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
|
||||
max_bit_rate = MAX_BIT_RATE_20_MHZ;
|
||||
|
@ -76,11 +76,7 @@ static void iwl_init_ht_hw_capab(const struct iwl_priv *priv,
|
|||
ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
|
||||
|
||||
ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
|
||||
if (priv->cfg->bt_params && priv->cfg->bt_params->ampdu_factor)
|
||||
ht_info->ampdu_factor = priv->cfg->bt_params->ampdu_factor;
|
||||
ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
|
||||
if (priv->cfg->bt_params && priv->cfg->bt_params->ampdu_density)
|
||||
ht_info->ampdu_density = priv->cfg->bt_params->ampdu_density;
|
||||
|
||||
ht_info->mcs.rx_mask[0] = 0xFF;
|
||||
if (rx_chains_num >= 2)
|
||||
|
@ -141,7 +137,7 @@ int iwl_init_geos(struct iwl_priv *priv)
|
|||
sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
|
||||
sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
|
||||
|
||||
if (priv->cfg->sku & EEPROM_SKU_CAP_11N_ENABLE)
|
||||
if (cfg(priv)->sku & EEPROM_SKU_CAP_11N_ENABLE)
|
||||
iwl_init_ht_hw_capab(priv, &sband->ht_cap,
|
||||
IEEE80211_BAND_5GHZ);
|
||||
|
||||
|
@ -151,7 +147,7 @@ int iwl_init_geos(struct iwl_priv *priv)
|
|||
sband->bitrates = rates;
|
||||
sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
|
||||
|
||||
if (priv->cfg->sku & EEPROM_SKU_CAP_11N_ENABLE)
|
||||
if (cfg(priv)->sku & EEPROM_SKU_CAP_11N_ENABLE)
|
||||
iwl_init_ht_hw_capab(priv, &sband->ht_cap,
|
||||
IEEE80211_BAND_2GHZ);
|
||||
|
||||
|
@ -206,12 +202,12 @@ int iwl_init_geos(struct iwl_priv *priv)
|
|||
priv->tx_power_next = max_tx_power;
|
||||
|
||||
if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
|
||||
priv->cfg->sku & EEPROM_SKU_CAP_BAND_52GHZ) {
|
||||
cfg(priv)->sku & EEPROM_SKU_CAP_BAND_52GHZ) {
|
||||
char buf[32];
|
||||
bus_get_hw_id(bus(priv), buf, sizeof(buf));
|
||||
bus_get_hw_id_string(bus(priv), buf, sizeof(buf));
|
||||
IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
|
||||
"Please send your %s to maintainer.\n", buf);
|
||||
priv->cfg->sku &= ~EEPROM_SKU_CAP_BAND_52GHZ;
|
||||
cfg(priv)->sku &= ~EEPROM_SKU_CAP_BAND_52GHZ;
|
||||
}
|
||||
|
||||
IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
|
||||
|
@ -966,9 +962,9 @@ int iwl_apm_init(struct iwl_priv *priv)
|
|||
bus_apm_config(bus(priv));
|
||||
|
||||
/* Configure analog phase-lock-loop before activating to D0A */
|
||||
if (priv->cfg->base_params->pll_cfg_val)
|
||||
if (cfg(priv)->base_params->pll_cfg_val)
|
||||
iwl_set_bit(bus(priv), CSR_ANA_PLL_CFG,
|
||||
priv->cfg->base_params->pll_cfg_val);
|
||||
cfg(priv)->base_params->pll_cfg_val);
|
||||
|
||||
/*
|
||||
* Set "initialization complete" bit to move adapter from
|
||||
|
@ -1465,7 +1461,7 @@ void iwl_bg_watchdog(unsigned long data)
|
|||
if (iwl_is_rfkill(priv->shrd))
|
||||
return;
|
||||
|
||||
timeout = priv->cfg->base_params->wd_timeout;
|
||||
timeout = cfg(priv)->base_params->wd_timeout;
|
||||
if (timeout == 0)
|
||||
return;
|
||||
|
||||
|
@ -1490,11 +1486,11 @@ void iwl_bg_watchdog(unsigned long data)
|
|||
|
||||
void iwl_setup_watchdog(struct iwl_priv *priv)
|
||||
{
|
||||
unsigned int timeout = priv->cfg->base_params->wd_timeout;
|
||||
unsigned int timeout = cfg(priv)->base_params->wd_timeout;
|
||||
|
||||
if (!iwlagn_mod_params.wd_disable) {
|
||||
/* use system default */
|
||||
if (timeout && !priv->cfg->base_params->wd_disable)
|
||||
if (timeout && !cfg(priv)->base_params->wd_disable)
|
||||
mod_timer(&priv->watchdog,
|
||||
jiffies +
|
||||
msecs_to_jiffies(IWL_WD_TICK(timeout)));
|
||||
|
@ -1584,34 +1580,6 @@ __le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,
|
|||
return cpu_to_le32(res);
|
||||
}
|
||||
|
||||
void iwl_start_tx_ba_trans_ready(struct iwl_priv *priv,
|
||||
enum iwl_rxon_context_id ctx,
|
||||
u8 sta_id, u8 tid)
|
||||
{
|
||||
struct ieee80211_vif *vif;
|
||||
u8 *addr = priv->stations[sta_id].sta.sta.addr;
|
||||
|
||||
if (ctx == NUM_IWL_RXON_CTX)
|
||||
ctx = priv->stations[sta_id].ctxid;
|
||||
vif = priv->contexts[ctx].vif;
|
||||
|
||||
ieee80211_start_tx_ba_cb_irqsafe(vif, addr, tid);
|
||||
}
|
||||
|
||||
void iwl_stop_tx_ba_trans_ready(struct iwl_priv *priv,
|
||||
enum iwl_rxon_context_id ctx,
|
||||
u8 sta_id, u8 tid)
|
||||
{
|
||||
struct ieee80211_vif *vif;
|
||||
u8 *addr = priv->stations[sta_id].sta.sta.addr;
|
||||
|
||||
if (ctx == NUM_IWL_RXON_CTX)
|
||||
ctx = priv->stations[sta_id].ctxid;
|
||||
vif = priv->contexts[ctx].vif;
|
||||
|
||||
ieee80211_stop_tx_ba_cb_irqsafe(vif, addr, tid);
|
||||
}
|
||||
|
||||
void iwl_set_hw_rfkill_state(struct iwl_priv *priv, bool state)
|
||||
{
|
||||
wiphy_rfkill_set_hw_state(priv->hw->wiphy, state);
|
||||
|
@ -1619,8 +1587,7 @@ void iwl_set_hw_rfkill_state(struct iwl_priv *priv, bool state)
|
|||
|
||||
void iwl_nic_config(struct iwl_priv *priv)
|
||||
{
|
||||
priv->cfg->lib->nic_config(priv);
|
||||
|
||||
cfg(priv)->lib->nic_config(priv);
|
||||
}
|
||||
|
||||
void iwl_free_skb(struct iwl_priv *priv, struct sk_buff *skb)
|
||||
|
|
|
@ -142,8 +142,6 @@ struct iwl_base_params {
|
|||
* @bt_init_traffic_load: specify initial bt traffic load
|
||||
* @bt_prio_boost: default bt priority boost value
|
||||
* @agg_time_limit: maximum number of uSec in aggregation
|
||||
* @ampdu_factor: Maximum A-MPDU length factor
|
||||
* @ampdu_density: Minimum A-MPDU spacing
|
||||
* @bt_sco_disable: uCode should not response to BT in SCO/ESCO mode
|
||||
*/
|
||||
struct iwl_bt_params {
|
||||
|
@ -151,8 +149,6 @@ struct iwl_bt_params {
|
|||
u8 bt_init_traffic_load;
|
||||
u8 bt_prio_boost;
|
||||
u16 agg_time_limit;
|
||||
u8 ampdu_factor;
|
||||
u8 ampdu_density;
|
||||
bool bt_sco_disable;
|
||||
bool bt_session_2;
|
||||
};
|
||||
|
@ -165,77 +161,6 @@ struct iwl_ht_params {
|
|||
enum ieee80211_smps_mode smps_mode;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct iwl_cfg
|
||||
* @name: Offical name of the device
|
||||
* @fw_name_pre: Firmware filename prefix. The api version and extension
|
||||
* (.ucode) will be added to filename before loading from disk. The
|
||||
* filename is constructed as fw_name_pre<api>.ucode.
|
||||
* @ucode_api_max: Highest version of uCode API supported by driver.
|
||||
* @ucode_api_ok: oldest version of the uCode API that is OK to load
|
||||
* without a warning, for use in transitions
|
||||
* @ucode_api_min: Lowest version of uCode API supported by driver.
|
||||
* @valid_tx_ant: valid transmit antenna
|
||||
* @valid_rx_ant: valid receive antenna
|
||||
* @sku: sku information from EEPROM
|
||||
* @eeprom_ver: EEPROM version
|
||||
* @eeprom_calib_ver: EEPROM calibration version
|
||||
* @lib: pointer to the lib ops
|
||||
* @additional_nic_config: additional nic configuration
|
||||
* @base_params: pointer to basic parameters
|
||||
* @ht_params: point to ht patameters
|
||||
* @bt_params: pointer to bt parameters
|
||||
* @pa_type: used by 6000 series only to identify the type of Power Amplifier
|
||||
* @need_temp_offset_calib: need to perform temperature offset calibration
|
||||
* @no_xtal_calib: some devices do not need crystal calibration data,
|
||||
* don't send it to those
|
||||
* @scan_antennas: available antenna for scan operation
|
||||
* @led_mode: 0=blinking, 1=On(RF On)/Off(RF Off)
|
||||
* @adv_pm: advance power management
|
||||
* @rx_with_siso_diversity: 1x1 device with rx antenna diversity
|
||||
* @internal_wimax_coex: internal wifi/wimax combo device
|
||||
* @iq_invert: I/Q inversion
|
||||
* @temp_offset_v2: support v2 of temperature offset calibration
|
||||
*
|
||||
* We enable the driver to be backward compatible wrt API version. The
|
||||
* driver specifies which APIs it supports (with @ucode_api_max being the
|
||||
* highest and @ucode_api_min the lowest). Firmware will only be loaded if
|
||||
* it has a supported API version.
|
||||
*
|
||||
* The ideal usage of this infrastructure is to treat a new ucode API
|
||||
* release as a new hardware revision.
|
||||
*/
|
||||
struct iwl_cfg {
|
||||
/* params specific to an individual device within a device family */
|
||||
const char *name;
|
||||
const char *fw_name_pre;
|
||||
const unsigned int ucode_api_max;
|
||||
const unsigned int ucode_api_ok;
|
||||
const unsigned int ucode_api_min;
|
||||
u8 valid_tx_ant;
|
||||
u8 valid_rx_ant;
|
||||
u16 sku;
|
||||
u16 eeprom_ver;
|
||||
u16 eeprom_calib_ver;
|
||||
const struct iwl_lib_ops *lib;
|
||||
void (*additional_nic_config)(struct iwl_priv *priv);
|
||||
/* params not likely to change within a device family */
|
||||
struct iwl_base_params *base_params;
|
||||
/* params likely to change within a device family */
|
||||
struct iwl_ht_params *ht_params;
|
||||
struct iwl_bt_params *bt_params;
|
||||
enum iwl_pa_type pa_type; /* if used set to IWL_PA_SYSTEM */
|
||||
const bool need_temp_offset_calib; /* if used set to true */
|
||||
const bool no_xtal_calib;
|
||||
u8 scan_rx_antennas[IEEE80211_NUM_BANDS];
|
||||
enum iwl_led_mode led_mode;
|
||||
const bool adv_pm;
|
||||
const bool rx_with_siso_diversity;
|
||||
const bool internal_wimax_coex;
|
||||
const bool iq_invert;
|
||||
const bool temp_offset_v2;
|
||||
};
|
||||
|
||||
/***************************
|
||||
* L i b *
|
||||
***************************/
|
||||
|
@ -368,8 +293,8 @@ static inline const struct ieee80211_supported_band *iwl_get_hw_mode(
|
|||
|
||||
static inline bool iwl_advanced_bt_coexist(struct iwl_priv *priv)
|
||||
{
|
||||
return priv->cfg->bt_params &&
|
||||
priv->cfg->bt_params->advanced_bt_coexist;
|
||||
return cfg(priv)->bt_params &&
|
||||
cfg(priv)->bt_params->advanced_bt_coexist;
|
||||
}
|
||||
|
||||
static inline void iwl_enable_rfkill_int(struct iwl_priv *priv)
|
||||
|
|
|
@ -372,15 +372,13 @@ static ssize_t iwl_dbgfs_stations_read(struct file *file, char __user *user_buf,
|
|||
i, station->sta.sta.addr,
|
||||
station->sta.station_flags_msk);
|
||||
pos += scnprintf(buf + pos, bufsz - pos,
|
||||
"TID\tseq_num\ttxq_id\ttfds\trate_n_flags\n");
|
||||
"TID\tseq_num\trate_n_flags\n");
|
||||
|
||||
for (j = 0; j < IWL_MAX_TID_COUNT; j++) {
|
||||
tid_data = &priv->shrd->tid_data[i][j];
|
||||
tid_data = &priv->tid_data[i][j];
|
||||
pos += scnprintf(buf + pos, bufsz - pos,
|
||||
"%d:\t%#x\t%#x\t%u\t%#x",
|
||||
"%d:\t%#x\t%#x",
|
||||
j, tid_data->seq_number,
|
||||
tid_data->agg.txq_id,
|
||||
tid_data->tfds_in_queue,
|
||||
tid_data->agg.rate_n_flags);
|
||||
|
||||
if (tid_data->agg.wait_for_ba)
|
||||
|
@ -408,7 +406,7 @@ static ssize_t iwl_dbgfs_nvm_read(struct file *file,
|
|||
const u8 *ptr;
|
||||
char *buf;
|
||||
u16 eeprom_ver;
|
||||
size_t eeprom_len = priv->cfg->base_params->eeprom_size;
|
||||
size_t eeprom_len = cfg(priv)->base_params->eeprom_size;
|
||||
buf_size = 4 * eeprom_len + 256;
|
||||
|
||||
if (eeprom_len % 16) {
|
||||
|
@ -1542,15 +1540,15 @@ static ssize_t iwl_dbgfs_ucode_tx_stats_read(struct file *file,
|
|||
if (tx->tx_power.ant_a || tx->tx_power.ant_b || tx->tx_power.ant_c) {
|
||||
pos += scnprintf(buf + pos, bufsz - pos,
|
||||
"tx power: (1/2 dB step)\n");
|
||||
if ((priv->cfg->valid_tx_ant & ANT_A) && tx->tx_power.ant_a)
|
||||
if ((cfg(priv)->valid_tx_ant & ANT_A) && tx->tx_power.ant_a)
|
||||
pos += scnprintf(buf + pos, bufsz - pos,
|
||||
fmt_hex, "antenna A:",
|
||||
tx->tx_power.ant_a);
|
||||
if ((priv->cfg->valid_tx_ant & ANT_B) && tx->tx_power.ant_b)
|
||||
if ((cfg(priv)->valid_tx_ant & ANT_B) && tx->tx_power.ant_b)
|
||||
pos += scnprintf(buf + pos, bufsz - pos,
|
||||
fmt_hex, "antenna B:",
|
||||
tx->tx_power.ant_b);
|
||||
if ((priv->cfg->valid_tx_ant & ANT_C) && tx->tx_power.ant_c)
|
||||
if ((cfg(priv)->valid_tx_ant & ANT_C) && tx->tx_power.ant_c)
|
||||
pos += scnprintf(buf + pos, bufsz - pos,
|
||||
fmt_hex, "antenna C:",
|
||||
tx->tx_power.ant_c);
|
||||
|
@ -2221,7 +2219,7 @@ static ssize_t iwl_dbgfs_plcp_delta_read(struct file *file,
|
|||
const size_t bufsz = sizeof(buf);
|
||||
|
||||
pos += scnprintf(buf + pos, bufsz - pos, "%u\n",
|
||||
priv->cfg->base_params->plcp_delta_threshold);
|
||||
cfg(priv)->base_params->plcp_delta_threshold);
|
||||
|
||||
return simple_read_from_buffer(user_buf, count, ppos, buf, pos);
|
||||
}
|
||||
|
@ -2243,10 +2241,10 @@ static ssize_t iwl_dbgfs_plcp_delta_write(struct file *file,
|
|||
return -EINVAL;
|
||||
if ((plcp < IWL_MAX_PLCP_ERR_THRESHOLD_MIN) ||
|
||||
(plcp > IWL_MAX_PLCP_ERR_THRESHOLD_MAX))
|
||||
priv->cfg->base_params->plcp_delta_threshold =
|
||||
cfg(priv)->base_params->plcp_delta_threshold =
|
||||
IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE;
|
||||
else
|
||||
priv->cfg->base_params->plcp_delta_threshold = plcp;
|
||||
cfg(priv)->base_params->plcp_delta_threshold = plcp;
|
||||
return count;
|
||||
}
|
||||
|
||||
|
@ -2348,7 +2346,7 @@ static ssize_t iwl_dbgfs_wd_timeout_write(struct file *file,
|
|||
if (timeout < 0 || timeout > IWL_MAX_WD_TIMEOUT)
|
||||
timeout = IWL_DEF_WD_TIMEOUT;
|
||||
|
||||
priv->cfg->base_params->wd_timeout = timeout;
|
||||
cfg(priv)->base_params->wd_timeout = timeout;
|
||||
iwl_setup_watchdog(priv);
|
||||
return count;
|
||||
}
|
||||
|
@ -2408,10 +2406,10 @@ static ssize_t iwl_dbgfs_protection_mode_read(struct file *file,
|
|||
char buf[40];
|
||||
const size_t bufsz = sizeof(buf);
|
||||
|
||||
if (priv->cfg->ht_params)
|
||||
if (cfg(priv)->ht_params)
|
||||
pos += scnprintf(buf + pos, bufsz - pos,
|
||||
"use %s for aggregation\n",
|
||||
(priv->cfg->ht_params->use_rts_for_aggregation) ?
|
||||
(cfg(priv)->ht_params->use_rts_for_aggregation) ?
|
||||
"rts/cts" : "cts-to-self");
|
||||
else
|
||||
pos += scnprintf(buf + pos, bufsz - pos, "N/A");
|
||||
|
@ -2428,7 +2426,7 @@ static ssize_t iwl_dbgfs_protection_mode_write(struct file *file,
|
|||
int buf_size;
|
||||
int rts;
|
||||
|
||||
if (!priv->cfg->ht_params)
|
||||
if (!cfg(priv)->ht_params)
|
||||
return -EINVAL;
|
||||
|
||||
memset(buf, 0, sizeof(buf));
|
||||
|
@ -2438,9 +2436,9 @@ static ssize_t iwl_dbgfs_protection_mode_write(struct file *file,
|
|||
if (sscanf(buf, "%d", &rts) != 1)
|
||||
return -EINVAL;
|
||||
if (rts)
|
||||
priv->cfg->ht_params->use_rts_for_aggregation = true;
|
||||
cfg(priv)->ht_params->use_rts_for_aggregation = true;
|
||||
else
|
||||
priv->cfg->ht_params->use_rts_for_aggregation = false;
|
||||
cfg(priv)->ht_params->use_rts_for_aggregation = false;
|
||||
return count;
|
||||
}
|
||||
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue