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drm/i915: unify FLIP_DONE macro names 

s/FLIPDONE/FLIP_DONE/ to make all FLIP_DONE macro names consistent.

No functional change.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Imre Deak 2014-02-04 21:35:48 +02:00 committed by Daniel Vetter
parent 58ead0d7aa
commit 579a9b0e72
2 changed files with 10 additions and 10 deletions
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2
drivers/gpu/drm/i915/i915_irq.c
View File

@ -1500,7 +1500,7 @@ static void valleyview_pipestat_irq_handler(struct drm_device *dev, u32 iir)
if (pipe_stats[pipe] & PIPE_START_VBLANK_INTERRUPT_STATUS) if (pipe_stats[pipe] & PIPE_START_VBLANK_INTERRUPT_STATUS)
drm_handle_vblank(dev, pipe); drm_handle_vblank(dev, pipe);
if (pipe_stats[pipe] & PLANE_FLIPDONE_INT_STATUS_VLV) { if (pipe_stats[pipe] & PLANE_FLIP_DONE_INT_STATUS_VLV) {
intel_prepare_page_flip(dev, pipe); intel_prepare_page_flip(dev, pipe);
intel_finish_page_flip(dev, pipe); intel_finish_page_flip(dev, pipe);
} }

18
drivers/gpu/drm/i915/i915_reg.h
View File

@ -3240,7 +3240,7 @@
#define PIPECONF_DITHER_TYPE_TEMP (3<<2) #define PIPECONF_DITHER_TYPE_TEMP (3<<2)
#define _PIPEASTAT 0x70024 #define _PIPEASTAT 0x70024
#define PIPE_FIFO_UNDERRUN_STATUS (1UL<<31) #define PIPE_FIFO_UNDERRUN_STATUS (1UL<<31)
#define SPRITE1_FLIPDONE_INT_EN_VLV (1UL<<30) #define SPRITE1_FLIP_DONE_INT_EN_VLV (1UL<<30)
#define PIPE_CRC_ERROR_ENABLE (1UL<<29) #define PIPE_CRC_ERROR_ENABLE (1UL<<29)
#define PIPE_CRC_DONE_ENABLE (1UL<<28) #define PIPE_CRC_DONE_ENABLE (1UL<<28)
#define PIPE_GMBUS_EVENT_ENABLE (1UL<<27) #define PIPE_GMBUS_EVENT_ENABLE (1UL<<27)
@ -3258,12 +3258,12 @@
#define PIPE_VBLANK_INTERRUPT_ENABLE (1UL<<17) #define PIPE_VBLANK_INTERRUPT_ENABLE (1UL<<17)
#define PIPEA_HBLANK_INT_EN_VLV (1UL<<16) #define PIPEA_HBLANK_INT_EN_VLV (1UL<<16)
#define PIPE_OVERLAY_UPDATED_ENABLE (1UL<<16) #define PIPE_OVERLAY_UPDATED_ENABLE (1UL<<16)
#define SPRITE1_FLIPDONE_INT_STATUS_VLV (1UL<<15) #define SPRITE1_FLIP_DONE_INT_STATUS_VLV (1UL<<15)
#define SPRITE0_FLIPDONE_INT_STATUS_VLV (1UL<<14) #define SPRITE0_FLIP_DONE_INT_STATUS_VLV (1UL<<14)
#define PIPE_CRC_ERROR_INTERRUPT_STATUS (1UL<<13) #define PIPE_CRC_ERROR_INTERRUPT_STATUS (1UL<<13)
#define PIPE_CRC_DONE_INTERRUPT_STATUS (1UL<<12) #define PIPE_CRC_DONE_INTERRUPT_STATUS (1UL<<12)
#define PIPE_GMBUS_INTERRUPT_STATUS (1UL<<11) #define PIPE_GMBUS_INTERRUPT_STATUS (1UL<<11)
#define PLANE_FLIPDONE_INT_STATUS_VLV (1UL<<10) #define PLANE_FLIP_DONE_INT_STATUS_VLV (1UL<<10)
#define PIPE_HOTPLUG_INTERRUPT_STATUS (1UL<<10) #define PIPE_HOTPLUG_INTERRUPT_STATUS (1UL<<10)
#define PIPE_VSYNC_INTERRUPT_STATUS (1UL<<9) #define PIPE_VSYNC_INTERRUPT_STATUS (1UL<<9)
#define PIPE_DISPLAY_LINE_COMPARE_STATUS (1UL<<8) #define PIPE_DISPLAY_LINE_COMPARE_STATUS (1UL<<8)
@ -3313,14 +3313,14 @@
#define PIPEB_LINE_COMPARE_INT_EN (1<<29) #define PIPEB_LINE_COMPARE_INT_EN (1<<29)
#define PIPEB_HLINE_INT_EN (1<<28) #define PIPEB_HLINE_INT_EN (1<<28)
#define PIPEB_VBLANK_INT_EN (1<<27) #define PIPEB_VBLANK_INT_EN (1<<27)
#define SPRITED_FLIPDONE_INT_EN (1<<26) #define SPRITED_FLIP_DONE_INT_EN (1<<26)
#define SPRITEC_FLIPDONE_INT_EN (1<<25) #define SPRITEC_FLIP_DONE_INT_EN (1<<25)
#define PLANEB_FLIPDONE_INT_EN (1<<24) #define PLANEB_FLIP_DONE_INT_EN (1<<24)
#define PIPEA_LINE_COMPARE_INT_EN (1<<21) #define PIPEA_LINE_COMPARE_INT_EN (1<<21)
#define PIPEA_HLINE_INT_EN (1<<20) #define PIPEA_HLINE_INT_EN (1<<20)
#define PIPEA_VBLANK_INT_EN (1<<19) #define PIPEA_VBLANK_INT_EN (1<<19)
#define SPRITEB_FLIPDONE_INT_EN (1<<18) #define SPRITEB_FLIP_DONE_INT_EN (1<<18)
#define SPRITEA_FLIPDONE_INT_EN (1<<17) #define SPRITEA_FLIP_DONE_INT_EN (1<<17)
#define PLANEA_FLIPDONE_INT_EN (1<<16) #define PLANEA_FLIPDONE_INT_EN (1<<16)
#define DPINVGTT (VLV_DISPLAY_BASE + 0x7002c) /* VLV only */ #define DPINVGTT (VLV_DISPLAY_BASE + 0x7002c) /* VLV only */