qlge: Turn on RX header split based on platform.
Using 4-byte aligned headers is problematic for some architectures. Since qlge uses 4-byte aligned rx buffers we split headers for these architectures into a separate buffer and then recopy to align on 2-byte boundary. Signed-off-by: Ron Mercer <ron.mercer@qlogic.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -54,12 +54,8 @@
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#define RX_RING_SHADOW_SPACE (sizeof(u64) + \
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MAX_DB_PAGES_PER_BQ(NUM_SMALL_BUFFERS) * sizeof(u64) + \
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MAX_DB_PAGES_PER_BQ(NUM_LARGE_BUFFERS) * sizeof(u64))
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#define SMALL_BUFFER_SIZE 512
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#define SMALL_BUF_MAP_SIZE (SMALL_BUFFER_SIZE / 2)
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#define LARGE_BUFFER_MAX_SIZE 8192
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#define LARGE_BUFFER_MIN_SIZE 2048
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#define MAX_SPLIT_SIZE 1023
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#define QLGE_SB_PAD 32
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#define MAX_CQ 128
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#define DFLT_COALESCE_WAIT 100 /* 100 usec wait for coalescing */
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@ -737,6 +733,21 @@ enum {
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PRB_MX_DATA = 0xfc, /* Use semaphore */
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};
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#ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
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#define SMALL_BUFFER_SIZE 256
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#define SMALL_BUF_MAP_SIZE SMALL_BUFFER_SIZE
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#define SPLT_SETTING FSC_DBRST_1024
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#define SPLT_LEN 0
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#define QLGE_SB_PAD 0
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#else
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#define SMALL_BUFFER_SIZE 512
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#define SMALL_BUF_MAP_SIZE (SMALL_BUFFER_SIZE / 2)
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#define SPLT_SETTING FSC_SH
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#define SPLT_LEN (SPLT_HDR_EP | \
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min(SMALL_BUF_MAP_SIZE, 1023))
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#define QLGE_SB_PAD 32
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#endif
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/*
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* CAM output format.
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*/
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@ -3332,15 +3332,15 @@ static int ql_adapter_initialize(struct ql_adapter *qdev)
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/* Enable the function, set pagesize, enable error checking. */
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value = FSC_FE | FSC_EPC_INBOUND | FSC_EPC_OUTBOUND |
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FSC_EC | FSC_VM_PAGE_4K | FSC_SH;
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FSC_EC | FSC_VM_PAGE_4K;
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value |= SPLT_SETTING;
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/* Set/clear header splitting. */
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mask = FSC_VM_PAGESIZE_MASK |
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FSC_DBL_MASK | FSC_DBRST_MASK | (value << 16);
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ql_write32(qdev, FSC, mask | value);
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ql_write32(qdev, SPLT_HDR, SPLT_HDR_EP |
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min(SMALL_BUF_MAP_SIZE, MAX_SPLIT_SIZE));
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ql_write32(qdev, SPLT_HDR, SPLT_LEN);
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/* Set RX packet routing to use port/pci function on which the
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* packet arrived on in addition to usual frame routing.
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