dmaengine: idxd: handle interrupt handle revoked event
"Interrupt handle revoked" is an event that happens when the driver is running on a guest kernel and the VM is migrated to a new machine. The device will trigger an interrupt that signals to the guest driver that the interrupt handles need to be replaced. The misc irq thread function calls a helper function to handle the event. The function uses the WQ percpu_ref to quiesce the kernel submissions. It then replaces the interrupt handles by requesting interrupt handle command for each I/O MSIX vector. Once the handle is updated, the driver will unblock the submission path to allow new submissions. The submitter will attempt to acquire a percpu_ref before submission. When the request fails, it will wait on the wq_resurrect 'completion'. The driver does anticipate the possibility of descriptors being submitted before the WQ percpu_ref is killed. If a descriptor has already been submitted, it will return with incorrect interrupt handle status. The descriptor will be re-submitted with the new interrupt handle on the completion path. For descriptors with incorrect interrupt handles, completion interrupt won't be triggered. At the completion of the interrupt handle refresh, the handling function will call idxd_int_handle_refresh_drain() to issue drain descriptors to each of the wq with associated interrupt handle. The drain descriptor will have interrupt request set but without completion record. This will ensure all descriptors with incorrect interrupt completion handle get drained and a completion interrupt is triggered for the guest driver to process them. Reviewed-by: Kevin Tian <kevin.tian@intel.com> Co-Developed-by: Sanjay Kumar <sanjay.k.kumar@intel.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/163528420189.3925689.18212568593220415551.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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@ -404,17 +404,21 @@ int idxd_wq_init_percpu_ref(struct idxd_wq *wq)
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int rc;
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memset(&wq->wq_active, 0, sizeof(wq->wq_active));
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rc = percpu_ref_init(&wq->wq_active, idxd_wq_ref_release, 0, GFP_KERNEL);
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rc = percpu_ref_init(&wq->wq_active, idxd_wq_ref_release,
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PERCPU_REF_ALLOW_REINIT, GFP_KERNEL);
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if (rc < 0)
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return rc;
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reinit_completion(&wq->wq_dead);
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reinit_completion(&wq->wq_resurrect);
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return 0;
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}
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void __idxd_wq_quiesce(struct idxd_wq *wq)
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{
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lockdep_assert_held(&wq->wq_lock);
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reinit_completion(&wq->wq_resurrect);
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percpu_ref_kill(&wq->wq_active);
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complete_all(&wq->wq_resurrect);
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wait_for_completion(&wq->wq_dead);
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}
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@ -171,6 +171,7 @@ struct idxd_wq {
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u32 portal_offset;
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struct percpu_ref wq_active;
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struct completion wq_dead;
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struct completion wq_resurrect;
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struct idxd_dev idxd_dev;
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struct idxd_cdev *idxd_cdev;
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struct wait_queue_head err_queue;
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@ -245,6 +245,7 @@ static int idxd_setup_wqs(struct idxd_device *idxd)
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mutex_init(&wq->wq_lock);
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init_waitqueue_head(&wq->err_queue);
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init_completion(&wq->wq_dead);
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init_completion(&wq->wq_resurrect);
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wq->max_xfer_bytes = idxd->max_xfer_bytes;
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wq->max_batch_size = idxd->max_batch_size;
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wq->wqcfg = kzalloc_node(idxd->wqcfg_size, GFP_KERNEL, dev_to_node(dev));
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@ -6,6 +6,7 @@
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#include <linux/pci.h>
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#include <linux/io-64-nonatomic-lo-hi.h>
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#include <linux/dmaengine.h>
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#include <linux/delay.h>
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#include <uapi/linux/idxd.h>
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#include "../dmaengine.h"
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#include "idxd.h"
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@ -27,6 +28,11 @@ struct idxd_resubmit {
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struct idxd_desc *desc;
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};
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struct idxd_int_handle_revoke {
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struct work_struct work;
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struct idxd_device *idxd;
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};
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static void idxd_device_reinit(struct work_struct *work)
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{
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struct idxd_device *idxd = container_of(work, struct idxd_device, work);
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@ -99,6 +105,120 @@ static void idxd_int_handle_revoke_drain(struct idxd_irq_entry *ie)
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}
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}
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static void idxd_abort_invalid_int_handle_descs(struct idxd_irq_entry *ie)
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{
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LIST_HEAD(flist);
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struct idxd_desc *d, *t;
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struct llist_node *head;
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spin_lock(&ie->list_lock);
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head = llist_del_all(&ie->pending_llist);
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if (head) {
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llist_for_each_entry_safe(d, t, head, llnode)
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list_add_tail(&d->list, &ie->work_list);
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}
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list_for_each_entry_safe(d, t, &ie->work_list, list) {
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if (d->completion->status == DSA_COMP_INT_HANDLE_INVAL)
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list_move_tail(&d->list, &flist);
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}
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spin_unlock(&ie->list_lock);
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list_for_each_entry_safe(d, t, &flist, list) {
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list_del(&d->list);
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idxd_dma_complete_txd(d, IDXD_COMPLETE_ABORT, true);
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}
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}
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static void idxd_int_handle_revoke(struct work_struct *work)
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{
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struct idxd_int_handle_revoke *revoke =
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container_of(work, struct idxd_int_handle_revoke, work);
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struct idxd_device *idxd = revoke->idxd;
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struct pci_dev *pdev = idxd->pdev;
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struct device *dev = &pdev->dev;
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int i, new_handle, rc;
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if (!idxd->request_int_handles) {
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kfree(revoke);
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dev_warn(dev, "Unexpected int handle refresh interrupt.\n");
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return;
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}
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/*
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* The loop attempts to acquire new interrupt handle for all interrupt
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* vectors that supports a handle. If a new interrupt handle is acquired and the
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* wq is kernel type, the driver will kill the percpu_ref to pause all
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* ongoing descriptor submissions. The interrupt handle is then changed.
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* After change, the percpu_ref is revived and all the pending submissions
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* are woken to try again. A drain is sent to for the interrupt handle
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* at the end to make sure all invalid int handle descriptors are processed.
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*/
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for (i = 1; i < idxd->irq_cnt; i++) {
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struct idxd_irq_entry *ie = &idxd->irq_entries[i];
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struct idxd_wq *wq = ie->wq;
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rc = idxd_device_request_int_handle(idxd, i, &new_handle, IDXD_IRQ_MSIX);
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if (rc < 0) {
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dev_warn(dev, "get int handle %d failed: %d\n", i, rc);
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/*
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* Failed to acquire new interrupt handle. Kill the WQ
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* and release all the pending submitters. The submitters will
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* get error return code and handle appropriately.
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*/
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ie->int_handle = INVALID_INT_HANDLE;
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idxd_wq_quiesce(wq);
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idxd_abort_invalid_int_handle_descs(ie);
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continue;
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}
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/* No change in interrupt handle, nothing needs to be done */
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if (ie->int_handle == new_handle)
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continue;
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if (wq->state != IDXD_WQ_ENABLED || wq->type != IDXD_WQT_KERNEL) {
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/*
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* All the MSIX interrupts are allocated at once during probe.
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* Therefore we need to update all interrupts even if the WQ
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* isn't supporting interrupt operations.
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*/
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ie->int_handle = new_handle;
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continue;
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}
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mutex_lock(&wq->wq_lock);
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reinit_completion(&wq->wq_resurrect);
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/* Kill percpu_ref to pause additional descriptor submissions */
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percpu_ref_kill(&wq->wq_active);
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/* Wait for all submitters quiesce before we change interrupt handle */
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wait_for_completion(&wq->wq_dead);
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ie->int_handle = new_handle;
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/* Revive percpu ref and wake up all the waiting submitters */
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percpu_ref_reinit(&wq->wq_active);
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complete_all(&wq->wq_resurrect);
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mutex_unlock(&wq->wq_lock);
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/*
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* The delay here is to wait for all possible MOVDIR64B that
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* are issued before percpu_ref_kill() has happened to have
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* reached the PCIe domain before the drain is issued. The driver
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* needs to ensure that the drain descriptor issued does not pass
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* all the other issued descriptors that contain the invalid
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* interrupt handle in order to ensure that the drain descriptor
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* interrupt will allow the cleanup of all the descriptors with
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* invalid interrupt handle.
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*/
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if (wq_dedicated(wq))
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udelay(100);
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idxd_int_handle_revoke_drain(ie);
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}
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kfree(revoke);
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}
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static int process_misc_interrupts(struct idxd_device *idxd, u32 cause)
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{
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struct device *dev = &idxd->pdev->dev;
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@ -145,6 +265,23 @@ static int process_misc_interrupts(struct idxd_device *idxd, u32 cause)
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err = true;
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}
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if (cause & IDXD_INTC_INT_HANDLE_REVOKED) {
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struct idxd_int_handle_revoke *revoke;
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val |= IDXD_INTC_INT_HANDLE_REVOKED;
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revoke = kzalloc(sizeof(*revoke), GFP_ATOMIC);
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if (revoke) {
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revoke->idxd = idxd;
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INIT_WORK(&revoke->work, idxd_int_handle_revoke);
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queue_work(idxd->wq, &revoke->work);
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} else {
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dev_err(dev, "Failed to allocate work for int handle revoke\n");
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idxd_wqs_quiesce(idxd);
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}
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}
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if (cause & IDXD_INTC_CMD) {
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val |= IDXD_INTC_CMD;
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complete(idxd->cmd_done);
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@ -158,6 +158,7 @@ enum idxd_device_reset_type {
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#define IDXD_INTC_OCCUPY 0x04
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#define IDXD_INTC_PERFMON_OVFL 0x08
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#define IDXD_INTC_HALT_STATE 0x10
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#define IDXD_INTC_INT_HANDLE_REVOKED 0x80000000
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#define IDXD_CMD_OFFSET 0xa0
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union idxd_command_reg {
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@ -127,14 +127,18 @@ int idxd_submit_desc(struct idxd_wq *wq, struct idxd_desc *desc)
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{
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struct idxd_device *idxd = wq->idxd;
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struct idxd_irq_entry *ie = NULL;
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u32 desc_flags = desc->hw->flags;
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void __iomem *portal;
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int rc;
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if (idxd->state != IDXD_DEV_ENABLED)
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return -EIO;
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if (!percpu_ref_tryget_live(&wq->wq_active))
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return -ENXIO;
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if (!percpu_ref_tryget_live(&wq->wq_active)) {
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wait_for_completion(&wq->wq_resurrect);
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if (!percpu_ref_tryget_live(&wq->wq_active))
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return -ENXIO;
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}
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portal = idxd_wq_portal_addr(wq);
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@ -149,7 +153,7 @@ int idxd_submit_desc(struct idxd_wq *wq, struct idxd_desc *desc)
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* Pending the descriptor to the lockless list for the irq_entry
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* that we designated the descriptor to.
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*/
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if (desc->hw->flags & IDXD_OP_FLAG_RCI) {
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if (desc_flags & IDXD_OP_FLAG_RCI) {
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ie = wq->ie;
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if (ie->int_handle == INVALID_INT_HANDLE)
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desc->hw->int_handle = ie->id;
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