NXP LPC32xx ARM SoC cleanup for v4.10
This includes a few cleanup changes: * remove unused header file mach/irqs.h; * remove unused header file clock.h. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.14 (GNU/Linux) iQIcBAABAgAGBQJYIecDAAoJEJw94nR8/maCJM8P/RqVcbXsSOn9Lz1UVR2ovhh5 kBaG+Nr6KwPGIiXUOTRTPu4VRLyu6WYds4uEs3hHJrqcPufjJWsTY6bvfzDdkvEw 38zyV7E0//+3yDcDwjUJzUF32cNmslpKpA8hP2U5i7u8N7wjopUccWEsa0kfWBQZ 5GE7FpdyBXAvqXVKr9x/htFyoGpk7c8oGUkON264uIPa1YssIVBkfPb2z/oUiUx5 dAVV/ywWsPGfLWuwLhCNdZLivJ01UB/Fl+Z05KKRAmaX8pUTwkaG0/LSVw3+52EP 5/glMDKLs1k6eVH172w+fUwJ5/M4TYwXzkEnzhv7aR0QPLrliD7XPxdj7jO4T9O8 8YoL5bbb71J/mK3OsdhBl1vojrdd2gJC8tf6PDGuEn/PuO1f/FRPHoL5O+Hm3T/s uP8ep0URuWXHtpynyzxysbCU6M3aaybUuYBarmNVnXR00/ul0r2b2uQ5Tt2HOzFR EXBdNhxPJIye7gq7nnaj/V1TALgB8p5oOE0GpqyhKaIXaTcFT8w1k6OYJXm9Ma9C KoUTX/qKl/QDnQvaSi7i+BaeedMBhS2EjjOeQ6bdFbKkbVoBYF7T2heXDr6tcLhN Fq5VAbBVvrYQ6f6b4icjRekNdmgeRQUxfz7pUotYzzueAHOycKwb/3CB2PmiKuz+ /BPlv4V0hr23qJH/nL8N =Sl5Q -----END PGP SIGNATURE----- Merge tag 'lpc32xx-cleanup-v4.10' of https://github.com/sylemieux/linux-lpc32xx into next/soc NXP LPC32xx ARM SoC cleanup for v4.10 This includes a few cleanup changes: * remove unused header file mach/irqs.h; * remove unused header file clock.h. * tag 'lpc32xx-cleanup-v4.10' of https://github.com/sylemieux/linux-lpc32xx: ARM: lpc32xx: remove unused header file clock.h ARM: lpc32xx: remove unused header file mach/irqs.h Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
56d027b417
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@ -1,38 +0,0 @@
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/*
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* arch/arm/mach-lpc32xx/clock.h
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*
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* Author: Kevin Wells <kevin.wells@nxp.com>
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*
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* Copyright (C) 2010 NXP Semiconductors
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __LPC32XX_CLOCK_H
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#define __LPC32XX_CLOCK_H
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struct clk {
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struct list_head node;
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struct clk *parent;
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u32 rate;
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u32 usecount;
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int (*set_rate) (struct clk *, unsigned long);
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unsigned long (*round_rate) (struct clk *, unsigned long);
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unsigned long (*get_rate) (struct clk *clk);
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int (*enable) (struct clk *, int);
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/* Register address and bit mask for simple clocks */
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void __iomem *enable_reg;
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u32 enable_mask;
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};
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#endif
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@ -24,7 +24,6 @@
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/*
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* Other arch specific structures and functions
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*/
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extern void __init lpc32xx_init_irq(void);
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extern void __init lpc32xx_map_io(void);
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extern void __init lpc32xx_serial_init(void);
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@ -1,117 +0,0 @@
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/*
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* arch/arm/mach-lpc32xx/include/mach/irqs.h
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*
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* Author: Kevin Wells <kevin.wells@nxp.com>
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*
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* Copyright (C) 2010 NXP Semiconductors
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __ASM_ARM_ARCH_IRQS_H
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#define __ASM_ARM_ARCH_IRQS_H
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#define LPC32XX_SIC1_IRQ(n) (32 + (n))
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#define LPC32XX_SIC2_IRQ(n) (64 + (n))
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/*
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* MIC interrupts
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*/
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#define IRQ_LPC32XX_SUB1IRQ 0
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#define IRQ_LPC32XX_SUB2IRQ 1
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#define IRQ_LPC32XX_PWM3 3
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#define IRQ_LPC32XX_PWM4 4
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#define IRQ_LPC32XX_HSTIMER 5
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#define IRQ_LPC32XX_WATCH 6
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#define IRQ_LPC32XX_UART_IIR3 7
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#define IRQ_LPC32XX_UART_IIR4 8
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#define IRQ_LPC32XX_UART_IIR5 9
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#define IRQ_LPC32XX_UART_IIR6 10
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#define IRQ_LPC32XX_FLASH 11
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#define IRQ_LPC32XX_SD1 13
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#define IRQ_LPC32XX_LCD 14
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#define IRQ_LPC32XX_SD0 15
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#define IRQ_LPC32XX_TIMER0 16
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#define IRQ_LPC32XX_TIMER1 17
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#define IRQ_LPC32XX_TIMER2 18
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#define IRQ_LPC32XX_TIMER3 19
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#define IRQ_LPC32XX_SSP0 20
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#define IRQ_LPC32XX_SSP1 21
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#define IRQ_LPC32XX_I2S0 22
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#define IRQ_LPC32XX_I2S1 23
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#define IRQ_LPC32XX_UART_IIR7 24
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#define IRQ_LPC32XX_UART_IIR2 25
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#define IRQ_LPC32XX_UART_IIR1 26
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#define IRQ_LPC32XX_MSTIMER 27
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#define IRQ_LPC32XX_DMA 28
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#define IRQ_LPC32XX_ETHERNET 29
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#define IRQ_LPC32XX_SUB1FIQ 30
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#define IRQ_LPC32XX_SUB2FIQ 31
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/*
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* SIC1 interrupts start at offset 32
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*/
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#define IRQ_LPC32XX_JTAG_COMM_TX LPC32XX_SIC1_IRQ(1)
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#define IRQ_LPC32XX_JTAG_COMM_RX LPC32XX_SIC1_IRQ(2)
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#define IRQ_LPC32XX_GPI_28 LPC32XX_SIC1_IRQ(4)
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#define IRQ_LPC32XX_TS_P LPC32XX_SIC1_IRQ(6)
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#define IRQ_LPC32XX_TS_IRQ LPC32XX_SIC1_IRQ(7)
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#define IRQ_LPC32XX_TS_AUX LPC32XX_SIC1_IRQ(8)
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#define IRQ_LPC32XX_SPI2 LPC32XX_SIC1_IRQ(12)
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#define IRQ_LPC32XX_PLLUSB LPC32XX_SIC1_IRQ(13)
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#define IRQ_LPC32XX_PLLHCLK LPC32XX_SIC1_IRQ(14)
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#define IRQ_LPC32XX_PLL397 LPC32XX_SIC1_IRQ(17)
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#define IRQ_LPC32XX_I2C_2 LPC32XX_SIC1_IRQ(18)
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#define IRQ_LPC32XX_I2C_1 LPC32XX_SIC1_IRQ(19)
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#define IRQ_LPC32XX_RTC LPC32XX_SIC1_IRQ(20)
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#define IRQ_LPC32XX_KEY LPC32XX_SIC1_IRQ(22)
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#define IRQ_LPC32XX_SPI1 LPC32XX_SIC1_IRQ(23)
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#define IRQ_LPC32XX_SW LPC32XX_SIC1_IRQ(24)
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#define IRQ_LPC32XX_USB_OTG_TIMER LPC32XX_SIC1_IRQ(25)
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#define IRQ_LPC32XX_USB_OTG_ATX LPC32XX_SIC1_IRQ(26)
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#define IRQ_LPC32XX_USB_HOST LPC32XX_SIC1_IRQ(27)
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#define IRQ_LPC32XX_USB_DEV_DMA LPC32XX_SIC1_IRQ(28)
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#define IRQ_LPC32XX_USB_DEV_LP LPC32XX_SIC1_IRQ(29)
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#define IRQ_LPC32XX_USB_DEV_HP LPC32XX_SIC1_IRQ(30)
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#define IRQ_LPC32XX_USB_I2C LPC32XX_SIC1_IRQ(31)
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/*
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* SIC2 interrupts start at offset 64
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*/
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#define IRQ_LPC32XX_GPIO_00 LPC32XX_SIC2_IRQ(0)
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#define IRQ_LPC32XX_GPIO_01 LPC32XX_SIC2_IRQ(1)
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#define IRQ_LPC32XX_GPIO_02 LPC32XX_SIC2_IRQ(2)
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#define IRQ_LPC32XX_GPIO_03 LPC32XX_SIC2_IRQ(3)
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#define IRQ_LPC32XX_GPIO_04 LPC32XX_SIC2_IRQ(4)
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#define IRQ_LPC32XX_GPIO_05 LPC32XX_SIC2_IRQ(5)
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#define IRQ_LPC32XX_SPI2_DATAIN LPC32XX_SIC2_IRQ(6)
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#define IRQ_LPC32XX_U2_HCTS LPC32XX_SIC2_IRQ(7)
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#define IRQ_LPC32XX_P0_P1_IRQ LPC32XX_SIC2_IRQ(8)
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#define IRQ_LPC32XX_GPI_08 LPC32XX_SIC2_IRQ(9)
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#define IRQ_LPC32XX_GPI_09 LPC32XX_SIC2_IRQ(10)
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#define IRQ_LPC32XX_GPI_19 LPC32XX_SIC2_IRQ(11)
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#define IRQ_LPC32XX_U7_HCTS LPC32XX_SIC2_IRQ(12)
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#define IRQ_LPC32XX_GPI_07 LPC32XX_SIC2_IRQ(15)
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#define IRQ_LPC32XX_SDIO LPC32XX_SIC2_IRQ(18)
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#define IRQ_LPC32XX_U5_RX LPC32XX_SIC2_IRQ(19)
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#define IRQ_LPC32XX_SPI1_DATAIN LPC32XX_SIC2_IRQ(20)
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#define IRQ_LPC32XX_GPI_00 LPC32XX_SIC2_IRQ(22)
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#define IRQ_LPC32XX_GPI_01 LPC32XX_SIC2_IRQ(23)
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#define IRQ_LPC32XX_GPI_02 LPC32XX_SIC2_IRQ(24)
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#define IRQ_LPC32XX_GPI_03 LPC32XX_SIC2_IRQ(25)
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#define IRQ_LPC32XX_GPI_04 LPC32XX_SIC2_IRQ(26)
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#define IRQ_LPC32XX_GPI_05 LPC32XX_SIC2_IRQ(27)
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#define IRQ_LPC32XX_GPI_06 LPC32XX_SIC2_IRQ(28)
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#define IRQ_LPC32XX_SYSCLK LPC32XX_SIC2_IRQ(31)
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#define LPC32XX_NR_IRQS 96
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#endif
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#include <mach/hardware.h>
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#include <mach/platform.h>
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#include "common.h"
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#include "clock.h"
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#define TEMP_IRAM_AREA IO_ADDRESS(LPC32XX_IRAM_BASE)
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