[ARM] S3C: Make IRQ_EINT sleep control common
Move the IRQ_EINT sleep control to be available to all s3c impelmentations. Since s3c_irqext_wake is not large, place it in arch/arm/plat-s3c/pm.c as adding it to a new file would be a waste of compile time. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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@ -80,7 +80,7 @@
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#define IRQ_EINT22 S3C2410_IRQ(50)
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#define IRQ_EINT23 S3C2410_IRQ(51)
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#define IRQ_EINT_BIT(x) ((x) - (IRQ_EINT4 + 4))
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#define IRQ_EINT(x) (((x) >= 4) ? (IRQ_EINT4 + (x) - 4) : (IRQ_EINT0 + (x)))
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#define IRQ_LCD_FIFO S3C2410_IRQ(52)
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@ -70,6 +70,8 @@
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#define IRQ_EINT17 S3C2410_IRQ(49)
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#define IRQ_EINT18 S3C2410_IRQ(50)
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#define IRQ_EINT_BIT(x) ((x) - IRQ_EINT00)
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/* SUB IRQS */
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#define IRQ_S3CUART_RX0 S3C2410_IRQ(51) /* 67 */
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#define IRQ_S3CUART_TX0 S3C2410_IRQ(52)
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@ -77,9 +77,11 @@ extern void s3c_pm_do_restore(struct sleep_save *ptr, int count);
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extern void s3c_pm_do_restore_core(struct sleep_save *ptr, int count);
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#ifdef CONFIG_PM
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extern int s3c_irqext_wake(unsigned int irqno, unsigned int state);
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extern int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state);
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extern int s3c24xx_irq_resume(struct sys_device *dev);
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#else
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#define s3c_irqext_wake NULL
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#define s3c24xx_irq_suspend NULL
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#define s3c24xx_irq_resume NULL
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#endif
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@ -27,6 +27,7 @@
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#include <mach/regs-gpio.h>
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#include <mach/regs-mem.h>
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#include <mach/regs-irq.h>
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#include <asm/irq.h>
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#include <plat/pm.h>
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#include <plat/pm-core.h>
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@ -100,6 +101,29 @@ static void s3c_pm_save_uart(void) { }
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static void s3c_pm_restore_uart(void) { }
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#endif
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/* The IRQ ext-int code goes here, it is too small to currently bother
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* with its own file. */
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unsigned long s3c_irqwake_intmask = 0xffffffffL;
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unsigned long s3c_irqwake_eintmask = 0xffffffffL;
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int s3c_irqext_wake(unsigned int irqno, unsigned int state)
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{
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unsigned long bit = 1L << IRQ_EINT_BIT(irqno);
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if (!(s3c_irqwake_eintallow & bit))
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return -ENOENT;
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printk(KERN_INFO "wake %s for irq %d\n",
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state ? "enabled" : "disabled", irqno);
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if (!state)
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s3c_irqwake_eintmask |= bit;
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else
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s3c_irqwake_eintmask &= ~bit;
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return 0;
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}
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/* helper functions to save and restore register state */
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@ -108,9 +108,7 @@ s3c_irqsub_ack(unsigned int irqno, unsigned int parentmask, unsigned int group)
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#ifdef CONFIG_PM
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extern int s3c_irq_wake(unsigned int irqno, unsigned int state);
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extern int s3c_irqext_wake(unsigned int irqno, unsigned int state);
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#else
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#define s3c_irqext_wake NULL
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#define s3c_irq_wake NULL
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#endif
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@ -28,12 +28,9 @@
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*/
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unsigned long s3c_irqwake_intallow = 1L << (IRQ_RTC - IRQ_EINT0) | 0xfL;
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unsigned long s3c_irqwake_intmask = 0xffffffffL;
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unsigned long s3c_irqwake_eintallow = 0x0000fff0L;
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unsigned long s3c_irqwake_eintmask = 0xffffffffL;
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int
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s3c_irq_wake(unsigned int irqno, unsigned int state)
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int s3c_irq_wake(unsigned int irqno, unsigned int state)
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{
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unsigned long irqbit = 1 << (irqno - IRQ_EINT0);
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@ -51,24 +48,6 @@ s3c_irq_wake(unsigned int irqno, unsigned int state)
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return 0;
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}
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int s3c_irqext_wake(unsigned int irqno, unsigned int state)
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{
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unsigned long bit = 1L << (irqno - EXTINT_OFF);
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if (!(s3c_irqwake_eintallow & bit))
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return -ENOENT;
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printk(KERN_INFO "wake %s for irq %d\n",
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state ? "enabled" : "disabled", irqno);
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if (!state)
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s3c_irqwake_eintmask |= bit;
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else
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s3c_irqwake_eintmask &= ~bit;
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return 0;
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}
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static struct sleep_save irq_save[] = {
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SAVE_ITEM(S3C2410_INTMSK),
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SAVE_ITEM(S3C2410_INTSUBMSK),
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