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usb: Remove broken optimisation in OHCI IRQ handler 

The OHCI IRQ handler has an optimisation that avoids reading some
chip registers when the controller reports that the interrupt was
triggered *only* because completed requests were written into the
controller's "done list" and handed to the host.

This mechanism can't be used on some controllers.  Among others, it
fails for the SA1111 and the AMCC 440EP PowerPC processor.

This patch removes the optimisation and makes the code clearer.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Benjamin Herrenschmidt 2007-12-06 13:28:25 -08:00 committed by Greg Kroah-Hartman
parent 08cbc706ac
commit 565227c082
1 changed files with 13 additions and 10 deletions
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23
drivers/usb/host/ohci-hcd.c
View File

@ -732,24 +732,27 @@ static irqreturn_t ohci_irq (struct usb_hcd *hcd)
struct ohci_regs __iomem *regs = ohci->regs;
int ints;
/* we can eliminate a (slow) ohci_readl()
* if _only_ WDH caused this irq
/* Read interrupt status (and flush pending writes). We ignore the
* optimization of checking the LSB of hcca->done_head; it doesn't
* work on all systems (edge triggering for OHCI can be a factor).
*/
if ((ohci->hcca->done_head != 0)
&& ! (hc32_to_cpup (ohci, &ohci->hcca->done_head)
& 0x01)) {
ints = OHCI_INTR_WDH;
ints = ohci_readl(ohci, &regs->intrstatus);
/* cardbus/... hardware gone before remove() */
} else if ((ints = ohci_readl (ohci, &regs->intrstatus)) == ~(u32)0) {
/* Check for an all 1's result which is a typical consequence
* of dead, unclocked, or unplugged (CardBus...) devices
*/
if (ints == ~(u32)0) {
disable (ohci);
ohci_dbg (ohci, "device removed!\n");
return IRQ_HANDLED;
}
/* We only care about interrupts that are enabled */
ints &= ohci_readl(ohci, &regs->intrenable);
/* interrupt for some other device? */
} else if ((ints &= ohci_readl (ohci, &regs->intrenable)) == 0) {
if (ints == 0)
return IRQ_NOTMINE;
}
if (ints & OHCI_INTR_UE) {
// e.g. due to PCI Master/Target Abort