clk: samsung: exynos7: Correct CMU_CCORE clocks names
This patch renames CMU_CCORE clocks names to match with user manual. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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@ -549,7 +549,7 @@ CLK_OF_DECLARE(exynos7_clk_top1, "samsung,exynos7-clock-top1",
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/*
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* List of parent clocks for Muxes in CMU_CCORE
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*/
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PNAME(mout_aclk_ccore_133_p) = { "fin_pll", "dout_aclk_ccore_133" };
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PNAME(mout_aclk_ccore_133_user_p) = { "fin_pll", "aclk_ccore_133" };
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static unsigned long ccore_clk_regs[] __initdata = {
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MUX_SEL_CCORE,
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@ -557,7 +557,7 @@ static unsigned long ccore_clk_regs[] __initdata = {
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};
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static struct samsung_mux_clock ccore_mux_clks[] __initdata = {
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MUX(0, "mout_aclk_ccore_133_user", mout_aclk_ccore_133_p,
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MUX(0, "mout_aclk_ccore_133_user", mout_aclk_ccore_133_user_p,
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MUX_SEL_CCORE, 1, 1),
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};
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