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Blackfin arch: workaround SIC_IWR1 reset bug, by keeping MDMA0/1 always enabled in SIC_IWR1. 

This way we ensure that reboot succeeds.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
This commit is contained in:
Michael Hennerich 2008-08-13 17:41:13 +08:00 committed by Bryan Wu
parent d3d0ac23a3
commit 55546ac45d
2 changed files with 18 additions and 0 deletions
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9
arch/blackfin/mach-common/ints-priority.c
View File

@ -1069,7 +1069,16 @@ int __init init_arch_irq(void)
#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561)
bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
#if defined(CONFIG_BF52x)
/* BF52x system reset does not properly reset SIC_IWR1 which
* will screw up the bootrom as it relies on MDMA0/1 waking it
* up from IDLE instructions. See this report for more info:
* http://blackfin.uclinux.org/gf/tracker/4323
*/
bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11));
#else
bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
#endif
# ifdef CONFIG_BF54x
bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
# endif

9
arch/blackfin/mach-common/pm.c
View File

@ -84,7 +84,16 @@ void bfin_pm_suspend_standby_enter(void)
#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561)
bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
#if defined(CONFIG_BF52x)
/* BF52x system reset does not properly reset SIC_IWR1 which
* will screw up the bootrom as it relies on MDMA0/1 waking it
* up from IDLE instructions. See this report for more info:
* http://blackfin.uclinux.org/gf/tracker/4323
*/
bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11));
#else
bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
#endif
# ifdef CONFIG_BF54x
bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
# endif