Blackfin arch: workaround SIC_IWR1 reset bug, by keeping MDMA0/1 always enabled in SIC_IWR1.
This way we ensure that reboot succeeds. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
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@ -1069,7 +1069,16 @@ int __init init_arch_irq(void)
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#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561)
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#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561)
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bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
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bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
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#if defined(CONFIG_BF52x)
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/* BF52x system reset does not properly reset SIC_IWR1 which
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* will screw up the bootrom as it relies on MDMA0/1 waking it
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* up from IDLE instructions. See this report for more info:
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* http://blackfin.uclinux.org/gf/tracker/4323
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*/
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bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11));
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#else
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bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
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bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
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#endif
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# ifdef CONFIG_BF54x
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# ifdef CONFIG_BF54x
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bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
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bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
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# endif
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# endif
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@ -84,7 +84,16 @@ void bfin_pm_suspend_standby_enter(void)
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#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561)
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#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561)
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bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
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bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
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#if defined(CONFIG_BF52x)
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/* BF52x system reset does not properly reset SIC_IWR1 which
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* will screw up the bootrom as it relies on MDMA0/1 waking it
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* up from IDLE instructions. See this report for more info:
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* http://blackfin.uclinux.org/gf/tracker/4323
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*/
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bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11));
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#else
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bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
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bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
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#endif
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# ifdef CONFIG_BF54x
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# ifdef CONFIG_BF54x
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bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
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bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
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# endif
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# endif
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