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crypto: s5p-sss - Remove useless hash interrupt handler 

Beside regular feed control interrupt, the driver requires also hash
interrupt for older SoCs (samsung,s5pv210-secss). However after
requesting it, the interrupt handler isn't doing anything with it, not
even clearing the hash interrupt bit.

Driver does not provide hash functions so it is safe to remove the hash
interrupt related code and to not require the interrupt in Device Tree.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Krzysztof Kozlowski 2016-04-19 15:44:12 +02:00 committed by Herbert Xu
parent 07c8fccbf7
commit 5512442553
2 changed files with 8 additions and 32 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
Documentation/devicetree/bindings/crypto/samsung-sss.txt
View File

@ -23,10 +23,8 @@ Required properties:
- "samsung,exynos4210-secss" for Exynos4210, Exynos4212, Exynos4412, Exynos5250,
Exynos5260 and Exynos5420 SoCs.
- reg : Offset and length of the register set for the module
- interrupts : interrupt specifiers of SSS module interrupts, should contain
following entries:
- first : feed control interrupt (required for all variants),
- second : hash interrupt (required only for samsung,s5pv210-secss).
- interrupts : interrupt specifiers of SSS module interrupts (one feed
control interrupt).
- clocks : list of clock phandle and specifier pairs for all clocks listed in
clock-names property.

22
drivers/crypto/s5p-sss.c
View File

@ -149,7 +149,6 @@
/**
* struct samsung_aes_variant - platform specific SSS driver data
* @has_hash_irq: true if SSS module uses hash interrupt, false otherwise
* @aes_offset: AES register offset from SSS module's base.
*
* Specifies platform specific configuration of SSS module.
@ -157,7 +156,6 @@
* expansion of its usage.
*/
struct samsung_aes_variant {
bool has_hash_irq;
unsigned int aes_offset;
};
@ -178,7 +176,6 @@ struct s5p_aes_dev {
struct clk *clk;
void __iomem *ioaddr;
void __iomem *aes_ioaddr;
int irq_hash;
int irq_fc;
struct ablkcipher_request *req;
@ -201,12 +198,10 @@ struct s5p_aes_dev {
static struct s5p_aes_dev *s5p_dev;
static const struct samsung_aes_variant s5p_aes_data = {
.has_hash_irq = true,
.aes_offset = 0x4000,
};
static const struct samsung_aes_variant exynos_aes_data = {
.has_hash_irq = false,
.aes_offset = 0x200,
};
@ -421,7 +416,6 @@ static irqreturn_t s5p_aes_interrupt(int irq, void *dev_id)
spin_lock_irqsave(&dev->lock, flags);
if (irq == dev->irq_fc) {
status = SSS_READ(dev, FCINTSTAT);
if (status & SSS_FCINTSTAT_BRDMAINT)
s5p_aes_rx(dev);
@ -429,7 +423,6 @@ static irqreturn_t s5p_aes_interrupt(int irq, void *dev_id)
s5p_aes_tx(dev);
SSS_WRITE(dev, FCINTPEND, status);
}
spin_unlock_irqrestore(&dev->lock, flags);
@ -795,21 +788,6 @@ static int s5p_aes_probe(struct platform_device *pdev)
goto err_irq;
}
if (variant->has_hash_irq) {
pdata->irq_hash = platform_get_irq(pdev, 1);
if (pdata->irq_hash < 0) {
err = pdata->irq_hash;
dev_warn(dev, "hash interrupt is not available.\n");
goto err_irq;
}
err = devm_request_irq(dev, pdata->irq_hash, s5p_aes_interrupt,
IRQF_SHARED, pdev->name, pdev);
if (err < 0) {
dev_warn(dev, "hash interrupt is not available.\n");
goto err_irq;
}
}
pdata->busy = false;
pdata->variant = variant;
pdata->dev = dev;