drm/msm/mdp5: Remove CTL flush dummy bits
This TODO can now be removed and replaced by the previous patch "drm/msm/mdp5: Update headers (add CTL flush bits)" Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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@ -316,13 +316,6 @@ int mdp5_ctl_blend(struct mdp5_ctl *ctl, u32 lm, u32 blend_cfg)
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u32 mdp_ctl_flush_mask_encoder(struct mdp5_interface *intf)
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{
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/* these are dummy bits for now, but will appear in next chipsets: */
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#define MDP5_CTL_FLUSH_TIMING_0 0x80000000
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#define MDP5_CTL_FLUSH_TIMING_1 0x40000000
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#define MDP5_CTL_FLUSH_TIMING_2 0x20000000
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#define MDP5_CTL_FLUSH_TIMING_3 0x10000000
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#define MDP5_CTL_FLUSH_WB 0x00010000
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if (intf->type == INTF_WB)
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return MDP5_CTL_FLUSH_WB;
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@ -337,10 +330,6 @@ u32 mdp_ctl_flush_mask_encoder(struct mdp5_interface *intf)
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u32 mdp_ctl_flush_mask_cursor(int cursor_id)
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{
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/* these are dummy bits for now, but will appear in next chipsets: */
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#define MDP5_CTL_FLUSH_CURSOR_0 0x00400000
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#define MDP5_CTL_FLUSH_CURSOR_1 0x00800000
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switch (cursor_id) {
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case 0: return MDP5_CTL_FLUSH_CURSOR_0;
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case 1: return MDP5_CTL_FLUSH_CURSOR_1;
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