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irqchip/gic-v3: Mark expected switch fall-through 

When fall-through warnings was enabled by default the following warning
was starting to show up:

In file included from ../arch/arm64/include/asm/cputype.h:132,
                 from ../arch/arm64/include/asm/cache.h:8,
                 from ../include/linux/cache.h:6,
                 from ../include/linux/printk.h:9,
                 from ../include/linux/kernel.h:15,
                 from ../include/linux/list.h:9,
                 from ../include/linux/kobject.h:19,
                 from ../include/linux/of.h:17,
                 from ../include/linux/irqdomain.h:35,
                 from ../include/linux/acpi.h:13,
                 from ../drivers/irqchip/irq-gic-v3.c:9:
../drivers/irqchip/irq-gic-v3.c: In function ‘gic_cpu_sys_reg_init’:
../arch/arm64/include/asm/sysreg.h:853:2: warning: this statement may fall
 through [-Wimplicit-fallthrough=]
  asm volatile(__msr_s(r, "%x0") : : "rZ" (__val));  \
  ^~~
../arch/arm64/include/asm/arch_gicv3.h:20:29: note: in expansion of macro ‘write_sysreg_s’
 #define write_gicreg(v, r)  write_sysreg_s(v, SYS_ ## r)
                             ^~~~~~~~~~~~~~
../drivers/irqchip/irq-gic-v3.c:773:4: note: in expansion of macro ‘write_gicreg’
    write_gicreg(0, ICC_AP0R2_EL1);
    ^~~~~~~~~~~~
../drivers/irqchip/irq-gic-v3.c:774:3: note: here
   case 6:
   ^~~~

Rework so that the compiler doesn't warn about fall-through.

Fixes: d93512ef0f0e ("Makefile: Globally enable fall-through warning")
Signed-off-by: Anders Roxell <anders.roxell@linaro.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
This commit is contained in:
Anders Roxell 2019-07-26 13:28:26 +02:00 committed by Marc Zyngier
parent 3dae67ce60
commit 52f8c8b32e
1 changed files with 4 additions and 0 deletions
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4
drivers/irqchip/irq-gic-v3.c
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@ -775,8 +775,10 @@ static void gic_cpu_sys_reg_init(void)
case 7:
write_gicreg(0, ICC_AP0R3_EL1);
write_gicreg(0, ICC_AP0R2_EL1);
/* Fall through */
case 6:
write_gicreg(0, ICC_AP0R1_EL1);
/* Fall through */
case 5:
case 4:
write_gicreg(0, ICC_AP0R0_EL1);
@ -790,8 +792,10 @@ static void gic_cpu_sys_reg_init(void)
case 7:
write_gicreg(0, ICC_AP1R3_EL1);
write_gicreg(0, ICC_AP1R2_EL1);
/* Fall through */
case 6:
write_gicreg(0, ICC_AP1R1_EL1);
/* Fall through */
case 5:
case 4:
write_gicreg(0, ICC_AP1R0_EL1);