hollalinux
/
linux-sg2042
mirror of https://github.com/sophgo/linux-riscv.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

ARM: 6058/1: Add support for PCI domains 

This patch adds support for PCI domains on ARM platforms.

Also, protect asm/mach/pci.h from multiple inclustions, otherwise
build fails because of pci_domain_nr() and pci_proc_domain()
redefinitions.

Signed-off-by: Anton Vorontsov <avorontsov@mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Anton Vorontsov 2010-04-19 13:20:49 +01:00 committed by Russell King
parent e193ba290f
commit 52882173cf
4 changed files with 33 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/Kconfig
View File

@ -1074,6 +1074,10 @@ config PCI
your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
VESA. If you have PCI, say Y, otherwise N. VESA. If you have PCI, say Y, otherwise N.
config PCI_DOMAINS
bool
depends on PCI
config PCI_SYSCALL config PCI_SYSCALL
def_bool PCI def_bool PCI

11
arch/arm/include/asm/mach/pci.h
View File

@ -8,10 +8,16 @@
* published by the Free Software Foundation. * published by the Free Software Foundation.
*/ */
#ifndef __ASM_MACH_PCI_H
#define __ASM_MACH_PCI_H
struct pci_sys_data; struct pci_sys_data;
struct pci_bus; struct pci_bus;
struct hw_pci { struct hw_pci {
#ifdef CONFIG_PCI_DOMAINS
int domain;
#endif
struct list_head buses; struct list_head buses;
int nr_controllers; int nr_controllers;
int (*setup)(int nr, struct pci_sys_data *); int (*setup)(int nr, struct pci_sys_data *);
@ -26,6 +32,9 @@ struct hw_pci {
* Per-controller structure * Per-controller structure
*/ */
struct pci_sys_data { struct pci_sys_data {
#ifdef CONFIG_PCI_DOMAINS
int domain;
#endif
struct list_head node; struct list_head node;
int busnr; /* primary bus number */ int busnr; /* primary bus number */
u64 mem_offset; /* bus->cpu memory mapping offset */ u64 mem_offset; /* bus->cpu memory mapping offset */
@ -70,3 +79,5 @@ extern int pci_v3_setup(int nr, struct pci_sys_data *);
extern struct pci_bus *pci_v3_scan_bus(int nr, struct pci_sys_data *); extern struct pci_bus *pci_v3_scan_bus(int nr, struct pci_sys_data *);
extern void pci_v3_preinit(void); extern void pci_v3_preinit(void);
extern void pci_v3_postinit(void); extern void pci_v3_postinit(void);
#endif /* __ASM_MACH_PCI_H */

15
arch/arm/include/asm/pci.h
View File

@ -4,8 +4,23 @@
#ifdef __KERNEL__ #ifdef __KERNEL__
#include <asm-generic/pci-dma-compat.h> #include <asm-generic/pci-dma-compat.h>
#include <asm/mach/pci.h> /* for pci_sys_data */
#include <mach/hardware.h> /* for PCIBIOS_MIN_* */ #include <mach/hardware.h> /* for PCIBIOS_MIN_* */
#ifdef CONFIG_PCI_DOMAINS
static inline int pci_domain_nr(struct pci_bus *bus)
{
struct pci_sys_data *root = bus->sysdata;
return root->domain;
}
static inline int pci_proc_domain(struct pci_bus *bus)
{
return pci_domain_nr(bus);
}
#endif /* CONFIG_PCI_DOMAINS */
#ifdef CONFIG_PCI_HOST_ITE8152 #ifdef CONFIG_PCI_HOST_ITE8152
/* ITE bridge requires setting latency timer to avoid early bus access /* ITE bridge requires setting latency timer to avoid early bus access
termination by PIC bus mater devices termination by PIC bus mater devices

3
arch/arm/kernel/bios32.c
View File

@ -527,6 +527,9 @@ static void __init pcibios_init_hw(struct hw_pci *hw)
if (!sys) if (!sys)
panic("PCI: unable to allocate sys data!"); panic("PCI: unable to allocate sys data!");
#ifdef CONFIG_PCI_DOMAINS
sys->domain = hw->domain;
#endif
sys->hw = hw; sys->hw = hw;
sys->busnr = busnr; sys->busnr = busnr;
sys->swizzle = hw->swizzle; sys->swizzle = hw->swizzle;