[POWERPC] Fix kmalloc alignment on non-coherent DMA platforms
On platforms doing non-coherent DMA (4xx, 8xx, ...), it's important that the kmalloc minimum alignment is set to the cache line size, to avoid sharing cache lines between different objects, so that DMA to one of the objects doesn't corrupt the other. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
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@ -6,6 +6,10 @@
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#define PPC_MEMSTART 0
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#ifdef CONFIG_NOT_COHERENT_CACHE
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#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
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#endif
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#ifndef __ASSEMBLY__
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/*
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* The basic type of a PTE - 64 bits for those CPUs with > 32 bit
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