MIPS: asm: spinlock: Fix addiu instruction for R10000_LLSC_WAR case
Commit 5753762cbd1c("MIPS: asm: spinlock: Replace "sub" instruction with "addiu") replaced the "sub" instruction with addiu but it did not update the immediate value in the R10000_LLSC_WAR case. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Fixes: 5753762cbd1c("MIPS: asm: spinlock: Replace "sub" instruction with "addiu"") Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9385/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -263,7 +263,7 @@ static inline void arch_read_unlock(arch_rwlock_t *rw)
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if (R10000_LLSC_WAR) {
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__asm__ __volatile__(
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"1: ll %1, %2 # arch_read_unlock \n"
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" addiu %1, 1 \n"
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" addiu %1, -1 \n"
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" sc %1, %0 \n"
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" beqzl %1, 1b \n"
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: "=" GCC_OFF_SMALL_ASM() (rw->lock), "=&r" (tmp)
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