davinci: dm646x-evm: Add platform data for NAND
This patch adds platform data and partition info for NAND on dm6467 EVM. Note that the partition layout is dependent on the UBL, U-Boot etc. used. This patch tries to minimize that dependency by setting first partition for UBL, U-Boot and environment altogether. Signed-off-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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@ -27,6 +27,10 @@
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#include <media/tvp514x.h>
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#include <media/tvp514x.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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#include <asm/mach-types.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/arch.h>
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@ -34,6 +38,7 @@
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#include <mach/common.h>
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#include <mach/common.h>
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#include <mach/serial.h>
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#include <mach/serial.h>
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#include <mach/i2c.h>
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#include <mach/i2c.h>
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#include <mach/nand.h>
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#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
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#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
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defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
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defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
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@ -42,6 +47,11 @@
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#define HAS_ATA 0
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#define HAS_ATA 0
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#endif
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#endif
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#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x20008000
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#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x42000000
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#define NAND_BLOCK_SIZE SZ_128K
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/* CPLD Register 0 bits to control ATA */
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/* CPLD Register 0 bits to control ATA */
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#define DM646X_EVM_ATA_RST BIT(0)
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#define DM646X_EVM_ATA_RST BIT(0)
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#define DM646X_EVM_ATA_PWD BIT(1)
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#define DM646X_EVM_ATA_PWD BIT(1)
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@ -77,6 +87,63 @@ static struct davinci_uart_config uart_config __initdata = {
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.enabled_uarts = (1 << 0),
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.enabled_uarts = (1 << 0),
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};
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};
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/* Note: We are setting first partition as 'bootloader' constituting UBL, U-Boot
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* and U-Boot environment this avoids dependency on any particular combination
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* of UBL, U-Boot or flashing tools etc.
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*/
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static struct mtd_partition davinci_nand_partitions[] = {
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{
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/* UBL, U-Boot with environment */
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.name = "bootloader",
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.offset = MTDPART_OFS_APPEND,
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.size = 16 * NAND_BLOCK_SIZE,
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.mask_flags = MTD_WRITEABLE, /* force read-only */
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}, {
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.name = "kernel",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_4M,
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.mask_flags = 0,
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}, {
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.name = "filesystem",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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.mask_flags = 0,
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}
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};
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static struct davinci_nand_pdata davinci_nand_data = {
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.mask_cle = 0x80000,
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.mask_ale = 0x40000,
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.parts = davinci_nand_partitions,
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.nr_parts = ARRAY_SIZE(davinci_nand_partitions),
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.ecc_mode = NAND_ECC_HW,
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.options = 0,
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};
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static struct resource davinci_nand_resources[] = {
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{
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.start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
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.end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.start = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
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.end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device davinci_nand_device = {
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.name = "davinci_nand",
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.id = 0,
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.num_resources = ARRAY_SIZE(davinci_nand_resources),
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.resource = davinci_nand_resources,
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.dev = {
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.platform_data = &davinci_nand_data,
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},
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};
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/* CPLD Register 0 Client: used for I/O Control */
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/* CPLD Register 0 Client: used for I/O Control */
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static int cpld_reg0_probe(struct i2c_client *client,
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static int cpld_reg0_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
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const struct i2c_device_id *id)
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@ -632,6 +699,8 @@ static __init void evm_init(void)
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dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
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dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
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dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
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dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
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platform_device_register(&davinci_nand_device);
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if (HAS_ATA)
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if (HAS_ATA)
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dm646x_init_ide();
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dm646x_init_ide();
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