Merge branch 'x86/fpu' into x86/asm
We are about to commit complex rework of various x86 entry code details - create a unified base tree (with FPU commits included) before doing that. Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
commit
50da9d4393
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@ -125,11 +125,10 @@ extern const char * const x86_bug_flags[NBUGINTS*32];
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#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
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#define set_cpu_cap(c, bit) set_bit(bit, (unsigned long *)((c)->x86_capability))
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#define clear_cpu_cap(c, bit) clear_bit(bit, (unsigned long *)((c)->x86_capability))
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#define setup_clear_cpu_cap(bit) do { \
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clear_cpu_cap(&boot_cpu_data, bit); \
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set_bit(bit, (unsigned long *)cpu_caps_cleared); \
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} while (0)
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extern void setup_clear_cpu_cap(unsigned int bit);
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extern void clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int bit);
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#define setup_force_cpu_cap(bit) do { \
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set_cpu_cap(&boot_cpu_data, bit); \
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set_bit(bit, (unsigned long *)cpu_caps_set); \
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@ -21,6 +21,11 @@
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* this feature bit is not displayed in /proc/cpuinfo at all.
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*/
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/*
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* When adding new features here that depend on other features,
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* please update the table in kernel/cpu/cpuid-deps.c
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*/
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/* Intel-defined CPU features, CPUID level 0x00000001 (edx), word 0 */
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#define X86_FEATURE_FPU ( 0*32+ 0) /* Onboard FPU */
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#define X86_FEATURE_VME ( 0*32+ 1) /* Virtual Mode Extensions */
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@ -294,6 +299,12 @@
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#define X86_FEATURE_AVX512VBMI (16*32+ 1) /* AVX512 Vector Bit Manipulation instructions*/
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#define X86_FEATURE_PKU (16*32+ 3) /* Protection Keys for Userspace */
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#define X86_FEATURE_OSPKE (16*32+ 4) /* OS Protection Keys Enable */
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#define X86_FEATURE_AVX512_VBMI2 (16*32+ 6) /* Additional AVX512 Vector Bit Manipulation Instructions */
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#define X86_FEATURE_GFNI (16*32+ 8) /* Galois Field New Instructions */
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#define X86_FEATURE_VAES (16*32+ 9) /* Vector AES */
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#define X86_FEATURE_VPCLMULQDQ (16*32+ 10) /* Carry-Less Multiplication Double Quadword */
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#define X86_FEATURE_AVX512_VNNI (16*32+ 11) /* Vector Neural Network Instructions */
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#define X86_FEATURE_AVX512_BITALG (16*32+12) /* Support for VPOPCNT[B,W] and VPSHUF-BITQMB */
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#define X86_FEATURE_AVX512_VPOPCNTDQ (16*32+14) /* POPCNT for vectors of DW/QW */
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#define X86_FEATURE_LA57 (16*32+16) /* 5-level page tables */
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#define X86_FEATURE_RDPID (16*32+22) /* RDPID instruction */
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@ -33,11 +33,6 @@ DECLARE_EVENT_CLASS(x86_fpu,
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)
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);
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DEFINE_EVENT(x86_fpu, x86_fpu_state,
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TP_PROTO(struct fpu *fpu),
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TP_ARGS(fpu)
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);
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DEFINE_EVENT(x86_fpu, x86_fpu_before_save,
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TP_PROTO(struct fpu *fpu),
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TP_ARGS(fpu)
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@ -73,11 +68,6 @@ DEFINE_EVENT(x86_fpu, x86_fpu_activate_state,
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TP_ARGS(fpu)
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);
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DEFINE_EVENT(x86_fpu, x86_fpu_deactivate_state,
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TP_PROTO(struct fpu *fpu),
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TP_ARGS(fpu)
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);
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DEFINE_EVENT(x86_fpu, x86_fpu_init_state,
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TP_PROTO(struct fpu *fpu),
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TP_ARGS(fpu)
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@ -22,6 +22,7 @@ obj-y += rdrand.o
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obj-y += match.o
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obj-y += bugs.o
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obj-$(CONFIG_CPU_FREQ) += aperfmperf.o
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obj-y += cpuid-deps.o
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obj-$(CONFIG_PROC_FS) += proc.o
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obj-$(CONFIG_X86_FEATURE_NAMES) += capflags.o powerflags.o
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@ -1301,18 +1301,16 @@ void print_cpu_info(struct cpuinfo_x86 *c)
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pr_cont(")\n");
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}
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static __init int setup_disablecpuid(char *arg)
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/*
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* clearcpuid= was already parsed in fpu__init_parse_early_param.
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* But we need to keep a dummy __setup around otherwise it would
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* show up as an environment variable for init.
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*/
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static __init int setup_clearcpuid(char *arg)
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{
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int bit;
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if (get_option(&arg, &bit) && bit >= 0 && bit < NCAPINTS * 32)
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setup_clear_cpu_cap(bit);
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else
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return 0;
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return 1;
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}
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__setup("clearcpuid=", setup_disablecpuid);
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__setup("clearcpuid=", setup_clearcpuid);
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#ifdef CONFIG_X86_64
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DEFINE_PER_CPU_FIRST(union irq_stack_union,
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@ -0,0 +1,125 @@
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/* Declare dependencies between CPUIDs */
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <asm/cpufeature.h>
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struct cpuid_dep {
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unsigned int feature;
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unsigned int depends;
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};
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/*
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* Table of CPUID features that depend on others.
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*
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* This only includes dependencies that can be usefully disabled, not
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* features part of the base set (like FPU).
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*
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* Note this all is not __init / __initdata because it can be
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* called from cpu hotplug. It shouldn't do anything in this case,
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* but it's difficult to tell that to the init reference checker.
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*/
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const static struct cpuid_dep cpuid_deps[] = {
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{ X86_FEATURE_XSAVEOPT, X86_FEATURE_XSAVE },
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{ X86_FEATURE_XSAVEC, X86_FEATURE_XSAVE },
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{ X86_FEATURE_XSAVES, X86_FEATURE_XSAVE },
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{ X86_FEATURE_AVX, X86_FEATURE_XSAVE },
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{ X86_FEATURE_PKU, X86_FEATURE_XSAVE },
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{ X86_FEATURE_MPX, X86_FEATURE_XSAVE },
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{ X86_FEATURE_XGETBV1, X86_FEATURE_XSAVE },
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{ X86_FEATURE_FXSR_OPT, X86_FEATURE_FXSR },
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{ X86_FEATURE_XMM, X86_FEATURE_FXSR },
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{ X86_FEATURE_XMM2, X86_FEATURE_XMM },
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{ X86_FEATURE_XMM3, X86_FEATURE_XMM2 },
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{ X86_FEATURE_XMM4_1, X86_FEATURE_XMM2 },
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{ X86_FEATURE_XMM4_2, X86_FEATURE_XMM2 },
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{ X86_FEATURE_XMM3, X86_FEATURE_XMM2 },
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{ X86_FEATURE_PCLMULQDQ, X86_FEATURE_XMM2 },
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{ X86_FEATURE_SSSE3, X86_FEATURE_XMM2, },
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{ X86_FEATURE_F16C, X86_FEATURE_XMM2, },
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{ X86_FEATURE_AES, X86_FEATURE_XMM2 },
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{ X86_FEATURE_SHA_NI, X86_FEATURE_XMM2 },
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{ X86_FEATURE_FMA, X86_FEATURE_AVX },
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{ X86_FEATURE_AVX2, X86_FEATURE_AVX, },
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{ X86_FEATURE_AVX512F, X86_FEATURE_AVX, },
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{ X86_FEATURE_AVX512IFMA, X86_FEATURE_AVX512F },
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{ X86_FEATURE_AVX512PF, X86_FEATURE_AVX512F },
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{ X86_FEATURE_AVX512ER, X86_FEATURE_AVX512F },
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{ X86_FEATURE_AVX512CD, X86_FEATURE_AVX512F },
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{ X86_FEATURE_AVX512DQ, X86_FEATURE_AVX512F },
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{ X86_FEATURE_AVX512BW, X86_FEATURE_AVX512F },
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{ X86_FEATURE_AVX512VL, X86_FEATURE_AVX512F },
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{ X86_FEATURE_AVX512VBMI, X86_FEATURE_AVX512F },
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{ X86_FEATURE_AVX512_VBMI2, X86_FEATURE_AVX512VL },
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{ X86_FEATURE_GFNI, X86_FEATURE_AVX512VL },
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{ X86_FEATURE_VAES, X86_FEATURE_AVX512VL },
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{ X86_FEATURE_VPCLMULQDQ, X86_FEATURE_AVX512VL },
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{ X86_FEATURE_AVX512_VNNI, X86_FEATURE_AVX512VL },
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{ X86_FEATURE_AVX512_BITALG, X86_FEATURE_AVX512VL },
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{ X86_FEATURE_AVX512_4VNNIW, X86_FEATURE_AVX512F },
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{ X86_FEATURE_AVX512_4FMAPS, X86_FEATURE_AVX512F },
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{ X86_FEATURE_AVX512_VPOPCNTDQ, X86_FEATURE_AVX512F },
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{}
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};
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static inline void __clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int bit)
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{
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clear_bit32(bit, c->x86_capability);
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}
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static inline void __setup_clear_cpu_cap(unsigned int bit)
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{
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clear_cpu_cap(&boot_cpu_data, bit);
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set_bit32(bit, cpu_caps_cleared);
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}
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static inline void clear_feature(struct cpuinfo_x86 *c, unsigned int feature)
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{
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if (!c)
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__setup_clear_cpu_cap(feature);
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else
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__clear_cpu_cap(c, feature);
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}
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/* Take the capabilities and the BUG bits into account */
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#define MAX_FEATURE_BITS ((NCAPINTS + NBUGINTS) * sizeof(u32) * 8)
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static void do_clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int feature)
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{
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DECLARE_BITMAP(disable, MAX_FEATURE_BITS);
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const struct cpuid_dep *d;
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bool changed;
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if (WARN_ON(feature >= MAX_FEATURE_BITS))
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return;
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clear_feature(c, feature);
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/* Collect all features to disable, handling dependencies */
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memset(disable, 0, sizeof(disable));
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__set_bit(feature, disable);
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/* Loop until we get a stable state. */
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do {
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changed = false;
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for (d = cpuid_deps; d->feature; d++) {
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if (!test_bit(d->depends, disable))
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continue;
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if (__test_and_set_bit(d->feature, disable))
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continue;
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changed = true;
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clear_feature(c, d->feature);
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}
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} while (changed);
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}
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void clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int feature)
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{
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do_clear_cpu_cap(c, feature);
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}
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void setup_clear_cpu_cap(unsigned int feature)
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{
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do_clear_cpu_cap(NULL, feature);
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}
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@ -249,6 +249,10 @@ static void __init fpu__init_system_ctx_switch(void)
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*/
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static void __init fpu__init_parse_early_param(void)
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{
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char arg[32];
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char *argptr = arg;
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int bit;
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if (cmdline_find_option_bool(boot_command_line, "no387"))
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setup_clear_cpu_cap(X86_FEATURE_FPU);
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@ -266,6 +270,13 @@ static void __init fpu__init_parse_early_param(void)
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if (cmdline_find_option_bool(boot_command_line, "noxsaves"))
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setup_clear_cpu_cap(X86_FEATURE_XSAVES);
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if (cmdline_find_option(boot_command_line, "clearcpuid", arg,
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sizeof(arg)) &&
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get_option(&argptr, &bit) &&
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bit >= 0 &&
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bit < NCAPINTS * 32)
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setup_clear_cpu_cap(bit);
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}
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/*
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@ -15,6 +15,7 @@
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#include <asm/fpu/xstate.h>
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#include <asm/tlbflush.h>
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#include <asm/cpufeature.h>
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/*
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* Although we spell it out in here, the Processor Trace
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@ -36,6 +37,19 @@ static const char *xfeature_names[] =
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"unknown xstate feature" ,
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};
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static short xsave_cpuid_features[] __initdata = {
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X86_FEATURE_FPU,
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X86_FEATURE_XMM,
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X86_FEATURE_AVX,
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X86_FEATURE_MPX,
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X86_FEATURE_MPX,
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X86_FEATURE_AVX512F,
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X86_FEATURE_AVX512F,
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X86_FEATURE_AVX512F,
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X86_FEATURE_INTEL_PT,
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X86_FEATURE_PKU,
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};
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/*
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* Mask of xstate features supported by the CPU and the kernel:
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*/
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@ -59,26 +73,6 @@ unsigned int fpu_user_xstate_size;
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void fpu__xstate_clear_all_cpu_caps(void)
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{
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setup_clear_cpu_cap(X86_FEATURE_XSAVE);
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setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
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setup_clear_cpu_cap(X86_FEATURE_XSAVEC);
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setup_clear_cpu_cap(X86_FEATURE_XSAVES);
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setup_clear_cpu_cap(X86_FEATURE_AVX);
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setup_clear_cpu_cap(X86_FEATURE_AVX2);
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setup_clear_cpu_cap(X86_FEATURE_AVX512F);
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setup_clear_cpu_cap(X86_FEATURE_AVX512IFMA);
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setup_clear_cpu_cap(X86_FEATURE_AVX512PF);
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setup_clear_cpu_cap(X86_FEATURE_AVX512ER);
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setup_clear_cpu_cap(X86_FEATURE_AVX512CD);
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setup_clear_cpu_cap(X86_FEATURE_AVX512DQ);
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setup_clear_cpu_cap(X86_FEATURE_AVX512BW);
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setup_clear_cpu_cap(X86_FEATURE_AVX512VL);
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setup_clear_cpu_cap(X86_FEATURE_MPX);
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setup_clear_cpu_cap(X86_FEATURE_XGETBV1);
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setup_clear_cpu_cap(X86_FEATURE_AVX512VBMI);
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setup_clear_cpu_cap(X86_FEATURE_PKU);
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setup_clear_cpu_cap(X86_FEATURE_AVX512_4VNNIW);
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setup_clear_cpu_cap(X86_FEATURE_AVX512_4FMAPS);
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setup_clear_cpu_cap(X86_FEATURE_AVX512_VPOPCNTDQ);
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}
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/*
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@ -726,6 +720,7 @@ void __init fpu__init_system_xstate(void)
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unsigned int eax, ebx, ecx, edx;
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static int on_boot_cpu __initdata = 1;
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int err;
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int i;
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WARN_ON_FPU(!on_boot_cpu);
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on_boot_cpu = 0;
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@ -759,6 +754,14 @@ void __init fpu__init_system_xstate(void)
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goto out_disable;
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}
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/*
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* Clear XSAVE features that are disabled in the normal CPUID.
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*/
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for (i = 0; i < ARRAY_SIZE(xsave_cpuid_features); i++) {
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if (!boot_cpu_has(xsave_cpuid_features[i]))
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xfeatures_mask &= ~BIT(i);
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}
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xfeatures_mask &= fpu__get_supported_xfeatures_mask();
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/* Enable xstate instructions to be able to continue with initialization: */
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@ -227,6 +227,32 @@ static inline unsigned long __ffs64(u64 word)
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return __ffs((unsigned long)word);
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}
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/*
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* clear_bit32 - Clear a bit in memory for u32 array
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* @nr: Bit to clear
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* @addr: u32 * address of bitmap
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*
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* Same as clear_bit, but avoids needing casts for u32 arrays.
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*/
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static __always_inline void clear_bit32(long nr, volatile u32 *addr)
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{
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clear_bit(nr, (volatile unsigned long *)addr);
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}
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/*
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* set_bit32 - Set a bit in memory for u32 array
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* @nr: Bit to clear
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* @addr: u32 * address of bitmap
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*
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* Same as set_bit, but avoids needing casts for u32 arrays.
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*/
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static __always_inline void set_bit32(long nr, volatile u32 *addr)
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{
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set_bit(nr, (volatile unsigned long *)addr);
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}
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#ifdef __KERNEL__
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#ifndef set_mask_bits
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|
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